Overlay pattern mark and method for measuring overlay error of wafer to be measured

Abstract

The invention relates to an overlay pattern mark and a method for measuring an overlay error of a wafer to be measured, so as to improve the measurement precision of the overlay error. The overlay pattern mark comprises a first pattern mark and a second pattern mark, the first pattern mark is located on the current layer of mask, and the second pattern mark is located on the previous layer of mask relative to the current layer of mask; each of the first graphic mark and the second graphic mark comprises a first side stripe unit and a second side stripe unit in a first measurement direction and a third side stripe unit and a fourth side stripe unit in a second measurement direction, and the first measurement direction is perpendicular to the second measurement direction; the first graphic mark and the second graphic mark are staggered in a projection plane, and the projection plane is a plane where the first measurement direction and the second measurement direction are located; each side stripe unit comprises a first stripe capable of imaging during exposure, at least one side stripe unit further comprises a plurality of auxiliary streaklines, and the auxiliary streaklines are parallel to the first stripe included in the side stripe unit.

Description

Technical Field

[0001] The present disclosure relates to the field of integrated circuit manufacturing technology, and in particular, to a method for registering graphic identification and measuring the registration error of a wafer to be measured. Background Art

[0002] With the continuous progress of integration technology, the number of stacked circuit layers in an integrated circuit chip is increasing. In the process of multi-layer patterning, in order to achieve good semiconductor performance, the lithographic patterns on the wafer not only need to have accurate feature linewidth dimensions, but also need to ensure the alignment of the upper and lower layers of patterns. If the upper and lower layers of patterns are not aligned, it will not be possible to ensure the reliable connection of the circuits designed on the upper and lower layers. Therefore, the offset between the upper and lower layers of patterns on the wafer, that is, the registration error meeting the error requirements is an important factor to ensure the semiconductor yield.

[0003] In the process of integrated circuit manufacturing, special equipment is usually used to measure the relative position between the current layer pattern and the previous layer pattern on the wafer to determine the registration error. The registration error quantitatively describes the deviation of the current layer pattern relative to the previous layer pattern in the X and Y directions and the distribution of this deviation on the wafer surface. It is a key indicator to test the quality of the lithography process. The most ideal situation is that the current layer pattern is completely aligned with the previous layer pattern, and the registration error is zero. The patterns specifically used to measure the registration error on the wafer are called registration marks. An ideal registration mark must be easy to measure, be able to quickly obtain measurement data, and be able to withstand various process conditions without being easily damaged. Currently, the commonly used registration marks in the industry are mainly divided into two categories: based on image recognition technology (IBO; Image base OVLY) and based on diffraction (DBO; Diffraction base OVLY).

[0004] Among them, common IBO registration marks include BIB (Bar In Bar) registration marks and AIM (Advanced Imaging Metrology) registration marks. Among them, BIB registration marks are usually applicable to thick film photoresists above 10000A. And for the registration marks formed based on thick film photoresists above 10000A, during the imaging process, the photoresist pattern usually suffers from the influence of the surrounding environment to form an asymmetric profile, thereby causing a large registration error. For example, the registration error can reach 100nm. Summary of the Invention

[0005] The purpose of the present disclosure is to provide a method for registering graphic identification and measuring the registration error of a wafer to be measured, so as to improve the accuracy of registration error measurement.

[0006] To achieve the above object, a first aspect of the present disclosure provides a registration pattern mark, which includes a first pattern mark and a second pattern mark. The first pattern mark is located on the current layer mask, and the second pattern mark is located on the previous layer mask relative to the current layer mask;

[0007] Both the first pattern mark and the second pattern mark include a first side stripe unit and a second side stripe unit in a first measurement direction, and a third side stripe unit and a fourth side stripe unit in a second measurement direction. The first measurement direction and the second measurement direction are perpendicular, and the first pattern mark and the second pattern mark are staggered from each other in the projection plane. The projection plane is the plane where the first measurement direction and the second measurement direction are located;

[0008] Each side stripe unit includes a first stripe that can be imaged during exposure, and at least one side stripe unit further includes a plurality of auxiliary lines, and the plurality of auxiliary lines are parallel to the first stripe included in this side stripe unit.

[0009] Optionally, at least one side stripe unit in the first pattern mark includes a plurality of auxiliary lines.

[0010] Optionally, the plurality of auxiliary lines are a plurality of auxiliary stripes, and the auxiliary stripes can be imaged during exposure;

[0011] For each side stripe unit in the first pattern mark that includes the auxiliary stripes, in the projection plane, the first stripe included in this side stripe unit, the plurality of auxiliary stripes, and the first stripe included in the corresponding side stripe unit of the second pattern mark are arranged in sequence, and the distance between any two adjacent stripes is greater than a preset value;

[0012] Among them, for each measurement direction, the distance between the two side stripe units in the second pattern mark in this measurement direction is greater than the distance between the two side stripe units in the first pattern mark in this measurement direction.

[0013] Optionally, the length of the auxiliary line is the same as the length of the first stripe included in each side stripe unit of the first pattern mark, and the length of the first stripe included in each side stripe unit of the first pattern mark is a first value, and the length of the first stripe included in each side stripe unit of the second pattern mark is a second value, and the second value is greater than the first value;

[0014] The width of the auxiliary line is the same as the width of the first stripe.

[0015] Optionally, at least one side stripe unit in the first pattern mark includes a plurality of auxiliary lines, and the plurality of auxiliary lines cannot be imaged during exposure.

[0016] Optionally, the first graphic identifier is centrosymmetric, the second graphic identifier is centrosymmetric, and when the current layer mask is aligned with the previous layer mask, the center points of the first graphic identifier and the second graphic identifier coincide on the projection plane.

[0017] Optionally, the first graphic identifier is located on the scribe lane of the previous layer mask, and the second graphic identifier is located on the scribe lane of the current layer mask.

[0018] A second aspect of the present disclosure provides a method for measuring the overlay error of a wafer under test, where the wafer under test includes the overlay graphic identifier as described in the first aspect of the present disclosure. The method includes:

[0019] Determine a target measurement direction of a stripe unit including the auxiliary stripe, where the target measurement direction includes the first measurement direction and / or the second measurement direction;

[0020] Determine the overlay error between the current layer mask and the previous layer mask in the target measurement direction at least based on the offset distance between the stripe unit including the auxiliary stripe and the stripe unit on the same side in another graphic identifier.

[0021] Optionally, each stripe unit on each side of the first graphic identifier includes a plurality of auxiliary stripes, and the target measurement direction includes the first measurement direction and the second measurement direction;

[0022] The determining the overlay error between the current layer mask and the previous layer mask in the target measurement direction at least based on the offset distance between the stripe unit including the auxiliary stripe and the stripe unit on the same side in another graphic identifier includes:

[0023] Determine the overlay error between the current layer mask and the previous layer mask in the first measurement direction based on the offset distance between the target auxiliary stripe in the first side stripe unit included in the first graphic identifier and the first stripe in the first side stripe unit included in the second graphic identifier, and / or based on the offset distance between the target auxiliary stripe in the second side stripe unit included in the first graphic identifier and the first stripe in the second side stripe unit included in the second graphic identifier;

[0024] Determine the overlay error between the current layer mask and the previous layer mask in the second measurement direction based on the offset distance between the target auxiliary stripe in the third side stripe unit included in the first graphic identifier and the first stripe in the third side stripe unit included in the second graphic identifier, and / or based on the offset distance between the target auxiliary stripe in the fourth side stripe unit included in the first graphic identifier and the first stripe in the fourth side stripe unit included in the second graphic identifier.

[0025] Optionally, the target auxiliary stripe in each side stripe unit is the stripe located in the middle position among the multiple auxiliary stripes and the first stripe included in that side stripe unit.

[0026] By adopting the above technical solution, by setting multiple auxiliary stripes in at least one side stripe unit, the graphic identification density of that side stripe unit is increased, the problem of asymmetric contours of the overlay graphic identification can be avoided, and thus the measurement accuracy of the overlay error can be improved.

[0027] Other features and advantages of the present disclosure will be described in detail in the subsequent specific implementation section. Brief Description of the Drawings

[0028] The drawings are used to provide a further understanding of the present disclosure, and constitute a part of the specification. Together with the following specific implementation, they are used to explain the present disclosure, but do not constitute a limitation to the present disclosure. In the drawings:

[0029] Figure 1 is a schematic diagram showing the translation of an overlay graphic identification according to an exemplary embodiment.

[0030] Figure 2 is a schematic diagram showing an overlay graphic identification according to an exemplary embodiment.

[0031] Figure 3 is a schematic diagram showing a first graphic identification according to an exemplary embodiment.

[0032] Figure 4 is a schematic diagram showing a second graphic identification according to an exemplary embodiment.

[0033] Figure 5 is a schematic diagram showing another overlay graphic identification according to an exemplary embodiment.

[0034] Figure 6 is a flowchart showing a method for measuring the overlay error of a wafer to be measured according to an exemplary embodiment.

[0035] Figure 7 is a block diagram showing an electronic device according to an exemplary embodiment. Detailed Description of the Invention

[0036] The following will describe the specific implementation of the present disclosure in detail with reference to the drawings. It should be understood that the specific implementation described herein is only used to illustrate and explain the present disclosure, and is not used to limit the present disclosure.

[0037] It should be noted that all actions of obtaining signals, information or data in this disclosure are carried out on the premise of complying with the corresponding data protection regulations of the country where the location is located and with the authorization given by the owner of the corresponding device.

[0038] In a non-optimized lithography process, the influence of the thick photoresist process on the overlay error is that, affected by the surrounding environment, the sidewall of the photoresist pattern will tilt to one side, resulting in an asymmetric sidewall. The asymmetric sidewall causes the overlay pattern mark to translate, introducing additional overlay error. Figure 1 is a schematic diagram of the translation of an overlay pattern mark shown according to an exemplary embodiment. As Figure 1 shown, the sidewall of the photoresist pattern tilts to one side, causing the overlay pattern mark to translate from position 1 to the right to position 2, resulting in a large overlay error. In Figure 1 the cross-shaped pattern is the overlay pattern mark.

[0039] In view of this, the present disclosure provides a method for overlay pattern marks and measuring the overlay error of a wafer to be measured, so as to reduce the influence of the surrounding environment on the overlay pattern marks, avoid the problem of asymmetric profiles of the overlay pattern marks caused by the surrounding environment, and improve the measurement accuracy of the overlay error.

[0040] Figure 2 is a schematic diagram of an overlay pattern mark shown according to an exemplary embodiment. As Figure 2 shown, the overlay pattern mark 10 may include a first pattern mark and a second pattern mark. The first pattern mark is located on the current layer mask, and the second pattern mark is located on the previous layer mask relative to the current layer mask. Among them, the current layer mask refers to the layer mask that is currently being exposed and has undergone processes such as development and etching in the lithography process. The previous layer mask of the current layer mask refers to the mask that has been exposed and has undergone processes such as development and etching in the lithography process. The previous layer mask and the current layer mask may or may not be adjacent.

[0041] Exemplarily, assuming that the current layer mask is the 5th layer mask, the previous layer mask may be the 4th layer mask or the 1st layer mask. For example, the previous layer mask may be a preset reference mask. The present disclosure does not make specific limitations on this.

[0042] It should be understood that the pattern mark can be formed on the corresponding mask through an etching process or an ion implantation process.

[0043] The first pattern mark may include a first side stripe unit and a second side stripe unit in a first measurement direction, and a third side stripe unit and a fourth side stripe unit in a second measurement direction. The first measurement direction and the second measurement direction are perpendicular. Figure 3 is a schematic diagram of a first pattern mark shown according to an exemplary embodiment. AsFigure 3 As shown, it is assumed that the first measurement direction is the y-axis direction of the coordinate axis, and the second measurement direction is the x-axis direction of the coordinate axis. The first side stripe unit 101 of the first graphic identifier 100 may be the upper side stripe unit in the y-axis direction, the second side stripe unit 102 of the first graphic identifier 100 may be the lower side stripe unit in the y-axis direction, the third side stripe unit 103 of the first graphic identifier 100 may be the left side stripe unit in the x-axis direction, and the fourth side stripe unit 104 of the first graphic identifier 100 may be the right side stripe unit in the x-axis direction. Among them, in the first graphic identifier 100, the first side stripe unit 101, the second side stripe unit 102, the third side stripe unit 103, and the fourth side stripe unit 104 form a rectangular shape with non-connected adjacent sides.

[0044] The second graphic identifier may include the first and second side stripe units in the first measurement direction, and the third and fourth side stripe units in the second measurement direction. Figure 4 is a schematic diagram of a second graphic identifier shown according to an exemplary embodiment. As Figure 4 shown, it is assumed that the first measurement direction is the y-axis direction of the coordinate axis, and the second measurement direction is the x-axis direction of the coordinate axis. The first side stripe unit 201 of the second graphic identifier 200 may be the upper side stripe unit in the y-axis direction, the second side stripe unit 202 of the second graphic identifier 200 may be the lower side stripe unit in the y-axis direction, the third side stripe unit 203 of the second graphic identifier 200 may be the left side stripe unit in the x-axis direction, and the fourth side stripe unit 204 of the second graphic identifier 200 may be the right side stripe unit in the x-axis direction. Among them, in the second graphic identifier 200, the first side stripe unit 201, the second side stripe unit 202, the third side stripe unit 203, and the fourth side stripe unit 204 form a rectangular shape with non-connected adjacent sides.

[0045] For ease of description, Figure 2 or Figure 3 in the example is illustrated by taking each side stripe unit in the first graphic identifier as including two auxiliary stripes. Exemplarily, as Figure 2 or as shown in FIG. 3, each side stripe unit 101 in the first graphic identifier may include the first stripe a and the auxiliary stripes b1 - b2.

[0046] In the present disclosure, each side stripe unit in the first graphic identifier 100 and the second graphic identifier 200 includes a first stripe that can be imaged during exposure. The first graphic identifier 100 and the second graphic identifier 200 are staggered from each other in the projection plane. That is, in the projection plane, the first side stripe unit 101, the second side stripe unit 102, the third side stripe unit 103, and the fourth side stripe unit 104 in the first graphic identifier 100 do not coincide with the first side stripe unit 201, the second side stripe unit 202, the third side stripe unit 203, and the fourth side stripe unit 204 in the second graphic identifier 200. Herein, the projection plane refers to the plane where the coordinate system is located, that is, the plane where the first measurement direction and the second measurement direction are located.

[0047] In order to avoid the problem of asymmetric contours of the overlay graphic identifiers caused by the surrounding environment, in the present disclosure, at least one side stripe unit includes a plurality of auxiliary lines, so as to avoid the problem of asymmetric contours of the overlay graphic identifiers according to the graphic identifier density of the side stripe unit. And the plurality of auxiliary lines are parallel to the first stripe included in the side stripe unit. Exemplarily, it may be that at least one side stripe unit in the first graphic identifier 100 includes a plurality of auxiliary lines, or it may be that at least one side stripe unit in the second graphic identifier 200 includes a plurality of auxiliary lines.

[0048] In addition, the auxiliary lines may include stripes that can be imaged during exposure and / or lines that cannot be imaged during exposure.

[0049] By adopting the above technical solution, by setting a plurality of auxiliary stripes in at least one side stripe unit to increase the graphic identifier density of the side stripe unit, the problem of asymmetric contours of the overlay graphic identifiers can be avoided, thereby improving the measurement accuracy of the overlay error.

[0050] In order to facilitate the measurement of the overlay error between the current layer mask and the previous layer mask, a plurality of auxiliary lines may be set in at least one side stripe unit of the current layer mask, that is, at least one side stripe unit in the first graphic identifier includes a plurality of auxiliary lines.

[0051] In one embodiment, the plurality of auxiliary lines are a plurality of auxiliary stripes that can be imaged during exposure. For each side stripe unit in the first graphic identifier 100 that includes auxiliary stripes, in the projection plane, the first stripe included in the side stripe unit, the plurality of auxiliary stripes, and the first stripe included in the side stripe unit in the second graphic identifier are arranged in sequence, and the distance between any two adjacent stripes is greater than a preset value.

[0052] Exemplarily, such as Figure 2As shown in FIG. 3, each side stripe unit in the first graphic identifier 100 includes a first stripe a and two auxiliary stripes b1 - b2. The first stripe a included in the first side stripe unit 101 in the first graphic identifier 100, the two auxiliary stripes b1 - b2, and the first stripe included in the first side stripe unit 201 in the second graphic identifier 200 are arranged from the inside to the outside on the projection plane in sequence, and the distance between any two adjacent stripes is greater than a preset value. Wherein, the preset value is the distance value at which the stripes will not stick together when lithographing two adjacent stripes.

[0053] In addition, the distance between any two adjacent stripes can be the same or different, and the present disclosure does not make specific limitations thereon.

[0054] In the present disclosure, for each measurement direction, the distance between the two side stripe units in the second graphic identifier in this measurement direction is greater than the distance between the two side stripe units in the first graphic identifier in this measurement direction. By way of example, as Figure 2 shown, in the first measurement direction, the distance between the first side stripe unit 201 and the second side stripe unit 202 in the second graphic identifier 200 is greater than the distance between the first side stripe unit 101 and the second side stripe unit 102 in the first graphic identifier 100. In the second measurement direction, the distance between the third side stripe unit 203 and the fourth side stripe unit 204 in the second graphic identifier 200 is greater than the distance between the third side stripe unit 103 and the fourth side stripe unit 104 in the first graphic identifier 100. That is to say, on the projection plane, the area of the second graphic identifier 200 is greater than the area of the first graphic identifier 100.

[0055] In one embodiment, the length of the auxiliary line is the same as the length of the first stripe included in each side stripe unit in the first graphic identifier, and the length of the first stripe included in each side stripe unit in the first graphic identifier is a first value, the length of the first stripe included in each side stripe unit in the second graphic identifier is a second value, and the second value is greater than the first value; the width of the auxiliary line is the same as the width of the first stripe included in each side stripe unit.

[0056] By way of example, as Figure 2 shown, the length of the auxiliary stripes b1 - b2 in the first graphic identifier 100 is the same as the length of the first stripe a, and both are less than the length of the first stripe included in each side stripe unit in the second graphic identifier 200. And, in Figure 2 it, the widths of the auxiliary stripes b1 - b2, the first stripe a in the first graphic identifier 100, and the first stripe included in each side stripe unit in the second graphic identifier 200 are all the same.

[0057] Referring to Figures 2-4, the width of each stripe in the overlay pattern mark is 1um, and the width and height of the overlay pattern mark are both 31um. In the second pattern mark 200, the distance between the first side stripe unit 201 and the second side stripe unit 202 is the same as the distance between the third side stripe unit 203 and the fourth side stripe unit 204, both being 24um. The length of each stripe in the second pattern mark 200 is 16um, and the distance between the first stripe included in each side stripe unit and the corresponding side of the overlay pattern mark on that side is 2.5um. In the first pattern mark 100, the distance between the first side stripe unit 101 and the second side stripe unit 102 is the same as the distance between the third side stripe unit 103 and the fourth side stripe unit 104, both being 10um. The length of each stripe in the first pattern mark 100 is 8um. As Figure 2 shown, the intervals between each side stripe are equal and are 1um.

[0058] In one embodiment, the auxiliary line can also be an auxiliary line segment, that is, at least one side unit in the first pattern mark 100 includes a plurality of auxiliary line segments, and the plurality of auxiliary line segments do not form an image during exposure. Exemplarily, Figure 5 is a schematic diagram of another overlay pattern mark shown according to an exemplary embodiment. As Figure 5 shown, each side stripe unit in the first pattern mark 100 includes a plurality of auxiliary line segments. For the convenience of description, it is exemplified that each side stripe unit includes two auxiliary line segments. Among them, the dotted rectangle frame in the figure represents the auxiliary line segments.

[0059] Since the auxiliary line segments do not need to form an image during exposure, the width of the auxiliary line segments can be smaller than the width of the stripes. Exemplarily, if the stripe width is 1um, the width range of the auxiliary line segments is 0.05um to 0.1um. Since the auxiliary line segments do not need to use photoresist and there will be no adhesion problem, the spacing between the auxiliary line segments can be smaller. For example, the spacing can be 0.05um to 0.1um. In addition, the distance between the auxiliary line segments and the first stripe ranges from 0.05um to 0.1um.

[0060] In the present disclosure, as Figure 2 or 5 shown, the first pattern mark is centrosymmetric, the second pattern mark is centrosymmetric, and when the current layer mask aligns with the previous layer mask, the center points of the first pattern mark and the second pattern mark coincide on the projection plane.

[0061] To save space, the overlay pattern mark can be set on the scribe lane of the mask. Exemplarily, the first pattern mark is located on the scribe lane of the previous layer mask, and the second pattern mark is located on the scribe lane of the current layer mask.

[0062] Based on the same inventive concept, the present disclosure also provides a method for measuring the overlay error of a wafer under test, where the wafer under test includes the overlay pattern identification provided by the present disclosure. Figure 6 is a flowchart of a method for measuring the overlay error of a wafer under test shown according to an exemplary embodiment. As Figure 6 shown, the method may include the following steps.

[0063] In step S61, determine the target measurement direction of the stripe unit including the auxiliary line.

[0064] Wherein, the target measurement direction includes a first measurement direction and / or a second measurement direction.

[0065] Exemplarily, if the first-side stripe unit and / or the second-side stripe unit includes an auxiliary line, determine the target measurement direction as the first measurement direction. If the third-side stripe unit and / or the fourth-side stripe unit includes an auxiliary line, determine the target measurement direction as the second measurement direction.

[0066] In step S62, determine the overlay error of the current layer mask plate and the previous layer mask plate in the target measurement direction at least according to the offset distance between the stripe unit including the auxiliary line and the stripe unit on the same side in another pattern identification.

[0067] Exemplarily, referring to Figure 2 , assume that each side stripe unit in the first pattern identification includes a plurality of auxiliary stripes, and the target measurement direction includes a first measurement direction and a second measurement direction.

[0068] The above step S62 may include: determining the overlay error of the current layer mask plate and the previous layer mask plate in the first measurement direction according to the offset distance between the target auxiliary stripe in the first-side stripe unit included in the first pattern identification and the first stripe in the first-side stripe unit included in the second pattern identification, and / or, according to the offset distance between the target auxiliary stripe in the second-side stripe unit included in the first pattern identification and the first stripe in the second-side stripe unit included in the second pattern identification;

[0069] Determine the overlay error of the current layer mask plate and the previous layer mask plate in the second measurement direction according to the offset distance between the target auxiliary stripe in the third-side stripe unit included in the first pattern identification and the first stripe in the third-side stripe unit included in the second pattern identification, and / or, according to the offset distance between the target auxiliary stripe in the fourth-side stripe unit included in the first pattern identification and the first stripe in the fourth-side stripe unit included in the second pattern identification.

[0070] Among them, the target auxiliary stripe can be any one of the auxiliary stripes, or can be the stripe located at the middle position among multiple auxiliary stripes and the first stripe. Among them, the probability that the stripe located at the middle position forms an asymmetric profile is relatively low. Therefore, using the stripe at the middle position as the target stripe further improves the accuracy of the determined overlay error. Refer to Figure 2 , the auxiliary stripe can be auxiliary stripe b1.

[0071] For the first measurement direction, determine the offset distance between the auxiliary stripe b1 in the first side stripe unit 101 included in the first graphic identifier and the first stripe in the first side stripe unit 201 included in the second graphic identifier, and / or determine the offset distance between the auxiliary stripe b1 in the second side stripe unit 102 included in the first graphic identifier and the first stripe in the second side stripe unit 202 included in the second graphic identifier. After that, determine the overlay error in the first measurement direction.

[0072] Exemplarily, the offset distance between the auxiliary stripe b1 in the first side stripe unit 101 of the first graphic identifier and the first stripe in the first side stripe unit 201 of the second graphic identifier can be determined as the overlay error in the first measurement direction. Or, the offset distance between the auxiliary stripe b1 in the second side stripe unit 102 of the first graphic identifier and the first stripe in the second side stripe unit 202 of the second graphic identifier can be determined as the overlay error in the first measurement direction. Or, the average value of the offset distance between the auxiliary stripe b1 in the first side stripe unit 101 of the first graphic identifier and the first stripe in the first side stripe unit 201 of the second graphic identifier and the offset distance between the auxiliary stripe b1 in the second side stripe unit 102 of the first graphic identifier and the first stripe in the second side stripe unit 202 of the second graphic identifier can be determined as the overlay error in the first measurement direction.

[0073] For the second measurement direction, determine the offset distance between the auxiliary stripe b1 in the third side stripe unit 103 included in the first graphic identifier and the first stripe in the third side stripe unit 203 included in the second graphic identifier, and / or determine the offset distance between the auxiliary stripe b1 in the fourth side stripe unit 104 included in the first graphic identifier and the first stripe in the fourth side stripe unit 204 included in the second graphic identifier. After that, determine the overlay error in the second measurement direction.

[0074] Exemplarily, the offset distance between the auxiliary stripe b1 in the third-side stripe unit 103 of the first graphic identifier and the first stripe in the third-side stripe unit 203 of the second graphic identifier can be determined as the overlay error in the second measurement direction. Alternatively, the offset distance between the auxiliary stripe b1 in the fourth-side stripe unit 104 of the first graphic identifier and the first stripe in the fourth-side stripe unit 204 of the second graphic identifier can be determined as the overlay error in the first measurement direction. Or, the average value of the offset distance between the auxiliary stripe b1 in the third-side stripe unit 103 of the first graphic identifier and the first stripe in the third-side stripe unit 203 of the second graphic identifier and the offset distance between the auxiliary stripe b1 in the second-side stripe unit 102 and the auxiliary stripe b1 in the fourth-side stripe unit 104 of the first graphic identifier and the first stripe in the fourth-side stripe unit 204 of the second graphic identifier can be determined as the overlay error in the second measurement direction.

[0075] In this way, by using the overlay graphic identifier provided in the present disclosure to measure the overlay error, the accuracy of the overlay error measurement is improved.

[0076] Figure 7 is a block diagram of an electronic device shown according to an exemplary embodiment. As Figure 7 shown, the electronic device 700 may include: a processor 701, a memory 702. The electronic device 700 may further include one or more of a multimedia component 703, an input / output (I / O) interface 704, and a communication component 705.

[0077] Among them, the processor 701 is used to control the overall operation of the electronic device 700 to complete all or part of the steps in the above method for measuring the overlay error of the wafer to be measured. The memory 702 is used to store various types of data to support the operation of the electronic device 700. These data may include, for example, instructions for any application or method operating on the electronic device 700, as well as application-related data, such as contact data, sent and received messages, pictures, audio, video, and so on. The memory 702 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as Static Random Access Memory (SRAM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Erasable Programmable Read-Only Memory (EPROM), Programmable Read-Only Memory (PROM), Read-Only Memory (ROM), magnetic memory, flash memory, a magnetic disk, or an optical disc. The multimedia component 703 may include a screen and an audio component. Among them, the screen may be a touch screen, and the audio component is used to output and / or input audio signals. For example, the audio component may include a microphone, and the microphone is used to receive external audio signals. The received audio signal may be further stored in the memory 702 or sent through the communication component 705. The audio component also includes at least one speaker for outputting audio signals. The I / O interface 704 provides an interface between the processor 701 and other interface modules, and the above other interface modules may be a keyboard, a mouse, buttons, etc. These buttons may be virtual buttons or physical buttons. The communication component 705 is used for wired or wireless communication between the electronic device 700 and other devices. Wireless communication, such as Wi-Fi, Bluetooth, Near Field Communication (NFC), 2G, 3G, 4G, NB-IoT, eMTC, or other 5G, etc., or a combination of one or more of them, is not limited herein. Therefore, the corresponding communication component 705 may include: a Wi-Fi module, a Bluetooth module, an NFC module, and so on.

[0078] In one exemplary embodiment, the electronic device 700 can be implemented by one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components, and is used to execute the method for measuring the overlay error of the wafer to be measured described above.

[0079] In another exemplary embodiment, a computer-readable storage medium including program instructions is further provided. When the program instructions are executed by a processor, the steps of the method for measuring the overlay error of the wafer to be measured described above are implemented. For example, the computer-readable storage medium can be the memory 702 including the program instructions described above, and the program instructions can be executed by the processor 701 of the electronic device 700 to complete the method for measuring the overlay error of the wafer to be measured described above.

[0080] In another exemplary embodiment, a computer program product is further provided. The computer program product includes a computer program that can be executed by a programmable device, and the computer program has a code part for executing the method for measuring the overlay error of the wafer to be measured described above when executed by the programmable device.

[0081] The preferred embodiments of the present disclosure have been described in detail above in conjunction with the accompanying drawings. However, the present disclosure is not limited to the specific details in the above embodiments. Within the scope of the technical concept of the present disclosure, various simple modifications can be made to the technical solutions of the present disclosure, and these simple modifications all fall within the protection scope of the present disclosure.

[0082] In addition, it should be noted that, among the various specific technical features described in the above specific embodiments, they can be combined in any suitable manner without conflict. To avoid unnecessary repetition, the present disclosure does not separately describe various possible combination methods.

[0083] In addition, any combination can be made between various different embodiments of the present disclosure as long as it does not violate the idea of the present disclosure, and it should also be regarded as the content disclosed by the present disclosure.

Claims

1. A registration pattern mark, characterized in that, the registration pattern mark includes a first pattern mark and a second pattern mark, the first pattern mark is located on the current layer mask, and the second pattern mark is located on the previous layer mask relative to the current layer mask; both the first pattern mark and the second pattern mark include a first side stripe unit and a second side stripe unit in a first measurement direction, and a third side stripe unit and a fourth side stripe unit in a second measurement direction, the first measurement direction and the second measurement direction are perpendicular, and the first pattern mark and the second pattern mark are offset from each other in the projection plane, and the projection plane is the plane where the first measurement direction and the second measurement direction are located; each side stripe unit includes a first stripe that can be imaged during exposure, and at least one side stripe unit further includes a plurality of auxiliary lines, and the plurality of auxiliary lines are parallel to the first stripe included in this side stripe unit.

2. The registration pattern mark according to claim 1, characterized in that, at least one side stripe unit in the first pattern mark includes a plurality of auxiliary lines.

3. The registration pattern mark according to claim 2, characterized in that, the plurality of auxiliary lines are a plurality of auxiliary stripes, and the auxiliary stripes can be imaged during exposure; for each side stripe unit in the first pattern mark that includes the auxiliary stripes, in the projection plane, the first stripe included in this side stripe unit, the plurality of auxiliary stripes, and the first stripe included in this side stripe unit of the second pattern mark are arranged in sequence, and the distance between any two adjacent stripes is greater than a preset value; wherein, for each measurement direction, the distance between the two side stripe units in the second pattern mark in this measurement direction is greater than the distance between the two side stripe units in the first pattern mark in this measurement direction.

4. The registration pattern mark according to claim 2, characterized in that, the length of the auxiliary line is the same as the length of the first stripe included in each side stripe unit in the first pattern mark, and the length of the first stripe included in each side stripe unit in the first pattern mark is a first value, the length of the first stripe included in each side stripe unit in the second pattern mark is a second value, and the second value is greater than the first value; the width of the auxiliary line is the same as the width of the first stripe.

5. The registration pattern mark according to claim 1, characterized in that, at least one side stripe unit in the first pattern mark includes a plurality of auxiliary lines, and the plurality of auxiliary lines are not imaged during exposure.

6. The registration pattern mark according to claim 1, characterized in that, the first pattern mark is centrosymmetric, the second pattern mark is centrosymmetric, and when the current layer mask is aligned with the previous layer mask, the center points of the first pattern mark and the second pattern mark coincide in the projection plane.

7. The registration pattern mark according to any one of claims 1-6, characterized in that, The first graphic identifier is located on the scribe lane of the front-layer mask, and the second graphic identifier is located on the scribe lane of the current-layer mask.

8. A method for measuring the overlay error of a wafer to be measured, characterized in that, the wafer to be measured includes the overlay graphic identifier as described in any one of claims 1-7, and the method includes: determining a target measurement direction of a stripe unit including the auxiliary stripe, the target measurement direction including the first measurement direction and / or the second measurement direction; determining the overlay error between the current-layer mask and the front-layer mask in the target measurement direction at least according to the offset distance between the stripe unit including the auxiliary stripe and the stripe unit on the same side in another graphic identifier.

9. The method according to claim 8, characterized in that, each stripe unit on each side in the first graphic identifier includes a plurality of auxiliary stripes, and the target measurement direction includes the first measurement direction and the second measurement direction; the determining the overlay error between the current-layer mask and the front-layer mask in the target measurement direction at least according to the offset distance between the stripe unit including the auxiliary stripe and the stripe unit on the same side in another graphic identifier includes: determining the overlay error between the current-layer mask and the front-layer mask in the first measurement direction according to the offset distance between the target auxiliary stripe in the first-side stripe unit included in the first graphic identifier and the first stripe in the first-side stripe unit included in the second graphic identifier, and / or according to the offset distance between the target auxiliary stripe in the second-side stripe unit included in the first graphic identifier and the first stripe in the second-side stripe unit included in the second graphic identifier; determining the overlay error between the current-layer mask and the front-layer mask in the second measurement direction according to the offset distance between the target auxiliary stripe in the third-side stripe unit included in the first graphic identifier and the first stripe in the third-side stripe unit included in the second graphic identifier, and / or according to the offset distance between the target auxiliary stripe in the fourth-side stripe unit included in the first graphic identifier and the first stripe in the fourth-side stripe unit included in the second graphic identifier.

10. The method according to claim 9, characterized in that, the target auxiliary stripe in each stripe unit on each side is the stripe located at the middle position among the plurality of auxiliary stripes and the first stripe included in the stripe unit on the same side.

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