High-precision over-temperature protection circuit for power management chip

Abstract

The invention discloses a high-precision over-temperature protection circuit for a power management chip, which comprises a band-gap reference circuit, a thermal turn-off threshold setting circuit and a temperature detection output circuit, the band-gap reference circuit is used for achieving the characteristic that the difference value of base electrode and emitter electrode voltages of two bipolar transistors is in direct proportion to absolute temperature and the characteristic that the base electrode and emitter electrode voltages of the bipolar transistors are negative temperature when the band-gap reference circuit works at different current densities, positive temperature coefficients and negative temperature coefficients are mutually counteracted through proportional superposition, and therefore reference voltage irrelevant to the temperature is obtained. The thermal turn-off threshold setting circuit can obtain different threshold voltages by adjusting the resistance value proportion of different divider resistors, and has the advantages that the high-precision over-temperature protection circuit is designed for a power management chip, and the circuit has high precision; and the method has a very strong inhibition effect on threshold point drift and hysteresis change caused by power supply voltage change.

Description

Technical Field

[0001] The present invention relates to the technical field of overtemperature protection circuits, and particularly to a high-precision overtemperature protection circuit for a power management chip. Background Art

[0002] With the increasing integration of electronic products, the power consumption of the system has also increased significantly, especially for some power management chips and power integrated circuits. The power consumption generated by the circuit causes the chip temperature to rise. Excessive temperature will cause the failure of the integrated devices in the chip and also reduce the chip's lifespan. Due to the limitations of the structure of traditional overtemperature protection circuits, the thermal flip point and hysteresis temperature range are easily affected by the power supply voltage and process, and the accuracy is not high. For example, as Figure 1 shown, the current typical overtemperature protection circuit uses the base-emitter voltage of a PNP transistor, which has the characteristic of negative temperature coefficient, to detect temperature, and the current is a current proportional to temperature. When working normally, the comparator outputs a high level. This circuit adjusts the thermal shutdown, thermal turn-on, and thermal hysteresis by adjusting the resistance values of resistors R1 and R2. Under different process conditions, the resistance value of the resistor changes greatly, and under different power supply voltages, the voltage across the resistor also changes accordingly. Therefore, under different processes and supply voltages, the temperature threshold point and thermal hysteresis of the circuit will change greatly. To solve this problem, a high-precision overtemperature protection circuit for a power management chip is provided to solve the above problems. Summary of the Invention

[0003] To solve the problems in the above background art, the technical solution adopted by the present invention to solve the technical problems is: a high-precision overtemperature protection circuit for a power management chip, which includes: a bandgap reference circuit, a thermal shutdown threshold setting circuit, and a temperature detection output circuit. The bandgap reference circuit is used for the characteristic that the difference between the base-emitter voltages of two bipolar transistors is proportional to the absolute temperature when working at different current densities and the characteristic that the base-emitter voltage of the bipolar transistor has a negative temperature coefficient. By superimposing in proportion, the positive and negative temperature coefficients cancel each other out, so as to obtain a reference voltage independent of temperature. The thermal shutdown threshold setting circuit can obtain different threshold voltages by adjusting the resistance value ratio of different voltage-dividing resistors, so as to realize the setting of thermal shutdown and turn-on thresholds. The temperature detection output circuit detects the base-emitter voltage of a transistor with a negative temperature characteristic and compares it with the set threshold voltage. When the temperature exceeds the overtemperature threshold point, the comparator outputs a high-level signal, and when the temperature drops to the normal temperature range, it outputs a low-level signal.

[0004] As a preferred technical solution of the present invention, the bandgap reference circuit includes PMOS transistor MP1, PMOS transistor MP2, resistor R3, resistor R4, resistor R5, PNP transistor Q2, PNP transistor Q3, and operational amplifier AMP1. The PMOS transistor MP1 is electrically connected to the PMOS transistor MP2. One end of the resistor R4 is electrically connected to the PMOS transistor MP2. The resistor R3 is connected in series to one end of the resistor R4. One end of the PMOS transistor MP1 is electrically connected to the resistor R5. One end of the resistor R5 is electrically connected to the PNP transistor Q2. The resistor R3 is electrically connected to the PNP transistor Q3. One end of the PNP transistor Q3 is electrically connected to the PNP transistor Q2.

[0005] As a preferred technical solution of the present invention, one end of the operational amplifier AMP1 is electrically connected to the PMOS transistor MP1 and the PMOS transistor MP2, and the other end of the operational amplifier AMP1 is respectively connected between the resistor R3 and the resistor R4 and between the resistor R5 and the PNP transistor Q2.

[0006] As a preferred technical solution of the present invention, the thermal shutdown threshold setting circuit includes operational amplifier AMP2, resistor R6, resistor R7, resistor R8. The other end of the operational amplifier AMP2 is connected to the resistor R6. The resistor R6, resistor R7, and resistor R8 are connected in series.

[0007] As a preferred technical solution of the present invention, one end of the operational amplifier AMP2 is electrically connected between the resistor R4 and the PMOS transistor MP2, and one end of the resistor R8 is electrically connected to the PNP transistor Q2.

[0008] As a preferred technical solution of the present invention, the temperature detection output circuit includes PMOS transistors MP3, MP4, MP5, MP6, MP7, MP8, MP9, PMOS transistors MN2, MN3, MN4, PNP transistors Q4, Q5. One end of the PMOS transistor MP3 is electrically connected to the PNP transistor Q4. One end of the PNP transistor Q5 is electrically connected between the MOS transistor MP3 and the PNP transistor Q4.

[0009] As a preferred technical solution of the present invention, one end of the PMOS transistor MP4 is electrically connected to the PNP transistor Q5. The PMOS transistors MP3, MP4, MP5, MP6, MP9 are connected in parallel. The PMOS transistors MP7, MP8, PMOS transistors MN2, MN3 form a closed loop. One end of the PMOS transistor MN4 is electrically connected to the PMOS transistor MP9.

[0010] As a preferred technical solution of the present invention, the temperature detection output circuit further includes an inverter INV1, an inverter INV2, an inverter INV3, a transmission gate TG1, and a transmission gate TG2. The inverter INV1, the inverter INV2, and the inverter INV3 are connected in series. One end of the transmission gate TG1 and the transmission gate TG2 is connected between the lines of the inverter INV2 and the inverter INV3, and the other end of the transmission gate TG1 and the transmission gate TG2 is connected between the lines of the inverter INV1 and the inverter INV2.

[0011] As a preferred technical solution of the present invention, one end of the transmission gate TG1 is connected to the line between the resistor R7 and the resistor R8, one end of the transmission gate TG2 is connected to the line between the resistor R6 and the resistor R7, and one end of the inverter INV1 is connected to the line between the PMOS transistor MN4 and the PMOS transistor MP9.

[0012] The present invention has the following advantages: The high-precision over-temperature protection circuit designed for the power management chip of the present invention has high precision and has a strong inhibitory effect on the threshold point drift and the change of the hysteresis caused by the change of the power supply voltage.

[0013] The voltages of the thermal shutdown point and the thermal turn-on point of the circuit are obtained by dividing the reference voltage by the same type of resistor pair, which has a certain inhibitory ability for the error caused by the deviation of the resistor process. Moreover, the threshold point temperature of the circuit can be flexibly adjusted according to requirements, with strong practicability and can be integrated into various circuits. Description of the Drawings

[0014] Figure 1 is a schematic diagram of the over-temperature protection circuit in the prior art of the preferred embodiment of the present invention;

[0015] Figure 2 is a schematic diagram of the principle of the over-temperature protection circuit of the preferred embodiment of the present invention;

[0016] Figure 3 is a schematic diagram of the principle of the curve of the output voltage of the temperature detection point changing with temperature of the preferred embodiment of the present invention;

[0017] Figure 4 is a schematic diagram of the principle of the over-temperature shutdown and hysteresis characteristic curve of the preferred embodiment of the present invention. Detailed Embodiments

[0018] The technical solutions in the embodiments of the present invention will be clearly and completely described below. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention. In the following description, many specific details are set forth to facilitate a thorough understanding of the present invention. However, the present invention may be implemented in other ways different from those described herein. Therefore, the protection scope of the present invention is not limited by the specific embodiments disclosed below.

[0019] In order to more clearly understand the above objects, features and advantages of the present invention, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0020] Please refer to Figure 2 , a high-precision over-temperature protection circuit for a power management chip of the present invention includes: a bandgap reference circuit, a thermal shutdown threshold setting circuit, and a temperature detection output circuit. The bandgap reference circuit uses the characteristics that the difference between the base-emitter voltages of two bipolar transistors is proportional to the absolute temperature when operating at different current densities and the base-emitter voltage of the bipolar transistor has a negative temperature coefficient. By superimposing in proportion, the positive and negative temperature coefficients cancel each other out, thereby obtaining a reference voltage independent of temperature. The thermal shutdown threshold setting circuit can obtain different threshold voltages by adjusting the resistance ratio of different voltage-dividing resistors, realizing the setting of the thermal shutdown and turn-on thresholds. The temperature detection output circuit detects the base-emitter voltage of a transistor with a negative temperature coefficient and compares it with the set threshold voltage. When the temperature exceeds the over-temperature threshold point, the comparator outputs a high-level signal, and when the temperature drops to the normal temperature range, a low-level signal is output.

[0021] Among them, the bandgap reference circuit includes PMOS transistor MP1, PMOS transistor MP2, resistor R3, resistor R4, resistor R5, PNP transistor Q2, PNP transistor Q3, and operational amplifier AMP1. PMOS transistor MP1 is electrically connected to PMOS transistor MP2. Resistor R4 is electrically connected to one end of PMOS transistor MP2. Resistor R3 is connected in series to one end of resistor R4. One end of PMOS transistor MP1 is electrically connected to resistor R5. One end of resistor R5 is electrically connected to PNP transistor Q2. Resistor R3 is electrically connected to PNP transistor Q3. One end of PNP transistor Q3 is electrically connected to PNP transistor Q2. One end of operational amplifier AMP1 is electrically connected to PMOS transistor MP1 and PMOS transistor MP2. The other end of operational amplifier AMP1 is respectively connected between resistor R3 and resistor R4 and between resistor R5 and PNP transistor Q2.

[0022] The thermal shutdown threshold setting circuit includes operational amplifier AMP2, resistor R6, resistor R7, and resistor R8. The other end of operational amplifier AMP2 is connected to resistor R6, and resistors R6, R7, and R8 are connected in series. One end of operational amplifier AMP2 is electrically connected between resistor R4 and PMOS transistor MP2. One end of resistor R8 is electrically connected to PNP transistor Q2. The temperature detection output circuit includes PMOS transistors MP3, MP4, MP5, MP6, MP7, MP8, MP9, PMOS transistors MN2, MN3, MN4, PNP transistors Q4, and PNP transistor Q5. One end of PMOS transistor MP3 is electrically connected to PNP transistor Q4. One end of PNP transistor Q5 is electrically connected between MOS transistor MP3 and PNP transistor Q4. One end of PMOS transistor MP4 is electrically connected to PNP transistor Q5. PMOS transistors MP3, MP4, MP5, MP6, and MP9 are connected in parallel. PMOS transistors MP7, MP8, PMOS transistors MN2, and MN3 form a closed loop. One end of PMOS transistor MN4 is electrically connected to PMOS transistor MP9.

[0023] The temperature detection output circuit further includes inverter INV1, inverter INV2, inverter INV3, transmission gate TG1, and transmission gate TG2. Inverters INV1, INV2, and INV3 are connected in series. One end of transmission gate TG1 and transmission gate TG2 is connected between the lines between inverter INV2 and inverter INV3. The other end of transmission gate TG1 and transmission gate TG2 is connected between the lines between inverter INV1 and inverter INV2. One end of transmission gate TG1 is connected to the line between resistor R7 and resistor R8. One end of transmission gate TG2 is connected to the line between resistor R6 and resistor R7. One end of inverter INV1 is connected to the line between PMOS transistor MN4 and PMOS transistor MP9. Utilizing the negative temperature characteristic across the collector and emitter of the triode, Q4 and Q5 are used as temperature sensors to detect temperature changes and convert the temperature into a corresponding voltage signal V S , which is connected to the non-inverting input terminal of the comparator. The thermal shutdown threshold point voltage V TH- and the thermal turn-on threshold point voltage V TH+ serve as the two input terminals of a two-way selection transmission gate. When at normal temperature, the output voltage V S >V TH+ >V TH- of the temperature sensor. Therefore, the comparator outputs a high level, which then passes through inverters INV1 and INV2 to turn on transmission gate TG1 and turn off TG2. At this time, the input voltage V D = V TH- at the other end of the inverter, and inverter INV3 outputs VOTP Maintain a low level. As the temperature rises, the base-emitter voltage of the transistor decreases, V S Then it decreases, when V TH- <V T <V TH+ At this time, V D =V TH- , the comparator output will not change. As the temperature rises further, when V S Down to V S <V TH- When the comparator flips, the transmission gate TG1 is turned off, TG2 is turned on, and V D =V TH+ , V OTP Output high level to achieve over-temperature protection.

[0024] Combination Figure 4 As shown in the figure, the temperature changes with the temperature. It can be seen that as the temperature increases, the temperature detection point V S The voltage drops and has a relatively good linearity.

[0025] Combination Figure 4 As shown in the figure, at a typical voltage of 3.3V, the output voltage V is OTP As can be seen from the figure, when the temperature is lower than 125℃, V OTP Output low level, the system works normally, when the temperature exceeds 125℃, V OTP It immediately flips and outputs a high-level signal, triggering the over-temperature protection. When the output signal level flips, the temperature drift is very small, almost approximate to a step. It can be found that the temperature drift of the flip point does not exceed 0.1°C. When the temperature drops to 105°C, V OTP Output low level signal to release the over temperature protection circuit, the temperature hysteresis is 20℃.

[0026] The above shows and describes the basic principles and main features of the present invention and the advantages of the present invention. It is obvious to those skilled in the art that the present invention is not limited to the details of the above exemplary embodiments, and the present invention can be implemented in other specific forms without departing from the spirit or basic features of the present invention. Therefore, no matter from which point of view, the embodiments should be regarded as exemplary and non-restrictive. The scope of the present invention is defined by the attached claims rather than the above description, and it is intended that all changes falling within the meaning and scope of the equivalent elements of the claims are included in the present invention. Any figure mark in the claims should not be regarded as limiting the claims involved.

[0027] Other parts of the present invention not described in detail belong to the prior art and will not be described in detail here.

[0028] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A high-precision over-temperature protection circuit for a power management chip, characterized in that: include: A bandgap reference circuit, a thermal shutdown threshold setting circuit and a temperature detection output circuit. The bandgap reference circuit is used to work with the characteristics that the difference between the base-emitter voltages of two bipolar transistors is proportional to the absolute temperature and the base-emitter voltage of the bipolar transistor is negative temperature. The positive and negative temperature coefficients are offset by proportional superposition to obtain a reference voltage that is independent of temperature. The thermal shutdown threshold setting circuit can obtain different threshold voltages by adjusting the ratio of the resistance values ​​of different voltage-dividing resistors to achieve the setting of thermal shutdown and start thresholds. The temperature detection output circuit detects the base-emitter voltage of the transistor with negative temperature characteristics and compares it with the set threshold voltage. When the temperature exceeds the over-temperature threshold point, the comparator outputs a high-level signal, and when the temperature drops to the normal temperature range, the comparator outputs a low-level signal.

2. A high-precision over-temperature protection circuit for a power management chip as claimed in claim 1, characterized in that: The bandgap reference circuit includes a PMOS tube MP1, a PMOS tube MP2, a resistor R3, a resistor R4, a resistor R5, a PNP transistor Q2, a PNP transistor Q3, and an operating amplifier AMP1. The PMOS tube MP1 is electrically connected to the PMOS tube MP2, the resistor R4 is electrically connected to one end of the PMOS tube MP2, the resistor R3 is connected in series to one end of the resistor R4, one end of the PMOS tube MP1 is electrically connected to the resistor R5, one end of the resistor R5 is electrically connected to the PNP transistor Q2, the resistor R3 is electrically connected to the PNP transistor Q3, and one end of the PNP transistor Q3 is electrically connected to the PNP transistor Q2.

3. A high-precision over-temperature protection circuit for a power management chip as claimed in claim 2, characterized in that: One end of the operational amplifier AMP1 is electrically connected to the PMOS transistor MP1 and the PMOS transistor MP2 , and the other end of the operational amplifier AMP1 is respectively connected between the resistor R3 and the resistor R4 and between the resistor R5 and the PNP transistor Q2 .

4. A high-precision over-temperature protection circuit for a power management chip as claimed in claim 1, characterized in that: The thermal shutdown threshold setting circuit includes an operating amplifier AMP2, a resistor R6, a resistor R7, and a resistor R8. The other end of the operating amplifier AMP2 is connected to the resistor R6. The resistors R6, R7, and R8 are connected in series.

5. A high-precision over-temperature protection circuit for a power management chip as claimed in claim 2, characterized in that: One end of the operational amplifier AMP2 is electrically connected between the resistor R4 and the PMOS transistor MP2 , and one end of the resistor R8 is electrically connected to the PNP transistor Q2 .

6. A high-precision over-temperature protection circuit for a power management chip as claimed in claim 1, characterized in that: The temperature detection output circuit includes PMOS tube MP3, PMOS tube MP4, PMOS tube MP5, PMOS tube MP6, PMOS tube MP7, PMOS tube MP8, PMOS tube MP9, PMOS tube MN2, PMOS tube MN3, PMOS tube MN4, PNP transistor Q4, and PNP transistor Q5. One end of the PMOS tube MP3 is electrically connected to the PNP transistor Q4, and one end of the PNP transistor Q5 is electrically connected between the MOS tube MP3 and the PNP transistor Q4.

7. A high-precision over-temperature protection circuit for a power management chip as claimed in claim 6, characterized in that: One end of the PMOS tube MP4 is electrically connected to the PNP transistor Q5, the PMOS tubes MP3, MP4, MP5, MP6, and MP9 are connected in parallel, the PMOS tubes MP7, MP8, MN2, and MN3 form a closed loop, and one end of the PMOS tube MN4 is electrically connected to the PMOS tube MP9.

8. A high-precision over-temperature protection circuit for a power management chip as claimed in claim 1, characterized in that: The temperature detection output circuit also includes an inverter INV1, an inverter INV2, an inverter INV3, a transmission gate TG1, and a transmission gate TG2. The inverter INV1, the inverter INV2, and the inverter INV3 are connected in series, one end of the transmission gate TG1 and the transmission gate TG2 are connected between the line between the inverter INV2 and the inverter INV3, and the other end of the transmission gate TG1 and the transmission gate TG2 are connected between the line between the inverter INV1 and the inverter INV2.

9. A high-precision over-temperature protection circuit for a power management chip as claimed in claim 8, characterized in that: One end of the transmission gate TG1 is connected to the line between the resistor R7 and the resistor R8, one end of the transmission gate TG2 is connected to the line between the resistor R6 and the resistor R7, and one end of the inverter INV1 is connected to the line between the PMOS transistor MN4 and the PMOS transistor MP9.

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