Data reading method and device, computer equipment and storage medium

Abstract

The invention discloses a data reading method and device, computer equipment and a storage medium, and relates to the technical field of flash memories, and the data reading method comprises the following steps: before reading data, firstly obtaining a performance index value of a current flash memory page at a current moment, and firstly carrying out detection operation on the current flash memory page to obtain an error code index value of the current flash memory page; and determining a target risk level according to the performance index value and the error code index value, then obtaining a target pre-charging duration corresponding to the target risk level, and performing a reading operation on the current flash memory page based on the target pre-charging duration to read data stored in the current flash memory page. As the pre-charging duration can influence the accuracy of data reading, the accuracy of reading the data for the first time can be improved by reading the data by adopting the target pre-charging duration corresponding to the target risk level before data reading, so that the number of times of re-reading is reduced, and the waste of resources is reduced.

Description

Technical Field

[0001] This application relates to the field of flash memory technology, and in particular, to a data reading method, apparatus, computer device, and storage medium. Background Art

[0002] As a mainstream non-volatile storage device, after a NAND flash memory experiences a relatively large number of erase / write cycles (P / E cycles), its reliability gradually decreases, and the read error rate of the NAND flash memory increases accordingly. Therefore, in order to ensure the accuracy of the finally read data, frequent rereading is often required.

[0003] However, since each read operation occupies bus resources and on-chip register resources, multiple reread operations will result in waste of resources. Summary of the Invention

[0004] This application provides a data reading method, apparatus, computer device, storage medium, and program product to at least solve the problem of resource waste caused by a large number of reread operations in related technologies.

[0005] This application provides a data reading method, including:

[0006] Obtaining a performance metric value of a current flash memory page at a current moment;

[0007] Performing a detection operation on the current flash memory page according to a pre-obtained read address of the current flash memory page to obtain an error code metric value of the current flash memory page;

[0008] Determining a target risk level of the current flash memory page according to the performance metric value and the error code metric value;

[0009] Obtaining a target precharge duration corresponding to the target risk level;

[0010] Performing a read operation corresponding to the target risk level on the current flash memory page according to the target precharge duration to obtain data stored in the current flash memory page.

[0011] This application also provides a data reading apparatus, including:

[0012] An obtaining module, configured to obtain a performance metric value of a current flash memory page at a current moment; perform a detection operation on the current flash memory page according to a pre-obtained read address of the current flash memory page to obtain an error code metric value of the current flash memory page;

[0013] A determining module, configured to determine a target risk level of the current flash memory page according to the performance metric value and the error code metric value;

[0014] The acquisition module is further configured to acquire a target pre-charge duration corresponding to a target risk level; according to the target pre-charge duration, perform a read operation corresponding to the target risk level on the current flash page, and acquire the data stored in the current flash page.

[0015] The present application further provides an electronic device, including: a memory for storing a computer program; a processor for implementing the steps of any of the above data reading methods when executing the computer program.

[0016] The present application further provides a computer-readable storage medium, in which a computer program is stored, and wherein the computer program implements the steps of any of the above data reading methods when executed by a processor.

[0017] The present application further provides a computer program product, including a computer program, and the computer program implements the steps of any of the above data reading methods when executed by a processor.

[0018] Through the present application, before reading data, first acquire the performance metric value of the current flash page at the current moment, and first perform a detection operation on the current flash page to obtain its error code metric value. Furthermore, according to the performance metric value and the error code metric value, determine the target risk level, then acquire the target pre-charge duration corresponding to the target risk level, and based on the target pre-charge duration, perform a read operation on the current flash page to read the data stored in the current flash page. Since the pre-charge duration affects the accuracy of data reading, therefore, by using the target pre-charge duration corresponding to the target risk level to read data before data reading, the accuracy of the first data reading can be improved, thereby reducing the number of re-reads and reducing the waste of resources. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the embodiments of the present application, the following will briefly introduce the drawings required in the embodiments. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0020] Figure 1 It is a schematic diagram of the architecture of a data reading system provided by an embodiment of the present application;

[0021] Figure 2 It is a schematic flowchart of a data reading method provided by an embodiment of the present application;

[0022] Figure 3 It is a schematic diagram of the architecture of another data reading system provided by an embodiment of the present application;

[0023] Figure 4A schematic flowchart of another data reading method provided by an embodiment of the present application;

[0024] Figure 5 A schematic flowchart of a data reading device provided by an embodiment of the present application;

[0025] Figure 6 A schematic structural diagram of an electronic device provided by an embodiment of the present application. Detailed implementation manners

[0026] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the protection scope of the present application.

[0027] It should be noted that in the description of the present application, the terms "including", "comprising" or any other variant thereof are intended to cover a non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device. The terms "first", "second", etc. in the present application are used to distinguish similar objects and are not used to describe a specific order or sequence.

[0028] To enable those skilled in the art of the present technology to better understand the solution of the present application, the present application will be further described in detail below in conjunction with the accompanying drawings and specific implementation manners.

[0029] Next, the professional terms involved in the present application will be explained.

[0030] Raw Bit Error Rate (RBER): The proportion of error bits in data before applying any error correction mechanism.

[0031] Reference Voltage: The reference voltage refers to the voltage threshold used when reading or verifying the state of the storage cells of a flash memory. These voltage thresholds can be used to distinguish the charge levels of different storage states, thereby determining the stored data value.

[0032] Pre-charge Voltage (VPRE): The target voltage to which the bit line and the capacitor are charged during the pre-charge stage, which can ensure the accuracy and consistency of subsequent reading operations.

[0033] Embodiments of the present application provide a data reading system, as Figure 1As shown, the data reading system may include a Flash memory, a Flash memory controller, and a page register. The Flash memory may be a NAND Flash memory. The Flash memory is composed of multiple Flash memory pages, and each Flash memory page may include multiple memory cells. Each memory cell may include a capacitor and is connected to a sense amplifier through a bit line.

[0034] Among them, the Flash memory is used to store data, the page register is used to temporarily store the data to be read or written, the Flash memory controller can receive the data command sent by the Central Processing Unit (CPU), parse the address information therefrom, and read the data from the Flash memory according to the address information. The capacitor is used to store charges to represent data bits (0 or 1). The bit line is a wire connecting the memory cell and the sense amplifier. The sense amplifier is used to detect the charge level in the memory cell and convert it into a digital signal (0 or 1). During the data reading process, the voltage change on the bit line reflects the state of the memory cell.

[0035] An embodiment of the present application provides a data reading method, which can be executed by the above-mentioned Flash memory controller, as Figure 2 shown, the flow of the data reading method may include the following steps:

[0036] Step S201, obtain the performance metric value of the current Flash memory page at the current moment.

[0037] Among them, the performance metric value may include the number of erase / write cycles and / or the data retention time. The number of erase / write cycles may be the Programming / Erase Cycle Count. The data retention time is the time for the Flash memory to maintain data integrity without power supply.

[0038] Specifically, as time goes by and the number of read / write operations increases, the read / write performance of the Flash memory page will be affected. Therefore, in order to improve the accuracy of data reading, the performance metric value of the Flash memory page at the current moment can be obtained before reading the data, so that the corresponding pre-charge duration can be used to read the data according to the performance metric value subsequently.

[0039] After receiving the data command sent by the central processing unit, the flash memory controller can parse the data command to obtain the address information. Among them, the address information can include the row address and column address for reading data. The row address can include the logical (LUN) address, block address, plane address, and page address, and the column address is the offset of the flash memory page corresponding to the page address. The flash memory controller can extract the page address from it, that is, obtain the read address of the current flash memory page. For example, the row address for reading data is "LUN0, Plane0, Block0, Page1", and the column address is 0, indicating that the byte offset within page1 is 0.

[0040] The preset storage location of the flash memory controller can store a first mapping table. The first mapping table can include the read addresses of multiple flash memory pages and the performance metric values corresponding to the read addresses of each flash memory page. The preset storage location can be the memory in the flash memory controller. For each flash memory page, after each write-erase operation on the data of the flash memory page, the flash memory controller can update the write-erase count of the flash memory page stored in the first mapping table. In addition, the flash memory controller can test each flash memory page (such as high-temperature acceleration test or regular read verification evaluation) according to a preset period (such as 1 month, 2 months), obtain the data retention time of the flash memory page, and update the data retention time of the flash memory page stored in the first mapping table. In this way, during each read operation, the performance metric value corresponding to the read address of the current flash memory page can be first found in the preset storage location according to the read address of the current flash memory page, that is, the performance metric value of the current flash memory page at the current moment can be found.

[0041] Step S202, perform a detection operation on the current flash memory page according to the pre-obtained read address of the current flash memory page, and obtain the error code metric value of the current flash memory page.

[0042] Among them, the error code metric value can be the error rate, for example, it can be the above-mentioned RBER.

[0043] Specifically, the flash memory controller can detect each storage unit in the current flash memory page through multiple different voltage values, record the number of storage units that are turned on under each voltage value, and then, according to each voltage value and the number of storage units that are turned on under each voltage value, obtain the target curve. The target curve can include multiple peak points. The flash memory controller can determine each peak point as a storage state and calculate the overlapping area between adjacent vector storage states. Then, calculate the area of the overlapping area and the area of the region between the target curve and the coordinate axes. Further, according to the area of the overlapping area and the area of the region between the target curve and the coordinate axes, calculate the ratio of the overlapping area, and determine this ratio as the error code metric value.

[0044] Step S203: Determine the target risk level of the current flash memory page according to the performance index value and the error code index value.

[0045] Method 1

[0046] Step 1: Determine the first risk index value according to the number of erase / write cycles and the preset number of erase / write cycles threshold.

[0047] Step 2: Determine the second risk index value according to the data retention time and the preset data retention time threshold.

[0048] Step 3: Determine the risk contribution coefficient according to the number of erase / write cycles and the data retention time.

[0049] Step 4: Determine the third risk index value according to the error code index value and the risk contribution coefficient.

[0050] Step 5: Determine the comprehensive risk index value according to the first risk index value, the second risk index value, and the third risk index value.

[0051] Step 6: Determine the risk level corresponding to the range of the risk index value where the comprehensive risk index value is located according to the mapping relationship table between the comprehensive risk index value, the pre-built range of risk index values, and the risk levels.

[0052] Step 7: Determine the risk level corresponding to the range of the risk index value where the comprehensive risk index value is located as the target risk level.

[0053] Specifically, first, the flash memory controller can determine the ratio between the number of erase / write cycles and the preset number of erase / write cycles threshold as the first risk index value, and determine the ratio between the data retention time and the preset data retention time threshold as the second risk index value. Second, the flash memory controller can determine the first sub-risk contribution coefficient according to the first preset coefficient, the second preset coefficient, and the number of erase / write cycles, and determine the second sub-risk contribution coefficient according to the third preset coefficient, the fourth preset coefficient, and the data retention time. Then, the flash memory controller can determine the risk contribution coefficient according to the fifth preset coefficient, the sixth preset coefficient, the first sub-risk contribution coefficient, and the second sub-risk contribution coefficient. Finally, the flash memory controller can calculate the comprehensive risk index value according to the first weight coefficient, the first risk index value, the second weight coefficient, the second risk index value, the third weight coefficient, and the third risk index value. Among them, the first preset coefficient, the second preset coefficient, the third preset coefficient, the fourth preset coefficient, the fifth preset coefficient, the sixth preset coefficient, the first weight coefficient, the second weight coefficient, and the third weight coefficient can be obtained through experiments.

[0054] For example, the above steps 1 to 5 can correspond to the following formulas (1) to (5) respectively.

[0055]

[0056] α(PE, DR) = k 1 ·a·e b·PE +k 2 ·c·e -d·PE Formula (3)

[0057] f(E) = 1 - e -α(PE ， DR)·E Formula (4)

[0058] R = w 1 ·PE norm +w 2 ·(1 - DR norm ) + w 3 ·f(E) Formula (5)

[0059] Wherein, PE norm is the first risk index value, DR norm is the second risk index value, f(E) is the third risk index value, α(PE, DR) is the risk contribution coefficient, E is the error code index value, k 1 is the fifth preset coefficient, k 2 is the sixth preset coefficient, a is the first preset coefficient, b is the second preset coefficient, c is the third preset coefficient, d is the fourth preset coefficient. w 1 is the first weight coefficient, w 2 is the second weight coefficient, w 3 is the third weight coefficient, and R is the comprehensive risk index value.

[0060] Since each performance index value will affect the error code index value and the accuracy of subsequent data reading, when calculating the risk level, the flash memory controller first calculates the corresponding risk index value according to each performance index value respectively, and calculates the risk contribution coefficient according to each performance index value. Then, according to the risk contribution coefficient and the error code index value, it calculates the risk index value corresponding to the error code index value. Finally, according to each risk index value and its corresponding weight coefficient, it obtains the comprehensive risk index value. In this way, by combining the performance index value and the error code index value, a more accurate target risk level can be calculated, so that the accurate pre-charge duration can be found according to the target risk level subsequently, and more accurate data can be read, thereby reducing the number of times of re-reading data and greatly saving the bus resources and register resources.

[0061] Method 2

[0062] Step 1: Obtain the risk level division rule matching the performance index value.

[0063] Among them, the risk level division rule matching the performance index value may include the error code index value ranges corresponding to multiple risk levels, or may include multiple threshold ranges, and the risk levels corresponding to each threshold range.

[0064] Step 2: Determine the target risk level according to the error code index value and the risk level division rule.

[0065] Among them, the preset storage location may store the risk level division rule.

[0066] Specifically, the flash memory controller can obtain the risk level division rule matching the performance index value according to the following two methods:

[0067] First, the flash memory controller can read the risk level division rule matching the number of erase / write cycles from the preset storage location according to the number of erase / write cycles. Or, the flash memory controller can read the risk level division rule matching the data retention time from the preset storage location according to the data retention time. Or, the flash memory controller can read the risk level division rule matching both the number of erase / write cycles and the data retention time from the preset storage location according to the number of erase / write cycles and the data retention time.

[0068] Second, the flash memory controller can first determine the performance index value range (including the erase / write cycle range and / or the data retention time range) where the performance index value is located. Further, according to the performance index value range, the flash memory controller can read the risk level division rule matching the performance index value range from the preset storage location, that is, obtain the risk level division rule matching the performance index value. Since the performance index value (especially the number of erasures) is updated relatively frequently, if a value is set for each number of erasures, it may lead to a large amount of data, a large number of data to be searched, waste of resources, and affect the data reading efficiency. Therefore, by setting a range, the data to be searched can be reduced, resources can be saved, and the data reading efficiency can be improved.

[0069] In this way, the flash memory controller can determine the target error index range where the error code index value is located according to the error code index value and the error code index value ranges corresponding to each risk level included in the risk level division rule, and determine the risk level corresponding to the target error code index value range as the target risk level.

[0070] In some alternative embodiments, the flash memory controller can calculate the difference between the error code index value and the preset correction ability index value, and compare the difference with multiple preset threshold ranges to determine the target threshold range into which the difference falls, and determine the risk level corresponding to the target threshold range as the target risk level. Among them, the preset correction ability index value is the maximum number of bits that the flash memory controller can correct or the percentage of the maximum number of bits that can be corrected in the total number of bits after reading the data of a flash memory page.

[0071] Step S204, obtain a target pre-charge duration corresponding to the target risk level.

[0072] Among them, the risk level and the pre-charge duration are inversely proportional, that is, the higher the risk level, the longer the pre-charge duration, and the lower the risk level, the shorter the pre-charge duration.

[0073] Specifically, the preset storage location may also store the pre-charge duration corresponding to each risk level. The flash memory controller can read the target pre-charge duration corresponding to the target risk level from the preset storage location.

[0074] Generally, reading data from the flash memory will go through three stages. Transferring data read from the flash memory to the page register (this stage takes time tR), the page register then transfers the data to the flash memory controller (this stage takes time tT), and the flash memory controller decodes the data (this stage takes time tECC). Among them, transferring data read from the flash memory to the page register specifically includes three stages, namely the pre-charge stage (this stage takes time tPRE), the evaluation stage (this stage takes time tEVA), and the discharge stage (this stage takes time tDIS). In the pre-charge stage, the flash memory controller charges the bit line and the capacitor to the preset pre-charge voltage. In the evaluation stage, the sense amplifier detects the voltage change of the capacitor and judges the storage state of the storage unit accordingly. In the discharge stage, the bit line is discharged to return the storage unit to the initial state. Based on the above analysis, it can be known that the total time spent for each data read is t = tR + tT + tECC, and tR = tPRE + tEVA + tDIS. Since in the composition of tR, the ratio of the three times is approximately tPRE:tEVA:tDIS≈5:1:2, where tPRE accounts for the largest proportion, and the length of the pre-charge duration will also affect the accuracy of data reading. Therefore, this solution considers obtaining the corresponding pre-charge duration according to the risk level, which can improve the accuracy of reading data in the case of a higher risk level and reduce the data reading duration in the case of a lower risk level.

[0075] Taking the risk division rules corresponding to the performance index values including multiple threshold ranges and the risk levels corresponding to each threshold range as an example, for the flash memory pages that have experienced more erase / write cycles or data retention time, the reliability of the storage unit may decrease and the error code index value is higher. And a longer pre-charge duration helps to read the threshold voltage level more accurately. Therefore, in the case of a higher error code index value, that is, a higher risk level, by increasing the pre-charge duration to cope with a higher error rate, the reading accuracy can be improved. When the error correction ability of the flash memory controller is much greater than the error code index value, it means that even if the pre-charge duration is reduced, the error code index value of the flash memory page is very likely to remain below the preset correction ability index value. Therefore, the pre-charge duration can be safely reduced to reduce the read latency and improve the reading efficiency.

[0076] For example, the preset storage location of the flash memory controller may store a second mapping relation table. The second mapping relation table may be as shown in Table 1. The second mapping relation table may store the mapping relation between the performance index value (or the performance index value range), the threshold range (the error code index value range), the preset correction ability index value, the risk level, and the precharge duration. In this way, the flash memory controller can read the second mapping relation table from the preset storage location, and determine the target risk level of the current flash page according to the content included in the second mapping relation table, as well as the performance index value and the error code index value of the current flash page. Furthermore, the corresponding precharge duration can be obtained according to the target risk level.

[0077] Table 1

[0078]

[0079] Step S205: Perform a read operation corresponding to the target risk level on the current flash page according to the target precharge duration, and obtain the data stored in the current flash page.

[0080] Specifically, the flash memory controller can determine whether the target risk level is greater than the preset risk level, and perform corresponding data read operations based on the judgment result. Specifically, the following two situations may be included:

[0081] Situation 1: The target risk level is less than or equal to the preset risk level.

[0082] Specifically, the flash memory controller reads the data stored in the current flash page according to the preset reference voltage and the target precharge duration. That is, in the precharge stage, the target precharge duration is adopted, and the storage unit of the current flash page is charged based on the preset precharge voltage. Then, the storage state of the storage unit is determined based on the adjusted reference voltage (that is, the read operation is performed), the read data is temporarily stored in the page register, and finally, it is transferred from the page register to the flash memory controller. Thus, the read operation of the current flash page is completed.

[0083] Situation 2: It is determined that the target risk level is greater than the preset risk level.

[0084] Method 1: Obtain the historical read data of the current flash page. The historical read data includes the error code index values and the reference voltages respectively corresponding to multiple read operations. The reference voltage corresponding to the read operation with the highest error code index value is determined as the first reference voltage. Read the data stored in the current flash page according to the target precharge duration and the first reference voltage.

[0085] Method 2: When it is determined that the target risk level is greater than the preset risk level, determine the adjustment method corresponding to the performance metric value according to the performance metric value of the current flash page and the preset performance metric value. Determine the second reference voltage according to the adjustment method, the preset adjustment step, and the preset reference voltage. Read the data stored in the current flash page according to the target precharge duration and the second reference voltage.

[0086] Specifically, since the preset reference voltage is determined without any erase / write operations on the storage cell, directly using the preset reference voltage to determine the storage state of the storage cell in the case of a relatively high risk level (the storage cell has undergone multiple erase / write operations) may result in an incorrect determined storage state. Therefore, when the target risk level is greater than the preset risk level, the flash controller can extract the historical read data of the current flash page from the preset storage location (specifically, it can read the historical read data within a duration less than the preset duration threshold from the current moment), and determine the first reference voltage through the historical read data, which can enable more accurate data to be read during the first read operation, reduce the number of subsequent rereads, and thus achieve the purpose of saving resources.

[0087] Alternatively, the flash controller can also compare the performance metric value obtained at the current moment with the preset performance metric value. For example, calculate the difference between the two, and then determine the difference and the mapping relationship table between the difference and the number of step quantities pre-constructed, determine the target quantity, and then determine the adjustment voltage by multiplying the target quantity by the preset adjustment step. The adjustment method can include increasing or decreasing. If the difference is greater than the preset threshold, it can be determined that the adjustment method is to decrease; if the difference is less than the preset threshold, it can be determined that the adjustment method is to increase; if the difference is equal to the preset threshold, it can be determined that no adjustment is made. In this way, the flash controller can determine the second reference voltage according to the adjustment method, the preset adjustment step (or, the corresponding adjustment step can be obtained according to the error code metric value to provide a more refined selection), and the preset reference voltage.

[0088] Finally, the flash controller can use the target precharge duration to charge the storage cells of the current flash page based on the preset precharge voltage, then determine the storage state of the storage cells based on the adjusted reference voltage (i.e., perform a read operation), temporarily store the read data in the page register, and finally transfer it from the page register to the flash controller, thus completing the read operation of the current flash page.

[0089] In some alternative embodiments, the flash memory controller may verify the data of the currently read flash memory page. Specifically, the verification operation may include decoding and verifying the read data, and determining the bit positions with errors. If the number of bit positions with errors is less than or equal to a preset number of bits, a correction operation may be directly performed to obtain the data of the currently read flash memory page after verification, and the verification result is determined to be successful. If the number of bit positions with errors is greater than the preset number of bits, the verification result is determined to be a failure, and a reread process may be executed, which may specifically include the following steps:

[0090] When the verification result is a failure, it may first be determined whether the number of rereads is equal to a preset maximum number of reads. If not, the above steps S201 to S205 may be re-executed until the number of rereads reaches the maximum number of reads, or until the verification result is successful, at which point it is determined that the read operation of the current flash memory page is completed. The flash memory controller may then transfer the finally determined error-free data of the current flash memory page to the central processing unit.

[0091] In the data reading method according to the embodiments of the present application, before reading data, the performance metric value of the current flash memory page at the current moment is first obtained, and a detection operation is performed on the current flash memory page to obtain its error code metric value. Then, based on the performance metric value and the error code metric value, a target risk level is determined, and the target precharge duration corresponding to the target risk level is obtained. Based on this target precharge duration, a read operation is performed on the current flash memory page to read the data stored in the current flash memory page. Since the precharge duration affects the accuracy of data reading, by reading data using the target precharge duration corresponding to the target risk level before data reading, the accuracy of the first data reading can be improved, thereby reducing the number of rereads and wasting resources. Further, reducing the number of rereads can increase the service life of the flash memory and reduce the risk of data loss.

[0092] Such as Figure 3As shown, the NAND controller may include multiple hardware modules such as a read retry decision module, a memory, a dynamic precharge module, an ECC error correction module, a voltage selection module, etc. Among them, various mapping relation tables may be stored in the memory, such as the first mapping relation table and the second mapping relation table mentioned above. The read retry decision module can be used to evaluate the target risk level of the current flash memory page according to the performance index value and the error code index value of the current flash memory page, and to determine whether to perform a read retry process. For example, the ECC module fails to complete the correction operation. The dynamic precharge module can be used to obtain the corresponding precharge duration according to the target risk level and adjust the precharge duration of the current flash memory page. The ECC error correction module can be used to perform ECC decoding and verification on the data of the currently read flash memory page, so as to determine the data with errors stored in the current flash memory page and correct it. The voltage selection module is used to adjust the reference voltage of the current flash memory page. Each hardware module of the NAND controller can cooperate with each other and complete the operation of reading the data of the current flash memory page according to the flowchart as shown in Figure 4 to complete the operation of reading the data of the current flash memory page.

[0093] In the related art, after each data reading, the ECC error correction module first corrects the read data. If the correction fails, it is necessary to enter the read retry process and perform the read operation again. However, in the case of high risk (that is, the target risk level of this solution is greater than the preset risk level), the error rate of the data read for the first time is relatively high, and it is very likely that the ECC error correction module cannot successfully complete the error correction task. That is, the operation of reading the data for the first time actually wastes the data transmission resources from the flash memory to the flash memory controller and the resources of the ECC error correction module, and also makes the data reading process waste the time of transmitting and processing the data. In this solution, during the first read operation, it will first judge whether the risk level is greater than the preset risk level. If so, it will directly read the data by adjusting the reference voltage, increasing the accuracy of the first read data, and then increasing the possibility of successful error correction by the ECC module to reduce the possibility of read retry. Therefore, this solution can reduce the occupation of data transmission resources and the resources of the ECC error correction module.

[0094] Through the description of the above embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be implemented by means of software plus a necessary general hardware platform. Of course, it can also be implemented by hardware, but in many cases, the former is a better implementation method.

[0095] The embodiment of the present application also provides a data reading device, as shown in Figure 5 including:

[0096] An acquisition module 510, configured to acquire a performance metric value of the current flash memory page at the current moment; perform a detection operation on the current flash memory page according to a pre-acquired read address of the current flash memory page, and acquire an error code metric value of the current flash memory page;

[0097] A determination module 520, configured to determine a target risk level of the current flash memory page according to the performance metric value and the error code metric value;

[0098] The acquisition module 510 is further configured to acquire a target pre-charge duration corresponding to the target risk level; perform a read operation corresponding to the target risk level on the current flash memory page according to the target pre-charge duration, and acquire the data stored in the current flash memory page.

[0099] In some alternative embodiments, the performance metric value includes the number of erase-write cycles and the data retention time, where the data retention time is the time for the flash memory to maintain data integrity without power supply;

[0100] The determination module 520 is specifically configured to:

[0101] Determine a first risk metric value according to the number of erase-write cycles and a preset erase-write cycle threshold;

[0102] Determine a second risk metric value according to the data retention time and a preset data retention time threshold;

[0103] Determine a risk contribution coefficient according to the number of erase-write cycles and the data retention time;

[0104] Determine a third risk metric value according to the error code metric value and the risk contribution coefficient;

[0105] Determine a comprehensive risk metric value according to the first risk metric value, the second risk metric value, and the third risk metric value;

[0106] According to the comprehensive risk metric value, a mapping relationship table between a pre-constructed risk metric value range and a risk level, determine the risk level corresponding to the risk metric value range where the comprehensive risk metric value is located;

[0107] Determine the risk level corresponding to the risk metric value range where the comprehensive risk metric value is located as the target risk level.

[0108] In some alternative embodiments, the determination module 520 is specifically configured to:

[0109] Acquire a risk level division rule matching the performance metric value;

[0110] Determine the target risk level according to the error code metric value and the risk level division rule.

[0111] In some alternative embodiments, the error code metric value ranges corresponding to multiple risk levels are included in the risk level classification rule;

[0112] The determining module 520 is specifically configured to:

[0113] Determine the target error metric range in which the error code metric value is located according to the error code metric value and the error code metric value ranges corresponding to each risk level;

[0114] Determine the risk level corresponding to the target error metric range as the target risk level.

[0115] In some alternative embodiments, the obtaining module 510 is specifically configured to:

[0116] Determine whether the target risk level is greater than a preset risk level;

[0117] When it is determined that the target risk level is less than or equal to the preset risk level, read the data stored in the current flash memory page according to the preset reference voltage and the target pre-charge duration.

[0118] In some alternative embodiments, the obtaining module 510 is further configured to:

[0119] When it is determined that the target risk level is greater than the preset risk level, obtain the historical read data of the current flash memory page, where the historical read data includes the error code metric values and reference voltages respectively corresponding to multiple read operations;

[0120] Determine the reference voltage corresponding to the read operation with the highest error code metric value as the first reference voltage;

[0121] Read the data stored in the current flash memory page according to the target pre-charge duration and the first reference voltage.

[0122] In some alternative embodiments, the obtaining module 510 is further configured to:

[0123] When it is determined that the target risk level is greater than the preset risk level, determine the adjustment method corresponding to the performance metric value according to the performance metric value of the current flash memory page and the preset performance metric value;

[0124] Determine a second reference voltage according to the adjustment method, the preset adjustment step, and the preset reference voltage;

[0125] Read the data stored in the current flash memory page according to the target pre-charge duration and the second reference voltage.

[0126] For the descriptions of the features in the embodiments corresponding to the data reading device, reference may be made to the relevant descriptions of the embodiments corresponding to the data reading method, which will not be elaborated here one by one.

[0127] An embodiment of the present application further provides an electronic device, including a processor 10 and a memory 20. A computer program is stored in the memory 20, and the processor 10 is configured to run the computer program to execute the steps in any of the above-described embodiments of the data reading method.

[0128] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored. The computer program is configured to execute the steps in any of the above-described embodiments of the data reading method when running.

[0129] In an exemplary embodiment, the above computer-readable storage medium may include, but is not limited to: various media such as USB flash drives, read-only memories (ROM for short), random access memories (RAM for short), mobile hard disks, magnetic disks, or optical discs that can store computer programs.

[0130] An embodiment of the present application further provides a computer program product. The computer program product includes a computer program, and when the computer program is executed by a processor, the steps in any of the above-described embodiments of the data reading method are implemented.

[0131] An embodiment of the present application further provides another computer program product, including a non-volatile computer-readable storage medium. The non-volatile computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps in any of the above-described embodiments of the data reading method are implemented.

[0132] Those skilled in the art can further realize that the units and algorithm steps of each example described in combination with the embodiments disclosed herein can be implemented by electronic hardware, computer software, or a combination of the two. To clearly illustrate the interchangeability of hardware and software, the components and steps of each example have been generally described according to functions in the above description. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present application.

[0133] The above has introduced in detail a data reading method, device, computer device, storage medium, and program product provided by the present application. Specific examples are used herein to elaborate on the principles and implementation manners of the present application. The description of the above embodiments is only used to help understand the method and its core idea of the present application. It should be noted that for those of ordinary skill in the art in the technical field, without departing from the principle of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the protection scope of the claims of the present application.

Claims

1. A data reading method, characterized in that: include: Get the performance index value of the current flash memory page at the current moment; According to the pre-acquired read address of the current flash memory page, a detection operation is performed on the current flash memory page to obtain an error code index value of the current flash memory page; Determining a target risk level of the current flash memory page according to the performance indicator value and the bit error indicator value; Obtaining a target pre-charging duration corresponding to the target risk level; According to the target precharge duration, a read operation corresponding to the target risk level is performed on the current flash memory page to obtain data stored in the current flash memory page.

2. The data reading method according to claim 1, characterized in that: The performance indicator values ​​include the number of erase and write times and the data retention time, wherein the data retention time is the time for the flash memory to maintain data integrity when there is no power supply; Determining the target risk level of the current flash memory page according to the performance indicator value and the bit error indicator value includes: Determining a first risk indicator value according to the erasure number and a preset erasure number threshold; Determine a second risk indicator value according to the data retention time and a preset data retention time threshold; Determining a risk contribution coefficient according to the number of erase and write times and the data retention time; Determining a third risk indicator value according to the bit error indicator value and the risk contribution coefficient; Determine a comprehensive risk index value according to the first risk index value, the second risk index value, and the third risk index value; Determine the risk level corresponding to the risk indicator value range in which the comprehensive risk indicator value is located according to the mapping relationship table between the comprehensive risk indicator value, the pre-constructed risk indicator value range and the risk level; The risk level corresponding to the risk index value range within which the comprehensive risk index value lies is determined as the target risk level.

3. The data reading method according to claim 1, characterized in that: Determining the target risk level of the current flash memory page according to the performance indicator value and the bit error indicator value includes: Acquire a risk level classification rule that matches the performance indicator value; The target risk level is determined according to the bit error index value and the risk level classification rule.

4. The data reading method according to claim 3, characterized in that: The risk level classification rule includes error indicator value ranges corresponding to multiple risk levels; The determining the target risk level according to the bit error index value and the risk level classification rule includes: Determining a target error indicator range where the bit error indicator value is located according to the bit error indicator value and the bit error indicator value range corresponding to each risk level; The risk level corresponding to the target error indicator range is determined as the target risk level.

5. The data reading method according to any one of claims 1 to 4, characterized in that: The performing a read operation corresponding to the target risk level on the current flash memory page according to the target precharge duration to obtain data stored in the current flash memory page includes: Determining whether the target risk level is greater than a preset risk level; When it is determined that the target risk level is less than or equal to the preset risk level, data stored in the current flash memory page is read according to a preset reference voltage and the target precharge duration.

6. The data reading method according to claim 5, characterized in that: The method further comprises: When it is determined that the target risk level is greater than the preset risk level, obtaining historical read data of the current flash memory page within a time period less than a preset time period threshold from the current moment, wherein the historical read data includes error indicator values ​​and reference voltages corresponding to multiple read operations respectively; Determine the reference voltage corresponding to the read operation with the highest bit error index value as the first reference voltage; Data stored in the current flash memory page is read according to the target precharge duration and the first reference voltage.

7. The data reading method according to claim 5, characterized in that: The method further comprises: When it is determined that the target risk level is greater than the preset risk level, determining an adjustment method corresponding to the performance indicator value according to the performance indicator value of the current flash memory page and the preset performance indicator value; Determining a second reference voltage according to the adjustment method, the preset adjustment step, and the preset reference voltage; Data stored in the current flash memory page is read according to the target precharge duration and the second reference voltage.

8. A data reading device, characterized in that: include: An acquisition module is used to obtain the performance index value of the current flash memory page at the current moment; According to the pre-acquired read address of the current flash memory page, a detection operation is performed on the current flash memory page to obtain an error code index value of the current flash memory page; A determination module, configured to determine a target risk level of the current flash memory page according to the performance indicator value and the bit error indicator value; The acquisition module is further used to acquire a target pre-charging duration corresponding to the target risk level; According to the target precharge duration, a read operation corresponding to the target risk level is performed on the current flash memory page to obtain data stored in the current flash memory page.

9. An electronic device, characterized in that: include: Memory for storing computer programs; A processor, configured to implement the steps of the data reading method according to any one of claims 1 to 7 when executing the computer program.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the data reading method according to any one of claims 1 to 7.

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