Constraint solving method based on parallel multiple cores, electronic equipment and medium

Abstract

The invention relates to the technical field of computers, in particular to a parallel multi-core-based constraint solving method, electronic equipment and a medium, and the method comprises the steps that S1, a main thread obtains a candidate solver core set of a target constraint problem; s2, if M is equal to 1, C1 is determined as the current optimal Cm, the main thread calls the optimal Cm to solve a target constraint problem, S6 is executed, and otherwise S3 is executed; s3, acquiring M sub-threads from the thread pool by the main thread, and establishing a one-to-one correspondence relationship between each sub-thread and the candidate solver core; s4, the main thread copies the target constraint problem into M copies and sends the M copies to each Wm; s5, executing the target constraint problem in parallel for each Wm, and determining the Cm of the earliest obtained solving result as the current optimal Cm; and S6, returning a solving result of the current optimal Cm by the main thread. According to the method, the overall solving performance of the constraint problem is improved, and the robustness and generalization ability of a constraint solver are improved.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular, to a constraint solving method, an electronic device, and a medium based on parallel multi-cores. Background Art

[0002] Constraint problem solving technology has been widely applied in hardware verification, software automated testing, and a series of common programming problems. Many problems can be transformed into constraint problems and solved using a constraint solver. There are various types of solver cores applied to constraint problem solving, and a constraint solver may contain different types of solver cores. Different types of constraint solver cores are usually very different in the types of problems they are good at solving, and the same type of solver core may exhibit different performances on different constraint problems. Therefore, for the same constraint problem, there will be a large difference in the solving speed using different solver cores.

[0003] Before attempting to solve a constraint problem, selecting an optimal solver core is an extremely complex problem. In the prior art, usually a solver core is randomly or roughly selected, and it is impossible to ensure that the optimal solver core is selected, resulting in poor overall solving performance of the constraint problem. Thus, how to select the optimal solver core for a constraint problem and improve the overall solving performance of the constraint problem has become a technical problem to be urgently solved. Summary of the Invention

[0004] The purpose of the present invention is to provide a constraint solving method, an electronic device, and a medium based on parallel multi-cores, which improve the overall solving performance of the constraint problem and enhance the robustness and generalization ability of the constraint solver.

[0005] According to the first aspect of the present invention, there is provided a constraint solving method based on parallel multi-cores, including:

[0006] Step S1, the main thread obtains a candidate solver core set {C 1 , C 2 ,..., C m ,..., C M} of the target constraint problem, where C m is the m-th candidate solver core of the constraint problem to be solved, and the value range of m is from 1 to M, and M is the total number of candidate solver cores of the target constraint problem;

[0007] Step S2, if M is equal to 1, then determine C 1 as the current optimal C m , and the main thread calls the optimal C m to solve the target constraint problem, and execute step S6. If M>1, then execute step S3;

[0008] Step S3: The main thread obtains M sub-threads {W 1 ,W 2 ,...,W m ,...,W M} from the thread pool, and establishes a one-to-one correspondence between each sub-thread and the candidate solver core. W m is the m-th sub-thread, and W m corresponds to C m ;

[0009] Step S4: The main thread copies the target constraint problem M times and sends them to each W m ;

[0010] Step S5: Each W m executes the target constraint problem in parallel, and determines the C m that obtains the solution result earliest as the current optimal C m ;

[0011] Step S6: The main thread returns the solution result of the current optimal C m .

[0012] According to the second aspect of the present invention, there is provided an electronic device, including: at least one processor; and a memory communicatively connected to the at least one processor; wherein, the memory stores instructions executed by the at least one processor, and the instructions are configured to execute the method described in the first aspect of the present invention.

[0013] According to the third aspect of the present invention, there is provided a computer-readable storage medium storing computer-executable instructions, and the computer instructions are used to execute the method described in the first aspect of the present invention.

[0014] Compared with the prior art, the present invention has obvious advantages and beneficial effects. By means of the above technical solutions, a constraint solving method, an electronic device and a medium based on parallel multi-cores provided by the present invention can achieve considerable technical progressiveness and practicality, and have broad utilization value in the industry. It has at least the following beneficial effects:

[0015] In the case of multiple candidate solver cores, the present invention parallelly solves the same target constraint problem based on the multiple candidate solver cores, obtains the current optimal candidate solver core to execute the target constraint problem, improves the overall solving performance of the constraint problem, and enhances the robustness and generalization ability of the constraint solver. Description of the Drawings

[0016] To more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0017] Figure 1 It is a flowchart of a constraint solving method based on parallel multi-cores provided by an embodiment of the present invention. Specific embodiments

[0018] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the drawings in the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, rather than all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present invention.

[0019] An embodiment of the present invention provides a constraint solving method based on parallel multi-cores, as Figure 1 shown, including:

[0020] Step S1: The main thread obtains a candidate solver core set {C 1 , C 2 ,..., C m ,..., C M} of the target constraint problem, where C m is the m-th candidate solver core of the constraint problem to be solved, and the value range of m is from 1 to M, and M is the total number of candidate solver cores of the target constraint problem.

[0021] Among them, the solver core types of different C m are the same or different, and the solver core types include SAT (Boolean satisfiability problem) solver, SMT (Satisfiability modulo theories) solver, CSP (Constraint satisfaction problem) solver, and BDD (Binary decision diagram) solver.

[0022] Step S2: If M is equal to 1, then determine C 1 as the current optimal C m , and the main thread calls the optimal C m to solve the target constraint problem, and execute step S6. If M>1, then execute step S3.

[0023] It should be noted that if M is equal to 1, the optimal solver core is directly determined, and the main thread directly calls the optimal C m to solve the target constraint problem.

[0024] Step S3, the main thread obtains M sub-threads {W 1 , W 2 ,..., W m ,..., W M} from the thread pool, and establishes a one-to-one correspondence between each sub-thread and the candidate solver core. W m is the m-th sub-thread, and W m corresponds to C m .

[0025] Step S4, the main thread copies the target constraint problem M times and sends them to each W m respectively.

[0026] Step S5, each W m executes the target constraint problem in parallel, and determines the C m that obtains the solution result earliest as the current optimal C m .

[0027] Step S6, the main thread returns the solution result of the current optimal C m .

[0028] Among them, the main thread specifically returns the solution result of the current optimal C m to the emulator, and the emulator can specifically be an emulator for performing chip verification.

[0029] The present invention combines different types of solver cores, enabling different types of solver cores to solve the same target constraint problem in parallel simultaneously, which can simplify the problem of selecting which solver core, and always ensure that the most suitable core is selected. It reduces the loss of overall performance caused by incorrect selection of the solver core. In addition, the method described in the embodiments of the present invention has strong generalization ability, and for any type of constraint problem, it can simply and quickly find a suitable solver core, improving the overall solution efficiency.

[0030] As an embodiment, step S1 includes:

[0031] Step S11, the main thread extracts feature information from the target constraint problem, and the feature information includes the number of variables, the number of variable bits, the number of expressions, and the expression type.

[0032] Among them, the target constraint problem consists of variables, constants, and expressions. A variable is a signed or unsigned bit-vector with a fixed bit-width. An expression consists of operands and operators. The operands can be constants or variables, and the operators can include the following six categories: logical operators, bitwise operators, arithmetic operators, relational operators, If-then-else operators, and set relational operators. Among them, the logical operators include &&, ||,!. The bitwise operators include &, |, ^, ~... The arithmetic operators include +, -, *, / , %. The relational operators include >, <, >=, <=, ==,!=. The set relational operators include inside, dist.

[0033] Step S12: Determine the solver cores in the solver corresponding to the solver core that can match the feature information corresponding to the target constraint problem and are not marked with the disabled flag of the target constraint problem as candidate solver cores, and generate a set of candidate solver cores.

[0034] It should be noted that the solver core marked with the disabled flag of the target constraint problem refers to the solver core that is not applicable to the target constraint problem, specifically, it can be the solver core whose solving time for the target constraint problem exceeds the preset waiting time threshold.

[0035] As an embodiment, step S5 includes:

[0036] Step S51: For each W m Perform preprocessing modeling adaptation on the target constraint problem for C m to generate an intermediate state constraint problem P m corresponding to C. m .

[0037] Among them, preprocessing modeling adaptation is a process of making a series of adjustments and optimizations to the original constraint model according to the characteristics, environment, and specific requirements of the specific problem before formally using the solving algorithm to find the solution that satisfies the constraint conditions. The intermediate state constraint problem is a transitional problem form formed after preprocessing modeling adaptation in the process of solving the original constraint problem. Step S51 can be directly implemented based on the existing preprocessing modeling adaptation process and will not be elaborated here.

[0038] Step S52: Start each C m to solve the corresponding P m in combination with the shared inference constraint library, and the initial state of the shared inference constraint library is empty.

[0039] Step S53: If C m generates an inference constraint, then C mThe corresponding inference constraint is returned to the main thread, and the main thread stores C m the corresponding inference constraint in the shared inference constraint library.

[0040] Among them, the inference constraint refers to the additional constraint information deduced through an inference mechanism based on the existing constraint conditions of the target constraint problem, the relevant knowledge of the problem domain, and logical rules, etc. These information help to further limit the solution space of the problem and help to find the feasible solution that meets all constraints more efficiently and accurately. By setting up a shared inference constraint library, each C m interacts with the shared inference constraint library to jointly solve the corresponding P m , thereby accelerating the solution process.

[0041] Step S54: Determine the C m that obtains the solution result earliest as the current optimal C m .

[0042] During the chip verification process, the same constraint problem may be solved multiple times. To further improve the solution efficiency of subsequent processing for the same target constraint problem, the present invention performs subsequent processing through the following three embodiments:

[0043] Embodiment 1:

[0044] After step S6, it includes:

[0045] Step S7: The main thread marks the current optimal C m as the optimal solver core of the target constraint problem and broadcasts an end signal to all W m .

[0046] Step S8: All W m end the solution process of the target constraint problem and release the occupied memory resources.

[0047] It should be noted that through steps S7 - S8, the optimal solver core can be directly called in the main thread to solve the target constraint problem in subsequent solutions, improving the solution speed.

[0048] After step S8, it further includes:

[0049] Step S9: Obtain the target constraint problem again and directly call the solver core marked with the optimal solver core of the target constraint problem to solve the target constraint problem.

[0050] It should be noted that by directly calling the solver core marked with the optimal solver core of the target constraint problem through step S9 to solve the target constraint problem, the solution speed of the target constraint problem is improved.

[0051] Embodiment 2:

[0052] After the step S6, the following steps are included:

[0053] Step C7: Keep the W corresponding to the C other than the current optimal C running in the background. m except for the C m corresponding W m Continue to run in the background.

[0054] Step C8: Cache the solution results returned within the preset waiting time threshold in the solution result cache queue corresponding to the target constraint problem. The initial state of the solution result cache queue corresponding to the target constraint problem is empty.

[0055] Step C9: Mark the target constraint problem disable flag on the C for which the solution result is not returned after exceeding the preset waiting time threshold. m

[0056] It should be noted that by marking the target constraint problem disable flag in step C9, the speed and accuracy of obtaining the candidate solver core set when step S1 is executed again can be improved.

[0057] After the step C9, the following steps are further included:

[0058] Step C10: Obtain the target constraint problem again. If the solution result cache queue corresponding to the target constraint problem is not empty, execute step C20; if it is empty, return to execute step S1.

[0059] Step C20: The main thread takes the solution result stored earliest in the solution result cache queue corresponding to the current target constraint problem as the solution result of the target constraint problem and returns it, and deletes the solution result stored earliest in the solution result cache queue corresponding to the current target constraint problem.

[0060] It should be noted that through steps C10 - C20, the solution results in the solution result cache queue can be directly utilized, skipping the solution process of the solver core, thus improving the overall solution efficiency.

[0061] Embodiment III

[0062] After the step S6, the following steps are included:

[0063] Step E7: If the current memory capacity is less than the preset memory threshold, execute step E8; otherwise, execute step E9.

[0064] Step E8: The main thread marks the current optimal C as the optimal solver core of the target constraint problem and broadcasts an end signal to all W. m m All W m End the solution process of the target constraint problem, release the occupied memory resources, and end the process.​​

[0065] Step E9. Exclude the current optimal C m other than C m corresponding W m to continue running in the background, cache the solution results returned within the preset waiting time threshold in the solution result cache queue corresponding to the target constraint problem in sequence, and mark the target constraint problem disabled flag on C m when the solution result has not been returned after exceeding the preset waiting time threshold. The initial state of the solution result cache queue corresponding to the target constraint problem is empty.

[0066] Through steps E7 - E9, it is possible to determine the subsequent execution situation of C m other than the current optimal C m corresponding W m According to the current memory capacity situation, when the current memory capacity is sufficient, preferentially obtain the solution result cache queue; when the current memory capacity is insufficient, mark the current optimal C m as the optimal solver core for the target constraint problem.

[0067] After step E8 or step E9, it further includes:

[0068] Step E10. Obtain the target constraint problem again. If the solution result cache queue corresponding to the target constraint problem is not empty, execute step E20; if it is empty, execute step E30.

[0069] Step E20. The main thread takes the solution result earliest stored in the solution result cache queue corresponding to the current target constraint problem as the solution result of the target constraint problem and returns it, and deletes the solution result earliest stored in the solution result cache queue corresponding to the current target constraint problem.

[0070] Step E30. Determine whether there is a solver core marked with the optimal solver core for the target constraint problem currently. If there is, execute step E40; otherwise, return to execute step S1.

[0071] Step E40. The main thread determines the solver core marked with the optimal solver core for the target constraint problem as the current optimal C m , call the optimal C m to solve the target constraint problem, and return the solution result of the current optimal C m .

[0072] It should be noted that through step E10-step E40, when there is a solution result cache queue, a solution can be preferentially selected from the solution result cache queue for the target constraint problem, skipping the solution steps. When the solution result cache queue is empty, the solver core of the optimal solver core is selected for solution. When the solution result cache queue is empty and there is no optimal solver core, the solution process is executed through steps S1-S6.

[0073] It should be noted that some exemplary embodiments are described as processes or methods depicted as flowcharts. Although the flowcharts depict the steps as sequential processes, many of the steps can be implemented in parallel, concurrently, or simultaneously. In addition, the order of the steps can be rearranged. The process can be terminated when its operations are completed, but there can also be additional steps not included in the figures. The process can correspond to a method, function, procedure, subroutine, subprogram, and so on.

[0074] The embodiment of the present invention also provides an electronic device, including: at least one processor; and a memory communicatively connected to the at least one processor; wherein, the memory stores instructions executed by the at least one processor, and the instructions are configured to execute the method described in the embodiment of the present invention.

[0075] The embodiment of the present invention also provides a computer-readable storage medium storing computer-executable instructions, and the computer instructions are used to execute the method described in the embodiment of the present invention.

[0076] In the embodiment of the present invention, in the case of multiple candidate solver cores, the same target constraint problem is solved in parallel based on the multiple candidate solver cores, and the current optimal candidate solver core is obtained to execute the target constraint problem, which improves the overall solution performance of the constraint problem and enhances the robustness and generalization ability of the constraint solver.

[0077] The above are only the preferred embodiments of the present invention and do not impose any form of limitation on the present invention. Although the present invention has been disclosed above with the preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some changes or modifications to the equivalent embodiments by using the disclosed technical content within the scope of the technical solution of the present invention. However, as long as the content does not depart from the technical solution of the present invention, any simple modification, equivalent change, and modification made to the above embodiments based on the technical essence of the present invention still fall within the scope of the technical solution of the present invention.

Claims

1. A constraint solving method based on parallel multi-core, characterized in that: include: Step S1: The main thread obtains a core set of candidate solvers {C1, C2, ..., C m ,...,C M }, C m is the mth candidate solver core of the constraint problem to be solved, the value of m ranges from 1 to M, and M is the total number of candidate solver cores of the target constraint problem; Step S2: If M is equal to 1, then C1 is determined as the current optimal C m , the main thread calls the optimal C m Solve the target constraint problem and execute step S6. If M>1, execute step S3. Step S3: The main thread obtains M child threads {W1, W2, ..., W m ,...,W M }, and establish a one-to-one correspondence between each subthread and the candidate solver core, W m is the mth child thread, W m With C m corresponding; Step S4: The main thread copies the target constraint problem into M copies and sends them to each W m ; Step S5: Each W m Execute the target constraint problem in parallel and get the solution result first. m Determined as the current optimal C m ; Step S6: The main thread returns the current optimal C m The solution result of .

2. The method according to claim 1, characterized in that The step S6 then includes: Step S7: The main thread converts the current optimal C m is marked as the optimal solver core of the target constraint problem and is sent to all W m Broadcast end signal; Step S8: All W m End the goal constraint problem solving process and release the occupied memory resources.

3. The method according to claim 2, characterized in that After step S8, the following steps are also included: Step S9: obtaining the target constraint problem again, and directly calling the solver core of the optimal solver core marked with the target constraint problem to solve the target constraint problem.

4. The method according to claim 1, characterized in that The step S6 then includes: Step C7: Remove the current optimal C m C m The corresponding W m Continue to run in the background; Step C8, caching the solution results returned within the preset waiting time threshold in order in the solution result cache queue corresponding to the target constraint problem, and the solution result cache queue corresponding to the target constraint problem is initially empty; Step C9: If the preset waiting time threshold is exceeded and no solution result is returned, m The upper annotation target constraint problem disables the flag.

5. The method according to claim 4, characterized in that After step C9, the step further includes: Step C10, obtaining the target constraint problem again, if the solution result cache queue corresponding to the target constraint problem is not empty, executing step C20, if it is empty, returning to executing step S1; Step C20, the main thread uses the earliest solution result stored in the solution result cache queue corresponding to the current target constraint problem as the target constraint problem to obtain the solution result and returns it, and deletes the earliest solution result stored in the solution result cache queue corresponding to the current target constraint problem.

6. The method according to claim 1, characterized in that The step S6 then includes: Step E7: If the current memory capacity is less than the preset memory threshold, execute step E8; otherwise, execute step E9; Step E8: The main thread converts the current optimal C m is marked as the optimal solver core of the target constraint problem and is sent to all W m Broadcast end signal, all W m End the target constraint problem solving process, release the occupied memory resources, and end the process; Step E9: Remove the current optimal C m C m The corresponding W m Continue to run in the background, cache the solution results returned within the preset waiting time threshold in the solution result cache queue corresponding to the target constraint problem in order, and cache the solution results returned within the preset waiting time threshold in the C m The target constraint problem is marked with a disabled flag, and the solution result cache queue corresponding to the target constraint problem is initially empty.

7. The method according to claim 6, characterized in that After step E8 or step E9, the following steps may also be included: Step E10, obtaining the target constraint problem again, if the solution result cache queue corresponding to the target constraint problem is not empty, executing step E20, if it is empty, executing step E30; Step E20, the main thread uses the earliest solution result stored in the solution result cache queue corresponding to the current target constraint problem as the target constraint problem to obtain the solution result and returns it, and deletes the earliest solution result stored in the solution result cache queue corresponding to the current target constraint problem; Step E30, determining whether there is currently a solver core labeled with an optimal solver core of the target constraint problem, if so, executing step E40, otherwise, returning to executing step S1; Step E40: The main thread determines the solver core of the optimal solver core marked with the target constraint problem as the current optimal C m , call the optimal C m Solve the target constraint problem and return the current optimal C m The solution result of .

8. The method according to claim 1, characterized in that The step S5 comprises: Step S51: Each W m For the target constraint problem, m Preprocessing modeling adaptation to generate C m The corresponding intermediate state constraint problem P m ; Step S52: Start each C m Combine the shared reasoning constraint library to the corresponding P m Solving, the shared reasoning constraint library is initially empty; Step S53: If C m Generate inference constraints, then C m The corresponding inference constraints are returned to the main thread, and the main thread converts C m The corresponding reasoning constraints are stored in the shared reasoning constraint library; Step S54: The C that obtains the solution result earliest m Determined as the current optimal C m .

9. An electronic device, characterized in that: include: at least one processor; and, a memory communicatively coupled to the at least one processor; The memory stores instructions to be executed by the at least one processor, wherein the instructions are configured to execute the method according to any one of claims 1 to 8.

10. A computer-readable storage medium, characterized in that: Computer executable instructions are stored, and the computer executable instructions are used to execute the method of any one of the preceding claims 1-8.

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