Server memory fault test method and device, equipment and storage medium

Abstract

The invention discloses a server memory fault test method and device, equipment and a storage medium, and the method comprises the steps: loading a fault injection table corresponding to a server, and configuring an error injection parameter matched with a server memory in the fault injection table; the error injection parameter comprises an error type matched with a server memory and an error injection address; triggering a memory error in the server through the RAS basic tool according to the error injection parameter configured in the fault injection table; and obtaining a running log of the server for the memory error, and determining a fault test result corresponding to the server memory according to the running log. According to the technical scheme, the server memory fault testing efficiency can be improved, and the convenience and operability of the server memory fault testing method are improved.

Description

Technical Field

[0001] The present invention relates to the field of computer technologies, and in particular, to a method, apparatus, device, and storage medium for testing server memory faults. Background Art

[0002] During the research and development of server products, in order to verify the robustness and monitoring capabilities of servers, errors need to be artificially injected into the servers, such as repairable or non-repairable errors on the Central Processing Unit (CPU), memory, and peripherals, and then it is necessary to detect whether the server can work properly and whether it can repair the repairable errors.

[0003] In the existing server detection methods, for the test of server memory faults, it is usually necessary to connect a dedicated error injection tool, eXtend Debug Port (XDP) or Direct Connect Interface (DCI), to the server, set up a test environment, and then use the XDP or DCI box to test the server for memory faults.

[0004] However, in the existing test methods, testers must reach the site where the server is located to connect the XDP or DCI box to the server, and errors can be injected only after the connection is successful, resulting in the test method being not convenient enough and the test environment setup process being relatively complex. Summary of the Invention

[0005] The present invention provides a method, apparatus, device, and storage medium for testing server memory faults, which can improve the efficiency of testing server memory faults and enhance the convenience and operability of the method for testing server memory faults.

[0006] According to one aspect of the present invention, there is provided a method for testing server memory faults, including:

[0007] Loading a fault injection table corresponding to the server, and configuring error injection parameters matching the server memory in the fault injection table;

[0008] Wherein, the error injection parameters include an error type matching the server memory and an error injection address;

[0009] Triggering a memory error in the server according to the error injection parameters configured in the fault injection table through a RAS basic tool;

[0010] Obtaining an operation log of the server for the memory error, and determining a fault test result corresponding to the server memory according to the operation log.

[0011] Optionally, configure error injection parameters matching the server memory in the fault injection table, including:

[0012] Generate an error injection address matching the server memory through the RAS basic tool;

[0013] In the fault injection table, configure the error type matching the server memory, the error injection address, and the mask corresponding to the error injection address.

[0014] Optionally, in the fault injection table, configure the error type matching the server memory, the error injection address, and the mask corresponding to the error injection address, including:

[0015] Obtain the target debug path corresponding to the fault injection table;

[0016] In the target debug path, configure the error type matching the server memory, the error injection address, and the mask corresponding to the error injection address.

[0017] Optionally, through the RAS basic tool, trigger a memory error in the server according to the error injection parameters configured in the fault injection table, including:

[0018] Obtain the current flag bit corresponding to the trigger in the RAS basic tool and modify the current flag bit;

[0019] Through the trigger, according to the modified flag bit and the error injection parameters configured in the fault injection table, trigger a memory error in the server.

[0020] Optionally, determine the fault test result corresponding to the server memory according to the running log, including:

[0021] Obtain the error message reported by the server for the memory error in the running log;

[0022] Determine the fault test result corresponding to the server memory according to the error message.

[0023] Optionally, after determining the fault test result corresponding to the server memory according to the error message, further include:

[0024] Generate a memory fault test report corresponding to the server according to the error message and the fault test result;

[0025] Display the memory fault test report to the user through a visual interface;

[0026] In response to the download request triggered by the user, store the memory fault test report in the target storage location matching the download request.

[0027] According to another aspect of the present invention, there is provided a server memory fault testing device, the device comprising:

[0028] A parameter configuration module, configured to load a fault injection table corresponding to the server and configure error injection parameters matching the server memory in the fault injection table;

[0029] Wherein, the error injection parameters include an error type matching the server memory and an error injection address;

[0030] An error trigger module, configured to trigger a memory error in the server according to the error injection parameters configured in the fault injection table through a RAS basic tool;

[0031] A log acquisition module, configured to acquire an operation log of the server for the memory error and determine a fault test result corresponding to the server memory according to the operation log.

[0032] According to another aspect of the present invention, there is provided an electronic device, the electronic device comprising:

[0033] At least one processor; and

[0034] A memory communicatively connected to the at least one processor; wherein,

[0035] The memory stores a computer program executable by the at least one processor, and when the computer program is executed by the at least one processor, the at least one processor can execute the server memory fault testing method according to any embodiment of the present invention.

[0036] According to another aspect of the present invention, there is provided a computer-readable storage medium storing computer instructions for causing a processor to execute the server memory fault testing method according to any embodiment of the present invention when executed.

[0037] The technical solution provided by the embodiments of the present invention can improve the efficiency of server memory fault testing, enhance the convenience and operability of the server memory fault testing method, ensure the successful injection of memory errors corresponding to the server, improve the effectiveness of test results, ensure the injection of memory errors into the server without affecting the normal operation of the server, and improve the reliability of test results. It can ensure the testing of the server's response when the memory error injection is successful, improve the accuracy of test results, facilitate developers to solve performance problems existing in the server according to the fault test results, and facilitate users to conduct work docking, communication, and access based on the test results of the server. By loading the fault injection table corresponding to the server, configuring misinjection parameters matching the server memory in the fault injection table, triggering memory errors in the server through RAS basic tools according to the misinjection parameters configured in the fault injection table, obtaining the running logs of the server for the memory errors, and determining the fault test results corresponding to the server memory based on the running logs.

[0038] It should be understood that the content described in this part is not intended to identify the key or important features of the embodiments of the present invention, nor is it used to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0040] Figure 1 is a flowchart of a method for testing server memory faults provided by an embodiment of the present invention;

[0041] Figure 2 is a flowchart of another method for testing server memory faults provided by an embodiment of the present invention;

[0042] Figure 3 is a flowchart of another method for testing server memory faults provided by an embodiment of the present invention;

[0043] Figure 4 is a schematic structural diagram of a device for testing server memory faults provided by an embodiment of the present invention;

[0044] Figure 5 is a schematic structural diagram of an electronic device for implementing the method for testing server memory faults according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0045] To enable those skilled in the art to better understand the solution of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without making creative efforts shall fall within the protection scope of the present invention.

[0046] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances so that the embodiments of the present invention described herein can be implemented in an order different from those illustrated or described herein. In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device comprising a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0047] Figure 1 The figure is a flowchart of a method for testing server memory faults provided by an embodiment of the present invention. This embodiment is applicable to the situation of testing the processing performance of a server for memory faults. This method can be executed by a server memory fault testing device, which can be implemented in the form of hardware and / or software, and the server memory fault testing device can be configured in an electronic device. As Figure 1 shown, the method includes:

[0048] Step 110: Load the fault injection table corresponding to the server, and configure misinjection parameters matching the server memory in the fault injection table.

[0049] In this embodiment, specifically, before testing the server memory fault, the fault injection table (Error INJection Table, EINJ) corresponding to the server can be loaded first. The fault injection table is one of the important interfaces in the Advanced Platform Error Interfaces (APEI) structure in the server, and is used to simulate the corresponding hardware errors of the server, including correctable memory errors, uncorrectable memory errors, patrol errors, memory read / write errors, etc.

[0050] In this step, after the fault injection table is loaded, misinjection parameters matching the server memory can be configured in the fault injection table, including the error type and misinjection address matching the server memory.

[0051] Specifically, the error type may include correctable memory errors, uncorrectable memory errors, etc. The misinjection address may be a physical memory address in the server, used to misinject the memory in the server.

[0052] Step 120: Through the RAS basic tool, trigger a memory error in the server according to the misinjection parameters configured in the fault injection table.

[0053] In this step, through the RAS (Reliability Availability Serviceability) basic tool (RAS-Master-Tool), according to the misinjection parameters in the fault injection table, the set error type can be injected into the specified physical memory address to trigger a memory error in the server.

[0054] In practical applications, the RAS basic tool is usually used to handle CPU errors, IO errors, PCIE interface errors, and chip errors of the server, etc. In this embodiment, by using the RAS basic tool to trigger a memory error in the server, it can be determined whether the error messages reported meet the requirements when the server has different memory faults, so that developers can quickly determine the cause of the fault.

[0055] Step 130: Obtain the running log of the server for the memory error, and determine the fault test result corresponding to the server memory according to the running log.

[0056] In this embodiment, optionally, according to the running log of the server for the memory error, it can be determined whether the server correctly reports the corresponding error message in the case of a memory error, and then the judgment result is used as the fault test result corresponding to the server memory.

[0057] The technical solution provided by the embodiment of the present invention loads the fault injection table corresponding to the server, configures the misinjection parameters matching the server memory in the fault injection table, and through the RAS basic tool, according to the misinjection parameters configured in the fault injection table, triggers a memory error in the server, obtains the running log of the server for the memory error, and determines the fault test result corresponding to the server memory according to the running log. By this technical means, it is not necessary for the tester to build a test environment before testing the server, thus improving the efficiency of server memory fault testing. And compared with the prior art, it is not necessary to connect the XDP or DCI box to the server, so that the server memory fault test can be completed remotely, and it is not necessary for the tester to reach the site where the server is located, improving the convenience and operability of the server memory fault test method.

[0058] Figure 2 FIG. is a flowchart of another server memory fault test method provided by the embodiment of the present invention, as Figure 2 shown, the method includes:

[0059] Step 210, load the fault injection table corresponding to the server, and generate a misinjection address matching the server memory through the RAS basic tool.

[0060] In this step, specifically, a physical memory address can be generated through the RAS basic tool and the command ". / mca-recovery", and then the physical memory address is used as the misinjection address matching the server memory.

[0061] Step 220, in the fault injection table, configure the error type matching the server memory, the misinjection address, and the mask corresponding to the misinjection address.

[0062] In this step, specifically, the error types that can be triggered by the server currently can be obtained through the RAS basic tool and the "available_error_type" command, and then the error types are written into the "error_type" parameter of the fault injection table. At the same time, the misinjection address obtained in the above step can be written into the "param1" parameter of the fault injection table, and the mask corresponding to the misinjection address (such as 0xfffffffffffff000) is written into the "param2" parameter of the fault injection table.

[0063] The advantage of such setting is that by generating a misinjection address matching the server memory through the RAS basic tool, it can ensure the successful injection of the memory error corresponding to the server, thus improving the effectiveness of the server memory fault test result.

[0064] In an implementation manner of this embodiment, in the fault injection table, configure the error type matching the server memory, the error injection address, and the mask corresponding to the error injection address, including: obtaining the target debug path (" / sys / kernel / debug / apei / einj / ") corresponding to the fault injection table; in the target debug path, configure the error type matching the server memory, the error injection address, and the mask corresponding to the error injection address.

[0065] The advantage of such a setting is that by configuring the error injection parameters matching the server memory in the target debug path corresponding to the fault injection table, it is not necessary for the tester to arrive at the scene and configure the error injection environment, thereby improving the convenience of memory fault testing.

[0066] Step 230: Through the RAS basic tool, trigger a memory error in the server according to the error injection parameters configured in the fault injection table.

[0067] Step 240: Obtain the running log of the server for the memory error, and determine the fault test result corresponding to the server memory according to the running log.

[0068] The technical solution provided by the embodiment of the present invention, by loading the fault injection table corresponding to the server, generating an error injection address matching the server memory through the RAS basic tool, configuring the error type matching the server memory, the error injection address, and the mask corresponding to the error injection address in the fault injection table, triggering a memory error in the server through the RAS basic tool according to the error injection parameters configured in the fault injection table, obtaining the running log of the server for the memory error, and determining the fault test result corresponding to the server memory according to the running log, can improve the efficiency of server memory fault testing, and enhance the convenience and operability of the server memory fault testing method.

[0069] Figure 3 It is a flowchart of another server memory fault testing method provided by the embodiment of the present invention. As Figure 3 shown, this method includes:

[0070] Step 310: Load the fault injection table corresponding to the server, and generate an error injection address matching the server memory through the RAS basic tool.

[0071] Step 320: In the fault injection table, configure the error type matching the server memory, the error injection address, and the mask corresponding to the error injection address.

[0072] Step 330: Obtain the current flag bit corresponding to the trigger in the RAS basic tool, and modify the current flag bit.

[0073] In this embodiment, specifically, assuming that the current flag bit corresponding to the trigger is "0", the current flag bit can be modified to "1" so that the trigger triggers a memory error in the server according to the modified flag bit.

[0074] In a specific embodiment, the flag bit "1" can be written into the erro_inject parameter of the RAS basic tool to control the trigger to start working.

[0075] Step 340: Through the trigger, according to the modified flag bit and the error injection parameters configured in the fault injection table, trigger a memory error in the server.

[0076] The advantage of such a setting is that by modifying the flag bit of the trigger and triggering a memory error through the trigger, it can be ensured that when the memory error injection is successful, the response of the server is tested, thereby improving the accuracy of the server memory fault test result.

[0077] Step 350: Obtain the running log of the server for the memory error, and obtain the error message of the server for the memory error in the running log.

[0078] Step 360: Determine the fault test result corresponding to the server memory according to the error message.

[0079] In this embodiment, optionally, according to the error message of the server for the memory error, it can be determined whether the server can work properly under the memory error and whether the server can correct the correctable memory error, thereby obtaining the fault test result corresponding to the server memory.

[0080] The advantage of such a setting is that by obtaining the error message in the server running log, the fault test result corresponding to the server memory can be quickly determined, which is convenient for developers to solve the performance problems existing in the server according to the fault test result.

[0081] In an implementation manner of this embodiment, after determining the fault test result corresponding to the server memory according to the error message, it further includes: generating a memory fault test report corresponding to the server according to the error message and the fault test result; displaying the memory fault test report to the user through a visual interface; in response to the download request triggered by the user, storing the memory fault test report in the target storage location matching the download request.

[0082] The advantage of such a setting is that it enables the user to intuitively view the performance defects existing in the server. By storing the memory fault test report in the target storage location specified by the user, it is convenient for the user to conduct work docking, communication, and access for the test results of the server.

[0083] The technical solution provided by the embodiment of the present invention, by loading the fault injection table corresponding to the server, through the RAS basic tool, generates an error injection address matching the server memory. In the fault injection table, configure the error type matching the server memory, the error injection address, and the mask corresponding to the error injection address, obtain the current flag bit corresponding to the trigger in the RAS basic tool, and modify the current flag bit. Through the trigger, according to the modified flag bit and the error injection parameters configured in the fault injection table, trigger a memory error in the server, obtain the running log of the server for the memory error, obtain the error message of the server for the memory error in the running log, and determine the fault test result corresponding to the server memory according to the error message. This technical means can improve the efficiency of server memory fault testing and enhance the convenience and operability of the server memory fault testing method.

[0084] Figure 4 It is a structural schematic diagram of a server memory fault testing device provided by an embodiment of the present invention. The device is applied to an electronic device, such as Figure 4 As shown, the device includes: a parameter configuration module 410, an error trigger module 420, and a log acquisition module 430.

[0085] Among them, the parameter configuration module 410 is used to load the fault injection table corresponding to the server and configure error injection parameters matching the server memory in the fault injection table; the error injection parameters include an error type matching the server memory and an error injection address;

[0086] The error trigger module 420 is used to trigger a memory error in the server through the RAS basic tool according to the error injection parameters configured in the fault injection table;

[0087] The log acquisition module 430 is used to obtain the running log of the server for the memory error and determine the fault test result corresponding to the server memory according to the running log.

[0088] The technical solution provided by the embodiment of the present invention, by loading the fault injection table corresponding to the server and configuring error injection parameters matching the server memory in the fault injection table, through the RAS basic tool, according to the error injection parameters configured in the fault injection table, trigger a memory error in the server, obtain the running log of the server for the memory error, and determine the fault test result corresponding to the server memory according to the running log. This technical means can improve the efficiency of server memory fault testing and enhance the convenience and operability of the server memory fault testing method.

[0089] Based on the above embodiment, the parameter configuration module 410 includes:

[0090] A wrong address generation unit, configured to generate a wrong address matching the server memory through a RAS basic tool;

[0091] A wrong parameter configuration unit, configured to configure, in the fault injection table, an error type matching the server memory, the wrong address, and a mask corresponding to the wrong address;

[0092] A debugging path acquisition unit, configured to acquire a target debugging path corresponding to the fault injection table, and configure, in the target debugging path, an error type matching the server memory, a wrong address, and a mask corresponding to the wrong address.

[0093] The error trigger module 420 includes:

[0094] A flag bit modification unit, configured to acquire a current flag bit corresponding to a trigger in the RAS basic tool and modify the current flag bit;

[0095] A trigger execution unit, configured to trigger a memory error in the server through the trigger according to the modified flag bit and the wrong parameter configured in the fault injection table.

[0096] The log acquisition module 430 includes:

[0097] An error message acquisition unit, configured to acquire, from the running log, an error message reported by the server for a memory error;

[0098] An error message processing unit, configured to determine a fault test result corresponding to the server memory according to the error message;

[0099] A test report generation unit, configured to generate a memory fault test report corresponding to the server according to the error message and the fault test result;

[0100] A test report display unit, configured to display the memory fault test report to a user through a visual interface;

[0101] A test report storage unit, configured to store the memory fault test report in a target storage location matching the download request in response to a download request triggered by a user.

[0102] The above device can execute the methods provided in all the foregoing embodiments of the present invention, and has corresponding functional modules and beneficial effects for executing the above methods. For technical details not described in detail in the embodiments of the present invention, reference may be made to the methods provided in all the foregoing embodiments of the present invention.

[0103] Figure 5FIG. 0 shows a schematic structural diagram of an electronic device 10 that can be used to implement an embodiment of the present invention. The electronic device is intended to represent various forms of digital computers, such as, for example, laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as, for example, personal digital assistants, cellular telephones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the present invention described and / or claimed herein.

[0104] As Figure 5 shown, the electronic device 10 includes at least one processor 11, and a memory communicatively connected to the at least one processor 11, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc. The memory stores a computer program executable by the at least one processor. The processor 11 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 12 or the computer program loaded from the storage unit 18 into the random access memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 can also be stored. The processor 11, the ROM 12, and the RAM 13 are connected to each other via a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0105] Multiple components in the electronic device 10 are connected to the I / O interface 15, including: an input unit 16, such as a keyboard, a mouse, etc.; an output unit 17, such as various types of displays, speakers, etc.; a storage unit 18, such as a magnetic disk, an optical disk, etc.; and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information / data with other devices via a computer network such as the Internet and / or various telecommunication networks.

[0106] The processor 11 can be various general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of the processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. The processor 11 executes the various methods and processes described above, such as the server memory failure test method.

[0107] In some embodiments, the server memory fault testing method may be implemented as a computer program tangibly embodied in a computer-readable storage medium, such as storage unit 18. In some embodiments, part or all of the computer program may be loaded and / or installed onto the electronic device 10 via the ROM 12 and / or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the processor 11, one or more steps of the server memory fault testing method described above may be executed. Alternatively, in other embodiments, the processor 11 may be configured to execute the server memory fault testing method by any other suitable means (e.g., by means of firmware).

[0108] The various implementations of the systems and techniques described above in this document may be implemented in digital electronic circuitry, integrated circuit systems, field programmable gate arrays (FPGA), application specific integrated circuits (ASIC), application specific standard products (ASSP), systems on a chip (SOC), complex programmable logic devices (CPLD), computer hardware, firmware, software, and / or combinations thereof. These various implementations may include: implemented in one or more computer programs that may be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a special-purpose or general-purpose programmable processor that receives data and instructions from a storage system, at least one input device, and at least one output device, and transmits the data and instructions to the storage system, the at least one input device, and the at least one output device.

[0109] The computer programs for implementing the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus, such that the computer programs, when executed by the processor, cause the functions / operations specified in the flowcharts and / or block diagrams to be implemented. The computer programs may be executed entirely on the machine, partially on the machine, as a stand-alone software package partially on the machine and partially on a remote machine, or entirely on a remote machine or server.

[0110] In the context of the present invention, a computer-readable storage medium can be a tangible medium that can contain or store a computer program for use by or in connection with an instruction execution system, apparatus, or device. The computer-readable storage medium can include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatuses, or devices, or any suitable combination of the foregoing. Alternatively, the computer-readable storage medium can be a machine-readable signal medium. More specific examples of the machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0111] To provide for interaction with a user, the systems and techniques described herein can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or a trackball) by which the user can provide input to the electronic device. Other kinds of devices can also be used to provide for interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, speech input, or tactile input).

[0112] The systems and techniques described herein can be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer having a graphical user interface or a web browser through which the user can interact with an implementation of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0113] A computing system may include a client and a server. The client and the server are generally far from each other and usually interact via a communication network. The relationship between the client and the server is created by computer programs running on respective computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or a cloud host, which is a host product in the cloud computing service system, and solves the defects of difficult management and weak business scalability existing in traditional physical hosts and VPS services.

[0114] It should be understood that various forms of processes shown above can be used, steps can be reordered, added or deleted. For example, the steps described in the present invention can be executed in parallel, sequentially or in a different order, as long as the desired results of the technical solution of the present invention can be achieved, and no limitation is made herein.

[0115] The above specific embodiments do not constitute a limitation on the protection scope of the present invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A method for testing server memory faults, characterized in that, the method includes: loading a fault injection table corresponding to the server, and configuring misinjection parameters matching the server memory in the fault injection table; wherein, the misinjection parameters include an error type matching the server memory and a misinjection address; triggering a memory error in the server through a RAS basic tool according to the misinjection parameters configured in the fault injection table; obtaining the running log of the server for the memory error, and determining the fault test result corresponding to the server memory according to the running log.

2. The method according to claim 1, characterized in that, configuring misinjection parameters matching the server memory in the fault injection table includes: generating a misinjection address matching the server memory through a RAS basic tool; configuring, in the fault injection table, an error type matching the server memory, the misinjection address, and a mask corresponding to the misinjection address.

3. The method according to claim 2, characterized in that, configuring, in the fault injection table, an error type matching the server memory, the misinjection address, and a mask corresponding to the misinjection address includes: obtaining a target debugging path corresponding to the fault injection table; configuring, in the target debugging path, an error type matching the server memory, a misinjection address, and a mask corresponding to the misinjection address.

4. The method according to claim 1, characterized in that, triggering a memory error in the server through a RAS basic tool according to the misinjection parameters configured in the fault injection table includes: obtaining the current flag bit corresponding to the trigger in the RAS basic tool and modifying the current flag bit; triggering a memory error in the server through the trigger according to the modified flag bit and the misinjection parameters configured in the fault injection table.

5. The method according to claim 1, characterized in that, determining the fault test result corresponding to the server memory according to the running log includes: obtaining the error message of the server for the memory error in the running log; determining the fault test result corresponding to the server memory according to the error message.

6. The method according to claim 5, characterized in that, after determining the fault test result corresponding to the server memory according to the error message, it further includes: generating a memory fault test report corresponding to the server according to the error message and the fault test result; displaying the memory fault test report to the user through a visualization interface; responding to a download request triggered by the user, and storing the memory fault test report in a target storage location matching the download request.

7. A server memory fault test device, characterized in that, the device includes: a parameter configuration module, configured to load a fault injection table corresponding to the server, and configure misinjection parameters matching the server memory in the fault injection table; wherein, the misinjection parameters include an error type matching the server memory and a misinjection address; An error triggering module, configured to trigger a memory error in the server according to the error injection parameters configured in the fault injection table through the RAS basic tool; A log acquisition module, configured to acquire the running log of the server for the memory error, and determine the fault test result corresponding to the server memory according to the running log.

8. An electronic device, characterized in that, the electronic device includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein, the memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the server memory fault test method according to any one of claims 1-6.

9. A computer-readable storage medium, characterized in that, the computer-readable storage medium stores computer instructions, and the computer instructions are used to implement the server memory fault test method according to any one of claims 1-6 when executed by a processor.

10. A computer program product, characterized in that, the computer program product includes a computer program, and the computer program implements the server memory fault test method according to any one of claims 1-6 when executed by a processor.

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