Storage module allocation method and device, electronic equipment and storage medium
By obtaining business verification requirements in the SOC chip, determining the storage module generation mode, and chunking the storage module, the problem of random allocation of memory blocks in the SOC chip and avoiding address conflicts is solved, and efficient memory management and accelerator performance improvement is achieved.
Patent Information
- Application Number
- CN202510140272.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-08
- Publication Date
- 2025-05-30
AI Technical Summary
In SOC chips, how to randomly allocate the memory block address required by the accelerator on large chunks of available memory and avoid memory address conflicts at any time.
By obtaining the chip's business verification requirements, including the number of blocks and application scenarios, the corresponding storage module generation mode (direct generation mode or indirect generation mode) is determined, and the storage module is processed according to the generation mode and the number of blocks to ensure that the addresses of the block results are random and do not conflict.
It realizes the full random allocation of memory blocks in the SOC chip, while avoiding memory address conflicts, improving the functions and performance of the accelerator functional module and improving the verification quality.
Smart Images
Figure CN120066983A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of chip technology, and more particularly, to a method, device, electronic device, and storage medium for allocating a storage module. Background Art
[0002] In a SOC (System on Chip) chip, various accelerator function modules for performing specific tasks and a large amount of SRAM (Static Random-Access Memory) are usually integrated as on-chip storage (local memory). The accelerator will obtain source data from several memory blocks specified by software during the operation process, and then calculate the final destination data according to a specific algorithm and write it into the destination memory block specified by software. Memory allocation and recycling are involved in the above operation process. For these accelerators, a common problem is that several memory address blocks used by the algorithm can be randomly allocated on a large available memory, and there must be no memory address conflicts at any time. In the test case, the initial addresses and sizes of each memory are manually specified to ensure that there are no address conflicts among each memory block.
[0003] For example, an accelerator uses 4 memories for one operation, namely src1, src2, bias, and dest. The starting addresses of these 4 memories can be randomly allocated in the memory addresses from 0 to max, and the occupied size of each memory can also be randomly allocated (the starting addresses and sizes of each memory for this operation are random, and the starting addresses and sizes for the next operation can also be random). Moreover, during the execution of this operation, the src1 / src2 / bias data and the starting address / size of the memory to be occupied for the next operation can be generated, and then configured into the memory by software without conflicting with the addresses of other memory blocks. Therefore, how to ensure that each address block is both fully random and does not conflict with each other has become an urgent problem to be solved currently. Summary of the Invention
[0004] Some embodiments of the present application aim to provide a method, apparatus, electronic device, and storage medium for allocating storage modules. Through the technical solutions of the embodiments of the present application, by obtaining the service verification requirements of the chip, where the service verification requirements at least include the number of blocks and the application scenario; according to different application scenarios, determining the generation mode of the storage module corresponding to the application scenario, where the generation mode of the storage module at least includes a direct generation mode and / or an indirect generation mode; according to the generation mode of the storage module and the number of blocks, performing block processing on the storage module to be blocked, and obtaining a block result corresponding to the storage module. In the embodiments of the present application, the direct generation mode and the indirect generation mode are preset in advance. During the actual memory allocation process, different generation modes can be selected according to different application scenarios, and different generation modes can be used to perform block processing on the storage module to obtain a block result, so as to ensure that each block satisfies both sufficient random address generation and no mutual address conflict between blocks.
[0005] In a first aspect, some embodiments of the present application provide a method for allocating a storage module, including:
[0006] Obtaining the service verification requirements of the chip, where the service verification requirements at least include the number of blocks and the application scenario;
[0007] According to different application scenarios, determining the generation mode of the storage module corresponding to the application scenario, where the generation mode of the storage module at least includes a direct generation mode and / or an indirect generation mode;
[0008] According to the generation mode of the storage module and the number of blocks, performing block processing on the storage module to be blocked, and obtaining a block result corresponding to the storage module.
[0009] Some embodiments of the present application preset the direct generation mode and the indirect generation mode. During the actual memory allocation process, different generation modes can be selected according to different application scenarios, and different generation modes can be used to perform block processing on the storage module to obtain a block result, so as to ensure that each block satisfies both sufficient random address generation and no mutual address conflict between blocks.
[0010] Optionally, the step of performing block processing on the storage module to be blocked according to the generation mode of the storage module and the number of blocks, and obtaining a block result corresponding to the storage module includes:
[0011] If the generation mode of the storage module at least includes the direct generation mode, when the application scenario is that the storage module is not occupied, according to the number of blocks, randomly generate corresponding memory blocks in the storage module, that is, the arrangement order of each memory block in the storage module is randomly set;
[0012] Allocate the occupied address segments to the arranged memory blocks in sequence to obtain the final allocation result.
[0013] Some embodiments of the present application can achieve the goal of non-conflicting random allocation of each memory block through the direct generation mode, that is, a one-time random allocation. It is applicable to the application scenario where the memory of the storage module is allocated for the first time or each subsequent accelerator operation is completely independent. That is to say, each allocation is carried out when the storage module is not occupied, that is, the next accelerator operation will wait until the previous accelerator operation is completed and the interrupt software reads all the operation results. In this way, each random allocation of memory blocks is a brand-new one and there is no conflict with the previous memory allocation.
[0014] Optionally, the step of allocating the occupied address segments to the arranged memory blocks in sequence to obtain the final allocation result includes:
[0015] Determine the starting position of the first memory block in the arranged memory blocks according to the starting address of the storage module;
[0016] Determine the ending position of the first memory block according to the size of the storage module and the size of the first remaining memory blocks in the arranged memory blocks; the first remaining memory blocks are the other memory blocks in the arranged memory blocks except the first memory block;
[0017] Randomly determine the allocation position of the first memory block according to the starting position and the ending position of the first memory block;
[0018] After determining the allocation position of the first memory block, use the last address of the first memory block as the starting position of the second memory block;
[0019] Determine the ending position of the second memory block according to the size of the storage module, the first memory block and the size of the second remaining memory blocks in the arranged memory blocks, where the second remaining memory blocks are the remaining memory blocks in the arranged memory blocks except the first memory block and the second memory block;
[0020] Determine the allocation position of the second memory block according to the start position and the end position of the second memory block;
[0021] Allocate the remaining memory blocks in sequence in the above manner to obtain the allocation result.
[0022] In some embodiments of the present application, in the direct generation mode, according to the size of the storage module, the number of blocks, and the size of each block, allocate each block in sequence, and ensure that each block is randomly allocated within the allocable range, and the addresses of each block do not conflict with each other.
[0023] Optionally, the partitioning the storage module to be partitioned according to the generation mode of the storage module and the number of blocks to obtain a partitioning result corresponding to the storage module includes:
[0024] If the generation mode of the storage module at least includes an indirect generation mode, and in the case where there are occupied memory blocks in the storage module in the application scenario, obtain the occupied memory blocks;
[0025] Obtain the re-generated memory blocks;
[0026] Determine whether there is an address conflict in the re-generated memory blocks;
[0027] In the case where there is no address conflict in the re-generated memory blocks, determine whether there is an address conflict between the re-generated memory blocks and the occupied memory blocks;
[0028] If there is no address conflict between the re-generated memory blocks and the occupied memory blocks, use the re-generated memory blocks as the partitioning result.
[0029] In some embodiments of the present application, the indirect generation mode requires multiple random allocations to achieve the goal of non-conflicting random allocations of each memory block. It is applicable to more complex application scenarios where the previous and subsequent operations are intertwined, that is, during the current accelerator operation, the memory blocks for the next operation are generated and configured. At this time, it is necessary to consider not only that there is no address conflict between the memory blocks required for the newly generated next operation, but also that there is no conflict with the memory blocks of the current running operation.
[0030] Optionally, the method further includes:
[0031] Mark the re-generated memory blocks as occupied.
[0032] Some embodiments of the present application mark the regenerated memory blocks as occupied, thus avoiding repeated use and the problem of address conflicts.
[0033] Optionally, the method further includes:
[0034] When the calculation of the occupied memory block ends, release the occupied memory block and mark it as in the idle state.
[0035] Some embodiments of the present application release the occupied memory blocks after the calculation of the occupied memory blocks ends, so that they can be reused, improving the utilization efficiency of the storage module.
[0036] In a second aspect, some embodiments of the present application provide an allocation device for a storage module, including:
[0037] An acquisition unit, configured to acquire the service verification requirements of the chip, where the service verification requirements at least include the number of blocks and the application scenario;
[0038] A determination unit, configured to determine the generation mode of the storage module corresponding to the application scenario according to different application scenarios, where the generation mode of the storage module at least includes a direct generation mode and / or an indirect generation mode;
[0039] An allocation unit, configured to perform block processing on the storage module to be blocked according to the generation mode of the storage module and the number of blocks, to obtain a block result corresponding to the storage module.
[0040] Some embodiments of the present application pre-set a direct generation mode and an indirect generation mode. In the actual memory allocation process, different generation modes can be selected according to different application scenarios, and different generation modes are used to perform block processing on the storage module to obtain a block result, so as to ensure that each block is both sufficiently random in address generation and there is no mutual address conflict among the blocks.
[0041] Optionally, the allocation unit is configured to:
[0042] If the generation mode of the storage module at least includes the direct generation mode, and in the case that the storage module is not occupied in the application scenario, first randomly generate memory blocks corresponding to the number of blocks in the storage module according to the number of blocks, that is, the arrangement order of each memory block in the storage module is random;
[0043] Then sequentially perform occupied address segment allocation on the arranged memory blocks to obtain a final allocation result.
[0044] Some embodiments of the present application can achieve the goal of non - conflicting random allocation of each memory block through the direct generation mode, that is, by means of one - time random allocation. This is applicable to the application scenarios of initial memory module allocation or each subsequent accelerator operation being completely independent. That is to say, each allocation is carried out when the storage module is not occupied. That is, the next accelerator operation will wait until the previous accelerator operation is completed and the interrupt software reads all the operation results. In this way, each random allocation of memory blocks is a completely new one and there is no conflict with the previous memory allocation.
[0045] Optionally, the allocation unit is used for:
[0046] Determine the starting position of the first memory block in the arranged memory blocks according to the starting address of the storage module;
[0047] Determine the ending position of the first memory block according to the size of the storage module and the size of the first remaining memory block in the arranged memory blocks; the first remaining memory block is the other memory blocks in the arranged memory blocks except the first memory block;
[0048] Randomly determine the allocation position of the first memory block according to the starting position and the ending position of the first memory block;
[0049] After determining the allocation position of the first memory block, use the last address of the first memory block as the starting position of the second memory block;
[0050] Determine the ending position of the second memory block according to the size of the storage module, the size of the first memory block and the size of the second remaining memory block in the arranged memory blocks, where the second remaining memory block is the remaining memory blocks in the arranged memory blocks except the first memory block and the second memory block;
[0051] Determine the allocation position of the second memory block according to the starting position and the ending position of the second memory block;
[0052] Allocate the remaining memory blocks in sequence in the above - mentioned manner to obtain the allocation result.
[0053] In the direct generation mode of some embodiments of the present application, according to the size of the storage module, the number of blocks and the size of each block, each block is allocated in sequence, and it is ensured that each block is randomly allocated within the allocable range and the addresses of each block do not conflict with each other.
[0054] Optionally, the allocation unit is configured to:
[0055] If the generation mode of the storage module at least includes an indirect generation mode, when the application scenario is that there is an occupied memory block in the storage module, obtain the occupied memory block;
[0056] Obtain the regenerated memory block;
[0057] Determine whether there is an address conflict in the regenerated memory block;
[0058] When there is no address conflict in the regenerated memory block, determine whether there is an address conflict between the regenerated memory block and the occupied memory block;
[0059] If there is no address conflict between the regenerated memory block and the occupied memory block, use the regenerated memory block as the block result.
[0060] In some embodiments of the present application, the indirect generation mode requires multiple random allocations to achieve the goal of non - conflicting random allocations of each memory block. It is applicable to more complex application scenarios where the previous and subsequent operations are intertwined, that is, during the current accelerator operation, the memory blocks for the next operation are generated and configured. At this time, it is necessary to consider not only that there is no address conflict between the newly generated memory blocks required for the next operation, but also that there is no conflict with the memory blocks of the current running operation.
[0061] Optionally, the allocation unit is configured to:
[0062] Mark the regenerated memory block as an occupied state.
[0063] In some embodiments of the present application, the regenerated memory block is marked as an occupied state, which avoids the problem of repeated use and address conflict.
[0064] Optionally, the allocation unit is configured to:
[0065] When the calculation of the occupied memory block ends, release the occupied memory block and mark it as an idle state.
[0066] In some embodiments of the present application, after the calculation of the occupied memory block ends, the occupied memory block is released, which can be reused to improve the usage efficiency of the storage module.
[0067] In a third aspect, some embodiments of the present application provide an electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the program, the allocation method of the storage module as described in any embodiment of the first aspect can be implemented.
[0068] In a fourth aspect, some embodiments of the present application provide a computer-readable storage medium, on which a computer program is stored. When the program is executed by a processor, the allocation method of the storage module as described in any embodiment of the first aspect can be implemented.
[0069] In a fifth aspect, some embodiments of the present application provide a computer program product, which includes a computer program. When the computer program is executed by a processor, the allocation method of the storage module as described in any embodiment of the first aspect can be implemented. Description of the Drawings
[0070] In order to more clearly illustrate the technical solutions of some embodiments of the present application, the drawings required to be used in some embodiments of the present application will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as a limitation of the scope. For those of ordinary skill in the art, other related drawings can be obtained based on these drawings without creative efforts.
[0071] Figure 1 A schematic diagram after the allocation of a storage module provided by an embodiment of the present application is completed;
[0072] Figure 2 A schematic flowchart of a method for allocating a storage module provided by an embodiment of the present application;
[0073] Figure 3 A schematic flowchart of a direct generation mode provided by an embodiment of the present application;
[0074] Figure 4 A schematic flowchart of an indirect generation mode provided by an embodiment of the present application;
[0075] Figure 5 A schematic structural diagram of an allocation device for a storage module provided by an embodiment of the present application;
[0076] Figure 6 A schematic diagram of an electronic device provided by an embodiment of the present application. Detailed Embodiments
[0077] Next, the technical solutions in some embodiments of the present application will be described in conjunction with the drawings in some embodiments of the present application.
[0078] It should be noted that similar reference numerals and letters indicate similar items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. At the same time, in the description of this application, terms such as "first" and "second" are only used for distinguishing descriptions and cannot be construed as indicating or implying relative importance.
[0079] In a SOC (System on Chip) chip, various accelerator function modules for performing specific tasks and a large amount of SRAM (Static Random-Access Memory) are usually integrated as on-chip storage (local memory). The accelerator will obtain source data from several memory blocks specified by software during the operation process, and then perform operations according to a specific algorithm to obtain the final destination data and write it into the destination memory block specified by software. Memory allocation and recycling are involved in the above operation process. For these accelerators, a common problem is that several memory address blocks used by the algorithm can be randomly allocated on a large available memory, and there must be no memory address conflicts at any time. In the test cases, the initial addresses and sizes of each memory are manually specified to ensure that there are no address conflicts among each memory block.
[0080] Such as Figure 1As shown, when an accelerator performs an operation, it uses 4 memories, namely src1, src2, bias, and dest. The starting addresses of these 4 memories can be randomly allocated within the memory addresses from 0 to max, and the occupied size of each memory can also be randomly allocated (the starting addresses and sizes of each memory are random for this operation and can also be random for the next operation). Moreover, during the execution of this operation, the src1 / src2 / bias data and the starting addresses / sizes of the memories to be occupied for the next operation can be generated and then configured into the memory by software without conflicting with the addresses of other memory blocks. Therefore, how to ensure that each address block is both sufficiently random and does not conflict with each other's addresses has become an urgent problem to be solved. In view of this, some embodiments of the present application provide a method for allocating a storage module, which includes: obtaining the service verification requirements of the chip, where the service verification requirements at least include the number of blocks and the application scenario; according to different application scenarios, determining the generation mode of the storage module corresponding to the application scenario, where the generation mode of the storage module at least includes a direct generation mode and / or an indirect generation mode; according to the generation mode of the storage module and the number of blocks, performing a block processing on the storage module to be blocked to obtain a block result corresponding to the storage module. In the embodiments of the present application, the direct generation mode and the indirect generation mode are preset in advance. During the actual memory allocation process, different generation modes can be selected according to different application scenarios, and different generation modes are used to perform block processing on the storage module to obtain a block result, so as to ensure that each block satisfies both sufficient randomness in address generation and no mutual address conflict among the blocks.
[0081] As Figure 2 shown, embodiments of the present application provide a method for allocating a storage module, which includes:
[0082] S201. Obtain the service verification requirements of the chip, where the service verification requirements at least include the number of blocks and the application scenario;
[0083] Specifically, the terminal device obtains the service verification requirements of the chip, which at least include the number of blocks and the application scenario. The number of blocks is the number of memory blocks required during an operation. The application scenario at least includes storage module occupancy and occupied storage module. The storage module is the memory.
[0084] S202. According to different application scenarios, determine the generation mode of the storage module corresponding to the application scenario, where the generation mode of the storage module at least includes a direct generation mode and / or an indirect generation mode;
[0085] Specifically, the terminal device selects a storage module generation method corresponding to the application scenario according to different application scenarios. For example, if the storage module is occupied, the indirect generation mode can be selected; if the storage module is not occupied, the direct generation mode can be selected; or in some complex application scenarios, both the direct generation mode and the indirect generation mode can be selected.
[0086] Among them, the direct generation mode is that when the storage module is not occupied, the memory blocks are randomly generated according to the number of blocks, and the addresses of each memory block do not conflict; the indirect generation mode is that when the storage module is occupied, the addresses of the randomly generated new memory blocks do not conflict with the occupied blocks.
[0087] S203 , performing block processing on the storage module to be divided according to the generation mode and the number of blocks of the storage module, and obtaining a block result corresponding to the storage module.
[0088] Specifically, after determining the generation mode of the storage module, the terminal device divides the storage module into blocks according to the number of blocks and the generation mode, and obtains the block result corresponding to the storage module, and the address of each block does not conflict. After the storage module is divided into blocks, the chip performs calculations based on the memory blocks, and after the calculation is completed, the memory is reallocated, such as Figure 1 shown.
[0089] The embodiment of the present application provides two flexible and general random automatic memory allocation methods from the perspective of digital verification and in combination with the actual project. According to the application scenario, they are specifically divided into a direct generation mode of random allocation of memory blocks and an indirect generation mode of random allocation of memory blocks, and are implemented by programming with system Verilog syntax. This method ensures that each memory block is fully randomly allocated (each memory block has a random size and a random starting address) and that each memory block will not have an address conflict at any time, perfectly solves the above-mentioned memory allocation problem and effectively increases the verification space, ensures the functions and performance of various accelerator function modules, and improves the verification quality.
[0090] Some embodiments of the present application pre-set a direct generation mode and an indirect generation mode. In the actual memory allocation process, different generation modes can be selected according to different application scenarios, and different generation modes can be used to perform block processing on the storage module to obtain block results. This ensures that each block satisfies the requirement of sufficient random address generation and that there is no address conflict between the blocks.
[0091] Another embodiment of the present application further supplements the storage module allocation method provided in the above embodiment.
[0092] Optionally, according to the generation mode of the storage module and the number of chunks, the storage module to be chunked is chunked to obtain a chunking result corresponding to the storage module, including:
[0093] If the generation mode of the storage module at least includes the direct generation mode, and in the case where the application scenario is that the storage module is not occupied, according to the number of chunks, memory chunks corresponding to the number of chunks are randomly generated in the storage module, and the memory chunks are arranged; wherein, the arrangement order of the memory chunks in the storage module is randomly set;
[0094] The occupied address segments are sequentially allocated to the arranged memory chunks to obtain a final allocation result.
[0095] Some embodiments of the present application can achieve the goal of non-conflicting random allocation of each memory block through the direct generation mode, that is, a one-time random allocation. It is applicable to the application scenario where the memory of the storage module is allocated for the first time or each subsequent accelerator operation is completely independent. That is to say, each allocation is carried out when the storage module is not occupied. That is, the next accelerator operation will wait for the previous accelerator to complete the entire operation and the interrupt software to read all the operation results. In this way, each random allocation of the memory block is a completely new one and there is no conflict with the previous memory allocation.
[0096] Optionally, the occupied address segments are sequentially allocated to the arranged memory chunks to obtain a final allocation result, including:
[0097] According to the starting address of the storage module, determine the starting position of the first memory chunk in the arranged memory chunks;
[0098] According to the size of the storage module and the size of the first remaining memory chunk in the arranged memory chunks, determine the end position of the first memory chunk; the first remaining memory chunk is the other memory chunks in the arranged memory chunks except the first memory chunk;
[0099] According to the starting position and the end position of the first memory chunk, randomly determine the allocation position of the first memory chunk;
[0100] After determining the allocation position of the first memory chunk, use the last address of the first memory chunk as the starting position of the second memory chunk;
[0101] Determine the end position of the second memory block according to the size of the storage module, the size of the first memory block, and the size of the second remaining memory block in the arranged memory blocks, where the second remaining memory block is the remaining memory blocks in the arranged memory blocks after removing the first memory block and the second memory block;
[0102] Determine the allocation position of the second memory block according to the start position and the end position of the second memory block;
[0103] In the above manner, allocate the remaining memory blocks in sequence to obtain the allocation result.
[0104] Specifically, as Figure 3 shown in the schematic diagram of the random allocation direct generation mode of the memory block. Taking the case in the figure as an example, a certain accelerator requires 4 memory blocks to participate in the operation at a time, namely src1, src2, bias, and dest.
[0105] First, randomly generate the arrangement order of 4 memory blocks on the entire memory block. The randomly generated order in the example is src2, src1, dest, bias;
[0106] Then, sequentially and randomly generate the occupied address segments of each memory block according to this order:
[0107] From top to bottom, the first src2 memory block can be random between 0 and max - src1_len - dest_len - bias_len addresses; that is, place the second src1 memory block, the third dest memory block, and the fourth bias memory block in sequence at the maximum address position of the storage module. According to the maximum address of the storage module and the lengths of the second src1 memory block, the third dest memory block, and the fourth bias memory block, obtain the maximum address segment where the first src2 memory block can be stored, namely max - src1_len - dest_len - bias_len;
[0108] The second src1 memory block can be random between the addresses from src2_start_addr + src2_len to max - dest_len - bias_len; similarly, when placing the second src1 memory block, subtract the lengths of the third dest memory block and the fourth bias memory block from the maximum value of the storage module, and use the maximum address of the first src2 memory block as the starting position of the second src1 memory block, i.e., the starting position of the second memory block. According to the maximum address of the storage module and the lengths of the third dest memory block and the fourth bias memory block, obtain the ending position of the second memory block.
[0109] The third dest memory block can be random between the addresses from src1_start_addr + src1_len to max - bias_len;
[0110] The fourth bias memory block can be random between the addresses from dest_start_addr + dest_len to max.
[0111] According to the above scheme, the random allocation of 4 memory blocks is achieved at one time (the order between memory blocks is random and the address segments occupied by memory blocks are also random), and it is ensured that there will be no address conflicts between the address segments of each memory block. In the text, 4 memory blocks used in a certain accelerator are taken as an example, and actually this scheme can be extended to the random allocation of any number of memory blocks.
[0112] In some embodiments of the present application, in the direct generation mode, according to the size of the storage module, the number of blocks, and the size of each block, each block is allocated in turn, and it is ensured that each block is randomly allocated within the allocable range, and the addresses of each block do not conflict with each other.
[0113] Optionally, according to the generation mode of the storage module and the number of blocks, the storage module to be blocked is blocked to obtain a blocking result corresponding to the storage module, including:
[0114] If the generation mode of the storage module at least includes the indirect generation mode, in the case where there are occupied memory blocks in the application scenario of the storage module, obtain the occupied memory blocks;
[0115] Obtain the regenerated memory blocks;
[0116] Judge whether there is an address conflict in the regenerated memory blocks;
[0117] In the case where there is no address conflict in the regenerated memory block, determine whether there is an address conflict between the regenerated memory block and the occupied memory block;
[0118] If there is no address conflict between the regenerated memory block and the occupied memory block, then use the regenerated memory block as the block result.
[0119] As Figure 4 shown is the flowchart of the indirect generation mode of random allocation of memory blocks. Still taking a certain accelerator as an example, this flowchart demonstrates a more complex application scenario where the previous and subsequent operations are intertwined: that is, during the operation of this accelerator, the memory blocks for the next operation are generated and configured. At this time, it is necessary to consider not only that there should be no address conflicts between the memory blocks required for the newly generated next operation, but also that there should be no conflicts with the memory blocks of the operation currently in progress. This application scenario uses the indirect generation mode of random allocation of memory blocks. Specifically:
[0120] Step 1: The first operation uses the direct generation mode of random allocation to generate 4 memory blocks to be occupied in this operation: src1 / src2 / bias / dest;
[0121] Step 2: Configure the 4 memory block information into the corresponding memory addresses and mark all 4 memory address segments as occupied;
[0122] Step 3: Start the operation;
[0123] Step 4: Randomly generate 4 memory blocks to be pre-occupied in the next operation: src1' / src2' / bias' / dest';
[0124] Step 5: Determine whether there is an address conflict among the 4 pre-occupied memory blocks: src1' / src2' / bias' / dest', and whether there is an address conflict with the 4 occupied memory blocks: src1 / src2 / bias / dest;
[0125] Step 6: Perform a conflict judgment on the addresses; if there is a conflict, regenerate a new memory block, and if there is no conflict, execute Step 7;
[0126] Step 7: Configure the information of the new 4 memory blocks into the corresponding memory addresses and mark all 4 new memory address segments as occupied;
[0127] Step 8: After this operation ends and the dest data is processed, recycle the addresses of the old 4 memory blocks: src1 / src2 / bias / dest and mark them as idle.
[0128] In the embodiments of the present application, the step of randomly generating memory blocks and the step of judging whether there is a conflict between memory blocks are separated, which ingeniously solves the problem of randomly generating and configuring the next-round memory blocks during this operation process, that is, it ensures that the memory blocks used in the previous and subsequent times are fully random (the order between memory blocks is random and the address segments occupied by each memory block are also random), and at the same time ensures that there is no conflict between each memory block. The embodiments of the present application take 4 memory blocks used in a certain accelerator as an example. Actually, this solution can be extended to the random allocation of any number of memory blocks.
[0129] The reference code for the direct generation mode of random allocation of memory blocks is as follows. Still taking the example that a certain accelerator uses 4 memory blocks at a time:
[0130]
[0131] Among them:
[0132] Lines 1 - 2: Define the length MAX_LEN of the entire available memory block and the maximum address MAX_ADDR;
[0133] Lines 4 - 5: Define the enumeration type mm_addr_e of 4 memory blocks and define the random generation order array mm_field_a of 4 memory blocks;
[0134] Line 6: Define the length queue mm_size_q of 4 memory blocks;
[0135] Line 11: Call the system verilog system function shuffle() to shuffle the sorting of 4 elements in the mm_field_a array, and the subsequent random configuration of memory blocks will be generated in this order in turn;
[0136] Lines 13 - 18: Put the address lengths occupied by 4 memory blocks into the mm_size_q queue in turn according to the order of the mm_field_a array;
[0137] Lines 20 - 31: Generate the starting addresses of 4 memory blocks in turn according to the order of the mm_field_a array.
[0138] The reference code for the indirect generation mode of random allocation of memory blocks is as follows:
[0139]
[0140] Lines 33 - 34: Define two memory address occupancy flag arrays, dlm_mask and dlm_mask1, with a length of MAX_LEN. dlm_mask is the flag for occupied memory addresses, and dlm_mask1 is the flag for the memory addresses to be occupied by the newly pre-generated memory block.
[0141] Line 37: Define the conflict flag v_conflict[7:0] to be used in the function, where each bit represents a type of conflict.
[0142] Lines 40 - 83: Use a do...while loop to randomly generate the starting addresses of 4 memory blocks for the next round of operations and check for address conflicts until there are no conflicts and then break out of the loop.
[0143] Lines 44 - 47: Randomly pre-generate the starting addresses of 4 memory blocks (src1 / src2 / bias / dest) for the next round of operations.
[0144] Lines 51 - 54: Call the addr_conflict_chk function to check if the 4 pre-generated memory blocks (src1 / src2 / bias / dest) conflict with the 4 old memory blocks that are currently in use. If there is a conflict, assign 1 to the corresponding v_conflict bit; otherwise, assign 0.
[0145] Lines 57 - 61: Check if the newly generated src1 memory block conflicts with the other 3 newly generated memory blocks. If there is a conflict, assign 1 to v_conflict[4]; otherwise, assign 0.
[0146] Lines 64 - 68: Check if the newly generated src2 memory block conflicts with the other 3 newly generated memory blocks. If there is a conflict, assign 1 to v_conflict[5]; otherwise, assign 0.
[0147] Lines 71 - 75: Check if the newly generated bias memory block conflicts with the other 3 newly generated memory blocks. If there is a conflict, assign 1 to v_conflict[6]; otherwise, assign 0.
[0148] Lines 78 - 82: Check if the newly generated dest memory block conflicts with the other 3 newly generated memory blocks. If there is a conflict, assign 1 to v_conflict[7]; otherwise, assign 0.
[0149] Lines 90 to 101: Definition of the address conflict judgment function addr_conflict_chk. If an address between v_addr_start and (v_addr_start + v_addr_len - 1) has been occupied in the v_addr_a array, this function outputs 1; otherwise, it outputs 0.
[0150] The present invention has developed two flexible and general random automation memory allocation methods, which are specifically divided into the direct generation mode of random memory block allocation and the indirect generation mode of random memory block allocation according to the application scenario. They are programmed and implemented using system verilog syntax, and are applicable to the verification of most chip projects involving random memory allocation. This method ensures that the allocation of each memory block is fully random (the size of each memory block is random, and the starting address is random), and at the same time ensures that there will never be an address conflict among the memory blocks at any time. It perfectly solves the problem of random automatic memory allocation, effectively improves the verification space, ensures the functions and performances of various accelerator functional modules, and improves the verification quality.
[0151] The embodiments of the present application have been applied to the verification work of several accelerator modules involving memory block allocation, and many functional and performance bugs have been found, which have strong application and promotion value.
[0152] In some embodiments of the present application, the indirect generation mode requires multiple random allocations to achieve the goal of non-conflicting random allocation of each memory block. It is applicable to more complex application scenarios where the previous and subsequent operations are intertwined, that is, during the operation of the current accelerator, the memory blocks for the next operation are generated and configured. At this time, it is necessary to consider not only that there is no address conflict among the memory blocks required for the newly generated next operation, but also that there is no conflict with the memory blocks of the current operation being performed.
[0153] Optionally, the method further includes:
[0154] Mark the regenerated memory block as occupied.
[0155] In some embodiments of the present application, the regenerated memory block is marked as occupied, which avoids the problem of repeated use and address conflict.
[0156] Optionally, the method further includes:
[0157] When the calculation of the occupied memory block ends, release the occupied memory block and mark it as free.
[0158] The embodiments of the present application provide two flexible and general random automation memory allocation methods, which are specifically divided into a direct generation mode of random allocation of memory blocks and an indirect generation mode of random allocation of memory blocks according to the application scenarios, and are implemented by programming with SystemVerilog syntax. This method ensures that the allocation of each memory block is fully random (the size of each memory block is random, and the starting address is random), and at the same time ensures that there will be no address conflicts in each memory block at any time, perfectly solves the above-mentioned memory allocation problem, effectively improves the verification space, ensures the functions and performances of various accelerator functional modules, and improves the verification quality.
[0159] In some embodiments of the present application, after the calculation of the occupied memory blocks is completed, the occupied memory blocks are released and can be reused, which improves the usage efficiency of the storage module.
[0160] It should be noted that each implementable manner in this embodiment can be implemented independently, or can be combined in any combination manner without conflict. The present application makes no limitation.
[0161] Another embodiment of the present application provides an allocation device for a storage module, which is used to execute the storage module allocation method provided in the above embodiment.
[0162] As Figure 5 shown, it is a schematic structural diagram of the allocation device for the storage module provided by the embodiment of the present application. The allocation device for the storage module includes an acquisition unit 501, a determination unit 502, and an allocation unit 503, where:
[0163] The acquisition unit 501 is used to acquire the service verification requirements of the chip, where the service verification requirements at least include the number of blocks and the application scenario;
[0164] The determination unit 502 is used to determine the generation mode of the storage module corresponding to the application scenario according to different application scenarios, where the generation mode of the storage module at least includes a direct generation mode and / or an indirect generation mode;
[0165] The allocation unit 503 is used to perform block processing on the storage module to be blocked according to the generation mode of the storage module and the number of blocks, and obtain a block result corresponding to the storage module.
[0166] Regarding the device in this embodiment, the specific manners in which each module performs operations have been described in detail in the embodiments related to the method, and will not be elaborated here.
[0167] Some embodiments of the present application preset a direct generation mode and an indirect generation mode. During the actual memory allocation process, different generation modes can be selected according to different application scenarios, and different generation modes are used to perform block processing on the storage module to obtain a block result, which ensures that each block is both fully random in address generation and there is no mutual address conflict among the blocks.
[0168] Another embodiment of the present application further supplements the allocation device of the storage module provided in the above embodiment.
[0169] Optionally, the allocation unit is used for:
[0170] If the generation mode of the storage module at least includes the direct generation mode, in the case where the application scenario is that the storage module is not occupied, according to the number of blocks, randomly generate memory blocks corresponding to the number of blocks in the storage module, and arrange the memory blocks;
[0171] Allocate the arranged memory blocks in sequence to obtain an allocation result.
[0172] Some embodiments of the present application can achieve the goal of random and non-conflicting allocation of each memory block through the direct generation mode, that is, a one-time random allocation. It is applicable to the application scenarios where the initial storage module memory allocation or each subsequent accelerator operation is completely independent. That is to say, each allocation is in the case where the storage module is not occupied, that is, the next accelerator operation will wait for the previous accelerator to complete the operation and the interrupt software to read all the operation results. In this way, each random allocation of memory blocks is a brand-new one and there is no conflict with the previous memory allocation.
[0173] Optionally, the allocation unit is used for:
[0174] Determine the starting position of the first memory block in the arranged memory blocks according to the starting address of the storage module;
[0175] Determine the ending position of the first memory block according to the size of the storage module and the size of the first remaining memory block in the arranged memory blocks; the first remaining memory block is the other memory blocks in the arranged memory blocks except the first memory block;
[0176] Randomly determine the allocation position of the first memory block according to the starting position and the ending position of the first memory block;
[0177] After determining the allocation position of the first memory block, use the last address of the first memory block as the starting position of the second memory block;
[0178] Determine the end position of the second memory block according to the size of the storage module, the size of the first memory block, and the size of the second remaining memory block among the arranged memory blocks, where the second remaining memory block is the remaining memory blocks after removing the first memory block and the second memory block from the arranged memory blocks;
[0179] Determine the allocation position of the second memory block according to the start position and the end position of the second memory block;
[0180] Allocate the remaining memory blocks in turn in the above manner to obtain the allocation result.
[0181] In some embodiments of the present application, in the direct generation mode, according to the size of the storage module, the number of blocks, and the size of each block, allocate each block in turn, and ensure that each block is randomly allocated within the allocable range, and the addresses of each block do not conflict with each other.
[0182] Optionally, the allocation unit is used for:
[0183] If the generation mode of the storage module includes at least the indirect generation mode, and in the application scenario where there are occupied memory blocks in the storage module, obtain the occupied memory blocks;
[0184] Obtain the regenerated memory blocks;
[0185] Determine whether there is an address conflict in the regenerated memory blocks;
[0186] In the case where there is no address conflict in the regenerated memory blocks, determine whether there is an address conflict between the regenerated memory blocks and the occupied memory blocks;
[0187] If there is no address conflict between the regenerated memory blocks and the occupied memory blocks, use the regenerated memory blocks as the block result.
[0188] In some embodiments of the present application, the indirect generation mode requires multiple random allocations to achieve the goal of non-conflicting random allocations of each memory block. It is applicable to more complex application scenarios where the previous and subsequent operations are intertwined, that is, during the current accelerator operation, the memory blocks for the next operation are generated and configured. At this time, it is not only necessary to consider that there is no address conflict between the newly generated memory blocks required for the next operation, but also necessary to consider that there is no conflict with the memory blocks of the current running operation.
[0189] Optionally, the allocation unit is used for:
[0190] Mark the regenerated memory blocks as occupied.
[0191] Some embodiments of the present application mark the regenerated memory blocks as occupied, thus avoiding repeated use and the problem of address conflicts.
[0192] Optionally, an allocation unit is configured to:
[0193] When the calculation of the occupied memory block ends, release the occupied memory block and mark it as idle.
[0194] Some embodiments of the present application release the occupied memory block after the calculation of the occupied memory block ends, so that it can be reused, improving the utilization efficiency of the storage module.
[0195] Regarding the device in this embodiment, the specific ways in which each module performs operations have been described in detail in the embodiments related to the method, and will not be elaborated here.
[0196] It should be noted that each feasible way in this embodiment can be implemented independently, or can be combined in any combination without conflict. The present application makes no limitation.
[0197] The embodiments of the present application also provide a computer-readable storage medium, on which a computer program is stored. When the program is executed by a processor, it can implement the operations corresponding to any of the embodiments of the storage module allocation method provided in the above embodiments.
[0198] The embodiments of the present application also provide a computer program product. The computer program product includes a computer program, and when the computer program is executed by a processor, it can implement the operations corresponding to any of the embodiments of the storage module allocation method provided in the above embodiments.
[0199] As Figure 6 shown, some embodiments of the present application provide an electronic device 600, which includes: a memory 610, a processor 620, and a computer program stored on the memory 610 and executable on the processor 620. Among them, when the processor 620 reads the program from the memory 610 through the bus 630 and executes the program, it can implement the method of any of the embodiments included in the above storage module allocation method.
[0200] The processor 620 can process digital signals and can include various computing architectures. For example, a complex instruction set computer architecture, a reduced instruction set computer architecture, or an architecture that implements a combination of multiple instruction sets. In some examples, the processor 620 can be a microprocessor.
[0201] The memory 610 can be used to store instructions executed by the processor 620 or data related to the instruction execution process. These instructions and / or data can include code for implementing some or all of the functions of one or more modules described in the embodiments of the present application. The processor 620 of the embodiments of the present disclosure can be used to execute the instructions in the memory 610 to implement the method shown above. The memory 610 includes dynamic random access memory, static random access memory, flash memory, optical memory, or other memories well known to those skilled in the art.
[0202] The above are only embodiments of the present application and are not used to limit the protection scope of the present application. For those skilled in the art, the present application can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application. It should be noted that similar reference numerals and letters denote similar items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings.
[0203] As mentioned above, the above are only the specific implementation manners of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art can easily think of changes or replacements within the technical scope disclosed by the present application, and all should be covered by the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.
[0204] It should be noted that in this document, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover a non-exclusive inclusion, such that a process, method, article or device comprising a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "comprising a..." does not exclude the existence of additional identical elements in the process, method, article or device comprising the element.
Claims
1. A method for allocating a storage module, characterized in that: The method comprises: Obtaining the business verification requirements of the chip, wherein the business verification requirements at least include the number of blocks and application scenarios; According to different application scenarios, determining a generation mode of a storage module corresponding to the application scenario, wherein the generation mode of the storage module at least includes a direct generation mode and / or an indirect generation mode; The storage module to be divided is divided into blocks according to the generation mode of the storage module and the number of blocks, so as to obtain a block result corresponding to the storage module.
2. The storage module allocation method according to claim 1, characterized in that: The step of performing block processing on the storage module to be divided according to the generation mode of the storage module and the number of blocks to obtain a block result corresponding to the storage module includes: If the generation mode of the storage module includes at least a direct generation mode, in the case where the application scenario is that the storage module is not occupied, according to the number of blocks, randomly generate memory blocks corresponding to the number of blocks in the storage module, wherein the arrangement order of the memory blocks in the storage module is randomly set; The occupied address segments are allocated to the arranged memory blocks in sequence to obtain a final allocation result.
3. The storage module allocation method according to claim 2, characterized in that: The step of sequentially allocating occupied address segments to the arranged memory blocks to obtain a final allocation result includes: Determining the starting position of the first memory block in the arranged memory blocks according to the starting address of the memory module; Determine the end position of the first memory block according to the size of the storage module and the size of the first remaining memory block in the arranged memory blocks; the first remaining memory block is the other memory blocks in the arranged memory blocks except the first memory block; Randomly determining an allocation position of the first memory block according to a starting position of the first memory block and an ending position of the first memory block; After determining the allocation position of the first memory block, taking the last address of the first memory block as the starting position of the second memory block; Determine the end position of the second memory block according to the size of the storage module, the first memory block and the size of the second remaining memory block in the arranged memory blocks, wherein the second remaining memory block is the remaining memory block in the arranged memory blocks after removing the first memory block and the second memory block; Determining an allocation position of the second memory block according to a starting position of the second memory block and an ending position of the second memory block; According to the above method, the remaining memory blocks are allocated in sequence to obtain the allocation result.
4. The storage module allocation method according to claim 1, characterized in that: The step of performing block processing on the storage module to be divided according to the generation mode of the storage module and the number of blocks to obtain a block result corresponding to the storage module includes: If the generation mode of the storage module includes at least an indirect generation mode, in the case where the application scenario is that there are occupied memory blocks in the storage module, obtaining the occupied memory blocks; Get the regenerated memory block; Determining whether the regenerated memory block has an address conflict; In the case that the regenerated memory block does not have an address conflict, determining whether the regenerated memory block and the occupied memory block have an address conflict; If there is no address conflict between the regenerated memory block and the occupied memory block, the regenerated memory block is used as the block result.
5. The storage module allocation method according to claim 4, characterized in that: The method further comprises: The regenerated memory block is marked as occupied.
6. The storage module allocation method according to claim 5, characterized in that: The method further comprises: When the calculation of the occupied memory block is completed, the occupied memory block is released and marked as an idle state.
7. A storage module allocation device, characterized in that: The device comprises: An acquisition unit, used to acquire a business verification requirement of a chip, wherein the business verification requirement at least includes a number of blocks and an application scenario; A determination unit, configured to determine, according to different application scenarios, a generation mode of a storage module corresponding to the application scenario, wherein the generation mode of the storage module at least includes a direct generation mode and / or an indirect generation mode; The allocation unit is used to perform block processing on the storage module to be divided according to the generation mode of the storage module and the number of blocks, so as to obtain a block result corresponding to the storage module.
8. An electronic device, characterized in that: The invention comprises a memory, a processor and a computer program stored in the memory and executable on the processor, wherein the processor can implement the storage module allocation method described in any one of claims 1 to 6 when executing the program.
9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the program, when executed by a processor, can implement the storage module allocation method described in any one of claims 1 to 6.