Data prefetching method and device, electronic equipment and chip

Abstract

The embodiment of the invention discloses a data prefetching method and device, electronic equipment and a chip. The method comprises the following steps: acquiring a prefetching command of at least one data prefetching source, and determining a current data prefetching priority corresponding to the prefetching command; querying whether a target storage area corresponding to the current priority reaches a storage upper limit or not in a prefetch data memory; wherein corresponding storage areas are respectively distributed for a plurality of priorities of data prefetching in the prefetching data memory, and when the data prefetching of the first priority does not reach the storage upper limit in the storage area corresponding to the second priority, the storage area corresponding to the second priority can be preempted; if yes, first prefetched data lower than the current priority is selected from the target storage area to be removed, and the storage area occupying the first prefetched data is used for data storage of the prefetched command. The data priority is considered during data pre-fetching, so that the problem of pre-fetching failure caused by replacement of the pre-fetched data can be avoided, the hit rate of the pre-fetched data is increased, and the chip performance is further improved.

Description

Technical Field

[0001] The present invention relates to the field of chip technology, and in particular, to a data prefetching method, device, electronic device, and chip. Background Art

[0002] With the development of artificial intelligence technology, the computing power of chips has been continuously improved, and there are huge challenges in computing latency, chip area, and power consumption.

[0003] Traditional chips improve the memory access bandwidth and latency of chips by using data caches. Ideal data prefetching is to prefetch future-used data in advance to improve the hit rate of data caches. For example, the prefetch data is placed in the storage space for prefetch data caches, and the prefetch data can be directly used when the on-chip computing unit performs calculations, reducing the impact of cache misses.

[0004] However, limited by chip area and power consumption, the size of the prefetch cache will be restricted. With the development of large language models, there are many problems in data prefetching, such as prefetch competition, untimely prefetching, repeated prefetching, and prefetch failure. Therefore, there is an urgent need to provide a data prefetching method to improve the data prefetch hit rate. Summary of the Invention

[0005] The present invention provides a data prefetching method, device, electronic device, and chip to improve the prefetch data hit rate and thus improve chip performance.

[0006] According to one aspect of the present invention, there is provided a data prefetching method, which includes:

[0007] Obtaining prefetch commands of at least one data prefetch source and determining the current priority of data prefetch corresponding to the prefetch commands;

[0008] Querying whether the target storage area corresponding to the current priority has reached the storage limit in the prefetch data memory;

[0009] Wherein, corresponding storage areas are respectively allocated for multiple priorities of data prefetch in the prefetch data memory. When the data prefetch of the first priority can preempt the storage area corresponding to the second priority when the storage area corresponding to the second priority has not reached the storage limit; the priority of the second priority is higher than that of the first priority;

[0010] If so, in the target storage area, selecting first prefetch data lower than the current priority for elimination, and occupying the storage area of the first prefetch data for storing the data of the prefetch command.

[0011] According to another aspect of the present invention, there is provided a data prefetching device, which includes:

[0012] A prefetch command acquisition module, configured to acquire prefetch commands of at least one data prefetch source and determine the current data prefetch priority corresponding to the prefetch commands;

[0013] A storage query module, configured to query in a prefetch data memory whether a target storage area corresponding to the current priority reaches a storage upper limit;

[0014] Wherein, corresponding storage areas are respectively allocated for multiple priorities of data prefetch in the prefetch data memory. When the data prefetch with the first priority does not reach the storage upper limit in the storage area corresponding to the second priority, it can preempt the storage area corresponding to the second priority; the priority of the second priority is higher than that of the first priority;

[0015] A first data prefetch module, configured to, if the target storage area reaches the storage upper limit, select first prefetch data lower than the current priority in the target storage area for elimination, and occupy the storage area of the first prefetch data for storing the data of the prefetch command.

[0016] According to another aspect of the present invention, there is provided an electronic device, the electronic device includes:

[0017] At least one processor; and

[0018] A memory communicatively connected to the at least one processor; wherein,

[0019] The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the data prefetch method according to any embodiment of the present invention.

[0020] According to another aspect of the present invention, there is provided a computer-readable storage medium, the computer-readable storage medium stores computer instructions, and the computer instructions are used to implement the data prefetch method according to any embodiment of the present invention when executed by a processor.

[0021] According to another aspect of the present invention, there is provided a computer program product, including a computer program, and the computer program implements the data prefetch method according to any embodiment of the present invention when executed by a processor.

[0022] The technical solution of the embodiment of the present invention is to determine the current priority of data prefetch corresponding to the prefetch command by obtaining the prefetch commands of at least one data prefetch source; query whether the target storage area corresponding to the current priority reaches the storage upper limit in the prefetch data memory; wherein, corresponding storage areas are respectively allocated for multiple priorities of data prefetch in the prefetch data memory, and when the data prefetch with the first priority does not reach the storage upper limit in the storage area corresponding to the second priority, it can preempt the storage area corresponding to the second priority; if so, in the target storage area, the first prefetch data with a lower priority than the current priority is selected for deletion, and the storage area occupied by the first prefetch data is used for storing the data of the prefetch command, which solves the problem of prefetch failure existing in data prefetch during chip calculation, and avoids the prefetch failure problem caused by the replacement of prefetch data by considering data priority during data prefetch, improves the prefetch data hit rate, and further improves the chip performance.

[0023] It should be understood that the content described in this part is not intended to identify the key or important features of the embodiments of the present invention, nor is it used to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention, and those of ordinary skill in the art can also obtain other drawings based on these drawings without creative efforts.

[0025] Figure 1 is a flowchart of a data prefetch method provided in Embodiment 1 of the present invention;

[0026] Figure 2 is a schematic diagram of look-ahead prefetch provided in Embodiment 1 of the present invention;

[0027] Figure 3 is a schematic flowchart of another data prefetch method provided in Embodiment 1 of the present invention;

[0028] Figure 4 is a flowchart of a data prefetch method provided in Embodiment 2 of the present invention;

[0029] Figure 5 is a schematic structural diagram of a data prefetch device provided in Embodiment 3 of the present invention;

[0030] Figure 6 is a schematic structural diagram of a chip provided in Embodiment 4 of the present invention;

[0031] Figure 7It is a schematic structural diagram of an electronic device for implementing the data prefetching method of the embodiments of the present invention. Detailed implementation manners

[0032] In order to enable those skilled in the art to better understand the solution of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0033] It should be noted that the terms "first", "second", etc. in the description and claims of the present invention and the above drawings are used to distinguish similar objects, and do not necessarily need to be used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances so that the embodiments of the present invention described here can be implemented in an order other than those illustrated or described here. In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device comprising a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0034] Embodiment 1

[0035] Figure 1 It is a flowchart of a data prefetching method provided according to Embodiment 1 of the present invention. This embodiment is applicable to the situation of obtaining and caching data extraction in chip computing to improve the computing rate. This method can be executed by a data prefetching device, which can be implemented in the form of hardware and / or software, and the data prefetching device can be configured in an electronic device such as a computer. As Figure 1 shown, the method includes:

[0036] Step 110, obtain prefetch commands of at least one data prefetch source, and determine the current priority of data prefetch corresponding to the prefetch commands.

[0037] Among them, the data prefetch source can be software data prefetch or hardware data prefetch, and the embodiments of the present invention do not make specific limitations on this. The prefetch command can be an instruction to prefetch and cache data at a specified address. Through data prefetch, data can be pre-read and cached in chip computing. When data calculation needs to be performed based on the data, the data can be directly obtained from the cache without reading the data in the memory, saving data acquisition time and improving chip computing efficiency.

[0038] In an alternative embodiment of the present invention, to avoid the problem of duplicate data prefetching caused by duplicate prefetch commands, obtaining prefetch commands for at least one data prefetch source includes: receiving prefetch commands from the data prefetch source and matching the prefetch commands with each historical prefetch command in the historical record buffer; when the match is inconsistent, transmitting the prefetch command to the prefetch command buffer for storage; when the match is consistent, discarding the prefetch command.

[0039] When multiple nodes (such as masters) simultaneously schedule and use data at the same address, each master will separately issue prefetch commands. The current data prefetch source is unable to know the prefetch commands sent by other data prefetch sources when sending prefetch commands. Therefore, when different data prefetch sources send prefetch commands, there may be a large number of duplicate prefetch commands. If a prefetch action is performed for each received prefetch command, a large amount of cache query bandwidth will be occupied due to a large number of duplicate prefetch actions, and at the same time, additional power consumption will be introduced, wasting chip resources.

[0040] In the embodiment of the present invention, to avoid the problem of duplicate data prefetching, a historical record buffer can be set during data prefetching. The historical record buffer records the address data that has been prefetched. When a new prefetch command is received, the prefetch command is compared with the historical record buffer. If it is found that the prefetch command exists in the historical record buffer, the prefetch command is actively discarded to avoid repeated access to the prefetch data memory.

[0041] In data processing, data has a life cycle, and the chip's scheduling and use of a certain address are not one-time. After a certain program finishes using a certain block of address, a new round of use can be carried out. At this time, the chip expects to prefetch the data of this address into the cache again and start a new round of calculation. In the embodiment of the present invention, to ensure the timeliness of the historical record buffer and avoid recording prefetch commands without limit, resulting in all prefetch commands being recorded and any received prefetch command being discarded due to address duplication, the cache clearing interface of the historical record buffer is called to clear the content recorded in the historical record buffer according to the program schedule to reschedule the data of a certain address.

[0042] To save scheduling time, in the embodiments of the present invention, the historical record buffer is set with a depth configurable function. For example, when a prefetch command is issued, the number of data prefetch commands occurring in each round of calculation can be evaluated, and the depth of the historical record buffer can be set according to the number of data prefetches. For example, the depth of the historical record buffer is set to a value less than the number of data prefetches. By setting the depth of the historical record buffer to a value less than the number of data prefetches, the update of the records in the historical record buffer can be automatically realized without clearing the buffer of the historical record buffer. In addition, the difference between the number of data prefetches and the depth of the historical record buffer can be set to be less than a preset threshold. Exemplarily, when the number of data prefetches is 10, the depth of the historical record buffer can be set to 8. The historical record buffer can be updated in a first-in, first-out logic. For example, a historical record buffer with a depth of 8 caches 8 issued prefetch commands. When a new prefetch command arrives and does not overlap with the historical record buffer, this prefetch command will be recorded in the historical record buffer, and the oldest prefetch command among the 8 will be discarded. In the current round of calculation, the historical record buffer can effectively avoid redundant access to the prefetch data memory by repeated prefetch commands; when the next round of calculation arrives, because the depth of the historical record buffer is less than the number of valid prefetch commands in the previous round, the overly old prefetch commands will be discarded in a first-in, first-out logic, so the new round of calculation will not be discarded by the historical record buffer, ensuring the timeliness of the historical record buffer.

[0043] Prefetch commands that do not repeat the records in the historical record buffer can be cached in the prefetch command buffer. When the prefetch data memory is unable to quickly respond to prefetch commands due to busy transactions in a certain period of time, etc., a large number of prefetch commands from software or hardware may accumulate in the prefetch command buffer. The longer the accumulation time, the worse the timeliness of the prefetch commands, so the larger the prefetch command cache is not necessarily better. To ensure the timeliness of the prefetch commands, the prefetch command buffer can be set with a depth configurable function. The chip can adjust the depth of the prefetch command buffer according to the actual application to ensure the timeliness of the prefetch commands in the prefetch command buffer.

[0044] When the accumulated prefetch commands exceed the caching capacity of the prefetch command buffer, multiple discarding methods can be set. Optionally, transmitting the prefetch command to the prefetch command buffer for storage includes: when the number of prefetch commands stored in the prefetch command buffer reaches the upper limit, if the current data prefetch task is to prefetch data for the current process, the earliest cached prefetch command is discarded, and the current prefetch command is transmitted to the prefetch command buffer for storage; if the current data prefetch task is to prefetch data for the next process, the current prefetch command is discarded.

[0045] Among them, when providing prefetch data for the current process, if the prefetch commands are hoarded for a long time, they have lost their timeliness. Even if the prefetch commands are sent to the prefetch data memory, most likely the data has already been read from the memory to the cache based on the chip's computing schedule, wasting the bandwidth resources of the prefetch data memory. Therefore, when performing data prefetch for the current process, when the prefetch command cache exceeds the cache limit, the oldest prefetch commands cached first can be discarded, and the new prefetch commands can be cached to ensure the freshness of the commands in the prefetch command buffer and the timeliness of the prefetch commands.

[0046] When providing prefetch data for the next process (i.e., the next process), the prefetch commands received first represent the data that the next process will use first in terms of time. At this time, the earlier the prefetch commands arrive, the stronger their practical significance. Therefore, when the current data prefetch task is to perform data prefetch for the next process, when the prefetch command cache exceeds the cache limit, the current prefetch commands are discarded, which can ensure that important prefetch commands will not be overwritten.

[0047] The technical solution of the embodiment of the present invention combines a depth-configurable prefetch command buffer and two prefetch command discarding methods, which can achieve the timeliness of data prefetch, ensure the reliability of prefetch competition, and improve the hit rate of the prefetch data memory.

[0048] The technical solution of the embodiment of the present invention avoids the repetition of prefetch commands by setting a depth-configurable history buffer; and ensures the timeliness of data prefetch through a depth-configurable prefetch command buffer and two prefetch command discarding methods. In practical applications, there may also be a situation where the data indicated by the issued prefetch command arrives at the prefetch data memory later than the on-chip read / write access time. In the case of a delay in the arrival of the prefetch command, the prefetch may fail, wasting the query bandwidth of the prefetch data memory and increasing the power consumption of the chip. To avoid the situation of prefetch failure, in the embodiment of the present invention, early prefetch can be performed.

[0049] In an alternative embodiment of the embodiment of the present invention, obtaining prefetch commands from at least one data prefetch source includes: determining an early prefetch offset according to the time difference between the prefetch command and the data usage command arriving at the prefetch data memory; receiving the prefetch commands from the data prefetch source, and updating the data prefetch address in the prefetch command according to the early prefetch offset.

[0050] Figure 2 is a schematic diagram of early prefetch provided according to Embodiment 1 of the present invention. As Figure 2As shown, the early prefetch offset can be determined according to the latency of the prefetch command, and the data prefetch address can be backward-offset prefetch according to the early prefetch offset. Among them, the early prefetch offset can be greater than the time difference. For example, the prefetch command is to sequentially transfer data from 0x200 to 0x400, and the issued data prefetch address space is from 0x200 to 0x300, that is, it is expected that the data from 0x200 to 0x300 can be prefetch to the prefetch data memory in advance. However, in this scenario, the prefetch command is later than the sequential transfer operation, resulting in the prefetch command being unable to achieve the expected goal. In this application scenario, assuming that when the prefetch command arrives, the sequential transfer has reached 0x220, and the prefetch command is later than the sequential transfer, this problem can be solved by early prefetch. At this time, the early prefetch offset (offset) can be set to 0x100, and the data prefetch address is updated to 0x300 to 0x400. Then, before the sequential transfer in the range of 0x300 to 0x400, the prefetch data can be transferred to the prefetch data memory in advance to improve the transfer efficiency. The early prefetch offset can be flexibly set according to actual needs in different scenarios to improve the prefetch hit rate and the chip calculation efficiency.

[0051] Figure 3 It is a schematic flowchart of another data prefetch method provided according to Embodiment 1 of the present invention. As Figure 3 shown, an electronic device performing data prefetch can receive prefetch commands from at least one data prefetch source. The electronic device can determine the early prefetch offset through the early prefetch interface and update the data prefetch address in the prefetch command to ensure prefetch effectiveness. Then, the prefetch command can be matched with each historical prefetch command in the historical record buffer to avoid duplicate prefetch commands. For prefetch commands that do not exist in the historical record buffer, they can be transmitted to the prefetch command buffer for storage and recorded in the historical record buffer. When the number of prefetch commands stored in the prefetch command buffer reaches the upper limit, two methods can be used to discard prefetch commands to ensure the effectiveness of prefetch commands. After passing through the prefetch command buffer, data prefetch can be performed in the prefetch data memory through the prefetch driver. When performing data prefetch, a multi-level residency method can be used to improve the data prefetch hit rate. For example, data prefetch is performed through the multi-level residency priority replacement algorithm of a multi-level set-associative cache.

[0052] In an embodiment of the present invention, in order to improve the data prefetch hit rate, different priority settings exist for data prefetch in the prefetch command. The priority can include at least two levels. For example, data prefetch can be set to high priority, medium priority, and low priority. Another example is that data prefetch can be set to high priority and low priority. Still another example is that data prefetch can be set to high priority, second highest priority, medium priority, and low priority, etc. When a prefetch command is obtained, the current priority corresponding to the prefetch command can be determined, and data prefetch can be performed according to the current priority.

[0053] Step 120: Query in the prefetch data memory whether the target storage area corresponding to the current priority has reached the storage limit.

[0054] Among them, corresponding storage areas are respectively allocated in the prefetch data memory for multiple priorities of data prefetch. When the data prefetch of the first priority can preempt the storage area corresponding to the second priority when the storage area corresponding to the second priority has not reached the storage limit; the priority of the second priority is higher than that of the first priority.

[0055] For example, in the prefetch data memory, corresponding storage areas can be respectively divided for data prefetch of high priority, medium priority, and low priority. When executing a prefetch command of low priority, if the storage areas corresponding to medium priority and / or high priority have not reached their storage limits, the prefetch command of low priority can preempt the storage areas corresponding to medium priority and / or high priority to perform prefetch data caching.

[0056] Exemplarily, in the prefetch data memory, a storage area of 0.25M is allocated for high priority, a storage area of 0.25M is allocated for medium priority, and a storage area of 0.5M is allocated for low priority. When a prefetch command of 0.75M of low priority is issued, the 0.5M storage area corresponding to low priority can be used. If the storage area corresponding to medium priority is empty at this time, the 0.25M storage area corresponding to medium priority can be preempted. Or, if there is 0.1M data in the storage area corresponding to medium priority at this time, 0.15M of the storage area corresponding to medium priority can be preempted, and then it is determined whether the storage area corresponding to high priority can be preempted. If the storage area corresponding to high priority is empty or the occupied size is less than 0.15M, the 0.1M storage area corresponding to high priority can be preempted.

[0057] In the embodiment of the present invention, the first priority can preempt the storage area corresponding to the second priority. To ensure that there is available storage space when the prefetch command of the lowest priority is issued, when allocating the storage area, for all priorities higher than the lowest priority, the size of the allocated storage space is less than the maximum storage capacity of the prefetch data memory. For example, the sum of the storage space sizes corresponding to the medium priority and the high priority is less than the maximum storage capacity of the prefetch data memory.

[0058] Step 130: If it is queried that the target storage area corresponding to the current priority in the prefetch data memory reaches the storage upper limit, then in the target storage area, select the first prefetch data lower than the current priority for elimination, and occupy the storage area of the first prefetch data for storing the data of the prefetch command.

[0059] Step 140: If it is queried that the target storage area corresponding to the current priority in the prefetch data memory does not reach the storage upper limit, then select an idle storage area in the target storage area corresponding to the current priority for storing the data of the prefetch command.

[0060] Specifically, the storage space of the prefetch data memory is limited. To ensure that the prefetch data can be successfully cached in the prefetch data memory, a replacement algorithm with multiple levels of residency priorities can be used to eliminate the prefetch data stored in the prefetch data memory, realizing the dynamic update of the prefetch data. Among them, the replacement algorithm with multiple levels of residency priorities can be the Least Recently Used (LRU) cache replacement algorithm.

[0061] Based on the fact that the first priority can preempt the storage area corresponding to the second priority, the priority of the second priority is higher than that of the first priority. When performing replacement (i.e., data elimination and storage area occupation), the prefetch data corresponding to the prefetch command of the second priority can replace the data in the storage area occupied by the first priority. The prefetch data corresponding to the prefetch command of the lowest priority can only replace the data in the storage area corresponding to the lowest priority.

[0062] For example, the prefetch data corresponding to the prefetch command of the low priority can only replace the data in the storage area occupied by the low priority. Specifically, the LRU algorithm can be used to select the first prefetch data in the storage area of the low priority for elimination, and occupy the storage area of the first prefetch data for storing the data of the prefetch command.

[0063] Among them, the LRU algorithm can be implemented based on a counter. The storage area with the smallest counter is preferentially selected (for example, when the prefetch data memory is a cache, the storage area can be a way). The replacement principle can be: set the maximum counter value for each storage area (way) in the initial state; when prefetch data with a lower current priority is selected in the target storage area, the LRU algorithm is used to select the corresponding prefetch data for replacement, and the counter of the replaced storage area is assigned the maximum value, and the counters of all unselected storage areas are decremented by 1.

[0064] When the storage area corresponding to the medium priority reaches the corresponding storage limit, the prefetch command of the medium priority can use the storage area preempted by the low priority, or it can also use the storage area occupied by other medium priorities. Specifically, when the actual prefetch quantity of the medium priority does not reach the upper limit of the storage area corresponding to the medium priority (at this time, the storage area of the medium priority is preempted by the low priority), the prefetch command of the medium priority can use the LRU algorithm to select the storage area preempted by the low priority, or the storage area occupied by other medium priorities. When the prefetch quantity of the medium priority is equal to the upper limit of the storage area corresponding to the medium priority (at this time, the storage area of the medium priority is not preempted by the low priority), the prefetch command of the medium priority can only use the LRU algorithm to select the storage area occupied by other medium priorities.

[0065] In the embodiment of the present invention, when the target storage area corresponding to the medium priority reaches the corresponding storage limit, the LRU algorithm can be used in the target storage area to select and eliminate the first prefetch data with a lower priority than the medium priority, and occupy the storage area of the first prefetch data for data storage of the medium priority (that is, the processing flow of step 130). When the target storage area corresponding to the medium priority reaches the corresponding storage limit and there is no prefetch data of the low priority in the target storage area, the LRU algorithm can be used to select and eliminate the prefetch data of other medium priorities, and occupy the storage area of the prefetch data of other medium priorities for data storage of the current medium priority.

[0066] When the storage area corresponding to the high priority reaches the corresponding storage limit, the prefetch command of the high priority can use the storage area preempted by the low priority or medium priority, or can also use the storage area occupied by other high priorities. Specifically, when the prefetch quantity of the high priority does not reach the upper limit of the storage area corresponding to the high priority (at this time, the storage area of the high priority is preempted by the low priority and / or medium priority), the prefetch command of the high priority can use the LRU algorithm to select the storage area preempted by the low priority or medium priority, or can also use the LRU algorithm to select the storage area occupied by other high priorities. When the prefetch quantity of the high priority is equal to the upper limit of the storage area corresponding to the high priority (at this time, the storage area of the high priority is not preempted by the low priority and medium priority), the prefetch command of the high priority can only use the LRU algorithm to select the storage area occupied by other high priorities.

[0067] In the embodiment of the present invention, when the target storage area corresponding to the high priority reaches the corresponding storage limit, the LRU algorithm can be used in the target storage area to select and eliminate the first prefetch data lower than the high priority, and occupy the storage area of the first prefetch data for storing the high priority data (i.e., the processing flow of step 130). When the target storage area corresponding to the high priority reaches the corresponding storage limit and there is no prefetch data of low priority or medium priority in the target storage area, the LRU algorithm can be used to select and eliminate the prefetch data of other high priorities, and occupy the storage area of the prefetch data of other high priorities for storing the current high priority data.

[0068] By respectively allocating corresponding storage areas for multiple priorities of data prefetch in the prefetch data memory, and combining that the first priority prefetch command can preempt when there is free space in the storage area corresponding to the second priority with higher priority, and the second priority prefetch command can eliminate the data in the storage area preempted by the first priority prefetch command and occupy it when needed, dynamic data prefetch can be performed according to the priority, ensuring that there is storage space for low priority data prefetch and ensuring that the high priority has higher storage authority, thereby improving the data prefetch hit rate.

[0069] The technical solution of this embodiment is to obtain the prefetch commands of at least one data prefetch source, and determine the current data prefetch priority corresponding to the prefetch commands; query whether the target storage area corresponding to the current priority reaches the storage upper limit in the prefetch data memory; if it is queried that the target storage area corresponding to the current priority in the prefetch data memory reaches the storage upper limit, then in the target storage area, select the first prefetch data with a lower priority than the current priority for elimination, and occupy the storage area of the first prefetch data for storing the data of the prefetch command; if it is queried that the target storage area corresponding to the current priority in the prefetch data memory does not reach the storage upper limit, then select an idle storage area in the target storage area corresponding to the current priority for storing the data of the prefetch command; when it is queried that the target storage area corresponding to the current priority in the prefetch data memory reaches the storage upper limit and the current priority is the lowest priority, select the third prefetch data for elimination in the lowest priority, and occupy the storage area of the third prefetch data for storing the data of the prefetch command, which solves the prefetch failure problem existing in data prefetch during chip calculation, and avoids the prefetch failure problem caused by important prefetch data being replaced by considering data priority during data prefetch, improves the prefetch data hit rate, and further improves the chip performance.

[0070] Embodiment 2

[0071] Figure 4 It is a flowchart of a data prefetch method provided according to Embodiment 2 of the present invention. This embodiment is a further addition to the above technical solution, and the technical solution in this embodiment can be combined with each optional solution in one or more of the above embodiments. As Figure 4 shown, the method includes:

[0072] Step 410, obtain the prefetch commands of at least one data prefetch source, and determine the current data prefetch priority corresponding to the prefetch commands.

[0073] In an optional implementation manner of the embodiment of the present invention, obtaining the prefetch commands of at least one data prefetch source includes: receiving the prefetch commands of the data prefetch source, and matching the prefetch commands with each historical prefetch command in the historical record buffer; when the matching is inconsistent, transmitting the prefetch commands to the prefetch command buffer for storage; when the matching is consistent, discarding the prefetch commands.

[0074] On the basis of the above implementation manner, optionally, transmitting the prefetch commands to the prefetch command buffer for storage includes: when the number of prefetch commands stored in the prefetch command buffer reaches the upper limit, if the current data prefetch task is to prefetch data for the current process, then discard the earliest cached prefetch command, and transmit the current prefetch command to the prefetch command buffer for storage; if the current data prefetch task is to prefetch data for the next process, then discard the current prefetch command.

[0075] In an alternative embodiment of the embodiment of the present invention, obtaining a prefetch command for at least one data prefetch source includes: determining an early prefetch offset according to the time difference between the prefetch command and the data usage command reaching the prefetch data memory; receiving the prefetch command of the data prefetch source, and updating the data prefetch address in the prefetch command according to the early prefetch offset.

[0076] Step 420: Query in the prefetch data memory whether the target storage area corresponding to the current priority reaches the storage upper limit.

[0077] Among them, corresponding storage areas are respectively allocated for multiple priorities of data prefetch in the prefetch data memory. When the data prefetch of the first priority can preempt the storage area corresponding to the second priority when the storage area corresponding to the second priority does not reach the storage upper limit; the priority of the second priority is higher than that of the first priority.

[0078] Step 430: If it is queried in the prefetch data memory that the target storage area corresponding to the current priority reaches the storage upper limit, then in the target storage area, select the first prefetch data lower than the current priority for elimination, and occupy the storage area of the first prefetch data for storing the data of the prefetch command.

[0079] Among them, when it is queried in the prefetch data memory that the target storage area corresponding to the current priority reaches the storage upper limit, and the current priority is the lowest priority, select the first prefetch data in the lowest priority for elimination, and occupy the storage area of the first prefetch data for storing the data of the prefetch command.

[0080] Step 440: If it is queried in the prefetch data memory that the target storage area corresponding to the current priority does not reach the storage upper limit, then select an idle storage area in the target storage area corresponding to the current priority for storing the data of the prefetch command.

[0081] Steps 410 to 440 can be understood as the execution operations of the prefetch command when the prefetch data corresponding to the prefetch command address is not stored in the prefetch data memory. Steps 450 to 480 can be understood as the execution operations of the prefetch command when the prefetch data corresponding to the prefetch command address has been stored in the prefetch data memory (that is, the prefetch command resides in the prefetch data memory).

[0082] In the embodiment of the present invention, the priority of the prefetch command can be flexibly set. For example, the priority of the prefetch command can be increased when the prefetch command is issued, and after the data corresponding to the prefetch command is actually used, the prefetch data corresponding to the prefetch command can be demoted and restored to the original priority.

[0083] Optionally, obtain a prefetch command for at least one data prefetch source, and determine the current data prefetch priority corresponding to the prefetch command, including: obtaining the original data prefetch priority carried in the prefetch command, and upgrading the original priority to obtain the current data prefetch priority corresponding to the prefetch command; the method further includes: after the prefetch data corresponding to the prefetch command is used, downgrading the prefetch command to obtain the target storage priority of the data prefetch corresponding to the prefetch command, and storing the prefetch command in the prefetch data memory according to the target storage priority.

[0084] By upgrading the original priority before executing the prefetch command, the issued prefetch command can carry a higher priority, ensuring that the data remains in the prefetch data memory for a long time, so as to achieve hitting the prefetch data when actually reading and writing the prefetch data memory, and improving the prefetch data hit rate. By downgrading the prefetch command after the prefetch data is used, the prefetch data that has been applied can be stored in the prefetch data memory with a lower priority, avoiding the prefetch data staying in the prefetch data memory for a long time and ensuring the rationality of the prefetch data residence.

[0085] Based on the flexible configuration of the prefetch command in the embodiments of the present invention, for the prefetch data stored in the prefetch data memory, when performing data prefetch again, the current priority corresponding to the prefetch command can be compared with the historical storage priority stored in the prefetch data memory first, and then the data prefetch process can be performed according to the comparison result.

[0086] Step 450: When the prefetch command resides in the prefetch data memory, compare the current priority with the historical storage priority corresponding to the prefetch command stored in the prefetch data memory.

[0087] Step 460: When the current priority is different from the historical storage priority, the current priority is not the lowest priority, and the target storage area corresponding to the current priority reaches the storage limit, then in the target storage area, select the second prefetch data with a lower priority than the current priority for storage priority downgrading, store the prefetch data corresponding to the prefetch command, and update the stored historical storage priority in the prefetch data memory to the current priority.

[0088] Among them, when selecting the second prefetch data with a lower priority than the current priority, the LRU algorithm can be used.

[0089] For example, when the current priority is high and the corresponding historical storage priority is medium, if the target storage area corresponding to the high priority reaches its storage limit, the LRU algorithm can be used in the target storage area to select second prefetch data with a medium priority, low priority, or other high priorities lower than the current high priority for storage priority demotion. For example, the second prefetch data can be demoted to a low priority or a medium priority. The prefetch data corresponding to the prefetch command is stored using the current priority.

[0090] For another example, when the current priority is medium and the corresponding historical storage priority is low, if the target storage area corresponding to the medium priority reaches its storage limit, the LRU algorithm can be used in the target storage area to select second prefetch data with a low priority or other medium priorities lower than the current medium priority for storage priority demotion. For example, the second prefetch data can be demoted to a low priority. The prefetch data corresponding to the prefetch command is stored using the current priority.

[0091] Step 470: When the current priority is different from the historical storage priority and the current priority is the lowest priority or the target storage area corresponding to the current priority has not reached its storage limit, data prefetch is performed in the target storage area corresponding to the current priority, and the historical storage priority stored in the prefetch data memory is updated to the current priority.

[0092] For example, when the current priority is medium and the historical storage priority is low, but the storage area corresponding to the medium priority has not reached its storage limit, data prefetch can be directly performed in the target storage area corresponding to the medium priority, and the historical storage priority is updated to the medium priority.

[0093] Alternatively, when the current priority is low and the historical storage priority is medium, data prefetch can be directly performed in the target storage area corresponding to the low priority, and the historical storage priority is updated to the low priority. When performing data prefetch, if the low priority has reached its storage limit, preemption can be performed when there are idle storage areas in the medium priority or high priority. If there are no idle storage areas in the medium priority or high priority and the low priority has reached its storage limit, the LRU algorithm can be used to select other low-priority prefetch data lower than the current low priority for replacement. When performing data prefetch, if the low priority has not reached its storage limit, the idle storage area corresponding to the low priority can be directly used for data prefetch.

[0094] Step 480: When the current priority is the same as the historical storage priority, data prefetch is performed in the target storage area corresponding to the historical storage priority, and the historical storage priority stored in the prefetch data memory is maintained.

[0095] Among them, when prefetching data in the target storage area corresponding to the historical storage priority, the prefetch data stored in the prefetch data memory can be directly updated without occupying storage resources.

[0096] The technical solution of the embodiment of the present invention obtains a prefetch command and queries whether the prefetch command hits the prefetch data memory; when it does not hit, it queries whether the target storage area corresponding to the current priority of the prefetch command in the prefetch data memory reaches the storage upper limit; if it reaches the storage upper limit, in the target storage area, the first prefetch data with a lower priority than the current priority is selected for elimination, and the storage area of the first prefetch data is occupied for storing the data of the prefetch command; if it does not reach the storage upper limit, an idle storage area is selected in the target storage area corresponding to the current priority for storing the data of the prefetch command; when it reaches the storage upper limit and the current priority is the lowest priority, the third prefetch data is selected for elimination in the lowest priority, and the storage area of the third prefetch data is occupied for storing the data of the prefetch command; when hitting the prefetch data memory, the current priority is compared with the historical storage priority stored in the prefetch data memory; when the priorities are different and the current priority is not the lowest priority, and the target storage area corresponding to the current priority reaches the storage upper limit, then in the target storage area, the second prefetch data with a lower priority than the current priority is selected for storage priority demotion, the prefetch data corresponding to the prefetch command is stored, and the historical storage priority is updated to the current priority; when the priorities are different, and the current priority is the lowest priority or the target storage area corresponding to the current priority does not reach the storage upper limit, then data prefetching is performed in the target storage area corresponding to the current priority, and the historical storage priority is updated to the current priority; when the priorities are the same, then data prefetching is performed in the target storage area corresponding to the historical storage priority, and the historical storage priority remains unchanged, solving the prefetch failure problem existing in data prefetching during chip calculation, avoiding the prefetch failure problem caused by important prefetch data being replaced by considering data priority during data prefetching, improving the prefetch data hit rate, and thus improving the chip performance.

[0097] It should be noted that the prefetch data memory can be a cache. Such as Figure 3As shown, the obtained prefetch command can be translated into an instruction that supports a flexible multi-level mainstream priority Cache protocol by a prefetch driver, and the specific prefetch operation is executed by the Cache. In the cache, it can receive prefetch commands and also real read / write commands on the chip. An arbiter can be set in the cache to arbitrate between prefetch commands and real read / write commands. The cache can adopt an n-level pipeline to implement a replacement algorithm with multi-level residency priorities. The operations from step 410 to step 480 are at a certain level in the n-level pipeline cache. Through the data prefetch method provided by the embodiments of the present invention, the data accessed by the real read / write command can be prefetched into the cache in advance, improving the hit ratio of the cache, avoiding data reading in the main memory, and thus improving the chip bandwidth, reducing latency, and reducing chip power consumption.

[0098] Embodiment III

[0099] Figure 5 is a schematic structural diagram of a data prefetch device provided according to Embodiment III of the present invention. As Figure 5 shown, the device includes: a prefetch command acquisition module 510, a storage query module 520, and a first data prefetch module 530. Among them:

[0100] The prefetch command acquisition module 510 is used to acquire prefetch commands from at least one data prefetch source and determine the current priority of data prefetch corresponding to the prefetch command;

[0101] The storage query module 520 is used to query in the prefetch data memory whether the target storage area corresponding to the current priority reaches the storage upper limit;

[0102] Among them, corresponding storage areas are respectively allocated for multiple priorities of data prefetch in the prefetch data memory. When the data prefetch of the first priority can preempt the storage area corresponding to the second priority when the storage area corresponding to the second priority does not reach the storage upper limit;

[0103] The first data prefetch module 530 is used to, if the target storage area reaches the storage upper limit, select the first prefetch data with a lower priority than the current priority in the target storage area for elimination, and occupy the storage area of the first prefetch data for storing the data of the prefetch command.

[0104] Optionally, the device further includes:

[0105] A priority comparison module, which is used to compare the current priority with the historical storage priority corresponding to the prefetch command stored in the prefetch data memory when the prefetch command resides in the prefetch data memory;

[0106] The second data prefetch module is used to, when the current priority is different from the historical storage priority, the current priority is not the lowest priority, and the target storage area corresponding to the current priority reaches the storage limit, select second prefetch data with a lower priority than the current priority in the target storage area for storage priority demotion, store the prefetch data corresponding to the prefetch command, and update the stored historical storage priority in the prefetch data memory to the current priority.

[0107] Optionally, the device further includes:

[0108] The third data prefetch module is used to, when the current priority is different from the historical storage priority, and the current priority is the lowest priority or the target storage area corresponding to the current priority does not reach the storage limit, perform data prefetch in the target storage area corresponding to the current priority, and update the stored historical storage priority in the prefetch data memory to the current priority.

[0109] Optionally, the prefetch command acquisition module 510 includes:

[0110] The priority upgrade unit is used to acquire the original data prefetch priority carried in the prefetch command and upgrade the original priority to obtain the current data prefetch priority corresponding to the prefetch command;

[0111] The device further includes:

[0112] The priority demotion unit is used to demote the prefetch command after the prefetch data corresponding to the prefetch command is used, obtain the target storage priority of the data prefetch corresponding to the prefetch command, and store the prefetch command in the prefetch data memory according to the target storage priority.

[0113] Optionally, the prefetch command acquisition module 510 includes:

[0114] The historical record matching unit is used to receive the prefetch command from the data prefetch source and match the prefetch command with each historical prefetch command in the historical record buffer;

[0115] The prefetch command caching unit is used to, when the matching is inconsistent, transmit the prefetch command to the prefetch command buffer for storage;

[0116] The prefetch command discarding unit is used to, when the matching is consistent, discard the prefetch command.

[0117] Optionally, the prefetch command caching unit includes:

[0118] The first prefetch command cache subunit is configured to discard the earliest cached prefetch command and transfer the current prefetch command to the prefetch command cache for storage if the current data prefetch task is for the current process when the number of prefetch commands stored in the prefetch command cache reaches the upper limit.

[0119] The second prefetch command cache subunit is configured to discard the current prefetch command if the current data prefetch task is for the next process.

[0120] Optionally, the prefetch command acquisition module 510 includes:

[0121] The advanced prefetch offset determination unit is configured to determine the advanced prefetch offset according to the time difference between the prefetch command and the data usage command reaching the prefetch data memory.

[0122] The data prefetch address update unit is configured to receive the prefetch command from the data prefetch source and update the data prefetch address in the prefetch command according to the advanced prefetch offset.

[0123] The data prefetch device provided by the embodiments of the present invention can execute the data prefetch method provided by any embodiment of the present invention, and has the corresponding functional modules and beneficial effects of the execution method.

[0124] Embodiment 4

[0125] Figure 6 It is a schematic structural diagram of a chip provided by Embodiment 4 of the present invention. As Figure 6 shown, the chip includes: at least one processor core 610 for issuing prefetch commands; a data prefetch processor 620 for executing the data prefetch method provided by any embodiment of the present invention according to the obtained prefetch commands; and a prefetch data memory 630 for allocating corresponding storage areas for multiple priorities of data prefetch and performing prefetch data caching.

[0126] Specifically, the software can determine whether data prefetch is required and the optimal prefetch configuration parameters according to the type of the issued computing task, and transfer the prefetch configuration parameters to the scheduler. The scheduler issues the prefetch configuration parameters and the computing task to the processor core according to the scheduling policy. The processor core parses and executes the computing task, issues the prefetch command to the bus, and the bus sends the prefetch command to the data prefetch processor according to the on-chip routing policy.

[0127] The data prefetch processor 620 includes an advanced prefetch interface, a history buffer, a prefetch command buffer, and a prefetch driver.

[0128] Among them, the early prefetch interface is used to obtain the early prefetch offset, receive the prefetch command from the data prefetch source, and update the data prefetch address in the prefetch command according to the early prefetch offset. The early prefetch offset is determined according to the time difference between the prefetch command and the data usage command reaching the prefetch data memory. For example, the data prefetch processor 620 determines the early prefetch offset according to the time difference between the prefetch command and the data usage command reaching the prefetch data memory.

[0129] The history register is used to receive the prefetch command from the data prefetch source and match the prefetch command with each historical prefetch command in the register; when the match is inconsistent, the prefetch command is transmitted to the prefetch command buffer for storage; when the match is consistent, the prefetch command is discarded.

[0130] The prefetch command buffer is used to discard the earliest cached prefetch command and store the current prefetch command when the number of stored prefetch commands reaches the upper limit and the current data prefetch task is for the current process; when the current data prefetch task is for the next process, the current prefetch command is discarded.

[0131] The prefetch driver is used to translate the obtained prefetch command into an instruction that follows the protocol of the prefetch data memory. For example, the prefetch driver is used to translate the obtained prefetch command into an instruction of the cache protocol.

[0132] The prefetch data memory includes an arbiter. The arbiter is used to arbitrate between the prefetch command and the real read / write command.

[0133] The data prefetch processor is used to obtain the prefetch commands of at least one data prefetch source and determine the current priority of data prefetch corresponding to the prefetch commands; query whether the target storage area corresponding to the current priority in the prefetch data memory reaches the storage upper limit;

[0134] The prefetch data memory is used to allocate corresponding storage areas for multiple priorities of data prefetch respectively; when the data prefetch of the first priority can preempt the storage area corresponding to the second priority when the storage area corresponding to the second priority does not reach the storage upper limit; the priority of the second priority is higher than that of the first priority;

[0135] The prefetch data memory is used to select and eliminate the first prefetch data with a lower priority than the current priority in the target storage area when the target storage area corresponding to the current priority reaches the storage upper limit, and occupy the storage area of the first prefetch data for storing the data of the prefetch command.

[0136] The data prefetch processor is also used to compare the current priority with the historical storage priority corresponding to the prefetch command stored in the prefetch data memory when the prefetch command stays in the prefetch data memory;

[0137] The prefetch data memory is further configured to, when the current priority is different from the historical storage priority, the current priority is not the lowest priority, and the target storage area corresponding to the current priority reaches the storage limit, select the second prefetch data with a lower priority than the current priority in the target storage area for storage priority downgrading, store the prefetch data corresponding to the prefetch command, and update the stored historical storage priority in the prefetch data memory to the current priority.

[0138] The prefetch data memory is further configured to, when the current priority is different from the historical storage priority, and the current priority is the lowest priority or the target storage area corresponding to the current priority does not reach the storage limit, perform data prefetching in the target storage area corresponding to the current priority, and update the stored historical storage priority in the prefetch data memory to the current priority.

[0139] The data prefetch processor is further configured to obtain the original data prefetch priority carried in the prefetch command, upgrade the original priority to obtain the current data prefetch priority corresponding to the prefetch command; after the prefetch data corresponding to the prefetch command is used, downgrade the prefetch command to obtain the target storage priority corresponding to the prefetch command;

[0140] The prefetch data memory is further configured to store the prefetch command according to the target storage priority.

[0141] The technical solution of the embodiment of the present invention performs data prefetching through a chip including a processor core, a data prefetching processor, and a prefetching data memory. It can carry stride information in the prefetching instruction to achieve advanced prefetching, improving the accuracy and timeliness of data prefetching. By recording the prefetching history through a history register and actively discarding duplicate prefetching instructions, a more flexible and efficient historical comparison scheme is implemented, effectively avoiding the performance and power consumption losses caused by duplicate prefetching. By discarding appropriate prefetching commands in different scenarios through a prefetching command register, reasonably discarding the importance of prefetching instructions, and avoiding important prefetching commands being overwritten. By integrating high-residency priority into the prefetching command, according to the priority indication of the command, high-priority information is given to the prefetching data, and it is restored to the real priority during actual use, effectively avoiding the replacement algorithm from replacing the prefetching data and avoiding the risk of prefetching failure. When performing data prefetching, multiple priorities are used for data storage, considering mechanisms such as storage preemption and data elimination of stored data, which can improve the cache hit rate under limited cache resources, effectively solve many problems such as prefetching competition, untimely prefetching, duplicate prefetching, and prefetching failure, thereby improving the chip bandwidth, reducing latency, and reducing chip power consumption. And based on the data prefetching method provided by the embodiment of the present invention, the read and write capabilities of the processor core can be maximized, it can run at full bandwidth, reduce the memory access time, and reduce the requirement for the maximum in-flight transaction processing capacity of the processor core.

[0142] Embodiment 5

[0143] Figure 7 FIG. shows a schematic structural diagram of an electronic device 10 that can be used to implement the embodiments of the present invention. The electronic device is intended to represent various forms of digital computers, such as, for example, laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as, for example, personal digital processors, cellular phones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the present invention described and / or claimed herein.

[0144] As Figure 7As shown, the electronic device 10 includes at least one processor 11 and a memory communicatively connected to the at least one processor 11, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc. Among them, the memory stores a computer program executable by the at least one processor. The processor 11 can execute various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 12 or the computer program loaded from the storage unit 18 into the random access memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 can also be stored. The processor 11, the ROM 12, and the RAM 13 are connected to each other via a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0145] Multiple components in the electronic device 10 are connected to the I / O interface 15, including: an input unit 16, such as a keyboard, a mouse, etc.; an output unit 17, such as various types of displays, speakers, etc.; a storage unit 18, such as a disk, an optical disc, etc.; and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information / data with other devices via a computer network such as the Internet and / or various telecommunication networks.

[0146] The processor 11 can be various general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of the processor 11 include but are not limited to a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, etc. The processor 11 executes the various methods and processes described above, such as the data prefetch method.

[0147] In some embodiments, the data prefetch method can be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as the storage unit 18. In some embodiments, part or all of the computer program can be loaded and / or installed onto the electronic device 10 via the ROM 12 and / or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the processor 11, one or more steps of the data prefetch method described above can be executed. Alternatively, in other embodiments, the processor 11 can be configured to execute the data prefetch method in any other appropriate way (e.g., by means of firmware).

[0148] The various embodiments of the systems and techniques described above in this specification can be implemented in digital electronic circuitry, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems-on-chip (SOCs), complex programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments can include: being implemented in one or more computer programs that are executable and / or interpretable on a programmable system including at least one programmable processor, which can be a special-purpose or general-purpose programmable processor that receives data and instructions from, and transmits data and instructions to, a storage system, at least one input device, and at least one output device.

[0149] The computer programs for implementing the methods of the present invention can be written in any combination of one or more programming languages. These computer programs can be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the computer programs, when executed by the processor, cause the functions / operations specified in the flowchart and / or block diagram to be implemented. The computer programs can be executed entirely on the machine, partly on the machine, as a stand-alone software package partly on the machine and partly on a remote machine or entirely on the remote machine or server.

[0150] In the context of the present invention, a computer-readable storage medium can be a tangible medium that can contain or store a computer program for use by or in connection with an instruction execution system, apparatus, or device. The computer-readable storage medium can include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. Alternatively, the computer-readable storage medium can be a machine-readable signal medium. More specific examples of the machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0151] To provide interaction with a user, the systems and techniques described herein can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or a trackball) by which the user can provide input to the electronic device. Other kinds of devices can also be used to provide interaction with the user; for example, the feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, speech input, or tactile input).

[0152] The systems and techniques described herein can be implemented in a computing system including backend components (e.g., as a data server), or a computing system including middleware components (e.g., an application server), or a computing system including frontend components (e.g., a user computer having a graphical user interface or a web browser through which the user can interact with an implementation of the systems and techniques described herein), or a computing system including any combination of such backend components, middleware components, or frontend components. The components of the system can be interconnected to each other by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local area network (LAN), wide area network (WAN), blockchain network, and the Internet.

[0153] A computing system can include a client and a server. The client and the server are generally remote from each other and typically interact through a communication network. The relationship between the client and the server is generated by computer programs running on the respective computers and having a client-server relationship with each other. The server can be a cloud server, also known as a cloud computing server or a cloud host, which is a host product in the cloud computing service system and solves the defects of difficult management and weak business scalability existing in traditional physical hosts and VPS services.

[0154] It should be understood that various forms of the processes shown above can be used, with steps reordered, added, or deleted. For example, the steps recited in the present invention can be executed in parallel, sequentially, or in a different order, as long as the desired results of the technical solution of the present invention can be achieved, and no limitation is imposed herein.

[0155] The above specific embodiments do not constitute a limitation on the protection scope of the present invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A data pre-fetching method, characterized in that: include: Obtaining a prefetch command of at least one data prefetch source, and determining a data prefetch current priority corresponding to the prefetch command; querying in the pre-fetch data memory whether the target storage area corresponding to the current priority has reached a storage upper limit; Wherein, corresponding storage areas are respectively allocated to multiple priorities of data prefetching in the prefetch data memory, and when the storage area corresponding to the second priority does not reach the storage upper limit, the data prefetching of the first priority can preempt the storage area corresponding to the second priority; the priority of the second priority is higher than the first priority; If so, in the target storage area, the first pre-fetched data with a priority lower than the current priority is selected for elimination, and the storage area of ​​the first pre-fetched data is occupied to store the data of the pre-fetch command.

2. The method according to claim 1, characterized in that: Also includes: When the prefetch command resides in the prefetch data memory, comparing the current priority with a historical storage priority corresponding to the prefetch command stored in the prefetch data memory; When the current priority is different from the historical storage priority, the current priority is not the lowest priority, and the target storage area corresponding to the current priority reaches the storage upper limit, then in the target storage area, the second prefetch data with a lower priority than the current priority is selected to downgrade the storage priority, the prefetch data corresponding to the prefetch command is stored, and the stored historical storage priority is updated to the current priority in the prefetch data storage device.

3. The method according to claim 2, characterized in that Also includes: When the current priority is different from the historical storage priority, and the current priority is the lowest priority or the target storage area corresponding to the current priority has not reached the storage upper limit, data is pre-fetched in the target storage area corresponding to the current priority, and the historical storage priority stored in the pre-fetched data storage device is updated to the current priority.

4. The method according to claim 1, characterized in that Obtaining a prefetch command of at least one data prefetch source and determining a current priority of data prefetch corresponding to the prefetch command, comprising: Acquire the data prefetch original priority carried in the prefetch command, and upgrade the original priority to obtain the data prefetch current priority corresponding to the prefetch command; The method further comprises: After the prefetch data corresponding to the prefetch command is used, the prefetch command is downgraded to obtain the data prefetch target storage priority corresponding to the prefetch command, and the prefetch command is stored in a prefetch data memory according to the target storage priority.

5. The method according to claim 1, characterized in that: Obtaining a prefetch command of at least one data prefetch source, including: Receiving a prefetch command from a data prefetch source, and matching the prefetch command with each historical prefetch command in a historical record buffer; When the match is inconsistent, the pre-fetch command is transmitted to the pre-fetch command buffer for storage; When the matches are consistent, the pre-fetch command is discarded.

6. The method according to claim 5, characterized in that The prefetch command is transmitted to a prefetch command buffer for storage, comprising: When the number of prefetch commands stored in the prefetch command buffer reaches an upper limit, if the current data prefetch task is to prefetch data for the current process, the prefetch command cached first is discarded, and the current prefetch command is transmitted to the prefetch command buffer for storage; If the current data prefetching task is to prefetch data for the next process, the current prefetching command is discarded.

7. The method according to claim 1, characterized in that Obtaining a prefetch command of at least one data prefetch source, including: Determine the advance prefetch offset according to the time difference between the prefetch command and the data use command reaching the prefetch data memory; A prefetch command from a data prefetch source is received, and a data prefetch address in the prefetch command is updated according to the advance prefetch offset.

8. A data pre-fetching device, characterized in that: include: A prefetch command acquisition module, used to acquire a prefetch command of at least one data prefetch source, and determine a current priority of data prefetch corresponding to the prefetch command; A storage query module, used for querying in the pre-fetch data storage whether the target storage area corresponding to the current priority has reached the storage upper limit; Wherein, corresponding storage areas are respectively allocated to multiple priorities of data prefetching in the prefetch data memory, and when the storage area corresponding to the second priority does not reach the storage upper limit, the data prefetching of the first priority can preempt the storage area corresponding to the second priority; the priority of the second priority is higher than the first priority; The first data pre-fetch module is used to select and remove first pre-fetch data with a priority lower than the current priority in the target storage area if the target storage area reaches the storage upper limit, and occupy the storage area of ​​the first pre-fetch data to store the data of the pre-fetch command.

9. An electronic device, characterized in that: The electronic device comprises: at least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the data pre-fetching method according to any one of claims 1 to 7.

10. A chip, characterized in that: The chip comprises: at least one processor core, configured to issue a prefetch command; A data prefetch processor, configured to execute the data prefetch method according to any one of claims 1 to 7 according to the acquired prefetch command; The pre-fetch data storage device is used to allocate corresponding storage areas to multiple priorities of data pre-fetching to perform pre-fetch data caching.

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