A data transmission method, device, electronic device, program product and medium

Abstract

The present invention discloses a data transmission method, apparatus, electronic device, program product and medium, relating to the field of communication technologies. The method is applied to a downstream port device and includes: completing link initialization training of a PCIe physical link with an upstream port device to make the PCIe physical link in a working ready state; obtaining the target rate of the transmit channel and the target rate of the receive channel of the PCIe physical link according to application bandwidth requirement information; and completing link retraining of the PCIe physical link with the upstream port device according to the target rate of the transmit channel and the target rate of the receive channel. The present invention can determine the actual required physical link rate in the transmit and receive directions according to the transmission requirements of the current application scenario, thereby performing link retraining on the PCIe physical link, allowing the PCIe device to perform data transmission using different physical link rates in the transmit and receive directions, avoiding waste of bandwidth resources and saving transmission power consumption.

Description

Technical Field

[0001] The present invention relates to the field of communication technologies, and in particular, to a data transmission method, apparatus, electronic device, program product, and medium. Background Art

[0002] Currently, with excellent performance and innovative serial connection mechanisms, PCIe (Peripheral Component Interconnect Express, a high-speed serial computer expansion bus standard) technology has become the general standard for connecting computer hardware devices; with significant advantages such as high performance, low latency, and flexibility, it has established itself as the mainstream interface in the field of data transmission. The application scope of PCIe technology is extremely wide, covering various devices such as solid-state drives (SSDs), graphics processing units (GPUs), network interface cards (NICs), etc., providing powerful data transmission capabilities for modern computer systems.

[0003] In related technologies, PCIe technology has full-duplex data transmission capabilities, but uses symmetric transmission rates in the transmit (Tx) direction and the receive (Rx) direction, that is, the transmission rates and bandwidths in the Tx and Rx directions are exactly the same; however, in some application scenarios, there are obvious differences in the bandwidth and performance requirements for data transmission in the Tx and Rx directions of the PCIe link, resulting in unavoidable bandwidth waste and power consumption waste. Therefore, how to enable PCIe devices to use different physical link rates for data transmission in the transmit direction and the receive direction, avoid waste of bandwidth resources, and save transmission power consumption is an urgent problem to be solved today. Summary of the Invention

[0004] The purpose of the present invention is to provide a data transmission method, apparatus, electronic device, computer program product, and computer-readable storage medium to allow PCIe devices to use different physical link rates for data transmission in the transmit direction and the receive direction, avoid waste of bandwidth resources, and save transmission power consumption.

[0005] To solve the above technical problems, the present invention provides a data transmission method, which is applied to a downstream port device and includes:

[0006] Complete link initialization training for the Peripheral Component Interconnect physical link with an upstream port device, so that the Peripheral Component Interconnect physical link is in a working ready state; wherein, the downstream port device is connected to the upstream port device through the Peripheral Component Interconnect physical link;

[0007] Obtain the target rate of the transmit channel and the target rate of the receive channel of the Peripheral Component Interconnect physical link according to the application bandwidth requirement information;

[0008] Based on the target rate of the sending channel and the target rate of the receiving channel, perform link retraining on the Peripheral Component Interconnect Express (PCIe) physical link with the upstream port device, so as to perform data transmission using the PCIe physical link on which the link retraining is completed.

[0009] On the other hand, the target rate of the sending channel is any preset specified sending rate, and the target rate of the receiving channel is any preset specified receiving rate.

[0010] On the other hand, obtaining the target rate of the sending channel and the target rate of the receiving channel of the PCIe physical link according to the application bandwidth requirement information includes:

[0011] Determine the target rate of the sending channel and the target rate of the receiving channel according to the application bandwidth requirement information and the physical layer coding efficiency of the PCIe physical link; wherein, the application bandwidth requirement information includes the bandwidth requirement in the sending direction and the bandwidth requirement in the receiving direction.

[0012] On the other hand, determining the target rate of the sending channel and the target rate of the receiving channel according to the application bandwidth requirement information and the physical layer coding efficiency of the PCIe physical link includes:

[0013] Through T rate1 =R bw1 *8*E enc / 1000 and T rate2 =R bw2 *8*E enc / 1000, determine the required rate of the sending channel and the required rate of the receiving channel; wherein, T rate1 is the required rate of the sending channel, R bw1 is the bandwidth requirement in the sending direction, T rate2 is the required rate of the receiving channel, R bw2 is the bandwidth requirement in the receiving direction, and E enc is the physical layer coding efficiency;

[0014] Determine the target rate of the sending channel and the target rate of the receiving channel according to the required rate of the sending channel and the required rate of the receiving channel.

[0015] On the other hand, the target rate of the sending channel is the smallest preset specified sending rate greater than the required rate of the sending channel or the preset specified sending rate equal to the required rate of the sending channel; the target rate of the receiving channel is the smallest preset specified receiving rate greater than the required rate of the receiving channel or the preset specified receiving rate equal to the required rate of the receiving channel.

[0016] On the other hand, the target rate of the transmission channel and the target rate of the reception channel are not the same.

[0017] On the other hand, before obtaining the target rate of the transmission channel and the target rate of the reception channel of the Peripheral Component Interconnect Express (PCIe) physical link according to the application bandwidth requirement information, it further includes:

[0018] Detecting whether the upstream port device has the function of asymmetric physical link rate transmission;

[0019] If so, perform the step of obtaining the target rate of the transmission channel and the target rate of the reception channel of the PCIe physical link according to the application bandwidth requirement information.

[0020] On the other hand, detecting whether the upstream port device has the function of asymmetric physical link rate transmission includes:

[0021] Detecting whether the asymmetric physical link rate transmission function identification bit in the configuration register information of the upstream port device is the identification bit supporting the asymmetric physical link rate transmission function;

[0022] If it is the identification bit supporting the asymmetric physical link rate transmission function, it is determined that the upstream port device has the function of asymmetric physical link rate transmission, and perform the step of obtaining the target rate of the transmission channel and the target rate of the reception channel of the PCIe physical link according to the application bandwidth requirement information.

[0023] On the other hand, the asymmetric physical link rate transmission function identification bit is the 30th bit of the device capability register of the PCIe standard.

[0024] On the other hand, before completing the link retraining of the PCIe physical link with the upstream port device according to the target rate of the transmission channel and the target rate of the reception channel, it further includes:

[0025] Judging whether the current transmission channel rate of the PCIe physical link is the same as the target rate of the transmission channel and the current reception channel rate of the PCIe physical link is the same as the target rate of the reception channel;

[0026] If the current transmission channel rate is not the same as the target rate of the transmission channel or the current reception channel rate is not the same as the target rate of the reception channel, perform the step of completing the link retraining of the PCIe physical link with the upstream port device according to the target rate of the transmission channel and the target rate of the reception channel.

[0027] On the other hand, according to the target rate of the sending channel and the target rate of the receiving channel, performing link retraining of the Peripheral Component Interconnect Express (PCIe) physical link with the upstream port device includes:

[0028] Configuring the target rate of the sending channel and the target rate of the receiving channel into a preset configuration register of the upstream port device;

[0029] Sending a retraining request for the PCIe physical link to the upstream port device;

[0030] Performing link training and rate negotiation of the PCIe physical link with the upstream port device by using the target rate of the sending channel and the target rate of the receiving channel, so that the PCIe physical link is in a ready-to-work state.

[0031] On the other hand, the preset configuration register includes a target rate identification bit for the sending channel and a target rate identification bit for the receiving channel. The target rate identification bit for the sending channel includes 4 consecutive bit positions for recording the identification of the target rate of the sending channel, and the target rate identification bit for the receiving channel includes 4 consecutive bit positions for recording the identification of the target rate of the receiving channel.

[0032] On the other hand, the preset configuration register is located at the offset address 0x3C in the PCIe configuration space.

[0033] On the other hand, sending a retraining request for the PCIe physical link to the upstream port device includes:

[0034] Setting the retraining connection bit in the connection control register in the PCIe configuration space of the upstream port device to a retraining identifier.

[0035] The present invention further provides a data transmission device, which is applied to a downstream port device and includes:

[0036] An initialization module, configured to complete link initialization training of the PCIe physical link with an upstream port device, so that the PCIe physical link is in a ready-to-work state; wherein, the downstream port device is connected to the upstream port device through the PCIe physical link;

[0037] An acquisition module, configured to acquire the target rate of the sending channel and the target rate of the receiving channel of the PCIe physical link according to application bandwidth requirement information;

[0038] A retraining module, configured to complete link retraining of the Peripheral Component Interconnect Express (PCIe) physical link with the upstream port device according to the target rate of the transmit channel and the target rate of the receive channel, so as to perform data transmission using the PCIe physical link after the link retraining is completed.

[0039] The present invention also provides a data transmission method, which is applied to an upstream port device and includes:

[0040] Completing link initialization training of the PCIe physical link with a downstream port device, so that the PCIe physical link is in a working ready state; wherein, the downstream port device is connected to the upstream port device through the PCIe physical link;

[0041] Receiving the target rate of the transmit channel and the target rate of the receive channel sent by the downstream port device through the PCIe physical link;

[0042] According to the target rate of the transmit channel and the target rate of the receive channel, completing link retraining of the PCIe physical link with the downstream port device, so as to perform data transmission using the PCIe physical link after the link retraining is completed.

[0043] The present invention also provides a data transmission device, which is applied to an upstream port device and includes:

[0044] An initial training module, configured to complete link initialization training of the PCIe physical link with a downstream port device, so that the PCIe physical link is in a working ready state; wherein, the downstream port device is connected to the upstream port device through the PCIe physical link;

[0045] A target receiving module, configured to receive the target rate of the transmit channel and the target rate of the receive channel sent by the downstream port device through the PCIe physical link;

[0046] A training and transmission module, configured to complete link retraining of the PCIe physical link with the downstream port device according to the target rate of the transmit channel and the target rate of the receive channel, so as to perform data transmission using the PCIe physical link after the link retraining is completed.

[0047] The present invention also provides a computer program product, including a computer program / instructions, and when the computer program / instructions are executed by a processor, the steps of the data transmission method applied to the upstream port device or the downstream port device as described above are implemented.

[0048] The present invention also provides an electronic device, including:

[0049] A memory for storing a computer program;

[0050] A processor for implementing the steps of the data transmission method applied to the upstream port device or the downstream port device as described above when executing the computer program.

[0051] In addition, the present invention also provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the data transmission method applied to the upstream port device or the downstream port device as described above are implemented.

[0052] A data transmission method provided by the present invention, which is applied to a downstream port device and includes: completing link initialization training of a Peripheral Component Interconnect Express (PCIe) physical link with an upstream port device to make the PCIe physical link in a ready-to-work state; wherein, the downstream port device and the upstream port device are connected through the PCIe physical link; obtaining the target rate of the transmission channel and the target rate of the reception channel of the PCIe physical link according to the application bandwidth requirement information; and completing link retraining of the PCIe physical link with the upstream port device according to the target rate of the transmission channel and the target rate of the reception channel, so as to perform data transmission by using the PCIe physical link after the link retraining is completed.

[0053] It can be seen that by obtaining the target rate of the transmission channel and the target rate of the reception channel of the PCIe physical link according to the application bandwidth requirement information, the present invention can determine the actual required physical link rate in the transmission and reception directions according to the transmission requirements of the current application scenario, and thus complete link retraining of the PCIe physical link with the upstream port device according to the target rate of the transmission channel and the target rate of the reception channel, so as to implement the ALRT (Asymmetric Link Rate Transmission) capability of the PCIe device, allowing the PCIe device to perform data transmission at different physical link rates in the transmission and reception directions, avoiding waste of bandwidth resources and saving transmission power consumption. In addition, the present invention also provides a data transmission device applied to a downstream port device, a data transmission method and device applied to an upstream port device, an electronic device, a computer program product and a computer-readable storage medium, which also have the above beneficial effects. BRIEF DESCRIPTION OF THE DRAWINGS

[0054] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only the embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on the provided drawings.

[0055] Figure 1 It is a connection schematic diagram of a typical PCIe link in the related art;

[0056] Figure 2 It is a flowchart of a data transmission method provided by an embodiment of the present invention;

[0057] Figure 3 It is a flowchart of another data transmission method provided by an embodiment of the present invention;

[0058] Figure 4 It is a schematic structural diagram of a device function register provided by an embodiment of the present invention;

[0059] Figure 5 It is a transmission schematic diagram of a PCIe physical link adopting the ALRT mechanism provided by an embodiment of the present invention;

[0060] Figure 6 It is a schematic structural diagram of a preset configuration register provided by an embodiment of the present invention;

[0061] Figure 7 It is a schematic structural diagram of a connection control register provided by an embodiment of the present invention;

[0062] Figure 8 It is a structural block diagram of a data transmission device provided by an embodiment of the present invention;

[0063] Figure 9 It is a flowchart of a data transmission method applied to an upstream port device provided by an embodiment of the present invention;

[0064] Figure 10 It is a structural block diagram of another data transmission device provided by an embodiment of the present invention;

[0065] Figure 11 It is a schematic structural diagram of an electronic device provided by an embodiment of the present invention. Detailed implementation manners

[0066] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0067] In related technologies, as Figure 1 shown, the logical connection established between a DP (Downstream Port) device and an UP (Upstream Port) device is called a PCIe Link (link); a PCIe Link consists of one or more lanes, and each lane consists of a pair of physical connections, one in the transmit (Tx) direction and the other in the receive (Rx) direction, to achieve full-duplex data transmission. To improve the reliability and anti-interference ability of data transmission, the PCIe physical layer uses differential signal technology to transmit data. To meet the growing data transmission requirements, the PCIe bus standard continues to evolve and upgrade to support higher transmission rates and bandwidths. For example, the PCIe 6.0 specification stipulates that the data transmission rate per lane is increased to 64 GT / s, which is a significant increase compared to 32 GT / s of PCIe 5.0. However, with the increase in the PCIe transmission rate, the power consumption also increases, and at the same time, signal integrity challenges such as crosstalk and signal reflection are brought.

[0068] An NVMe (Non-Volatile Memory Express) SSD is a solid-state drive technology that uses a PCIe interface to directly communicate with the CPU (Central Processing Unit) of a host device, and has the characteristics of high bandwidth and low latency; due to its excellent performance and efficiency, it has become the preferred storage solution in the fields of artificial intelligence (AI) and machine learning. In the training and inference applications of real artificial intelligence and machine learning models, there are significant differences in the access requirements for stored data at different stages of the AI data pipeline. For example, in the data injection and data archiving stages, it is manifested as read-intensive operations OP ri of stored data; in the processes of data preprocessing, model training, and model inference, etc., it is manifested as write-intensive operations OP wi of stored data; in read-intensive operations, data flows from the NVMe SSD to the host device (such as a server), that is, Figure 1 from the upstream port device to the downstream port device in Figure 1It is transmitted from the downstream port device to the upstream port device. In this way, in the applications of different stages of the AI data pipeline, adopting the full-duplex data transmission capability of the PCIe technology in the related art, that is, using symmetric transmission rates in the sending and receiving directions, will cause inevitable bandwidth waste and power consumption waste.

[0069] To solve this problem, the embodiment of the present invention realizes the ALRT (Asymmetric Link Rate Transmission) capability of the PCIe device, allowing the PCIe device to use different physical link rates for data transmission in the sending and receiving directions, so that the PCIe device can configure the actual required physical link rates in the sending and receiving directions according to the transmission requirements of the current application scenario, and achieve the optimal configuration on the basis of ensuring the PCIe link efficiency, so as to avoid waste of bandwidth resources and save transmission power consumption.

[0070] Specifically, please refer to Figure 2 , Figure 2 which is a flowchart of a data transmission method provided by the embodiment of the present invention. This method is applied to the downstream port device and may include:

[0071] Step 101: Complete the link initialization training of the Peripheral Component Interconnect Express (PCIe) physical link with the upstream port device, so that the PCIe physical link is in a working ready state; wherein, the downstream port device and the upstream port device are connected through the PCIe physical link.

[0072] It can be understood that the downstream port device in this embodiment can be the PCIe device where the downstream port of the two PCIe devices connected by PCIe is located, and the upstream port device can be the PCIe device where the upstream port of the PCIe connection is located. For example, in the case of a host device (such as a server) connected to an NVMe SSD through PCIe, the host device can be the downstream port device, and the NVMe SSD can be the upstream port device.

[0073] Correspondingly, in this step, the downstream port device can complete the link initialization training of the PCIe physical link (such as the link training and rate negotiation defined by the PCIe specification) with the upstream port device during the PCIe device initialization process, so that the PCIe physical link enters the L0 state (i.e., the working ready state) defined by the PCIe specification; at this time, the PCIe connection between the downstream port device and the upstream port device is in a working ready state, and the downstream port device and the upstream port device can exchange information through the standard TLP (Transaction Layer Packet) defined by the PCIe specification.

[0074] Step 102: Obtain the target rate of the transmit channel and the target rate of the receive channel of the Peripheral Component Interconnect Express (PCIe) physical link according to the application bandwidth requirement information.

[0075] Among them, the application bandwidth requirement information in this embodiment may be information on the data transmission bandwidth requirement of the current application scenario in the downstream port device. For example, the application bandwidth requirement information may include the bandwidth requirement in the transmit direction (i.e., the transmit direction bandwidth requirement) and / or the bandwidth requirement in the receive direction (i.e., the receive direction bandwidth requirement) in the current application scenario.

[0076] Correspondingly, for the specific method of obtaining the application bandwidth requirement information in this step, it can be set by the designer according to the practical scenario and user requirements. For example, it can be implemented in the same or similar way as the method for obtaining the data transmission bandwidth requirement of an application program in related technologies. For example, a downstream port device (such as a server) can detect and obtain the application bandwidth requirement information of the running application program. This embodiment does not impose any restrictions on this.

[0077] It should be noted that the target rate of the transmit channel and the target rate of the receive channel in this embodiment may be the transmit channel rate and the receive channel rate that the PCIe physical link needs to be adjusted to. This embodiment does not limit the specific rate values of the target rate of the transmit channel and the target rate of the receive channel. For example, the values of the target rate of the transmit channel and the target rate of the receive channel may be different to implement the ALRT capability of the PCIe device, allowing the PCIe device to use different physical link rates for data transmission in the transmit and receive directions; in some scenarios, the target rate of the transmit channel and the target rate of the receive channel may also be the same to achieve the adaptive adjustment of the PCIe physical link.

[0078] Correspondingly, for the specific manner in which the downstream port device obtains the target rate of the transmit channel and the target rate of the receive channel of the PCIe physical link according to the application bandwidth requirement information in this step, it can be set by the designer according to the usage scenario and user requirements. For example, the downstream port device can directly determine the transmit direction bandwidth requirement in the application bandwidth requirement information as the target rate of the transmit channel, and determine the receive direction bandwidth requirement in the application bandwidth requirement information as the target rate of the receive channel. The target rate of the transmit channel in this embodiment is any preset specified transmit rate. For example, the preset specified transmit rate can include 2.5 Gbps, 5.0 Gbps, 8.0 Gbps, 16.0 Gbps, 32.0 Gbps, and 64.0 Gbps defined by the PCIe standard specification, etc.; the target rate of the receive channel is any preset specified receive rate. For example, the preset specified receive rate can include 2.5 Gbps, 5.0 Gbps, 8.0 Gbps, 16.0 Gbps, 32.0 Gbps, and 64.0 Gbps defined by the PCIe standard specification, etc.; that is to say, the downstream port device can match and determine the target rate of the transmit channel and the target rate of the receive channel according to the application bandwidth requirement information. This embodiment does not impose any restrictions on this.

[0079] Correspondingly, this embodiment does not limit the specific process of matching and determining the target rate of the transmit channel and the target rate of the receive channel according to the application bandwidth requirement information. For example, the downstream port device can directly use the application bandwidth requirement information to determine the target rate of the transmit channel and the target rate of the receive channel. For example, when the transmit direction bandwidth requirement in the application bandwidth requirement information is the same as a certain preset specified transmit rate, the preset specified receive rate can be directly determined as the target rate of the transmit channel; when the transmit direction bandwidth requirement in the application bandwidth requirement information is not the same as any of the preset specified transmit rates, the smallest preset specified transmit rate greater than the transmit direction bandwidth requirement can be determined as the target rate of the transmit channel.

[0080] In some other embodiments, the downstream port device can determine the target rate of the transmit channel and the target rate of the receive channel according to the application bandwidth requirement information and the physical layer coding efficiency of the PCIe physical link. For example, when the unit of the transmit direction bandwidth requirement and the receive direction bandwidth requirement is MB / s (megabytes per second), and the unit of the target rate of the transmit channel and the target rate of the receive channel is Gbps (gigabits per second), the downstream port device can use the formula T rate1 =R bw1 *8*E enc / 1000 and T rate2 =R bw2 *8*E enc / 1000, determine the transmission channel required rate and the reception channel required rate; based on the transmission channel required rate and the reception channel required rate, determine the transmission channel target rate and the reception channel target rate; where, T rate1 is the transmission channel required rate, with the unit of Gbps (gigabits per second); R bw1 is the bandwidth requirement in the transmission direction; T rate2 is the reception channel required rate, with the unit of Gbps (gigabits per second); R bw2 is the bandwidth requirement in the reception direction; E enc is the physical layer coding efficiency. For example, the physical layer coding efficiency of 8b / 10b is 0.8, and the physical layer coding efficiency of 128b / 130b can be approximated as 1 (i.e., 100%). For example, the transmission channel target rate can be the smallest preset specified transmission rate greater than the transmission channel required rate or the preset specified transmission rate equal to the transmission channel required rate. That is, when the transmission channel required rate is the same as a certain preset specified transmission rate, this preset specified reception rate can be determined as the transmission channel target rate; when the transmission channel required rate is not the same as each preset specified transmission rate, the smallest preset specified transmission rate greater than the transmission channel required rate can be determined as the transmission channel target rate. Correspondingly, the reception channel target rate can be the smallest preset specified reception rate greater than the reception channel required rate or the preset specified reception rate equal to the reception channel required rate.

[0081] Furthermore, in the method provided in this embodiment, the downstream port device can also detect whether the upstream port device has the function of asymmetric physical link rate transmission (ALRT). In the case that the upstream port device has the ALRT function, then use the transmission channel target rate and the reception channel target rate to complete the link retraining of the peripheral component interconnect physical link with the upstream port device to achieve the optimal configuration. For example, before step 102, the downstream port device can detect whether the upstream port device has the ALRT function; if so, enter step 102; if not, this process can be ended, and the data transmission between the downstream port device and the upstream port device can be realized according to the full-duplex data transmission capability of the PCIe connection in the related technology.

[0082] Step 103: According to the transmission channel target rate and the reception channel target rate, complete the link retraining of the peripheral component interconnect physical link with the upstream port device, so as to perform data transmission using the peripheral component interconnect physical link after the link retraining is completed.

[0083] It is understandable that in this step, the downstream port device can communicate with the upstream port device according to the target rate of the transmit channel and the target rate of the receive channel to complete the link retraining of the PCIe physical link (such as link training and rate negotiation), so that the PCIe physical link returns to the L0 state (i.e., the working ready state) again to perform subsequent data transmission tasks, such as the storage data transmission task between the host device and the NVMe SSD.

[0084] Correspondingly, for the specific method of the downstream port device in this step to complete the link retraining of the Peripheral Component Interconnect Express physical link according to the target rate of the transmit channel and the target rate of the receive channel with the upstream port device, it can be set by the designer according to the usage scenario and user requirements. For example, the downstream port device can send the target rate of the transmit channel and the target rate of the receive channel to the upstream port device; send a retraining request for the PCIe physical link to the upstream port device; and perform link training and rate negotiation of the Peripheral Component Interconnect Express physical link with the upstream port device using the target rate of the transmit channel and the target rate of the receive channel to make the Peripheral Component Interconnect Express physical link in the working ready state.

[0085] For example, in this step, the downstream port device can configure the target rate of the transmit channel and the target rate of the receive channel into a preset configuration register of the upstream port device; send a retraining request for the Peripheral Component Interconnect Express physical link to the upstream port device; and perform link training and rate negotiation of the Peripheral Component Interconnect Express physical link with the upstream port device using the target rate of the transmit channel and the target rate of the receive channel to make the Peripheral Component Interconnect Express physical link in the working ready state. Among them, the preset configuration register can be a register in the PCIe configuration space of the upstream port device set in advance, which is used to record the information of the target rate of the transmit channel and the target rate of the receive channel.

[0086] Furthermore, before this step, the downstream port device can also determine whether it is necessary to perform link retraining on the PCIe physical link by comparing the current transmit channel rate of the PCIe physical link with the target rate of the transmit channel and comparing the current receive channel rate of the PCIe physical link with the target rate of the receive channel. That is, when the current transmit channel rate is the same as the target rate of the transmit channel and the current receive channel rate is the same as the target rate of the receive channel, this process can be directly ended, and the subsequent data transmission can be performed using the current PCIe physical link; when the current transmit channel rate is different from the target rate of the transmit channel or the current receive channel rate is different from the target rate of the receive channel, the link retraining of the PCIe physical link is completed with the upstream port device.

[0087] For example, before this step, the downstream port device can determine whether the current transmission channel rate of the PCIe physical link is the same as the target transmission channel rate and whether the current reception channel rate of the PCIe physical link is the same as the target reception channel rate; if the current transmission channel rate is different from the target transmission channel rate or the current reception channel rate is different from the target reception channel rate, then proceed to step 103; if the current transmission channel rate is the same as the target transmission channel rate and the current reception channel rate is the same as the target reception channel rate, then end this process.

[0088] In some other embodiments, when the current transmission channel rate is different from the target transmission channel rate and the current reception channel rate is the same as the target reception channel rate, the downstream port device can utilize the target transmission channel rate to complete link retraining of the PCIe physical link with the upstream port device; when the current transmission channel rate is the same as the target transmission channel rate and the current reception channel rate is different from the target reception channel rate, the downstream port device can utilize the target reception channel rate to complete link retraining of the PCIe physical link with the upstream port device; when the current transmission channel rate is different from the target transmission channel rate and the current reception channel rate is different from the target reception channel rate, proceed to step 103. This embodiment does not impose any restrictions on this.

[0089] In this embodiment, the embodiment of the present invention can obtain the target transmission channel rate and the target reception channel rate of the Peripheral Component Interconnect Express (PCIe) physical link according to the application bandwidth demand information, and can determine the actual required physical link rate in the transmission and reception directions according to the transmission requirements of the current application scenario. Thus, by completing link retraining of the PCIe physical link with the upstream port device according to the target transmission channel rate and the target reception channel rate, the ALRT capability of the PCIe device is realized, allowing the PCIe device to perform data transmission at different physical link rates in the transmission and reception directions, avoiding waste of bandwidth resources and saving transmission power consumption.

[0090] Based on the above embodiments, please refer to Figure 3 , Figure 3 which is a flowchart of another data transmission method provided by the embodiment of the present invention. This method is applied to the downstream port device and may include:

[0091] Step 201: Complete link initialization training of the PCIe physical link with the upstream port device to make the PCIe physical link in a working ready state.

[0092] Among them, the downstream port device and the upstream port device are connected through the PCIe physical link.

[0093] It can be understood that this step is similar to step 101 and will not be elaborated here.

[0094] Step 202: Detect whether the upstream port device has the function of asymmetric physical link rate transmission; if so, proceed to step 203.

[0095] Among them, the downstream port device (such as a host device) in this embodiment can have the ALRT (asymmetric physical link rate transmission) function. By detecting whether the upstream port device has the ALRT function, it can be determined whether the subsequent link retraining process for implementing the ALRT capability of the PCIe physical link can be carried out.

[0096] Correspondingly, for the case where the upstream port device in this embodiment does not have the ALRT function, it can be set by the designer. For example, this process can be ended, and the data transmission between the downstream port device and the upstream port device can be realized according to the full-duplex data transmission capability of the PCIe connection in the related technology.

[0097] Correspondingly, for the specific method of detecting whether the upstream port device has the ALRT function by the downstream port device in this step, it can be set by the designer according to the usage scenario and user requirements. For example, the downstream port device can detect whether the ALRT function identification bit in the configuration register information of the upstream port device is the supported ALRT function identification; if it is the supported ALRT function identification, it is determined that the upstream port device has the ALRT function and step 203 can be entered; if it is the unsupported ALRT function identification, it is determined that the upstream port device does not have the ALRT function and this process can be ended. For example, the downstream port device can use the PCIe physical link in the L0 state to read the configuration register information of the upstream port device through the TLP message to detect whether the upstream port device has the ALRT function.

[0098] Correspondingly, the above ALRT function identification bit can be an identification bit extended on the basis of the PCIe standard specification to indicate whether the ALRT function is available; for example, by extending the definition of the standard Device Capabilities Register in the PCIe specification, the 30th bit unused by the original protocol is used as the ALRT function identification bit, as Figure 4 shown in the position of the asymmetric physical link rate transmission function; for example, the ALRT function identification bit being 1 (i.e., the supported ALRT function identification) represents that the upstream port device has the ALRT function; the ALRT function identification bit being 0 (i.e., the unsupported ALRT function identification) represents that the upstream port device does not have the ALRT function. That is to say, the ALRT function identification bit can be the 30th bit of the device capability register of the PCIe standard.

[0099] Step 203: Determine the target rate of the transmission channel and the target rate of the reception channel according to the application bandwidth requirement information and the physical layer coding efficiency of the Peripheral Component Interconnect Express (PCIe) physical link.

[0100] Among them, the application bandwidth requirement information includes the transmission direction bandwidth requirement and the reception direction bandwidth requirement; the target rate of the transmission channel is any preset specified transmission rate, and the target rate of the reception channel is any preset specified reception rate.

[0101] For example, when the unit of the transmission direction bandwidth requirement and the reception direction bandwidth requirement is MB / s, and the unit of the target rate of the transmission channel and the target rate of the reception channel is Gbps, the downstream port device can pass through T rate1 =R bw1 *8*E enc / 1000 and T rate2 =R bw2 *8*E enc / 1000 to determine the required rate of the transmission channel and the required rate of the reception channel; determine the target rate of the transmission channel and the target rate of the reception channel according to the required rate of the transmission channel and the required rate of the reception channel; among them, T rate1 is the required rate of the transmission channel, and the unit is Gbps; R bw1 is the transmission direction bandwidth requirement; T rate2 is the required rate of the reception channel, and the unit is Gbps; R bw2 is the reception direction bandwidth requirement; E enc is the physical layer coding efficiency, such as 0.8 or 1. The target rate of the transmission channel can be the smallest preset specified transmission rate greater than the required rate of the transmission channel or the preset specified transmission rate equal to the required rate of the transmission channel; the target rate of the reception channel can be the smallest preset specified reception rate greater than the required rate of the reception channel or the preset specified reception rate equal to the required rate of the reception channel.

[0102] For example, as Figure 5 shown. The PCIe Link between the downstream port device and the upstream port device uses a single Lane (channel) connection. The current application of the AI data pipeline is a write-intensive operation OP wi for storing data. The data write bandwidth requirement (i.e., the transmission direction bandwidth requirement) is 3000 MB / s, and the data read bandwidth requirement (i.e., the reception direction bandwidth requirement) is 800 MB / s. According to the above formula, the target rate of the transmission channel is finally matched to be 32 Gbps, and the target rate of the reception channel is 8 Gbps. After the link retraining, the reception channel rate of the downstream port device is significantly lower than the transmission rate of the transmission channel, which can not only effectively save the transmission power consumption, but also reduce the resource occupation of the reception direction application layer buffer in the downstream port device.

[0103] Step 204: Configure the transmit channel target rate and the receive channel target rate into the preset configuration register of the upstream port device.

[0104] Among them, the preset configuration register can be a register in the PCIe configuration space of the upstream port device set in advance, which is used to record information about the transmit channel target rate and the receive channel target rate, such as recording the identifiers of the transmit channel target rate and the receive channel target rate respectively. For example, in this embodiment, on the basis of the original register list of the PCIe standard specification, a new configuration register (i.e., the preset configuration register, such as Link Control 3 Register) can be defined. For example, the preset configuration register is located at the offset address 0x3C in the Peripheral Component Interconnect Express configuration space.

[0105] For example, in this step, the downstream port device can configure the identifiers of the transmit channel target rate and the receive channel target rate respectively in the preset configuration register of the upstream port device. For example, the preset configuration register includes a transmit channel target rate identification bit and a receive channel target rate identification bit. The transmit channel target rate identification bit includes 4 consecutive bits for recording the identifier of the transmit channel target rate, and the receive channel target rate identification bit includes 4 consecutive bits for recording the identifier of the receive channel target rate.

[0106] As Figure 6 shown, the transmit channel target rate identification bit of the preset configuration register can be bits 0 - bit 3, a total of 4 bits, which are used to identify the transmit channel target rate. The coding meaning can be as follows: 0000b: indicates the rate of 2.5 Gbps defined by the PCIe standard specification; 0001b: indicates the rate of 5.0 Gbps defined by the PCIe standard specification; 0010b: indicates the rate of 8.0 Gbps defined by the PCIe standard specification; 0011b: indicates the rate of 16.0 Gbps defined by the PCIe standard specification; 0100b: indicates the rate of 32.0 Gbps defined by the PCIe standard specification; 0101b: indicates the rate of 64.0 Gbps defined by the PCIe standard specification; the remaining values: reserved and not used for the time being. The receive channel target rate identification bit of the preset configuration register can be bits 4 - bit 7, a total of 4 bits, which are used to identify the transmit channel target rate. The coding meaning can be the same as or similar to the coding meaning of the above transmit channel target rate identification bit. Other bits of the preset configuration register (such as bits 8 - bit 15) can be reserved and not used for the time being or used to identify other information.

[0107] Step 205: Send a re - training request for the Peripheral Component Interconnect Express physical link to the upstream port device.

[0108] Among them, in this step, the downstream port device can send a retraining request for the PCIe physical link to the upstream port device to prompt the upstream port device to retrain the PCIe physical link.

[0109] Correspondingly, for the specific manner in which the downstream port device sends a retraining request for the Peripheral Component Interconnect Express (PCIe) physical link to the upstream port device in this step, it can be set by the designer. For example, the downstream port device can set the Retrain Link bit in the Link Control Register in the PCIe configuration space of the upstream port device to a retraining identifier to prompt the upstream port device to retrain the PCIe physical link; as Figure 7 shown, according to the PCIe specification standard in the related art, a request is initiated by setting the 5th bit (i.e., the Retrain Link bit) of the Link Control Register in the PCIe configuration space to retrain the PCIe physical link.

[0110] Step 206: Use the target rate of the transmission channel and the target rate of the receiving channel to perform link training and rate negotiation for the Peripheral Component Interconnect Express (PCIe) physical link with the upstream port device, so that the PCIe physical link is in a working ready state.

[0111] It can be understood that in this step, the downstream port device can use the target rate of the transmission channel and the target rate of the receiving channel to perform link training and rate negotiation for the PCIe physical link with the upstream port device to complete the link retraining of the PCIe physical link, so that the PCIe physical link returns to the L0 state again to perform subsequent data transmission tasks. That is to say, after detecting the retraining request for the PCIe physical link, the upstream port device can use the target rate of the transmission channel and the target rate of the receiving channel recorded in the preset configuration register to complete the link retraining of the PCIe physical link with the downstream port device.

[0112] In this embodiment, by detecting whether the upstream port device has the ALRT function, the present invention embodiment can automatically detect and trigger the ALRT mechanism. Thus, through the ALRT mechanism, the PCIe device can adaptively match the best rate according to the directional characteristics of data transmission (such as write-intensive or read-intensive operations), which not only ensures the data transmission bandwidth requirements, but also maximally saves the transmission power consumption and system resource configuration, can adapt to the significant differences in the storage data access requirements, thereby improving the performance and efficiency of the overall system; and the lower transmission rate can effectively improve the signal-to-noise ratio of the link and improve the reliability of data transmission.

[0113] Corresponding to the above method embodiments, embodiments of the present invention further provide a data transmission device. A data transmission device described below can be correspondingly referred to with a data transmission method described above.

[0114] Please refer to Figure 8 , Figure 8 which is a structural block diagram of a data transmission device provided by an embodiment of the present invention. The device is applied to a downlink port device and may include:

[0115] An initialization module 10, configured to complete link initialization training of a Peripheral Component Interconnect Express (PCIe) physical link with an uplink port device, so that the PCIe physical link is in a working ready state; wherein, the downlink port device and the uplink port device are connected through the PCIe physical link;

[0116] An acquisition module 20, configured to obtain a target rate of a transmit channel and a target rate of a receive channel of the PCIe physical link according to application bandwidth requirement information;

[0117] A retraining module 30, configured to complete link retraining of the PCIe physical link with the uplink port device according to the target rate of the transmit channel and the target rate of the receive channel, so as to perform data transmission using the PCIe physical link for which link retraining is completed.

[0118] In some embodiments, the target rate of the transmit channel is any preset specified transmit rate, and the target rate of the receive channel is any preset specified receive rate.

[0119] In some embodiments, the acquisition module 20 may be specifically configured to determine the target rate of the transmit channel and the target rate of the receive channel according to the application bandwidth requirement information and the physical layer coding efficiency of the PCIe physical link; wherein, the application bandwidth requirement information includes the transmit direction bandwidth requirement and the receive direction bandwidth requirement.

[0120] In some embodiments, the acquisition module 20 may include:

[0121] A calculation sub-module, configured to determine the required rate of the transmit channel and the required rate of the receive channel through T rate1 =R bw1 *8*E enc / 1000 and T rate2 =R bw2 *8*E enc / 1000; wherein, T rate1 is the required rate of the transmit channel, R bw1 is the transmit direction bandwidth requirement, T rate2 is the required rate of the receive channel, R bw2 is the receive direction bandwidth requirement, and E encis the physical layer coding efficiency;

[0122] A matching sub-module, configured to determine the target rate of the sending channel and the target rate of the receiving channel according to the required rate of the sending channel and the required rate of the receiving channel.

[0123] In some embodiments, the target rate of the sending channel is the smallest preset specified sending rate greater than the required rate of the sending channel or the preset specified sending rate equal to the required rate of the sending channel; the target rate of the receiving channel is the smallest preset specified receiving rate greater than the required rate of the receiving channel or the preset specified receiving rate equal to the required rate of the receiving channel.

[0124] In some embodiments, the target rate of the sending channel and the target rate of the receiving channel are not the same.

[0125] In some embodiments, the apparatus may further include:

[0126] A detection module, configured to detect whether the upstream port device has the function of transmitting at an asymmetric physical link rate; if so, send a start signal to the acquisition module 20.

[0127] In some embodiments, the detection module may specifically be configured to detect whether the asymmetric physical link rate transmission function identification bit in the configuration register information of the upstream port device is the support asymmetric physical link rate transmission function identification; if it is the support asymmetric physical link rate transmission function identification, determine that the upstream port device has the function of transmitting at an asymmetric physical link rate, and send a start signal to the acquisition module 20.

[0128] In some embodiments, the asymmetric physical link rate transmission function identification bit is the 30th bit of the device capability register of the Peripheral Component Interconnect Express standard.

[0129] In some embodiments, the apparatus may further include:

[0130] A judgment module, configured to judge whether the current sending channel rate of the Peripheral Component Interconnect Express physical link is the same as the target rate of the sending channel and the current receiving channel rate of the Peripheral Component Interconnect Express physical link is the same as the target rate of the receiving channel; if not, send a start signal to the retraining module 30.

[0131] In some embodiments, the retraining module 30 may include:

[0132] A configuration sub-module, configured to configure the target rate of the sending channel and the target rate of the receiving channel into a preset configuration register of the upstream port device;

[0133] A request sub-module, configured to send a retraining request for the Peripheral Component Interconnect Express physical link to the upstream port device;

[0134] A retraining sub-module, which is used to perform link training and rate negotiation of the Peripheral Component Interconnect Express (PCIe) physical link with the upstream port device by using the target rate of the transmit channel and the target rate of the receive channel, so that the PCIe physical link is in a working ready state.

[0135] In some embodiments, the preset configuration register includes a transmit channel target rate identification bit and a receive channel target rate identification bit. The transmit channel target rate identification bit includes 4 consecutive bit positions for recording the identification of the transmit channel target rate, and the receive channel target rate identification bit includes 4 consecutive bit positions for recording the identification of the receive channel target rate.

[0136] In some embodiments, the preset configuration register is located at the offset address 0x3C in the PCIe configuration space.

[0137] In some embodiments, the request sub-module can be specifically used to set the re-training connection bit of the connection control register in the PCIe configuration space of the upstream port device to a re-training identifier.

[0138] In this embodiment, the embodiment of the present invention obtains, through the acquisition module 20, the target rate of the transmit channel and the target rate of the receive channel of the PCIe physical link according to the application bandwidth requirement information, and can determine the actual required physical link rate in the transmit and receive directions according to the transmission requirements of the current application scenario. Thus, through the retraining module 30, the link re-training of the PCIe physical link is completed with the upstream port device according to the target rate of the transmit channel and the target rate of the receive channel, realizing the ALRT capability of the PCIe device, allowing the PCIe device to perform data transmission at different physical link rates in the transmit and receive directions, avoiding waste of bandwidth resources, and saving transmission power consumption.

[0139] Corresponding to the above method embodiment, the embodiment of the present invention also provides a data transmission method applied to an upstream port device. A data transmission method applied to an upstream port device described below can be mutually corresponding and referred to with a data transmission method applied to a downstream port device described above.

[0140] Please refer to Figure 9 , Figure 9 which is a flowchart of a data transmission method applied to an upstream port device provided by an embodiment of the present invention. This method is applied to an upstream port device and may include:

[0141] Step 301: Complete link initialization training of the PCIe physical link with the downstream port device, so that the PCIe physical link is in a working ready state; wherein, the downstream port device and the upstream port device are connected through the PCIe physical link.

[0142] Step 302: Receive the transmit channel target rate and the receive channel target rate sent by the downstream port device through the Peripheral Component Interconnect Express (PCIe) physical link.

[0143] Step 303: According to the transmit channel target rate and the receive channel target rate, complete link retraining of the PCIe physical link with the downstream port device, so as to perform data transmission using the PCIe physical link after the completion of link retraining.

[0144] In some embodiments, the transmit channel target rate is any preset specified transmit rate, and the receive channel target rate is any preset specified receive rate.

[0145] In some embodiments, the asymmetric physical link rate transmission function identification bit in the configuration register information of the upstream port device is the identification bit supporting the asymmetric physical link rate transmission function.

[0146] In some embodiments, the asymmetric physical link rate transmission function identification bit is the 30th bit of the device capability register of the PCIe standard.

[0147] In some embodiments, the upstream port device can record the transmit channel target rate and the receive channel target rate by using a preset configuration register.

[0148] In some embodiments, the preset configuration register includes a transmit channel target rate identification bit and a receive channel target rate identification bit. The transmit channel target rate identification bit includes 4 consecutive bits for recording the identification of the transmit channel target rate, and the receive channel target rate identification bit includes 4 consecutive bits for recording the identification of the receive channel target rate.

[0149] In some embodiments, the preset configuration register is located at the offset address 0x3C in the PCIe configuration space.

[0150] In some embodiments, according to the transmit channel target rate and the receive channel target rate, completing link retraining of the PCIe physical link with the downstream port device may include:

[0151] According to the retraining request of the PCIe physical link sent by the upstream port device, perform link training and rate negotiation of the PCIe physical link with the downstream port device by using the transmit channel target rate and the receive channel target rate, so that the PCIe physical link is in a working ready state.

[0152] In some embodiments, according to the retraining request of the peripheral component interconnect express (PCIe) physical link sent by the upstream port device, using the transmit channel target rate and the receive channel target rate, performing link training and rate negotiation of the PCIe physical link with the downstream port device may include:

[0153] After detecting that the retraining connection bit in the connection control register in the PCIe configuration space of the upstream port device is the retraining identifier, using the transmit channel target rate and the receive channel target rate, performing link training and rate negotiation of the PCIe physical link with the downstream port device.

[0154] In this embodiment, by completing the link retraining of the PCIe physical link with the downstream port device according to the transmit channel target rate and the receive channel target rate, the present invention embodiment can implement the ALRT capability of the PCIe device, allowing the PCIe device to use different physical link rates in the transmit and receive directions for data transmission, so that the rates of the PCIe physical link in the transmit and receive directions can be set according to the transmission requirements of the current application scenario, avoiding waste of bandwidth resources and saving transmission power consumption.

[0155] Corresponding to the method embodiment applied to the upstream port device above, the present invention embodiment also provides a data transmission device applied to the upstream port device. A data transmission device applied to the upstream port device described below can be correspondingly referred to the data transmission method applied to the upstream port device described above.

[0156] Please refer to Figure 10 , Figure 10 which is the structural block diagram of another data transmission device provided by the present invention embodiment. The device is applied to the upstream port device and may include:

[0157] An initial training module 40, configured to complete the link initialization training of the PCIe physical link with the downstream port device, so that the PCIe physical link is in a working ready state; wherein, the downstream port device is connected to the upstream port device through the PCIe physical link;

[0158] A target receiving module 50, configured to receive the transmit channel target rate and the receive channel target rate sent by the downstream port device through the PCIe physical link;

[0159] A training transmission module 60, configured to complete the link retraining of the PCIe physical link with the downstream port device according to the transmit channel target rate and the receive channel target rate, so as to perform data transmission using the PCIe physical link after the link retraining is completed.

[0160] In some embodiments, the target rate of the transmission channel is any preset specified transmission rate, and the target rate of the reception channel is any preset specified reception rate.

[0161] In some embodiments, the asymmetric physical link rate transmission function identification bit in the configuration register information of the upstream port device is the identification bit supporting the asymmetric physical link rate transmission function.

[0162] In some embodiments, the asymmetric physical link rate transmission function identification bit is the 30th bit of the device capability register of the Peripheral Component Interconnect Express (PCIe) standard.

[0163] In some embodiments, the upstream port device can record the target rate of the transmission channel and the target rate of the reception channel by using a preset configuration register.

[0164] In some embodiments, the preset configuration register includes a transmission channel target rate identification bit and a reception channel target rate identification bit. The transmission channel target rate identification bit includes 4 consecutive bits for recording the identification of the transmission channel target rate, and the reception channel target rate identification bit includes 4 consecutive bits for recording the identification of the reception channel target rate.

[0165] In some embodiments, the preset configuration register is located at the offset address 0x3C in the Peripheral Component Interconnect Express configuration space.

[0166] In some embodiments, the training transmission module 60 can be specifically configured to, according to the re-training request of the upstream port device for the Peripheral Component Interconnect Express physical link, use the target rate of the transmission channel and the target rate of the reception channel to perform link training and rate negotiation for the Peripheral Component Interconnect Express physical link with the downstream port device, so that the Peripheral Component Interconnect Express physical link is in a ready-to-work state.

[0167] In some embodiments, the training transmission module 60 can be specifically configured to, after detecting that the re-training connection bit of the connection control register in the Peripheral Component Interconnect Express configuration space of the upstream port device is the re-training identification, use the target rate of the transmission channel and the target rate of the reception channel to perform link training and rate negotiation for the Peripheral Component Interconnect Express physical link with the downstream port device.

[0168] In this embodiment, the training transmission module 60 of the embodiment of the present invention performs link retraining on the peripheral component interconnect express (PCIe) physical link with the downstream port device according to the target rate of the sending channel and the target rate of the receiving channel, enabling the ALRT capability of the PCIe device. This allows the PCIe device to use different physical link rates for data transmission in the sending and receiving directions, so that the rates of the PCIe physical link in the sending and receiving directions can be set according to the transmission requirements of the current application scenario, avoiding waste of bandwidth resources and saving transmission power consumption.

[0169] Corresponding to the above method embodiment, the embodiment of the present invention further provides an electronic device. The description of an electronic device below can be mutually referred to with the data transmission method applied to the downstream port device and the upstream port device described above.

[0170] Please refer to Figure 11 , Figure 11 which is a schematic structural diagram of an electronic device provided by the embodiment of the present invention. The electronic device may include:

[0171] A memory D1 for storing a computer program;

[0172] A processor D2 for implementing the steps of the data transmission method applied to the downstream port device or the upstream port device provided by the above method embodiment when executing the computer program.

[0173] Among them, the electronic device provided by this embodiment may specifically be a downstream port device (such as a host device) or may specifically be an upstream port device (such as an NVMe SSD).

[0174] Corresponding to the above method embodiment, the embodiment of the present invention further provides a computer program product. The description of a computer program product below can be mutually referred to with the data transmission method applied to the downstream port device and the upstream port device described above.

[0175] A computer program product includes a computer program / instructions. When the computer program / instructions are executed by a processor, the steps of the data transmission method applied to the downstream port device or the upstream port device provided by the above method embodiment are implemented.

[0176] Corresponding to the above method embodiment, the embodiment of the present invention further provides a computer-readable storage medium. The description of a computer-readable storage medium below can be mutually referred to with the data transmission method applied to the downstream port device and the upstream port device described above.

[0177] A computer-readable storage medium stores a computer program thereon. When the computer program is executed by a processor, the steps of the data transmission method provided in the above method embodiment applied to a downlink port device or an uplink port device are implemented.

[0178] Specifically, the computer-readable storage medium may be various readable storage media such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disc that can store program codes.

[0179] The embodiments in the specification are described in a progressive manner. Each embodiment focuses on the differences from other embodiments. The same or similar parts among the embodiments can be referred to each other. For the devices, electronic devices, computer program products, and computer-readable storage media disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the descriptions are relatively simple, and the relevant parts can be referred to the descriptions in the method part.

[0180] The above has introduced in detail a data transmission method, a device, an electronic device, a computer program product, and a computer-readable storage medium provided by the present invention. Specific examples are used in this article to elaborate on the principle and implementation manner of the present invention. The descriptions of the above embodiments are only used to help understand the method and its core idea of the present invention. It should be noted that for those of ordinary skill in the art in the technical field, without departing from the principle of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also fall within the protection scope of the present invention.

Claims

1. A data transmission method, characterized in that, Applied to a downstream port device, including: Complete link initialization training for the Peripheral Component Interconnect Express (PCIe) physical link with the upstream port device, so that the PCIe physical link is in a ready-to-work state; wherein, the downstream port device and the upstream port device are connected through the PCIe physical link; Obtain the target rate of the transmit channel and the target rate of the receive channel of the PCIe physical link according to the application bandwidth requirement information; wherein, the target rate of the transmit channel and the target rate of the receive channel are different; Complete link retraining of the PCIe physical link with the upstream port device according to the target rate of the transmit channel and the target rate of the receive channel, so as to perform data transmission using the PCIe physical link after link retraining is completed; Wherein, completing link retraining of the PCIe physical link with the upstream port device according to the target rate of the transmit channel and the target rate of the receive channel includes: Configure the target rate of the transmit channel and the target rate of the receive channel into a preset configuration register of the upstream port device; Send a retraining request for the PCIe physical link to the upstream port device; Perform link training and rate negotiation of the PCIe physical link with the upstream port device using the target rate of the transmit channel and the target rate of the receive channel, so that the PCIe physical link is in a ready-to-work state.

2. The data transmission method according to claim 1, wherein The target rate of the transmit channel is any preset specified transmit rate, and the target rate of the receive channel is any preset specified receive rate.

3. The data transmission method according to claim 2, wherein Before obtaining the target rate of the transmit channel and the target rate of the receive channel of the PCIe physical link according to the application bandwidth requirement information, it further includes: Determine the target rate of the transmit channel and the target rate of the receive channel according to the application bandwidth requirement information and the physical layer coding efficiency of the PCIe physical link; wherein, the application bandwidth requirement information includes the transmit direction bandwidth requirement and the receive direction bandwidth requirement.

4. The data transmission method according to claim 3, characterized in that Determining the target rate of the transmit channel and the target rate of the receive channel according to the application bandwidth requirement information and the physical layer coding efficiency of the PCIe physical link includes: Through T rate1 =R bw1 *8*E enc / 1000 and T rate2 =R bw2 *8*E enc / 1000, determine the transmission channel required rate and the reception channel required rate; where T rate1 is the transmission channel required rate, R bw1 is the transmission direction bandwidth requirement, T rate2 is the reception channel required rate, R bw2 is the reception direction bandwidth requirement, E enc is the physical layer coding efficiency; Determine the target rate of the transmit channel and the target rate of the receive channel according to the required rate of the transmit channel and the required rate of the receive channel.

5. The data transmission method according to claim 4, wherein The target rate of the transmit channel is the smallest preset specified transmit rate greater than the required rate of the transmit channel or the preset specified transmit rate equal to the required rate of the transmit channel; The target rate of the receive channel is the smallest preset specified receive rate greater than the required rate of the receive channel or the preset specified receive rate equal to the required rate of the receive channel.

6. The data transmission method according to claim 1, wherein Before obtaining the target rate of the transmit channel and the target rate of the receive channel of the PCIe physical link according to the application bandwidth requirement information, it further includes: Detect whether the upstream port device has the function of asymmetric physical link rate transmission; If so, execute the step of obtaining the transmission channel target rate and the reception channel target rate of the Peripheral Component Interconnect Express (PCIe) physical link according to the application bandwidth requirement information.

7. The data transmission method according to claim 6, characterized in that, Detect whether the upstream port device has the function of asymmetric physical link rate transmission, including: Detect whether the asymmetric physical link rate transmission function identification bit in the configuration register information of the upstream port device is the support asymmetric physical link rate transmission function identification; If it is the support asymmetric physical link rate transmission function identification, determine that the upstream port device has the asymmetric physical link rate transmission function, and execute the step of obtaining the transmission channel target rate and the reception channel target rate of the PCIe physical link according to the application bandwidth requirement information.

8. The data transmission method according to claim 7, wherein The asymmetric physical link rate transmission function identification bit is the 30th bit of the device capability register of the PCIe standard.

9. The data transmission method according to claim 1, wherein Before completing the link retraining of the PCIe physical link with the upstream port device according to the transmission channel target rate and the reception channel target rate, it further includes: Judge whether the current transmission channel rate of the PCIe physical link is the same as the transmission channel target rate and the current reception channel rate of the PCIe physical link is the same as the reception channel target rate; If the current transmission channel rate is different from the transmission channel target rate or the current reception channel rate is different from the reception channel target rate, execute the step of completing the link retraining of the PCIe physical link with the upstream port device according to the transmission channel target rate and the reception channel target rate.

10. The data transmission method according to claim 1, wherein, The preset configuration register includes a transmission channel target rate identification bit and a reception channel target rate identification bit. The transmission channel target rate identification bit includes 4 consecutive bits for recording the identification of the transmission channel target rate, and the reception channel target rate identification bit includes 4 consecutive bits for recording the identification of the reception channel target rate.

11. The data transmission method according to claim 10, wherein The preset configuration register is located at the offset address 0x3C in the PCIe configuration space.

12. The data transmission method according to claim 1, wherein Send a retraining request for the PCIe physical link to the upstream port device, including: Set the retraining connection bit of the connection control register in the PCIe configuration space of the upstream port device to the retraining identification.

13. A data transmission device, characterized in that, Applied to the downstream port device, including: An initialization module, configured to complete the link initialization training of the PCIe physical link with the upstream port device, so that the PCIe physical link is in a working ready state; wherein, the downstream port device is connected to the upstream port device through the PCIe physical link; An acquisition module, configured to obtain the transmission channel target rate and the reception channel target rate of the PCIe physical link according to the application bandwidth requirement information; wherein, the transmission channel target rate and the reception channel target rate are different; A retraining module, configured to complete link retraining of the Peripheral Component Interconnect Express (PCIe) physical link with the upstream port device according to the target rate of the sending channel and the target rate of the receiving channel, so as to perform data transmission using the PCIe physical link after the link retraining is completed; Wherein, the retraining module includes: A configuration sub-module, configured to configure the target rate of the sending channel and the target rate of the receiving channel into a preset configuration register of the upstream port device; A request sub-module, configured to send a retraining request for the PCIe physical link to the upstream port device; A retraining sub-module, configured to perform link training and rate negotiation of the PCIe physical link with the upstream port device by using the target rate of the sending channel and the target rate of the receiving channel, so that the PCIe physical link is in a ready-to-work state.

14. A data transmission method, characterized in that, Applied to an upstream port device, it includes: Completing link initialization training of the PCIe physical link with a downstream port device, so that the PCIe physical link is in a ready-to-work state; wherein, the downstream port device is connected to the upstream port device through the PCIe physical link; Receiving the target rate of the sending channel and the target rate of the receiving channel sent by the downstream port device through the PCIe physical link; wherein, the target rate of the sending channel and the target rate of the receiving channel are different; According to the target rate of the sending channel and the target rate of the receiving channel, completing link retraining of the PCIe physical link with the downstream port device, so as to perform data transmission using the PCIe physical link after the link retraining is completed; Wherein, according to the target rate of the sending channel and the target rate of the receiving channel, completing link retraining of the PCIe physical link with the downstream port device, so as to perform data transmission using the PCIe physical link after the link retraining is completed, includes: Recording the target rate of the sending channel and the target rate of the receiving channel sent by the downstream port device by using a preset configuration register; According to the retraining request of the PCIe physical link sent by the downstream port device, using the target rate of the sending channel and the target rate of the receiving channel in the preset configuration register, performing link training and rate negotiation of the PCIe physical link with the downstream port device, so that the PCIe physical link is in a ready-to-work state.

15. A data transmission device, characterized in that, Applied to an upstream port device, it includes: An initial training module, configured to complete link initialization training of the PCIe physical link with a downstream port device, so that the PCIe physical link is in a ready-to-work state; wherein, the downstream port device is connected to the upstream port device through the PCIe physical link; A target receiving module, configured to receive the transmission channel target rate and the reception channel target rate sent by the downstream port device through the Peripheral Component Interconnect Express (PCIe) physical link; wherein, the transmission channel target rate and the reception channel target rate are different; A training transmission module, configured to complete link retraining of the PCIe physical link with the downstream port device according to the transmission channel target rate and the reception channel target rate, so as to perform data transmission by using the PCIe physical link after the link retraining is completed; Wherein, the training transmission module is specifically configured to record the transmission channel target rate and the reception channel target rate sent by the downstream port device by using a preset configuration register; according to the retraining request of the PCIe physical link sent by the downstream port device, use the transmission channel target rate and the reception channel target rate in the preset configuration register to perform link training and rate negotiation of the PCIe physical link with the downstream port device, so that the PCIe physical link is in a working ready state.

16. A computer program product, comprising a computer program / instructions, characterized in that, When the computer program / instructions are executed by a processor, the steps of the data transmission method according to any one of claims 1 to 12 or claim 14 are implemented.

17. An electronic device, characterized in that, Including: A memory, configured to store a computer program; A processor, configured to implement the steps of the data transmission method according to any one of claims 1 to 12 or claim 14 when executing the computer program.

18. A computer-readable storage medium, characterized in that, A computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, the steps of the data transmission method according to any one of claims 1 to 12 or claim 14 are implemented.

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