Switch control circuit for power converter and analog multiplier thereof

Abstract

The invention discloses a switch control circuit for a power converter and an analog multiplier thereof. The analog multiplier includes: a third switch and a fourth switch connected in series between an input terminal and ground; the filter network is connected between an intermediate node of the third switch and the fourth switch and an output end, and switch control signals of the third switch and the fourth switch are respectively switch control signals of the first switch and the second switch. The input end receives a difference signal of a direct current input voltage and a direct current output voltage of the power converter, and the output end provides a product signal of the difference signal and the duty ratio of the switch control signal. The analog multiplier adopts a switch control signal to execute multiplication calculation, and compared with an analog multiplier realized by a transistor working in a linear region, the analog multiplier realized by adopting a switch tube not only can reduce the chip area, but also can enlarge the dynamic range of duty ratio control.

Description

Technical Field

[0001] The present invention relates to the technical field of power management, and particularly to a switching control circuit for a power converter and its analog multiplier. Background Art

[0002] In a power converter, a multiplier is used to perform multiplication calculations in control algorithms and power management. Typical applications include processing the relationship between input voltage and output voltage, power calculation, error correction, and optimizing conversion efficiency. In these application scenarios, the multiplier can help the controller generate accurate adjustment signals, thereby realizing dynamic control of the switching duty cycle to ensure that the output voltage or current meets the load requirements.

[0003] Existing multipliers can be implemented using the logarithmic operating curve of bipolar transistors. For example, bipolar transistors are used to convert the input signal into a logarithmic form, then added together, and finally converted back to the original value through antilogarithm. The analog multiplier based on bipolar transistors has a large chip area, high power consumption, and is sensitive to temperature changes, making it difficult to meet the design requirements of modern high-frequency and high-integration power converters.

[0004] To address the limitations of analog multipliers, digital or mixed-signal solutions can be adopted for multiplication operations in power converter designs. For example, for a digitally controlled power converter, high-precision multiplication operations can be implemented using hardware, which has the advantages of strong stability, fast response, and small area occupation. However, analog multipliers require hardware support for calculations and are difficult to apply in analog-controlled power converters.

[0005] There is an expectation to improve the implementation of analog multipliers in power converters to reduce chip area, lower power consumption, and expand the dynamic range. Summary of the Invention

[0006] In view of the above problems, the purpose of the present invention is to provide a switching control circuit for a power converter and its analog multiplier, wherein analog multiplication operations are performed using a switching control signal to reduce the chip area of the analog multiplier and improve the dynamic range of duty cycle control.

[0007] According to one aspect of the present invention, there is provided an analog multiplier for a power converter, the power converter including a first switch and a second switch connected in series, the analog multiplier including: a third switch and a fourth switch connected in series between an input terminal and ground; and a filter network connected between an intermediate node of the third switch and the fourth switch and an output terminal, wherein switch control signals of the third switch and the fourth switch are respectively switch control signals of the first switch and the second switch, the input terminal receives a difference signal between a DC input voltage and a DC output voltage of the power converter, and the output terminal provides a product signal of the difference signal and a duty cycle of the switch control signal.

[0008] Optionally, each of the first switch, the second switch, the third switch, and the fourth switch is a field effect transistor.

[0009] Optionally, the first switch and the second switch are respectively power transistors, and the third switch and the fourth switch are respectively switching transistors.

[0010] Optionally, the filter network includes a first resistor and a first capacitor connected in series, and an intermediate node of the first resistor and the first capacitor is connected to the output terminal.

[0011] According to another aspect of the present invention, there is provided a switch control circuit for a power converter, including: an error amplifier for generating an error signal according to a voltage feedback signal related to a DC output voltage of the power converter; a PWM modulator for generating a PWM control signal according to the error signal and a current detection signal related to an inductor current of the power converter; a PFM modulator for generating a PFM control signal according to the error signal; a mode switching circuit, the mode switching circuit including a multiplication circuit for generating a selection signal for selecting one of the PWM control signal and the PFM control signal; and a driver for generating a first switch control signal and a second switch control signal according to one of the PWM control signal and the PFM control signal, wherein the multiplication circuit includes the above-mentioned analog multiplier.

[0012] Optionally, a product signal generated by the analog multiplier serves as a switching reference voltage, and the mode switching circuit further includes: a comparator for comparing the error signal with the switching reference voltage to generate the selection signal.

[0013] Optionally, the multiplication circuit further includes: an operational amplifier for amplifying the product signal by a proportional coefficient related to a current sampling ratio of the current detection signal.

[0014] Optionally, the input terminal of the operational amplifier is connected to the filter network of the analog multiplier to amplify the product signal.

[0015] Optionally, the output terminal of the operational amplifier is connected to the high-potential terminal of the third switch to pre-amplify the difference signal.

[0016] Optionally, the power converter is any one selected from the BUCK topology and the BOOST topology.

[0017] For the analog multiplier according to the embodiment of the present invention, two switches are controlled by a switch control signal to perform a multiplication operation. This analog multiplier uses the switch control signal of the main circuit and does not require a separate switch control circuit to provide the control signals for the two switches. Therefore, the circuit structure of the analog multiplier can be simplified and the number of components of the analog multiplier can be reduced.

[0018] In a preferred embodiment, the two switches in the analog multiplier are implemented by switching transistors. Compared with the power switching transistors of the power converter, the switching transistors of the analog multiplier do not need to carry a large current as operational switching transistors. Therefore, the size of the switching transistors can be reduced. Compared with the analog multiplier based on bipolar transistors, the switching transistors of the analog multiplier operate in a switching state. Therefore, the size of the transistors can be reduced, the power consumption of the analog multiplier can be reduced, and the dynamic range of duty cycle control can be expanded.

[0019] In a preferred embodiment, in the mode switching circuit of the power converter, an operational amplifier is used to amplify the input signal or the output signal of the analog multiplier. The gain of the operational amplifier corresponds to the circuit parameters of the power converter to obtain a switching reference voltage for switching between PWM control and PFM control. Further, a comparator compares the error signal with the switching reference voltage to generate a selection signal for the two modulation modes. The mode switching circuit uses a two-stage circuit of an analog multiplier and an operational amplifier to generate the switching reference voltage. Therefore, the switching conditions for the two modulation modes can be accurately controlled, and the stability and efficiency optimization under different load conditions can be achieved. Description of the Drawings

[0020] Through the following description of the embodiments of the present invention with reference to the drawings, the above and other objects, features, and advantages of the present invention will become clearer. In the drawings:

[0021] Figure 1 A schematic block diagram of a power converter having two modulation modes is shown;

[0022] Figure 2 Shown Figure 1 A schematic waveform diagram of the two modulation modes of the shown power converter is shown;

[0023] Figure 3 ShownFigure 1 Schematic circuit diagram of the mode switching circuit in the power converter shown;

[0024] Figure 4 Schematic circuit diagram of the analog multiplier in the switch control circuit according to the first embodiment of the present invention;

[0025] Figure 5 Schematic circuit diagram of the analog multiplier in the switch control circuit according to the second embodiment of the present invention. Detailed implementation manners

[0026] The present invention will be described in more detail below with reference to the accompanying drawings. In the respective drawings, the same elements are denoted by like reference numerals. For clarity, the various parts in the drawings are not drawn to scale. In addition, some well-known parts may not be shown in the figures.

[0027] Many specific details of the present invention are described hereinafter, such as the structure, materials, dimensions, processing techniques and technologies of components, in order to understand the present invention more clearly. However, as those skilled in the art can understand, the present invention can be implemented without these specific details.

[0028] It should be understood that in the following description, "circuit" may include a single or a combination of multiple hardware circuits, programmable circuits, state machine circuits, and / or elements capable of storing instructions executed by the programmable circuits. When an element or circuit is said to be "connected to" another element or when an element / circuit is said to be "connected between" two nodes, it can be directly coupled or connected to another element or there may be intermediate elements, and the connection between the elements can be physical, logical, or a combination thereof. On the contrary, when an element is said to be "directly coupled to" or "directly connected to" another element, it means that there are no intermediate elements between the two.

[0029] In the present application, a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) includes a first terminal, a second terminal, and a control terminal. In the on-state of the MOSFET, current flows from the first terminal to the second terminal. The first terminal, the second terminal, and the control terminal of a P-type field-effect transistor are the source, the drain, and the gate respectively, and the first terminal, the second terminal, and the control terminal of an N-type field-effect transistor are the drain, the source, and the gate respectively.

[0030] An embodiment of the present invention first provides a switch control circuit with a analog multiplier, which is used for PWM control and PFM control of a power converter. In combination with a buck converter type system, various exemplary examples are illustrated and described below. However, the present invention is not limited thereto, and various concepts disclosed in the present invention can be used in association with any type of power converter architecture. For example, according to the topology classification of the power circuit, it includes buck converters, boost converters, flyback converters, buck-boost converters, etc.

[0031] Figure 1 A schematic block diagram of a power converter having two modulation modes is shown.

[0032] In this example, the main circuit of the power converter 100 has a buck topology, including a high-side switch M1 and a low-side switch M2 between the input terminal and the ground, and an inductor L connected between the intermediate node of the high-side switch M1 and the low-side switch M2 and the output terminal. The power converter 100 also includes an input capacitor Cin connected between the input terminal and the ground, and an output capacitor Co connected between the output terminal and the ground. However, as described above, the present invention is not limited to a specific type of topology.

[0033] The power converter 100 also includes resistors R11 and R12 connected in series between the output terminal and the ground. The resistors R11 and R12 form a resistor network for obtaining a proportional signal of the DC output voltage Vo as the voltage feedback signal Vfb. The power converter 100 may also include a detection element for obtaining a proportional signal of the inductor current IL as the current detection signal Isen.

[0034] Further, the switch control circuit 110 of the power converter 100 generates switch control signals Vg1 and Vg2 for the high-side switch M1 and the low-side switch M2 according to the voltage feedback signal Vfb and the current detection signal Isen.

[0035] In this example, the switch control circuit 110 includes an error amplifier 111, a PFM modulator (i.e., pulse frequency modulator) 112, a PWM modulator (i.e., pulse width frequency modulator) 113, a multiplexer 114, a driver 115, and a mode switching circuit 10.

[0036] The error amplifier 111 compares the voltage feedback signal Vfb with the reference voltage Vref to obtain the error signal EAO between them. The PWM modulator 112 generates a switching control signal according to the clock signal CLK, such that the switching period of the switching control signal is the same as the clock period of the clock signal CLK. Further, according to the comparison result between the error signal EAO and the current detection signal Isen, the moment of switching from the on state to the off state in the switching period is determined, thereby adjusting the duty cycles of the switching control signals Vg1 and Vg2. The PFM modulator 114 uses an internal timer to set a fixed on-time for each switching period, and dynamically adjusts the off-time of each switching period according to the error signal EAO, thereby adjusting the duty cycles of the switching control signals Vg1 and Vg2.

[0037] The mode switching circuit 10 generates a corresponding selection signal SEL according to the load condition, for selecting the modulation mode of the switching control circuit 110. The multiplexer 114 selectively transmits the PFM signal generated by the PFM modulator 112 and the PWM signal generated by the PWM modulator 113 to the driver 115 according to the selection signal SEL. The driver 115 generates the switching control signal Vg1 for the high-side switch M1 and the switching control signal Vg2 for the low-side switch M2 according to the PFM signal or the PWM signal.

[0038] In each switching period, the high-side switch M1 and the low-side switch M2 conduct alternately. During the on-phase of the high-side switch M1, the low-side switch M2 is off. During the on-phase of the low-side switch M2, the high-side switch M1 is off. The inductor L is charged during the on-phase of the high-side switch M1 and discharged during the on-phase of the low-side switch M2. By adjusting the duty cycles of the switching control signals Vg1 and Vg2, the energy stored and released by the inductor L in each switching period can be changed, thereby adjusting the energy ratio transferred from the input end to the output end of the power converter 100, and finally achieving precise control of the DC output voltage Vo.

[0039] Further, the switching control circuit 110 switches the modulation mode according to the load condition, and thus operates in one of the PFM mode and the PWM mode. Under light load conditions, the switching control circuit 110 can switch to the PFM mode to reduce power loss by reducing the switching frequency, thereby improving the light load efficiency of the system. Under heavy load conditions, the switching control circuit 110 can switch to the PWM mode, wherein the switching period remains constant, and the output voltage is maintained stable by adjusting the duty cycle of the pulse. The PWM mode can provide lower output ripple and higher dynamic response performance under heavy load conditions, and thus is suitable for scenarios with high power output or high voltage accuracy requirements. By dynamically switching the modulation mode, the switching control circuit 110 can balance the energy efficiency and performance of the power converter, ensuring optimized circuit operation under different working conditions.

[0040] Figure 2 Show Figure 1 Schematic waveform diagrams of two modulation modes of the power converter shown.

[0041] Before time t0, under heavy load conditions, the power converter operates in the PWM mode, where the switch control circuit maintains a constant switching period T1 and adjusts the duty cycle of the switch control signal according to the error signal EAO to change the charging and discharging times of the inductor L, thereby adjusting the DC output voltage Vo. In this example, in the PWM mode, the current conducts continuously (i.e., continuous conduction mode, abbreviated as CCM) to provide high power output, reduce current ripple, and improve power supply efficiency.

[0042] At time t0, the load current Iload decreases from I1 to I2, and the load condition of the power converter changes from heavy load to light load.

[0043] After time t1, under light load conditions, the power converter operates in the PFM mode, where the switch control circuit maintains a constant on-time Ton and a dynamically adjusted off-time Toff, thereby adjusting the duty cycle of the switch control signal according to the error signal EAO to change the charging and discharging times of the inductor L, thereby adjusting the DC output voltage Vo. In this example, in the PFM mode, the current conducts discontinuously (i.e., discontinuous conduction mode, abbreviated as DCM) to reduce the switching frequency to reduce power loss, thereby improving the light load efficiency of the system.

[0044] Figure 3 Show Figure 1 Schematic circuit diagram of the mode switching circuit in the power converter shown. The mode switching circuit 10 is applied to, for example, Figure 1 the power converter 100 shown.

[0045] The mode switching circuit 10 includes a multiplication circuit 11 and a comparator 12. The multiplication circuit 11 is used to perform a multiplication operation on the DC input voltage Vin, the DC output voltage Vo of the power converter 100, and the difference signal Vin - Vo between the two to obtain a switching reference voltage Vref_pfm. The comparator 12 compares the error signal EAO with the switching reference voltage Vref_pfm to generate a selection signal SEL for the two modulation modes.

[0046] For example, for a Buck-type power converter, the switching reference voltage Vref_pfm is shown as follows:

[0047] Vref_pfm = K * (Vin - Vo) * D = K * (Vin - Vo) * Vo / Vin (1)

[0048] Where D represents the duty cycle of the switching control signal of the high-side switching transistor, and K represents the circuit parameter of the power converter. This circuit parameter is related to the inductance L, the proportional coefficient of the current detection signal Isen, the resistance value of the sampling resistor, and the switching period T1 of the PWM mode and is approximately a constant.

[0049] In the above switching control circuit, the mode switching circuit 10 calculates the switching reference voltage Vref_pfm using a multiplication operation and compares the switching reference voltage Vref_pfm with the error signal EAO to generate a selection signal SEL. Since the switching condition between the PFM modulation mode and the PWM modulation mode of the power converter 100 is determined by the switching reference voltage Vref_pfm, the multiplication circuit 11 in the mode switching circuit 10 is an important circuit module for precisely controlling the switching condition between the two modulation modes. Under ideal switching conditions, the modulation mode of the power converter 100 exactly matches the load condition, and the stability and efficiency optimization of the corresponding load condition can be achieved.

[0050] Figure 4 Fig. shows a schematic circuit diagram of an analog multiplier in the switching control circuit according to the first embodiment of the present invention.

[0051] The multiplication circuit 11 includes an analog multiplier 1 and an amplifier circuit 2, and performs a multiplication operation using a two-stage circuit to generate the switching reference voltage Vref_pfm.

[0052] The analog multiplier 1 includes switching transistors M21 and M22, and resistors R21 and C21. The switching transistors M21 and M22 are connected in series between the input terminal and the ground. The resistors R21 and C21 are connected in series between the intermediate node of the switching transistors M21 and M22 and the ground, and provide a first-stage output signal at the intermediate node therebetween.

[0053] In the analog multiplier 1, the switching control signal of the switching transistor M21 is the same as the switching control signal of the high-side switching transistor M1 in the main circuit, and the switching control signal of the switching transistor M22 is the same as the switching control signal of the low-side switching transistor M2 in the main circuit. The input terminal of the analog multiplier 1 receives the difference signal Vin - Vo between the DC input voltage Vin and the DC output voltage Vo. The switching transistors M21 and M22 convert the difference signal Vin - Vo into a pulse signal, and the period and duty cycle of this pulse signal are the same as the period and duty cycle of the switching control signal. The resistors R21 and C21 form a filter network to convert the pulse signal into a DC signal to obtain the first-stage output signal V1.

[0054] In the analog multiplier 1, the above-mentioned switching transistors M21 and M22 form a half-bridge topology and conduct alternately according to the switching control signal of the main circuit. In this embodiment, the switching transistors M21 and M22 serve as operational switching transistors to implement the multiplication operation of the input signal and the duty cycle D of the switching control signal.

[0055] For the Buck-type power converter, the first-stage output signal V1 is as shown in the following formula:

[0056] V1 = (Vin - Vo) * D = (Vin - Vo) * Vo / Vin (2)

[0057] Where D represents the duty cycle of the switching control signal of the high-side switching transistor.

[0058] The amplifying circuit 2 includes an operational amplifier AMP, an input resistor R22, and a feedback resistor R23. The circuit structure of the amplifying circuit based on the operational amplifier is known, and the gain of the operational amplifier AMP is determined by the resistance values of the input resistor R22 and the feedback resistor R23.

[0059] The second-stage output signal of the amplifying circuit 2 is the switching reference voltage Vref_pfm, as shown in the following formula:

[0060] Vref_pfm = -K * V1 = -R23 / R22 * (Vin - Vo) * Vo / Vin (3)

[0061] Where K represents the circuit parameter of the power converter, and this circuit parameter is related to the inductance L, the proportional coefficient of the current detection signal Isen, the resistance value of the sampling resistor, and the switching period T1 of the PWM mode and is approximately a constant.

[0062] In the analog multiplier according to the embodiment of the present invention, the input end of the amplifying circuit 2 is connected to the output end of the analog multiplier 1, so as to amplify the product signal generated by the analog multiplier 1. By setting the resistance values of the input resistor R22 and the feedback resistor R23 in the amplifying circuit 2, the circuit parameter K of the power converter 100 can be completely compensated. The mode switching circuit 10 uses a two-stage circuit of the analog multiplier 1 and the operational amplifier 2 to generate the switching reference voltage Vref_pfm, so that the switching conditions of the two modulation modes can be accurately controlled, and the stability and efficiency optimization under different load conditions can be achieved.

[0063] Figure 5 Show a schematic circuit diagram of the analog multiplier in the switching control circuit according to the second embodiment of the present invention.

[0064] The multiplication circuit 21 includes an analog multiplier 1 and an amplifying circuit 2, and uses a two-stage circuit to perform a multiplication operation to generate the switching reference voltage Vref_pfm.

[0065] In the switching control circuit according to the second embodiment of the present invention, the internal circuits of multiplier 1 of analog multiplier 21 and amplifier circuit 2 are exactly the same as those in the first embodiment, and will not be described in detail here. Only the differences between the second embodiment and the first embodiment will be described below.

[0066] In multiplier circuit 21, the output terminal of amplifier circuit 2 is connected to the input terminal of multiplier 1, and is used to pre-amplify the difference signal Vin-Vo between the DC input voltage Vin and the DC output voltage Vo.

[0067] Amplifier circuit 2 generates a first-stage output signal V2, as shown in the following formula:

[0068] V2 = -K*(Vin-Vo) = -R23 / R22*(Vin-Vo) (4)

[0069] Wherein, K represents the circuit parameter of the power converter, and this circuit parameter is related to the inductor L, the proportional coefficient of the current detection signal Isen, the resistance value of the sampling resistor, and the switching period T1 of the PWM mode and is approximately a constant.

[0070] The second-stage output signal of multiplier 1 is the switching reference voltage Vref_pfm.

[0071] For a Buck-type power converter, the switching reference voltage Vref_pfm is as shown in the following formula:

[0072] Vref_pfm = V2*D = -R23 / R22*(Vin-Vo)*Vo / Vin (5)

[0073] In the analog multiplier according to the embodiment of the present invention, the output terminal of amplifier circuit 2 is connected to the input terminal of multiplier 1, so as to pre-amplify the difference signal Vin-Vo between the DC input voltage Vin and the DC output voltage Vo. By setting the resistance values of the input resistor R22 and the feedback resistor R23 in amplifier circuit 2, the circuit parameter K of power converter 100 can be completely compensated. Mode switching circuit 10 uses a two-stage circuit of operational amplifier 2 and analog multiplier 1 to generate the switching reference voltage Vref_pfm, so that the switching conditions of the two modulation modes can be accurately controlled, and the stability and efficiency optimization under different load conditions can be realized.

[0074] In the above embodiments, taking the Buck-type power converter as an example, it is described that the analog multiplier performs multiplication calculations according to the switching control signal to obtain accurate switching conditions for different modulation modes of the power converter. However, the present invention is not limited thereto. For example, for a Boost-type power converter, the input terminal of the above analog multiplier receives the DC input voltage Vin, and the product signal generated at the output terminal is equal to (Vo - Vin) * Vin / Vo. Still, the accurate switching reference voltage Vref_pfm = K * (Vo - Vin) * Vin / Vo can be obtained. Therefore, the analog multiplier of the present invention can be applied to the switching control circuit in power converters with different topological structures to achieve stability and efficiency optimization.

[0075] It should be noted that in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "including one..." does not exclude the existence of additional identical elements in the process, method, article or device including the said element.

[0076] According to the embodiments of the present invention as described above, these embodiments do not describe all the details in detail, nor do they limit the invention to the specific embodiments described. Obviously, many modifications and variations can be made according to the above description. The present specification selects and specifically describes these embodiments to better explain the principles and practical applications of the present invention, so that those skilled in the art can make good use of the present invention and its modifications based on the present invention. The present invention is only limited by the claims and their full scope and equivalents.

Claims

1. An analog multiplier for a power converter, the power converter comprising a first switch and a second switch connected in series, the analog multiplier comprising: A third switch and a fourth switch are connected in series between the input terminal and the ground; as well as A filter network is connected between the intermediate node of the third switch and the fourth switch and the output terminal, Among them, the switch control signals of the third switch and the fourth switch are the switch control signals of the first switch and the second switch respectively, the input end receives the difference signal between the DC input voltage and the DC output voltage of the power converter, and the output end provides a product signal of the difference signal and the duty cycle of the switch control signal.

2. The analog multiplier according to claim 1, wherein: Each of the first switch, the second switch, the third switch, and the fourth switch is a field effect transistor.

3. The analog multiplier according to claim 2, wherein: The first switch and the second switch are power tubes respectively, and the third switch tube and the fourth switch are switch tubes respectively.

4. The analog multiplier according to claim 1, wherein: The filter network includes a first resistor and a first capacitor connected in series, and an intermediate node between the first resistor and the first capacitor is connected to the output terminal.

5. A switch control circuit for a power converter, comprising: an error amplifier, configured to generate an error signal according to a voltage feedback signal related to a DC output voltage of the power converter; a PWM modulator, configured to generate a PWM control signal according to the error signal and a current detection signal related to the inductor current of the power converter; A PWM modulator, used for generating a PFM control signal according to the error signal; a mode switching circuit, the mode switching circuit comprising a multiplication circuit for generating a selection signal for selecting one of the PWM control signal and the PFM control signal; and a driver, configured to generate a first switch control signal and a second switch control signal according to one of the PWM control signal and the PFM control signal, Wherein, the multiplication circuit comprises an analog multiplier according to any one of claims 1 to 4.

6. The switch control circuit according to claim 5, wherein: The product signal generated by the analog multiplier is used as a switching reference voltage, and the mode switching circuit further includes: A comparator is used for comparing the error signal with the switching reference voltage to generate the selection signal.

7. The switch control circuit according to claim 6, wherein: The multiplication circuit further comprises: An operational amplifier is used to amplify the product signal by a proportionality factor related to the current sampling ratio of the current detection signal.

8. The switch control circuit according to claim 7, wherein: The input terminal of the operational amplifier is connected to the filter network of the analog multiplier to amplify the product signal.

9. The switch control circuit according to claim 7, wherein: The output terminal of the operational amplifier is connected to the high potential terminal of the third switch to pre-amplify the difference signal.

10. The switch control circuit according to claim 5, wherein: The power converter is selected from any one of a BUCK topology and a BOOST topology.

Images