Flexible DC converter station current harmonic suppression method, system, device and medium

Abstract

The invention discloses a current harmonic suppression method, system and device for a flexible direct current converter station and a medium. The method comprises the following steps: subtracting a phase angle output by a phase-locked loop and a phase angle output by a discrete time integrator to obtain a difference value signal, pre-limiting amplitude and filtering the difference value signal, obtaining an extreme value of the difference value signal after filtering through an extreme value algorithm, and limiting amplitude of the difference value signal by using the extreme value; and respectively carrying out fast Fourier transform analysis on the amplitude-limited difference signal and the phase-locked loop output phase angle to obtain the harmonic amplitude and phase of the amplitude-limited difference signal and the harmonic frequency of the phase-locked loop output phase angle and generate a corresponding harmonic suppression signal, and injecting the harmonic suppression signal into the phase-locked loop output phase angle to suppress the phase-locked loop harmonic. The method can effectively reduce the harmonic content in the output current of the converter station, improves the current waveform quality, reduces the interference of harmonic waves on the flexible DC power transmission system, and improves the power quality and the stability of the power transmission system.

Description

Technical Field

[0001] The present invention belongs to the technical field of flexible DC power transmission harmonic suppression, and specifically relates to a method, system, device and medium for suppressing current harmonics in a flexible DC converter station based on a phase-locked loop harmonic suppression. Background Art

[0002] Due to its excellent flexibility and low transmission loss, the flexible DC power transmission technology has been widely applied in the access of large-scale new energy and long-distance power transmission. As the core device of the flexible DC power transmission system, the stability of the modular multilevel converter (MMC) affects the stability and reliability of the entire power transmission system. However, the harmonic currents generated by the widely used nonlinear loads and the abnormal operation of some power generation equipment will cause the distortion of the grid-side current waveform, thereby introducing harmonics into the power grid. The high-frequency components of the grid-side harmonics will affect the control system of the flexible DC converter station, resulting in increased equipment losses and reduced power quality. In severe cases, it may cause the deterioration of the dynamic performance of the flexible DC converter station and affect the safe and stable operation of the power transmission system.

[0003] The existing methods for suppressing current harmonics in flexible DC converter stations still have many limitations in practical applications. For example, traditional filters are large in volume and high in cost, unable to dynamically adjust the filtering characteristics to adapt to the changes in harmonics, and have poor harmonic suppression effects; the harmonic suppression methods using improved control strategies have complex control link designs and poor real-time performance in practical applications, which will reduce the dynamic performance of the system and affect the stability of the power transmission system; the method of adopting an improved topological structure will not only increase the structural complexity and cost of the flexible DC converter station, but also only reduce the harmonic content of the output current to a certain extent.

[0004] Therefore, developing an efficient and economical harmonic suppression method is of great significance for ensuring the safe operation of flexible DC converter stations. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to overcome the defects of the above-mentioned existing technologies, and provide a method, system, device and storage medium for suppressing current harmonics in a flexible DC converter station, so as to effectively reduce the harmonic content in the output current of the converter station, improve the quality of the current waveform, reduce the interference of harmonics on the flexible DC power transmission system, and enhance the power quality and the stability of the power transmission system.

[0006] To achieve the above object, the present invention adopts the following technical solutions.

[0007] In a first aspect, the present invention provides a method for suppressing current harmonics in a flexible DC converter station, which includes: The phase angle of the output of the phase-locked loop and the phase angle of the output of the discrete-time integrator are subtracted to obtain a difference signal. The difference signal is pre-limited and filtered, and the maximum and minimum values of the filtered difference signal are obtained through the maximum value algorithm. The difference signal is limited using the maximum and minimum values. Perform fast Fourier transform analysis to obtain the amplitude and phase of the harmonics; perform fast Fourier transform analysis on the phase angle of the output of the phase-locked loop to obtain the harmonic frequencies; based on the obtained harmonic frequencies, amplitudes and phases, generate corresponding harmonic suppression signals, and inject the harmonic suppression signals into the phase angle of the output of the phase-locked loop to suppress the harmonics of the phase-locked loop, thereby realizing the suppression of the current harmonics of the flexible DC converter station.

[0008] Furthermore, the expression of the harmonic suppression signal is as follows: , where, S com is the harmonic suppression signal, A mp is the harmonic amplitude of the difference signal after limiting, is the phase of the difference signal after limiting, f Har_PLL is the harmonic frequency of the phase angle of the output of the phase-locked loop.

[0009] Furthermore, the method for suppressing the current harmonics of the flexible DC converter station further includes: performing fast Fourier transform analysis on the voltage at the point of common coupling containing voltage harmonics to detect the harmonic frequencies of the harmonic voltages at the point of common coupling other than the power frequency.

[0010] Furthermore, the voltage at the point of common coupling is the superposition of the power frequency voltage and the harmonic voltage, and the phase angle output by the phase-locked loop tracking the grid-side power frequency voltage and the phase angle output by the phase-locked loop tracking the grid-side harmonic voltage are superimposed to be the phase angle of the output of the phase-locked loop with the harmonic frequency.

[0011] Furthermore, the relationship between the harmonic frequency of the harmonic voltage at the point of common coupling and the harmonic frequency of the phase angle of the output of the phase-locked loop is as follows: , where, f Har_PLL is the harmonic frequency of the phase angle of the output of the phase-locked loop, f Har is the harmonic frequency of the harmonic voltage at the point of common coupling.

[0012] Furthermore, when filtering the difference signal, a Butterworth filter is used for low-pass filtering.

[0013] Furthermore, the maximum and minimum values include the maximum value and the minimum value. The maximum value is set as the upper limit of the limit, and the minimum value is set as the lower limit of the limit.

[0014] Second aspect, the present invention provides a flexible DC converter station current harmonic suppression system, which includes: Difference signal limiting unit: subtracts the phase angle output by the phase-locked loop and the phase angle output by the discrete-time integrator to obtain a difference signal, pre-limits and filters the difference signal, obtains the maximum and minimum values of the filtered difference signal through a maximum and minimum value algorithm, and limits the difference signal with the maximum and minimum values; Harmonic suppression unit: performs fast Fourier transform analysis on the limited difference signal to obtain the amplitude and phase of the harmonics; performs fast Fourier transform analysis on the phase angle output by the phase-locked loop to obtain the frequency of the harmonics; generates corresponding harmonic suppression signals based on the obtained frequencies, amplitudes and phases of the harmonics, and injects the harmonic suppression signals into the phase angle output by the phase-locked loop to suppress the harmonics of the phase-locked loop.

[0015] Third aspect, the present invention provides a computer device, including a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the computer program, the steps of the flexible DC converter station current harmonic suppression method are implemented.

[0016] Fourth aspect, the present invention provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the flexible DC converter station current harmonic suppression method are implemented.

[0017] The beneficial effects of the present invention are as follows: By flexibly setting the maximum and minimum value algorithm and fast Fourier transform analysis, the present invention proposes a method for extracting the frequencies, amplitudes and phases of harmonic signals in a flexible DC converter station, and generates corresponding harmonic suppression signals based on the extracted harmonics to suppress the current harmonics in the flexible DC converter station. The present invention realizes the flexible suppression effect of different frequency harmonics through an algorithm program and a low-cost computer device, overcomes the problems of high cost and poor adaptability to different frequency harmonic suppression in the traditional method, significantly improves the economy and adaptability of harmonic governance, enables the power transmission system to quickly adapt to the change of harmonic characteristics under different operating conditions, ensures the effectiveness of harmonic suppression, does not require adding large-volume external equipment, and reduces costs. At the same time, the present invention can effectively reduce the harmonic content in the output current of the converter station, improve the quality of the current waveform, and reduce the interference of harmonics on the flexible DC power transmission system; due to the coupling relationship of the electrical quantities inside the flexible DC converter station, after the harmonic suppression of the present invention, the influence of harmonics on the capacitor voltage fluctuation of the converter sub-module is reduced, the life of the sub-module capacitor is effectively extended, the operation reliability of the converter station is improved, and the stability and reliability of the power transmission system are enhanced. Description of the Drawings

[0018] Figure 1 It is a schematic diagram of a flexible DC converter station current harmonic suppression method of the present invention; Figure 2Flow chart of the maximum value algorithm unit of the present invention; Figure 3 Waveform diagram of the phase angle output by the phase-locked loop before and after harmonic suppression of the present invention; Figure 4 Analysis diagram of the fast Fourier transform of the phase current before harmonic suppression of the present invention; Figure 5 Analysis diagram of the fast Fourier transform of the phase current after harmonic suppression of the present invention; Figure 6 Waveform diagram of the difference signal of the present invention; Figure 7 Waveform diagram of the harmonic suppression signal of the present invention; Figure 8 Waveform diagram of the capacitor voltage of the sub-module before and after harmonic suppression of the present invention; Figure 9 Schematic diagram of a logical structure of a computer device provided by an embodiment of the present invention. Detailed implementation manners

[0019] In order to make the technical solutions of the present invention clearer, the present invention will be described in detail below in conjunction with the accompanying drawings of the specification and the specific implementation manners.

[0020] Embodiment 1 This embodiment provides a method for suppressing current harmonics in a flexible DC converter station. The phase angle output by the phase-locked loop and the phase angle output by the discrete-time integrator are subtracted to obtain a difference signal. The difference signal is pre-limited and filtered, and then the maximum value of the filtered difference signal is obtained through the maximum value algorithm. The difference signal is limited by using the maximum value; the fast Fourier transform analysis is performed on the limited difference signal to obtain the amplitude and phase of the harmonics; the fast Fourier transform analysis is performed on the phase angle output by the phase-locked loop to obtain the frequency of the harmonics; based on the obtained frequency, amplitude and phase of the harmonics, a corresponding harmonic suppression signal is generated, and the harmonic suppression signal is injected into the phase angle output by the phase-locked loop to suppress the harmonics of the phase-locked loop, thereby realizing the suppression of current harmonics in the flexible DC converter station. The schematic diagram is as Figure 1 shown.

[0021] The specific steps of the above method for suppressing current harmonics in a flexible DC converter station are as follows: Step 1: Perform fast Fourier transform analysis (FFT analysis) on the voltage at the point of common coupling (PCC) containing voltage harmonics to detect the harmonic frequencies of the harmonic voltage at the point of common coupling except for the power frequency f Har ; In the phase-locked loop, since the Park transformation transforms the stationary coordinate system into a rotating coordinate system with an angular velocity of 100π (rad / s), the frequency at the PCC point is f HarThe harmonic voltage will generate harmonics with a frequency of f Har_PLL in the phase angle output by the phase-locked loop. The harmonic frequency of the harmonic voltage at the point of common coupling f Har and the harmonic frequency of the phase angle output by the phase-locked loop f Har_PLL are related as shown in the following equation: .

[0022] Step 2: The voltage at the PCC point is the superposition of the power frequency voltage and the harmonic voltage. The phase angle output by the phase-locked loop tracking the power frequency voltage on the grid side and the phase angle output by tracking the harmonic voltage on the grid side are superimposed to form the phase angle output by the phase-locked loop. The phase-locked loop tracks the voltage at the PCC point and obtains the phase angle output by the phase-locked loop with a harmonic frequency of f Har_PLL ; The phase angle output by the phase-locked loop θ is subtracted from the phase angle θ output by the discrete-time integrator to form a difference signal θ i . S sub .

[0023] Step 3: The difference signal S sub is pre-limited to obtain a difference-limited signal S sub-lim . The upper limit Up lim1 and the lower limit Low lim1 of the pre-limitation are set; Considering that the amplitude of the sine part in the harmonics output by the phase-locked loop is small, and the difference signal S sub in Step 2 has a step of 2π, the upper limit Up lim1 can be set to 0.5, and the lower limit Low lim1 to -0.1 to initially filter out the step value in the difference signal S sub .

[0024] Step 4: The difference-limited signal S sub-lim in Step 3 is low-pass filtered using a Butterworth filter to obtain a filtered signal S fil .

[0025] Step 5: The filtered signal S fil is input into the maximum value algorithm unit, which is encapsulated by code writing. The flowchart of the maximum value algorithm unit is as shown in Figure 2 ; The signalS fil After input, record and output the signal S fil The historical maximum N max and historical minimum N min .

[0026] Step 6: The maximum value obtained in step 5 N max & N min Set as the upper limit of the limit Up lim2 and lower limit Low lim2 , and use this to limit the difference signal in step 2 to obtain the final limited signal S lim .

[0027] Step 7: The signal from step 6 S lim Perform FFT analysis to obtain the signal S lim The harmonic amplitude A mp and Phase .

[0028] Step 8: The harmonic frequency of the phase angle of the phase-locked loop output obtained in step 1 f Har_PLL and the harmonic amplitude obtained in step 7 A mp and Phase , generating harmonic suppression signal S com , which is expressed as follows: Step 9: Convert the harmonic suppression signal generated in step 8 S com Injection phase-locked loop output phase angle θ , suppressing the phase-locked loop harmonics, thereby achieving current harmonic suppression at the output of the flexible DC converter station.

[0029] In order to verify the method for suppressing current harmonics in the flexible DC converter station described in this embodiment, the following data is used for verification. The main circuit parameters of the flexible DC converter station MMC are shown in Table 1.

[0030] Table 1MMC main circuit parameters

[0031] When there are harmonics on the grid side, the phase-locked loop tracks the voltage at the PCC point, and the phase angle output is affected by the grid-side harmonics θ and carries harmonics of a certain frequency. Perform FFT analysis on the voltage at the PCC point containing voltage harmonics to detect the harmonic frequencies other than the power frequency f Har ; In the phase-locked loop, since the Park transformation transforms the stationary coordinate system into a rotating coordinate system with an angular velocity of 100π (rad / s), the frequency of the PCC point is f Har The harmonic voltage will generate harmonics with a frequency of f Har_PLL in the phase angle output by the phase-locked loop. Taking the detected grid-side harmonic frequency f Har = 170Hz and the harmonic amplitude U Har = 53.125 kV as an example, the phase angle θ output by the phase-locked loop will carry harmonics with a frequency of f Har_PLL = 120Hz. Under the above harmonic pollution on the grid side, the phase angle θ output by the phase-locked loop without suppression is as shown in Figure 3 (a). Affected by the harmonics of the phase angle output by the phase-locked loop, the FFT analysis of the phase current before harmonic treatment is as shown in Figure 4 The total harmonic distortion (THD) of the phase current is 9.36%. Obviously, the phase current output by the flexible DC converter station at this time carries a large amount of harmonics, which is not conducive to the stability of the system.

[0032] In order to extract the harmonics with a frequency of θ Har_PLL = 120Hz carried in the phase angle f output by the phase-locked loop, use the phase angle θ output by the phase-locked loop and the phase angle θ i output by the discrete-time integrator to make a difference to obtain the difference signal S sub . Since the phase-locked loop tracks the voltage at the PCC point and outputs the phase angle θ is not real-time tracking and there is a certain time delay. Therefore, the difference signal θ obtained by taking the difference between the phase angle θ i output by the phase-locked loop and the phase angle S sub output by the discrete-time integrator has some steps. The waveform of the difference signal S sub is as shown in Figure 6 .

[0033] For the difference signalS sub Perform pre-limiting, and the upper limit of the pre-limiting Up lim1 = 0.5, and the lower limit Low lim1 = -0.1. Limit the difference-limiting signal after pre-limiting S sub-lim Use a Butterworth filter for low-pass filtering to obtain the filtered signal S fil 。The filtered signal S fil is input to the maximum-minimum value algorithm unit to output the historical maximum value N max = 0.2716 and the historical minimum value N min = -0.03299.

[0034] Set the maximum value N max = 0.2716 and the minimum value N min = -0.03299 of the filtered signal output by the maximum-minimum value algorithm unit as the upper limit and the lower limit of the limiting respectively Up lim2 and the lower limit Low lim2 。Limit the difference signal S sub to obtain the finally limited signal S lim 。

[0035] From 0 to 1 s, no harmonic suppression is performed on the output phase current of the flexible DC converter station; at 1 s, the harmonic suppression switch is turned on, and the signal S lim is subjected to FFT analysis to obtain the harmonic frequency f Har_PLL = 120 Hz, the harmonic amplitude A mp = 0.1439 and the phase = -1.2566 in the phase angle output by the phase-locked loop, and generate a harmonic suppression signal; the waveform diagram of the suppression signal is as shown in Figure 7 。Inject the suppression signal into the phase angle output by the phase-locked loop θ , suppress the harmonics of the phase-locked loop. After the harmonic suppression is started, the phase angle output by the phase-locked loop θ is as shown in Figure 3 (b). It can be seen from the comparison of the two figures in Figure 3 (a) and Figure 3 (b) that the harmonics of the phase angle output by the phase-locked loop θ are suppressed.

[0036] Perform FFT analysis on the phase current output by the flexible DC converter station after harmonic suppression is started. The results are as follows Figure 5 shown. From Figure 5 it can be obtained that the THD of the phase current after harmonic suppression is 1.70%. Comparing Figure 4 and Figure 5 the results, it can be seen that after adopting the method described in the present invention, the output current harmonics of the flexible DC converter station are significantly suppressed, and the power quality is significantly improved.

[0037] The capacitor voltage fluctuations of the sub-modules of the modular multilevel converter before and after harmonic suppression are as Figure 8 shown. After starting harmonic suppression at 1 s, the capacitor voltage fluctuations of the sub-modules are smoother, reducing the influence of harmonics on the capacitor voltage fluctuations of the converter sub-modules, effectively prolonging the life of the sub-module capacitors, improving the operation reliability of the converter station, and enhancing the stability and reliability of the system.

[0038] In summary, the above flexible DC converter station current harmonic suppression method is based on phase-locked loop harmonic suppression, which can effectively reduce the harmonic content in the output current of the converter station, improve the current waveform quality, and reduce the interference of harmonics on the flexible DC transmission system. The method described in the present invention overcomes the problems of high cost and poor adaptability to harmonic suppression of different frequencies in the traditional method, significantly improves the economy and adaptability of harmonic governance, enables the transmission system to quickly adapt to the changes in harmonic characteristics under different operating conditions, ensures the effectiveness of harmonic suppression, does not require adding large-volume external equipment, and reduces costs. At the same time, the method proposed in the present invention reduces the influence of harmonics on the capacitor voltage fluctuations of the converter sub-modules, effectively prolongs the life of the sub-module capacitors, improves the operation reliability of the converter station, and enhances the stability and reliability of the transmission system. The method described in the present invention can significantly improve the power quality of the flexible DC transmission system, reduce the harmonic content of the output current, and is of great significance for enhancing the stability of the transmission system.

[0039] Embodiment 2 This embodiment provides a flexible DC converter station current harmonic suppression system, which consists of a difference signal limiting unit and a harmonic suppression unit.

[0040] The described difference signal limiting unit: subtract the phase angle output by the phase-locked loop and the phase angle output by the discrete-time integrator to obtain a difference signal, perform pre-limiting and filtering on the difference signal, and then obtain the maximum and minimum values of the filtered difference signal through the maximum and minimum value algorithm. The maximum and minimum values are used to limit the difference signal.

[0041] The described harmonic suppression unit: performs fast Fourier transform analysis on the difference signal after amplitude limiting to obtain the amplitude and phase of the harmonics; performs fast Fourier transform analysis on the phase angle output by the phase-locked loop to obtain the frequency of the harmonics; generates a corresponding harmonic suppression signal based on the obtained frequency, amplitude, and phase of the harmonics, and injects the harmonic suppression signal into the phase angle output by the phase-locked loop to suppress the harmonics of the phase-locked loop.

[0042] It should be noted that each unit in the above-mentioned flexible DC converter station current harmonic suppression system can be implemented in whole or in part by software, hardware, and their combination. The above-mentioned units can be embedded in the processor of the computer device in hardware form or independent of it, or stored in the memory of the computer device in software form, so that the processor can call and execute the operations corresponding to each of the above units. For the specific limitations of a flexible DC converter station current harmonic suppression system, refer to the limitations of a flexible DC converter station current harmonic suppression method (i.e., Embodiment 1) in the above text. The two have the same functions and effects and will not be elaborated here.

[0043] Embodiment 3 This embodiment provides a computer device, including: at least one processor; and a memory communicatively connected to the at least one processor. The memory stores a computer program that can be executed by the at least one processor, and when the computer program is executed by the at least one processor, it is used to cause the electronic device to execute the method according to Embodiment 1 of the present invention.

[0044] Embodiment 4 This embodiment provides a non-transitory computer-readable storage medium storing a computer program, wherein the computer program is used to cause the computer to execute the method according to Embodiment 1 of the present invention when executed by the processor of the computer.

[0045] Reference Figure 9 , the structural block diagram of the electronic device 400 that can be used as the server or client of the present invention will now be described. It is an example of a hardware device that can be applied to various aspects of the present invention. The electronic device is intended to represent various forms of digital electronic computer devices, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processors, cellular phones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are only examples and are not intended to limit the implementation of the present invention described and / or claimed herein.

[0046] As Figure 9As shown, the electronic device 400 includes a computing unit 401, which can perform various appropriate actions and processes according to a computer program stored in a read-only memory (ROM) 402 or a computer program loaded from a storage unit 408 into a random access memory (RAM) 403. In the RAM 403, various programs and data required for the operation of the electronic device 400 can also be stored. The computing unit 401, the ROM 402, and the RAM 403 are connected to each other via a bus 404. An input / output (I / O) interface 405 is also connected to the bus 404.

[0047] Multiple components in the electronic device 400 are connected to the I / O interface 405, including: an input unit 406, an output unit 407, a storage unit 408, and a communication unit 409. The input unit 406 can be any type of device capable of inputting information into the electronic device 400. The input unit 406 can receive input digital or character information and generate key signal inputs related to the user settings and / or function controls of the electronic device. The output unit 407 can be any type of device capable of presenting information and can include, but is not limited to, a display, a speaker, a video / audio output terminal, a vibrator, and / or a printer. The storage unit 408 can include, but is not limited to, a magnetic disk, an optical disk. The communication unit 409 allows the electronic device 400 to exchange information / data with other devices via a computer network such as the Internet and / or various telecommunication networks and can include, but is not limited to, a modem, a network card, an infrared communication device, a wireless communication transceiver, and / or a chipset, such as a BluetoothTM device, a WiFi device, a WiMax device, a cellular communication device, and / or the like.

[0048] The computing unit 401 can be various general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of the computing unit 401 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, etc. The computing unit 401 executes the various methods and processes described above. For example, in some embodiments, the aforementioned flexible DC converter station current harmonic suppression method can be implemented as a computer software program, which is tangibly contained in a machine-readable medium, such as the storage unit 408. In some embodiments, part or all of the computer program can be loaded and / or installed onto the electronic device 400 via the ROM 402 and / or the communication unit 409. In some embodiments, the computing unit 401 can be configured to execute the aforementioned flexible DC converter station current harmonic suppression method in any other appropriate manner (e.g., by means of firmware).

[0049] The program code for implementing the method of the present invention can be written in any combination of one or more programming languages. These program codes can be provided to a processor or controller of a general-purpose computer, a special-purpose computer, or other programmable data processing devices, such that when the program codes are executed by the processor or controller, the functions / operations specified in the flowchart and / or block diagram are implemented. The program codes can be executed entirely on the machine, partially on the machine, executed partially on the machine as an independent software package and partially on a remote machine, or executed entirely on a remote machine or server.

[0050] In the context of the present invention, a machine-readable medium can be a tangible medium that can contain or store a program for use by or in connection with an instruction execution system, apparatus, or device. A machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium can include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0051] As used in the present invention, the terms "machine-readable medium" and "computer-readable medium" refer to any computer program product, device, and / or apparatus (e.g., a disk, an optical disk, a memory, a programmable logic device (PLD)) for providing machine instructions and / or data to a programmable processor, including a machine-readable medium that receives machine instructions as a machine-readable signal. The term "machine-readable signal" refers to any signal for providing machine instructions and / or data to a programmable processor.

[0052] To provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or a trackball) through which the user can provide input to the computer. Other kinds of devices can also be used to provide interaction with the user; for example, the feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, voice input, or tactile input).

[0053] The systems and techniques described herein can be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system can be interconnected to each other by digital data communication in any form or medium (e.g., a communication network). Examples of communication networks include: local area network (LAN), wide area network (WAN), and the Internet.

[0054] A computer system can include clients and servers. The clients and servers are generally remote from each other and typically interact through a communication network. The client-server relationship is created by computer programs that run on the respective computers and have a client-server relationship with each other.

[0055] Those skilled in the art can clearly and easily make various modifications to the above embodiments and apply the general principles described herein to other embodiments without creative efforts. Therefore, the present invention is not limited to the above embodiments, and all improvements and modifications made by those skilled in the art based on the disclosure of the present invention should be within the protection scope of the present invention.

Claims

1. A method for suppressing current harmonics in a flexible DC converter station, characterized in that: include: The phase angle output by the phase-locked loop and the phase angle output by the discrete time integrator are subtracted to obtain a difference signal, the difference signal is pre-limited and filtered, the maximum value of the difference signal after filtering is obtained by an extreme value algorithm, and the difference signal is limited by the extreme value; The difference signal after limiting is subjected to fast Fourier transform analysis to obtain the amplitude and phase of the harmonics; the phase angle of the phase-locked loop output is subjected to fast Fourier transform analysis to obtain the frequency of the harmonics; based on the obtained frequency, amplitude and phase of the harmonics, a corresponding harmonic suppression signal is generated, and the harmonic suppression signal is injected into the phase angle of the phase-locked loop output to suppress the harmonics of the phase-locked loop.

2. The method for suppressing current harmonics in a flexible DC converter station according to claim 1, characterized in that: The expression of the harmonic suppression signal is as follows: ， In the formula, S com is the harmonic suppression signal, A mp is the harmonic amplitude of the difference signal after limiting, is the phase of the difference signal after limiting, f Har_PLL is the harmonic frequency of the phase-locked loop output phase angle.

3. The method for suppressing current harmonics in a flexible DC converter station according to claim 1, characterized in that: The method further comprises: performing fast Fourier transform analysis on the common connection point voltage containing voltage harmonics, and detecting the harmonic frequency of the common connection point harmonic voltage except the power frequency.

4. The method for suppressing current harmonics in a flexible DC converter station according to claim 3, characterized in that: The voltage at the common connection point is a superposition of the power frequency voltage and the harmonic voltage. The phase angle of the power frequency voltage output on the grid side tracked by the phase-locked loop and the phase angle of the harmonic voltage output on the grid side are superimposed to form a phase angle output by the phase-locked loop with harmonic frequencies.

5. The method for suppressing current harmonics in a flexible DC converter station according to claim 4, characterized in that: The relationship between the harmonic frequency of the common connection point harmonic voltage and the harmonic frequency of the phase-locked loop output phase angle is as follows: ， In the formula, f Har_PLL is the harmonic frequency of the phase-locked loop output phase angle, f Har is the harmonic frequency of the harmonic voltage at the common connection point.

6. The method for suppressing current harmonics in a flexible DC converter station according to claim 1, characterized in that: When filtering the difference signal, a Butterworth filter is used for low-pass filtering.

7. The method for suppressing current harmonics in a flexible DC converter station according to claim 1, characterized in that: The maximum value includes a maximum value and a minimum value, the maximum value is set as the upper limit of the limit, and the minimum value is set as the lower limit of the limit.

8. A current harmonic suppression system for a flexible DC converter station, characterized in that: include: The difference signal limiting unit is used to obtain a difference signal by subtracting the phase angle output by the phase-locked loop and the phase angle output by the discrete time integrator, and the difference signal is pre-limited and filtered. The maximum value of the difference signal after filtering is obtained by using the maximum value algorithm, and the difference signal is limited by the maximum value. Harmonic suppression unit: Perform fast Fourier transform analysis on the difference signal after limiting to obtain the amplitude and phase of the harmonics; perform fast Fourier transform analysis on the phase-locked loop output phase angle to obtain the frequency of the harmonics; based on the obtained frequency, amplitude and phase of the harmonics, generate a corresponding harmonic suppression signal, inject the harmonic suppression signal into the phase-locked loop output phase angle, and suppress the phase-locked loop harmonics.

9. A computer device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.

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