Inverter modularized parallel system current sharing control method and device and storage medium

Abstract

The invention relates to a current sharing control method and device for an inverter modularized parallel system and a storage medium, and the method comprises the steps: determining one inverter as a host and the rest as slaves, and carrying out the information interaction between the host and the slaves through a current sharing bus and a synchronous bus; each inverter collects network side voltage current and inductive current, and performs PQ droop control to obtain respective voltage droop amount, amplitude reference value and phase reference value; the host determines an amplitude calibration amount according to a voltage droop amount and an amplitude compensation amount of the host, sends the amplitude calibration amount to each slave through a current sharing bus, generates a square wave signal according to a phase reference value of the host, and sends the square wave signal to each slave through a synchronous bus; and after receiving the amplitude calibration amount, the slave machine obtains a voltage reference value after self-correction, determines a phase signal according to the square wave signal, and obtains a phase reference value after self-correction. Compared with the prior art, the method has the advantages of reducing the communication frequency requirement, improving the anti-interference capability and the like.

Description

Technical Field

[0001] The present invention relates to the field of current sharing control for parallel systems, and in particular to a current sharing control method, device and storage medium for an inverter modular parallel system. Background Art

[0002] In the application of high-power inverters, a single inverter usually cannot meet the power requirements of the system. Therefore, increasing the number of inverters and operating them in parallel has become an effective way to improve system power and reliability. However, the inverter parallel system faces a series of challenges in practical applications. For example, there are deviations in the sampling accuracy of each inverter, resulting in differences in sampled voltages and thus circulating currents between modules; differences in output lines or device parameters are also the main factors for uneven current sharing in the parallel system.

[0003] To solve these problems, current patents mostly consider line-less control and line-connected control based on droop control, such as centralized control, master-slave control and distributed control. Chinese invention patent CN117394354A proposes to classify the difference between the bus voltage and the reference voltage, and then adopt power regulation or PWM pulse width modulation for current sharing control respectively. This method is difficult to ensure the dynamic performance of parallel modules. Chinese invention patent CN117748588A proposes that in a three-phase three-wire system, the host transmits the output of the voltage loop to the slave as the current reference quantity. The transmitted quantity is an alternating quantity, which requires a high frequency and occupies a large amount of resources. This method pre-assigns the host and the slave. Once data is lost during transmission or the host fails, the system will not be able to operate stably. Chinese invention patent CN106849186A proposes a master-slave control method for energy storage inverters based on virtual synchronous generators for a three-phase three-wire system. This method also fixes the master and the slave, and the host sends current commands to the slave for control. Chinese invention patent CN112165243A discloses a master-slave automatic current sharing method, in which the host sends the calculated droop coefficient to the slave for control. The calculation of the droop coefficient is related to the number of operating inverters. Once one or more inverters are connected or disconnected, it will affect the current sharing control effect. At the same time, this method depends on the host, and once it fails, the system cannot operate. Chinese invention patent CN112165244A mentions that the host performs voltage control and transmits the current dq-axis reference value to the slave through the CAN bus. The transmitted DC signal has a small amount of computation, but it is only applicable to single-phase inverters and cannot guarantee the stability of the system when the host fails. Chinese invention patent CN104914908A discloses an autonomous current sharing digital control method based on CAN bus communication. This method avoids system collapse due to host failure, but the proposed master-slave competition mechanism occupies a large amount of computing resources.

[0004] In the prior art, most designs are for three-phase three-wire systems, and the current loop reference quantity is transmitted using master-slave control. On the one hand, if the AC reference quantity of the transmitted current is used, a relatively high communication frequency is required to ensure accuracy, and once data is lost, the stability of the system will be seriously affected. On the other hand, traditional master-slave control depends on the existence of the host. If the host fails, the system will collapse. Summary of the Invention

[0005] The purpose of the present invention is to provide a current sharing control method, device, and storage medium for an inverter modular parallel system to improve stability under low communication quality conditions.

[0006] The purpose of the present invention can be achieved through the following technical solutions: A current sharing control method for an inverter modular parallel system includes: When the system starts, one inverter is determined as the host, and the remaining inverters are used as slaves. Among them, both the host and the slaves are connected to the current sharing bus and the synchronization bus; Each inverter collects grid-side voltage and current and inductor current, and performs PQ droop control to obtain its own voltage droop amount, amplitude reference value, and phase reference value; The host determines the amplitude calibration amount based on its own voltage droop amount and sends it to each slave via the current sharing bus, and generates a square wave signal based on its own phase reference value and sends it to each slave via the synchronization bus; After receiving the amplitude calibration amount, the slave adds it to its own voltage reference value and subtracts its own voltage droop amount to obtain its own corrected voltage reference value, and determines the phase signal based on the square wave signal, and adds the phase signal to its own phase reference value to obtain its own corrected phase reference value; The slave performs voltage-current double-loop control based on its own corrected voltage reference value and phase reference value, and the host performs voltage-current double-loop control based on its own amplitude reference value and phase reference value.

[0007] During the process of determining one inverter as the host: the host is determined based on the module number of the inverter.

[0008] The process of determining the phase signal based on the square wave signal includes: Detect the rising edge of the square wave signal; Calculate the difference between the phase of the rising edge and the local phase as the phase signal.

[0009] The host determines the amplitude calibration amount based on its own voltage droop amount, specifically: The host adds its own voltage droop amount to the voltage amplitude compensation amount to obtain the amplitude calibration amount, where the voltage amplitude compensation amount is proportional to the product of the virtual impedance and the effective value of the collected grid-side current; In the control loop of the voltage-current double-loop control, a virtual impedance is introduced.

[0010] The method further includes: When a new inverter is connected, obtain the information of the current-sharing bus and the synchronization bus. If there is information sent by the host, the new inverter becomes a slave; otherwise, determine one inverter as the host and the remaining inverters as slaves.

[0011] The method further includes: When the host fails or is removed, determine one inverter as the host among the remaining slaves.

[0012] A current-sharing control method for an inverter modular parallel system includes: Collect the grid-side voltage and current and the inductor current, and perform PQ droop control to obtain the respective voltage droop amounts, amplitude reference values, and phase reference values; Receive the information of the current-sharing bus and the synchronization bus, and determine whether information from the host is detected. If so, receive the amplitude calibration amount from the current-sharing bus, sum it with its own voltage reference value and subtract its own voltage droop amount to obtain its own corrected voltage reference value, and receive the square wave signal from the synchronization bus to determine the phase signal, and sum the phase signal and its own phase reference value to obtain its own corrected phase reference value; otherwise, determine the amplitude calibration amount according to its own voltage droop amount and send it to each slave via the current-sharing bus, and generate a square wave signal according to its own phase reference value and send it to each slave via the synchronization bus.

[0013] The information of the host is the amplitude calibration amount and the square wave signal.

[0014] An inverter modular parallel system current-sharing control device includes a memory, a processor, and a program stored in the memory. When the processor executes the program, the above-mentioned method is implemented.

[0015] A storage medium stores a program, and when the program is executed, the above-mentioned method is implemented.

[0016] Compared with the prior art, the present invention has the following beneficial effects: 1. By using the current-sharing bus to transmit the voltage calibration amount for current-sharing control, the transmitted current-sharing calibration amount is a direct current quantity, and the communication frequency is relatively low. Even if some information is lost during the communication process, it will not affect the current-sharing stability. At the same time, the synchronization bus is used for the phase synchronization between the master and the slaves, and the currents among the inverter modules can be evenly distributed, avoiding the circulating current caused by voltage differences, significantly improving the operation stability of the parallel system, and enhancing the anti-interference ability.

[0017] 2. Introducing virtual impedance can further improve the current sharing effect, but it will cause a drop in the output voltage. Traditional amplitude compensation based on voltage difference is difficult to accurately and quickly raise the voltage to the rated value. Using amplitude compensation based on the effective value of current and virtual impedance, and through the current sharing bus, each module uniformly performs amplitude compensation calculated based on the host, thereby improving the voltage compensation speed and solving potential problems caused by unbalanced compensation amounts due to output differences.

[0018] 3. The master-slave-free control adopted can effectively avoid the problem of system collapse caused by the failure or removal of the host. The host is automatically generated through competition and automatically switched during faults, and the inverter can still operate stably when performing master-slave switching or when each module is inserted or removed, thereby improving the reliability of the system. Brief Description of the Drawings

[0019] Figure 1 It is the overall topology diagram and control framework of the parallel system of the present invention; Figure 2 It is the flowchart of the master-slave-free control of the present invention; Figure 3 It is the schematic diagram of the principle of the synchronous bus part of the present invention; Figure 4 It is the schematic diagram of the principle of the current sharing bus part of the present invention; Figure 5 It is the experimental waveform diagram of the parallel system of the present invention without current sharing control; Figure 6 It is the experimental waveform diagram of the parallel system of the present invention with current sharing control; Wherein: 1. Synchronous bus, 2. Current sharing bus, 3. AC bus, 4. Inverter, 5. EMI filter, 4-1. Host, 4-2. Slave. Detailed Embodiment

[0020] The present invention will be described in detail below with reference to the drawings and specific embodiments. This embodiment is implemented on the premise of the technical solution of the present invention, and the detailed implementation manner and specific operation process are given, but the protection scope of the present invention is not limited to the following embodiments.

[0021] Embodiment 1 As Figure 1 shown, multiple inverters are all connected to the current sharing bus and the synchronous bus. After the output of each inverter, it is connected to the AC bus through a filter inductor, a filter capacitor, an EMI filter, and a current sharing inductor. Among them, in this embodiment, the inverter adopts a three-phase four-wire T-type three-level inverter, a current sharing bus based on the CAN bus, and a power frequency synchronous bus. Of course, in other embodiments, the current sharing bus and the synchronous bus can also adopt other types of buses as long as they can realize the communication function.

[0022] The present application provides a current sharing control method for an inverter modular parallel system, including: (1) When the system starts up, determine one inverter as the master and the remaining inverters as slaves. Among them, both the master and the slaves are connected to the current sharing bus and the synchronization bus; Specifically, in this embodiment, during the process of determining one inverter as the master: determine the master based on the module number of the inverter. Since the module number is unique, the only master can be obtained without any objection, improving efficiency. Of course, in other embodiments, other methods can also be used to determine which inverter is the master. For example, it can be determined by network delay, voting, etc., or it can be determined by device information.

[0023] In addition, it should be noted that the master and slaves of the present application are autonomously generated inside the system without external setting. Therefore, in fact, it has the effect of a masterless system and can achieve the function of plug and play.

[0024] For example, as Figure 2 shown, when a new inverter is connected, obtain the information of the current sharing bus and the synchronization bus. If there is information sent by the master, the new inverter becomes a slave; otherwise, determine one inverter as the master and the remaining inverters as slaves. Another example is that when the master fails or is removed, among the remaining slaves, determine one inverter as the master.

[0025] Specifically, the connection of the inverter generally refers to the power-on of the inverter. At this time, it will first monitor the information on the current sharing bus and the synchronization bus. If there is already information sent by the master on the current sharing bus and the synchronization bus, the inverter becomes a slave. If there is no master in the system, the master will be generated through competition according to the module number code, etc. After the competition ends, it will become the master after re-judgment. When the master fails or is removed from the system, the existing slaves will re-select the master through this process.

[0026] The masterless control adopted can effectively avoid the problem of system collapse caused by the failure or removal of the master. The master is automatically generated through competition and automatically switched when a failure occurs. Moreover, when the inverter performs master-slave switching or the insertion and removal of each module, it can still operate stably, thereby improving the reliability of the system.

[0027] Among them, the synchronization bus and the current sharing bus are respectively used for communication between inverters. The synchronization bus is used to transmit the power frequency square wave signal, and all inverters are synchronized according to the rising edge. The current sharing bus is responsible for transmitting the current sharing signal, which is received by the slave inverter module and then used for subsequent local control.

[0028] (2) Each inverter collects the grid-side voltage and current and the inductor current, and performs PQ droop control to obtain its own voltage droop amount, amplitude reference value, and phase reference value; This process adapts to all inverters. After collecting the grid-side voltage and current and the inductor current, first, each inverter calculates the three-phase active power through PQ calculation P abc and the three-phase reactive power Q abc , and then uses droop control to obtain their respective voltage droop amounts, amplitude reference values, and phase reference values:

[0029] Where: is the voltage droop amount, is the active droop control coefficient, is the amplitude reference value, is the initial voltage reference value, is the phase reference value, is the initial phase angle, is the reactive droop control coefficient.

[0030] Those skilled in the art should understand that the subscripts such as the above voltage droop amount and amplitude reference value include abc parameters, and the specific form is a ternary data group, which respectively represents the data of the three phases A, B, and C.

[0031] (3) The host determines the amplitude calibration amount according to its own voltage droop amount and amplitude compensation amount, and sends it to each slave via the current-sharing bus, and generates a square wave signal according to its own phase reference value, and sends it to each slave via the synchronization bus; Specifically, in this embodiment, the host directly uses its own voltage droop amount and convention as the amplitude calibration amount, and this amplitude calibration amount is sent to the current-sharing bus, and then received by each slave. Since the transmitted current-sharing calibration amount is a direct current quantity and the communication frequency is low, even if some information is lost during the communication process, it will not affect the current-sharing stability. In the prior art, the quantity transmitted on the communication line is an alternating current quantity. On the one hand, the communication frequency needs to be large enough, and on the other hand, the communication stability requirements are very high. If the communication information is lost due to host failure or signal disturbance, it will seriously affect the stability of current sharing.

[0032] In addition, for the square wave signal, specifically, as Figure 3 shown, taking the zero point of the host's own phase reference value as the rising edge of the square wave signal and the π point as the falling edge of the square wave signal, the original sine signal can be converted into a square wave signal with stronger anti-interference ability for transmission.

[0033] (4) After receiving the amplitude calibration amount, the slave adds it to its own voltage reference value and subtracts its own voltage droop amount to obtain its own corrected voltage reference value, and determines the phase signal according to the square wave signal, and adds the phase signal and its own phase reference value to obtain its own corrected phase reference value; In this embodiment, the process of determining the phase signal according to the square-wave signal includes: detecting the rising edge of the square-wave signal; calculating the phase difference between the phase zero point and the rising edge as the phase signal. In this way, phase synchronization can be achieved.

[0034] In addition, in this embodiment, the corrected voltage reference value and phase reference value are respectively:

[0035] Where: is the corrected voltage reference value, is the corrected phase reference value, is the phase signal.

[0036] (5) The slave machine performs voltage-current double-loop control based on its own corrected voltage reference value and phase reference value, and the master machine performs voltage-current double-loop control based on its own amplitude reference value and phase reference value.

[0037] In the voltage-current double-loop control, the output three-phase modulation wave signal generates the drive signals of each switch tube of the inverter after passing through the SPWM module.

[0038] Embodiment 2 This embodiment is substantially the same as Embodiment 1. To avoid ambiguity in the key points described in this embodiment, the same parts of this embodiment and Embodiment 1 will not be elaborated, and only the differences will be described. In this embodiment, as Figure 1 and Figure 4 shown, a virtual impedance is introduced to improve the overall performance. The master machine determines the amplitude calibration amount according to its own voltage droop amount and amplitude compensation amount. Specifically: The master machine sums its own voltage droop amount and voltage amplitude compensation amount to obtain the amplitude calibration amount. Among them, the voltage amplitude compensation amount is proportional to the product of the virtual impedance and the effective value of the collected grid-side current:

[0039] Where: k is the voltage amplitude compensation coefficient, is the effective value of the grid-side current, is the voltage amplitude compensation amount, is the virtual impedance.

[0040] Figure 1 and Figure 4 in, U dc is the DC voltage, O 1 is the neutral point of the inverter numbered 1, L a 、 Lb , L c , L n are respectively A , B , C , N filter inductors of the phases, C is the filter capacitor, L sa , L sb , L sc are respectively A , B , C phase current sharing inductors, S x is the switching transistor signal, v sabc is the output voltage, i sabc is the output current, ∠ θ abc is A , B , C phase angles of the phases, i Labc is A , B , C phase inductor currents, u * abc are three-phase modulation waves.

[0041] Similarly, in the control loop of voltage-current double-loop control, a virtual impedance is introduced. To improve the balance of the module output, a virtual impedance is introduced into the voltage-current double-closed-loop control loop, and the equivalent output impedance of the inverter is improved through the virtual impedance, which helps the current sharing control of each module.

[0042] In this embodiment, a virtual impedance is introduced, and a voltage amplitude compensation amount based on the virtual impedance and the current effective value is added. This compensation method makes the voltage recover faster, and then corrects the voltage reference value together with the phase signal obtained from the power frequency synchronous bus.

[0043] Furthermore, in this embodiment, by introducing a virtual impedance, the current sharing effect can be further improved, but it will cause a drop in the output voltage. It is difficult for the traditional amplitude compensation based on the voltage difference to accurately and quickly raise the voltage to the rated value. Using the amplitude compensation based on the current effective value and the virtual impedance, and through the current sharing bus, each module uniformly performs the amplitude compensation calculated based on the host computer, so as to improve the voltage compensation speed and solve the potential problem caused by the imbalance of the compensation amount due to the output difference.

[0044] To verify the effectiveness of the above control method, a specific experimental example is given in this embodiment.

[0045] This experimental example takes the parallel connection of two modular inverters as an example. When no current sharing control is added, that is, without droop control, virtual impedance control, and voltage compensation based on the synchronous bus and current sharing bus, even when no load is applied, there is still a large circulating current in the system. As Figure 5 shown, C2 is the B-phase line voltage channel, and C4 is the A-phase line voltage channel of a certain module. After loading, the in-phase currents of the two inverters are significantly non-uniform, and there is a large circulating current in the system. Long-term operation will affect the system stability. After adding current sharing control, that is, adding droop control, virtual impedance control, and voltage compensation based on the synchronous bus and current sharing bus, there is almost no circulating current before and after loading. As Figure 6 shown, C2 is the B-phase line voltage channel, and C4 is the A-phase line voltage channel of a certain module. The transient stability of the current sharing control can also be ensured at the moment of loading. After loading, the output currents of the two inverters almost overlap, achieving a good current sharing effect.

[0046] Through the embodiments and experimental examples, the feasibility and effectiveness of a current sharing control strategy for an inverter modular parallel system based on a current sharing bus and a synchronous bus proposed in this application are verified.

[0047] Embodiment 3 This embodiment is specifically a form of Embodiment 1 deployed on a single inverter. Specifically, a current sharing control method for an inverter modular parallel system includes: Collect the grid-side voltage and current and inductor current, and perform PQ droop control to obtain their respective voltage droop amounts, amplitude reference values, and phase reference values; Receive the information of the current sharing bus and the synchronous bus, and determine whether information from the master is detected. If so, receive the amplitude calibration amount from the current sharing bus, sum it with its own voltage reference value and subtract its own voltage droop amount to obtain its own corrected voltage reference value, and receive the square wave signal from the synchronous bus to determine the phase signal, and sum the phase signal and its own phase reference value to obtain its own corrected phase reference value. Otherwise, determine the amplitude calibration amount according to its own voltage droop amount, and send it to each slave via the current sharing bus, and generate a square wave signal according to its own phase reference value, and send it to each slave via the synchronous bus.

[0048] In this embodiment, the information of the master is the amplitude calibration amount and the square wave signal. In this way, the amount of information on the bus can be reduced. Of course, in other embodiments, it can also be other information.

[0049] If the above functions are implemented in the form of software function units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or a part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in various embodiments of the present invention. The foregoing storage medium includes: various media that can store program codes, such as USB flash drives, mobile hard disks, read-only memories (ROM, Read-Only Memory), random access memories (RAM, Random Access Memory), magnetic disks, or optical discs.

Claims

1. A current sharing control method for a modular parallel inverter system, characterized in that: include: When the system starts, one inverter is determined as a master and the other inverters are determined as slaves, wherein the master and the slaves are both connected to a current sharing bus and a synchronous bus; Each inverter collects grid-side voltage and current and inductor current, performs PQ droop control to obtain its own voltage droop amount, amplitude reference value and phase reference value; The master determines the amplitude calibration amount according to its own voltage droop, and sends it to each slave via the current sharing bus, and generates a square wave signal according to its own phase reference value, and sends it to each slave via the synchronization bus; After receiving the amplitude calibration value, the slave sums it with its own voltage reference value and subtracts its own voltage droop value to obtain its own corrected voltage reference value, and determines the phase signal according to the square wave signal, and sums the phase signal with its own phase reference value to obtain its own corrected phase reference value; The slave performs voltage and current dual-loop control based on its own corrected voltage reference value and phase reference value, and the master performs voltage and current dual-loop control based on its own amplitude reference value and phase reference value.

2. A current sharing control method for a modular parallel inverter system according to claim 1, characterized in that: In the process of determining an inverter as a host: the host is determined based on the module number of the inverter.

3. The method for controlling current sharing of a modular inverter parallel system according to claim 1, characterized in that: The process of determining the phase signal according to the square wave signal comprises: Detect the rising edge of the square wave signal; The difference between the phase of the rising edge and the local phase is calculated as the phase signal.

4. The method for controlling current sharing of a modular inverter parallel system according to claim 1, characterized in that: The host determines the amplitude calibration amount according to its own voltage droop, specifically: The host obtains an amplitude calibration amount by summing its own voltage droop amount and voltage amplitude compensation amount, wherein the voltage amplitude compensation amount is proportional to the product of the virtual impedance and the collected grid-side current effective value; A virtual impedance is introduced into the control loop of the voltage-current dual-loop control.

5. The method for controlling current sharing of a modular inverter parallel system according to claim 1, characterized in that: The method further comprises: When a new inverter is connected, the information of the current sharing bus and the synchronization bus is obtained. If there is information sent by the master, the new inverter is converted to a slave. Otherwise, one inverter is determined as the master and the rest of the inverters are slaves.

6. The inverter modular parallel system current sharing control method according to claim 1, characterized in that: The method further comprises: When the master fails or is removed, one inverter is determined as the master among the remaining slaves.

7. A current sharing control method for a modular parallel inverter system, characterized in that: include: Collect grid-side voltage and current and inductor current, perform PQ droop control to obtain respective voltage droop, amplitude reference value and phase reference value; Receive information from the current-sharing bus and the synchronous bus, and determine whether information from the host is detected. If so, receive the amplitude calibration value from the current-sharing bus, sum it with its own voltage reference value and subtract its own voltage droop to obtain its own corrected voltage reference value, and receive the square wave signal from the synchronous bus to determine the phase signal, and sum the phase signal with its own phase reference value to obtain its own corrected phase reference value; otherwise, determine the amplitude calibration value according to its own voltage droop, and send it to each slave via the current-sharing bus, and generate a square wave signal according to its own phase reference value, and send it to each slave via the synchronous bus.

8. The inverter modular parallel system current sharing control method according to claim 7, characterized in that: The host information includes an amplitude calibration value and a square wave signal.

9. A current sharing control device for a modular parallel inverter system, comprising a memory, a processor, and a program stored in the memory, characterized in that: When the processor executes the program, the method according to any one of claims 1 to 8 is implemented.

10. A storage medium having a program stored thereon, characterized in that: When the program is executed, the method according to any one of claims 1 to 8 is implemented.

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