Single-pole double-throw switch applied to radio frequency transceiving system
By designing a new single-pole double-throw switch using SOI 8SW technology in the RF transceiver system, using positive voltage control, negative bias technology, etc., the shortcomings of existing RF switches in high performance and broadband frequency range are solved, and the performance of low insertion loss, high isolation and broadband frequency range is achieved, which is suitable for modern wireless communication equipment.
Patent Information
- Application Number
- CN202510091182.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-21
- Publication Date
- 2025-05-30
AI Technical Summary
When facing the needs of multifunctional intelligent terminal devices and complex modulation methods, existing single-pole double-throw RF switches are difficult to meet the requirements of high performance and broadband frequency range, resulting in insufficient signal transmission efficiency and isolation.
A new single-pole double-throw switch is designed using the SOI 8SW process, and performance with low insertion loss, high isolation and wideband frequency range is achieved by connecting multiple transistor components in series and utilizing positive voltage control, negative bias technology, transistor stacking technology and diode protection solutions.
Achieving a broadband frequency range of 20MHz to 6.0GHz, extremely low insertion loss (typically 0.35dB@2.45GHz), up to 24dB isolation, excellent linear performance and ultra-small package, suitable for the needs of modern wireless communication devices.
Smart Images
Figure CN120074482A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of radio frequency circuit design, and particularly relates to a single-pole double-throw switch applied to a radio frequency transceiver system. Background Art
[0002] With the rapid development of modern wireless communication technologies, in order to better meet customer needs, wireless communication devices need to process various types of text, video, and audio data more timely and effectively, which poses greater challenges to the rapidly developing multi-functional intelligent terminal devices. In addition, in order to improve the information transmission rate, modern communication systems have proposed more complex modulation methods, such as various orthogonal modulation methods, etc. Since the radio frequency front-end module first contacts the signals sent by various base stations, the radio frequency front-end module has become increasingly important in wireless communication systems. The single-pole double-throw radio frequency switch (Single-Pole-Double-Throw RFSwitch, SPDT) is one of the most important parts in a wireless communication system. Generally located at the front end of a radio frequency transceiver, it selectively connects the transmitter and the receiver to the antenna, enables the transceiver branches to operate in the same frequency range, and prevents high-power signals in the receiving branch from interfering with those in the transmitting branch. The performance of the radio frequency switch, such as insertion loss, isolation, linearity, etc., directly affects the output power, efficiency, and other indicators of the entire wireless transceiver system.
[0003] With the advent of application fields that require more transceiver functions, the single-pole double-throw radio frequency switch will also become more popular. Therefore, the performance of the single-pole double-throw radio frequency switch not only affects the performance of the entire transceiver system, but also plays an important role in improving the technical level of the entire transceiver system. The design of high-performance radio frequency switches has gradually become the core of radio frequency front-end circuit design. Therefore, in order to meet the usage requirements, it is necessary to improve the existing switch structure. Summary of the Invention
[0004] In order to meet the usage requirements, the object of the present invention is to provide a single-pole double-throw switch applied to a radio frequency transceiver system, which is applied to the front-end components of a radio frequency transceiver circuit, has an operating frequency band of 20 MHz to 6 GHz, and adopts the SOI 8SW process.
[0005] To achieve the object of the present invention, the technical solution provided by the present invention is as follows:
[0006] A single-pole double-throw switch applied to a radio frequency transceiver system includes first, second, third, and fourth series transistor components with the same structure. The first series transistor component and the third series transistor component are connected in parallel, and the second series transistor component and the fourth series transistor component are connected in parallel;
[0007] Among them, the first series transistor assembly includes a plurality of transistors connected in series, and the sources of adjacent transistors are connected; the source, gate, and substrate of each transistor are respectively connected to a source-drain resistor, a gate resistor, and a substrate resistor;
[0008] In the first series transistor assembly, the other ends of all source-drain resistors are all connected to the control terminal V d_on connected, the other ends of all gate resistors are all connected to the control terminal V g_on connected, and the other ends of all substrate resistors are all grounded to control the conduction of the transistors in the first series transistor assembly; in the second series transistor assembly, the other ends of all source-drain resistors are all connected to the control terminal V d_off connected, the other ends of all gate resistors are all connected to the control terminal V g_off connected, and the other ends of all substrate resistors are all grounded to control the conduction of the transistors in the second series transistor assembly; in the third series transistor assembly, the other ends of all source-drain resistors are all connected to the control terminal V d_off connected, the other ends of all gate resistors are all connected to the control terminal V g_off connected, and the other ends of all substrate resistors are all grounded to control the conduction of the transistors in the third series transistor assembly; in the fourth series transistor assembly, the other ends of all source-drain resistors are all connected to the control terminal V d_on connected, the other ends of all gate resistors are all connected to the control terminal V g_on connected, and the other ends of all substrate resistors are all grounded to control the conduction of the transistors in the fourth series transistor assembly;
[0009] The sources of all transistors in the first series transistor assembly are connected to the sources of all transistors in the third series transistor assembly, and are all connected to the RF port OUTPUT1; the sources of all transistors in the second series transistor assembly are connected to the sources of all transistors in the fourth series transistor assembly, and are all connected to the RF port OUTPUT2; the sources of all transistors in the first series transistor assembly are connected to the sources of all transistors in the second series transistor assembly, and are all connected to the antenna port INPUT.
[0010] Further, the gate resistors and source-drain resistors are all 100 kΩ, and the substrate resistors are all 300 kΩ.
[0011] Further, a first DC blocking capacitor C1 with a capacitance value of 100 pF is provided between the sources of all transistors in the first series transistor assembly and the RF port OUTPUT1 and the sources of all transistors in the third series transistor assembly.
[0012] Further, a second DC blocking capacitor C3 with a capacitance value of 100 pF is provided between the sources of all the transistors in the first series transistor assembly and the sources of all the transistors in the third series transistor assembly and the RF port OUTPUT2.
[0013] Further, a fifth DC blocking capacitor C5 with a capacitance value of 100 pF is provided between the sources of all the transistors in the first series transistor assembly and the sources of all the transistors in the second series transistor assembly and the antenna port INPUT.
[0014] Further, a third DC blocking capacitor C4 and a fourth DC blocking capacitor C6 are also included, and the two are respectively connected in parallel to the control terminals VCLT1 and VCLT2 as bypass capacitors.
[0015] Further, the antenna port INPUT is connected in parallel with an electrostatic protection diode.
[0016] Further, the RF port OUTPUT1 and the RF port OUTPUT2 are both connected in parallel with electrostatic protection diodes.
[0017] Further, the control terminal V g_on and the control terminal V g_off are both connected in parallel with electrostatic protection diodes.
[0018] Compared with the prior art, the technical effects that the present invention can achieve are as follows:
[0019] 1. Positive voltage control: The technical solution of this application adopts positive voltage control (0 and 1.8 V to 0 and 5.0 V). This control method simplifies the circuit design and improves the reliability and stability of the switch.
[0020] 2. Wideband frequency range: The technical solution of this application has a wideband frequency range of 20 MHz to 6.0 GHz, which can cover a variety of wireless communication frequency bands and is applicable to a variety of wireless communication applications.
[0021] 3. Extremely low insertion loss: The technical solution of this application has a very low insertion loss, and the typical value is 0.35 dB @ 2.45 GHz. This means that the signal loss during signal transmission is extremely small, ensuring the integrity of the signal and the communication quality.
[0022] 4. High isolation: The technical solution of this application provides a typical isolation of up to 24 dB @ 2.45 GHz, effectively preventing signal interference between different paths and improving the anti-interference ability of the communication system.
[0023] 5. Excellent linear performance: The technical solution of this application demonstrates excellent linear performance, with IP0.5dB = +30dBm. This enables the switch to maintain signal integrity during high-power signal processing, reducing nonlinear distortion.
[0024] 6. Ultra-small package: The technical solution of this application can adopt an ultra-small MLPD (6-pin, 1x1mm) package. This packaging method makes the switch smaller in size, facilitating integration into a compact space and meeting the requirements of modern electronic devices for miniaturization.
[0025] 7. High reliability: According to the JEDEC J-STD-020 standard, the MSL level of the technical solution of this application is 1, and it can withstand temperatures up to 260°C, indicating that it can maintain stable performance in extreme environments. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] Figure 1 It is a schematic diagram of the application structure of the single-pole double-throw switch provided by an embodiment of the present invention;
[0027] Figure 2 It is a schematic diagram of the circuit structure of the single-pole double-throw switch provided by an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0028] Next, with reference to the accompanying drawings in the embodiments of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.
[0029] As Figure 1 shown, capacitors C1, C3, and C5 are DC blocking capacitors (with a capacitance value of 100 pF each) for isolating DC signals, capacitors C4 and C6 are bypass capacitors (with a capacitance value of 23 pF each), OUTPUT1 is the PA branch, OUTPUT2 is the LNA branch, and INPUT is the antenna branch; VCTL1 and VCTL2 are the gate control voltage V g and the source control voltage V d . Specifically, as shown in Table 1.
[0030] Table 1
[0031] Port Name Description Port Name Description 1 OUTPUT1 RF Port 4 VCTL2 DC Voltage 2 GND Ground 5 INPUT Antenna Port 3 OUTPUT3 RF Port 6 VCTL1 DC Voltage
[0032] As Figure 2As shown, a single-pole double-throw switch applied to a radio frequency transceiver system provided in this embodiment includes a first series transistor assembly 1, a second series transistor assembly 2, a third series transistor assembly 3, and a fourth series transistor assembly 4 with the same structure. The first series transistor assembly 1 and the third series transistor assembly 3 are connected in parallel, and the second series transistor assembly 2 and the fourth series transistor assembly 4 are connected in parallel.
[0033] Among them, the first series transistor assembly 1 includes a plurality of transistors connected in series, and the sources of adjacent transistors are connected; the source, gate, and substrate of each transistor are respectively connected to a source-drain resistor, a gate resistor, and a substrate resistor.
[0034] In the first series transistor assembly 1, the other ends of all source-drain resistors are connected to the control terminal Vd_on, the other ends of all gate resistors are connected to the control terminal Vg_on, and the other ends of all substrate resistors are grounded to control the conduction of the transistors in the first series transistor assembly 1; in the second series transistor assembly 2, the other ends of all source-drain resistors are connected to the control terminal Vd_off, the other ends of all gate resistors are connected to the control terminal Vg_off, and the other ends of all substrate resistors are grounded to control the conduction of the transistors in the second series transistor assembly 2; in the third series transistor assembly 3, the other ends of all source-drain resistors are connected to the control terminal Vd_off, the other ends of all gate resistors are connected to the control terminal Vg_off, and the other ends of all substrate resistors are grounded to control the conduction of the transistors in the third series transistor assembly 3; in the fourth series transistor assembly 4, the other ends of all source-drain resistors are connected to the control terminal Vd_on, the other ends of all gate resistors are connected to the control terminal Vg_on, and the other ends of all substrate resistors are grounded to control the conduction of the transistors in the fourth series transistor assembly 4.
[0035] The sources of all transistors in the first series transistor assembly 1 are connected to the sources of all transistors in the third series transistor assembly 3 and are both connected to the radio frequency port OUTPUT1; the sources of all transistors in the second series transistor assembly 2 are connected to the sources of all transistors in the fourth series transistor assembly 4 and are both connected to the radio frequency port OUTPUT2; the sources of all transistors in the first series transistor assembly 1 are connected to the sources of all transistors in the second series transistor assembly 2 and are both connected to the antenna port INPUT.
[0036] Among them, the gate resistors and the source-drain resistors are all 100 k ohms, and the substrate resistors are all 300 k ohms.
[0037] Among them, a first DC blocking capacitor C1 with a capacitance value of 100 pF is provided between the sources of all the transistors in the first series transistor assembly 1 and the sources of all the transistors in the third series transistor assembly 3 and the RF port OUTPUT1.
[0038] Among them, a second DC blocking capacitor C3 with a capacitance value of 100 pF is provided between the sources of all the transistors in the first series transistor assembly 2 and the sources of all the transistors in the third series transistor assembly 4 and the RF port OUTPUT2.
[0039] Among them, a fifth DC blocking capacitor C5 with a capacitance value of 100 pF is provided between the sources of all the transistors in the first series transistor assembly 1 and the sources of all the transistors in the second series transistor assembly 2 and the antenna port INPUT.
[0040] Among them, a third DC blocking capacitor C4 and a fourth DC blocking capacitor C6 are further included, and the two are respectively connected in parallel to the control terminals VCLT1 and VCLT2 as bypass capacitors.
[0041] Among them, the antenna port INPUT is connected in parallel with an electrostatic protection diode.
[0042] Among them, both the RF port OUTPUT1 and the RF port OUTPUT2 are connected in parallel with electrostatic protection diodes.
[0043] Among them, both the control terminal Vg_on and the control terminal Vg_off are connected in parallel with electrostatic protection diodes.
[0044] It should be noted that during use, the RF signal is input from the common port INPUT terminal, and different output paths are selected through control signals. When the control terminal Vg_on (i.e., VCLT1) is at a high level and Vg_off (i.e., VCLT2) is at a low level, all the transistors in the first series transistor assembly 1 at the left end are turned on, and all the transistors in the third series transistor assembly 3 are turned off. The signal flows from the common port to the output terminal 1 (OUTPUT1). At this time, all the transistors in the second series transistor assembly 1 are turned off, and all the transistors in the fourth series transistor assembly 4 are turned on. The parallel transistors are responsible for introducing a small amount of the flowing signal to the ground to avoid flowing into the output terminal 2 (OUTPUT2).
[0045] By connecting the RF common port (INPUT, pin 5) to the OUTPUT1 or OUTPUT2 port (pin 1 or 3), a low-loss path (i.e., applying a positive voltage to the VCTL1 or VCTL2 pin) is used to achieve signal transmission and isolation. As shown in Table 2
[0046] Table 2
[0047] VCTL1 VCTLL2 INPUT to OUTPUT1 INPUT to OUTPUT2 0 1 Off On 1 0 On Off
[0048] It should be noted that
[0049] 1. In the technical solution provided by the present invention, the negative body bias technology is adopted to reduce the parasitic capacitance between the sources of the transistors in the off state. Especially at high frequencies, this optimization technology can effectively reduce the insertion loss and improve the linearity. Moreover, under normal circumstances, the negative body bias technology can effectively increase the circuit bandwidth.
[0050] Among them, the implementation manner of the negative body bias is as Figure 2 shown. When the first series transistor assembly 2 is turned off, a negative voltage is applied to the substrate, making the junction diodes between the drain-substrate and source-substrate reverse-biased, so that the off-capacitance Coff between the drain and source can be greatly reduced.
[0051] 2. In the technical solution provided by the present invention, the transistor stacking technology is adopted. By stacking the number of transistors, multiple transistors share the power signal equally, so that the signal power borne by a single transistor can be reduced, and the linearity of the switch is improved in this way.
[0052] 3. In the technical solution provided by the present invention, the diodes are connected in a positive-negative manner mainly to provide bidirectional protection to ensure effective protection of the circuit in both forward and reverse ESD events.
[0053] 3.1: Bidirectional protection: The RF switch may encounter forward or reverse ESD events during operation. By connecting the diodes in a positive-negative manner, it can be ensured that at least one diode can conduct in any polarity of ESD events, so as to guide the ESD current to the ground and protect the RF switch from damage.
[0054] 3.2: Protect RF performance: The RF circuit has high requirements for signal integrity and frequency characteristics. The ESD protection scheme with diodes connected in a positive-negative manner can provide effective ESD protection without significantly affecting the RF performance.
[0055] 4. In the technical solution provided by the present invention, the RF switch adopts a relative negative voltage structure. In this circuit structure with a relative negative voltage between the gate and source, when the switch is in the on state, the transistor gate is at a positive voltage, the drain is grounded, and the gate-source voltage is greater than the threshold voltage, so the switch conducts. When the switch is turned off, the gate is grounded, the drain is connected to a positive voltage, and the gate-source voltage is negative. This structure can eliminate the construction of the negative voltage generation circuit, reduce the switch switching time, and increase the linearity at the same time.
[0056] 5. The rated humidity sensitivity of the solution of this application is level 1 (MSL1), and it is 260 °C. It can be used for leaded or lead-free soldering.
[0057] 6. The solution of this application adopts the body suspension technology by connecting a 300K ohm resistor to the ground at the substrate body end of the transistor. The principle is to change the equivalent impedance of the transistor when it is turned on and off. For example, when the series transistor is turned on, its impedance is determined by the equivalent resistance. When the parallel transistor is turned off, due to the existence of the large substrate resistance, the impedance between the drain and the ground is increased to improve the power handling capacity.
[0058] Finally, it should be noted that the above embodiments are only used for exemplifying and explaining the present invention, rather than intending to limit the present invention to the scope of the described embodiments. In addition, those skilled in the art can understand that the present invention is not limited to the above embodiments, and more variations and modifications can be made according to the teachings of the present invention, and these variations and modifications all fall within the scope claimed by the present invention.
Claims
1. A single-pole double-throw switch used in a radio frequency transceiver system, characterized in that: The invention comprises a first series transistor component (1), a second series transistor component (2), a third series transistor component (3) and a fourth series transistor component (4) having the same structure, wherein the first series transistor component (1) and the third series transistor component (3) are connected in parallel, and the second series transistor component (2) and the fourth series transistor component (4) are connected in parallel; The first series transistor assembly (1) comprises a plurality of transistors connected in series, the source and drain of adjacent transistors are connected; the source, gate and substrate of each transistor are respectively connected to a source-drain resistor, a gate resistor and a substrate resistor; In the first series transistor assembly (1), the other ends of all source-drain resistors are connected to the control terminal V d_on The other end of all gate resistors is connected to the control terminal V g_on The other ends of all substrate resistors are connected to the ground, and are used to control the conduction of the transistors in the first series transistor component (1); in the second series transistor component (2), the other ends of all source-drain resistors are connected to the control terminal V d_off The other end of all gate resistors is connected to the control terminal V g_off The other ends of all substrate resistors are connected to the control terminal V d_off The other end of all gate resistors is connected to the control terminal V g_off The other ends of all substrate resistors are connected to the ground, and are used to control the conduction of the transistors in the third series transistor component (3); in the fourth series transistor component (4), the other ends of all source-drain resistors are connected to the control terminal V d_on The other end of all gate resistors is connected to the control terminal V g_on The other ends of all substrate resistors are grounded, and are used to control the conduction of transistors in a fourth series transistor assembly (4); The sources of all transistors in the first series transistor component (1) are connected to the sources of all transistors in the third series transistor component (3), and are all connected to the RF port OUTPUT1; the sources of all transistors in the second series transistor component (2) are connected to the sources of all transistors in the fourth series transistor component (4), and are all connected to the RF port OUTPUT2; the sources of all transistors in the first series transistor component (1) are connected to the sources of all transistors in the second series transistor component (2), and are all connected to the antenna port INPUT.
2. A single-pole double-throw switch used in a radio frequency transceiver system according to claim 1, characterized in that: The gate resistor and the source-drain resistor are both 100k ohms, and the substrate resistor is both 300k ohms.
3. A single-pole double-throw switch for use in a radio frequency transceiver system according to claim 1, characterized in that: A first DC blocking capacitor C1 is provided between the source electrodes of all transistors in the first series transistor assembly (1), the source electrodes of all transistors in the third series transistor assembly (3) and the radio frequency port OUTPUT1, and the capacitance value is 100 pF.
4. A single-pole double-throw switch for use in a radio frequency transceiver system according to claim 1, characterized in that: A second DC blocking capacitor C3 is provided between the source electrodes of all transistors in the first series transistor assembly (2), the source electrodes of all transistors in the third series transistor assembly (4) and the radio frequency port OUTPUT2, and the capacitance value is 100 pF.
5. The single-pole double-throw switch used in a radio frequency transceiver system according to claim 1, characterized in that: A fifth DC blocking capacitor C5 is provided between the sources of all transistors in the first series transistor assembly (1), the sources of all transistors in the second series transistor assembly (2) and the antenna port INPUT, and the capacitance value is 100 pF.
6. A single-pole double-throw switch for use in a radio frequency transceiver system according to claim 1, characterized in that: The circuit also includes a third DC blocking capacitor C4 and a fourth DC blocking capacitor C6, which are respectively connected in parallel to the control terminals VCLT1 and VCLT2 as bypass capacitors.
7. A single-pole double-throw switch for use in a radio frequency transceiver system according to claim 1, characterized in that: The antenna port INPUT is connected in parallel with a diode for electrostatic protection.
8. The single-pole double-throw switch used in a radio frequency transceiver system according to claim 1, characterized in that: The radio frequency port OUTPUT1 and the radio frequency port OUTPUT2 are both connected in parallel with electrostatic protection diodes.
9. The single-pole double-throw switch used in a radio frequency transceiver system according to claim 1, characterized in that: The control terminal V g_on and control terminal V g_off All diodes are connected in parallel for electrostatic protection.