Reference voltage generation over temperature range

Abstract

A circuit (100) may include a current generator coupled to a first voltage source (AVDD). The current generator (110) may be configured to generate a first current (IB2) and mirror the first current (IB2) into a second current (IBO) and a third current (IB1). The circuit (100) may include a proportional to absolute temperature ("PTAT") voltage generator (120) coupled to the current generator (110) and a second voltage source. The PTAT voltage generator (120) may be configured to receive the second current (IBO) from the current generator (110) and generate a third voltage (VPTAT) based on the second current (IBO). The circuit (100) may include a complementary to absolute temperature ("CTAT") voltage generator (130) coupled to the current generator (110) and the PTAT voltage generator (120). The CTAT voltage generator (130) may be configured to receive the first current (IB2) and the third current (IB1) from the current generator (110), and generate a reference voltage (VREF) based on the first current (IB2), the second current (IBO), and the third voltage (VPTAT).

Description

Background Art

[0001] A reference voltage (“VREF”) serves as an accurate analog measurement for comparison with an incoming analog signal (e.g., in an analog-to-digital converter (“ADC”)) or for generating an outgoing analog signal (e.g., in a digital-to-analog converter (“DAC”)). A device may use VREF as a reference value to determine whether an action can be performed. The use of complex circuitry configured to generate VREF may be limited by temperature changes in the circuitry and manufacturing process variations. These circuits may not be able to deliver a substantially constant voltage of VREF (e.g., within a predetermined tolerance) at relatively low temperatures (e.g., below -20 degrees Celsius) and / or at relatively high temperatures (e.g., above 150 degrees Celsius). Summary of the Invention

[0002] In one or more instances, a circuit includes a current generator coupled to a first voltage source. The current generator is configured to generate a first current and mirror the first current into a second current and a third current. The circuit includes a proportional-to-absolute-temperature (“PTAT”) voltage generator coupled to the current generator and a second voltage source. The PTAT voltage generator is configured to receive the second current from the current generator and generate a third voltage based on the second current. The circuit includes a complementary-to-absolute-temperature (“CTAT”) voltage generator coupled to the current generator and the PTAT voltage generator. The CTAT voltage generator is configured to receive the first current and the third current from the current generator and generate a reference voltage based on the first current, the second current, and the third voltage. Brief Description of the Drawings

[0003] Figure 1 is a circuit diagram showing a voltage reference circuit in one or more instances;

[0004] Figure 2 is a circuit diagram showing a voltage reference circuit including a trimming controller in one or more instances;

[0005] Figure 3 is a circuit diagram showing an example implementation of a trimming controller in one or more instances; and

[0006] Figure 4 is a block diagram showing a system including a voltage reference circuit in one or more instances. Detailed Description

[0007] In the drawings, like reference numerals are used for like or similar (by function and / or structure) features.

[0008] In one or more instances, a voltage reference circuit is configured to generate a substantially constant voltage of a reference voltage (“VREF”) (e.g., within + / - 10 parts per million (“ppm”) of a target voltage), which remains relatively constant over a wide temperature range (e.g., from -20 degrees Celsius to 150 degrees Celsius). In some instances, the reference voltage circuit generates VREF at a substantially constant value within a specific temperature range. The specific temperature range may be the range specified above or a range between a temperature of -55 degrees Celsius and a temperature of 180 degrees Celsius (including the end values). A trimming controller may be used to control the boundaries of the specific temperature range, the trimming controller being configured to adjust the voltage of VREF in the event of manufacturing process variations.

[0009] In the voltage reference circuit described herein, VREF is generated based on a complementary to absolute temperature (“CTAT”) voltage controlled by a current generator and a proportional to absolute temperature (“PTAT”) voltage generated by a voltage generator. The CTAT voltage is a voltage with a negative temperature coefficient generated using a transistor with a low threshold voltage (“LVth”) and a transistor with a standard threshold voltage (“SVth”), both transistors being biased by a bias current having the same value. The PTAT voltage is a voltage with a positive temperature coefficient generated using, for example, two transistors connected in series, where the gates of the two transistors are connected to the drain of the upper transistor, and the two transistors are also biased by the same bias current. The threshold voltage is the minimum gate-to-source voltage VGS(th) required to create a conduction path between the source and the drain in the transistor. By using appropriate transistor types, a difference between a larger threshold voltage and a smaller threshold voltage can be generated such that the difference has the same temperature coefficient as a single threshold voltage but with a smaller magnitude. The bias current is mirrored by a current generator and provided to the voltage generator and the CTAT voltage generator. Subsequently, the voltage generator generates the PTAT voltage, which is the reference ground for the CTAT voltage generator. To generate VREF, the CTAT voltage generator generates the CTAT voltage based on the bias current controlled by the current generator, and adds it to the PTAT to generate a substantially zero temperature coefficient (“TC”) voltage (e.g., to stabilize VREF). The zero TC voltage is generated based on the threshold voltage difference between two transistors biased by the bias current and the PTAT voltage between two other transistors with a positive TC (i.e., as the sum of the threshold voltage difference and the PTAT voltage). In some instances, the voltage reference circuit may include a trimming controller that adjusts VREF (up or down) by modifying the TC when the TCs do not add up to zero. Based on manufacturing process variations of all the transistors, the TC may be a value other than zero.

[0010] In some examples, a voltage reference circuit provides VREF as a reference value to a power-on reset (POR) stage or a startup stage of an electronic device. The electronic device can be, for example, a buck direct current (DC) / DC converter that uses VREF to determine the precise voltage available from a power source. The DC / DC converter can compare VREF with the precise voltage until the voltages are equal. After the voltages are equal, the DC / DC converter can be triggered to perform a voltage conversion operation using the power provided from the power source.

[0011] In one example, the DC / DC converter is an isolated voltage converter that can include a transformer as an isolation barrier. VREF defines the voltage from the power source at which the DC / DC converter can start providing power from a primary coil to a secondary coil. As described above, the voltage reference circuit maintains a substantially constant value of VREF within a specific temperature range. The voltage reference circuit can generate VREF while minimizing electromagnetic emissions caused by a switching network in the DC / DC converter. Such DC / DC converters and voltage reference circuits described herein can be used in a variety of applications, such as in a vehicle (e.g., an electric vehicle).

[0012] Figure 1 is a circuit diagram of a voltage reference circuit 100 in one or more examples. The voltage reference circuit 100 is configured to generate VREF that is relatively invariant with respect to temperature changes in the voltage reference circuit 100 within a specific temperature range (e.g., + / - 10 parts per million (“ppm”) from a target voltage). During normal operation, the temperature in the voltage reference circuit 100 can change. The specific temperature range can be between -55 degrees Celsius and 180 degrees Celsius, inclusive.

[0013] In some examples, the voltage reference circuit 100 includes a current generator 110, a voltage generator 120 proportional to absolute temperature (“PTAT”), and a voltage generator 130 complementary to absolute temperature (“CTAT”). The voltage reference circuit 100 receives at least two voltages from two corresponding voltage sources and generates VREF as an output. A first voltage source provides a voltage AVDD to the voltage reference circuit 100 through the current generator 110. A second voltage source provides a voltage AVSS to the voltage reference circuit 100 through the PTAT voltage generator 120. AVDD is a reference voltage with respect to AVSS.

[0014] The current generator 110 includes three transistors Q0 - Q2 coupled to the voltage AVDD. The transistor Q2 can generate a bias current IB2 based on a reference voltage of the voltage AVDD. The transistors Q0 and Q1 are configured to mirror the bias current IB2 into a bias current IB0 and a bias current IB1. In some examples, the three transistors Q0 - Q2 are p-channel field-effect transistors (“PFETs”), where their respective sources (e.g., one of their current terminals) are coupled to each other and to the voltage AVDD. The respective gates (e.g., control terminals) of the three transistors Q0 - Q2 are coupled to each other. The drain of the transistor Q0 is coupled to the PTAT voltage generator 120. The drains of the transistor Q1 and the transistor Q2 are coupled to the CTAT voltage generator 130. The bias current IB2 is generated by a positive gate voltage VGP when the transistor Q2 is biased.

[0015] The PTAT voltage generator 120 can include two transistors Q6 and Q7. The transistors Q6 and Q7 are n-channel field-effect transistors (“NFETs”), where their respective gates are coupled to each other and to the current generator 110. As described above, the PTAT voltage generator 120 receives the bias current IB0 from the transistor Q0. The drain and the gate of the transistor Q6 are coupled to each other and to the drain of the transistor Q0 in the current generator 110. The source of the transistor Q6 is coupled to the drain of the transistor Q7. The gate of the transistor Q7 is coupled to the drain and the gate of the transistor Q6 and to the drain of the transistor Q0 in the current generator 110. At this coupling and when the transistors Q6 and Q7 are biased in weak inversion, the PTAT voltage generator 120 generates a PTAT voltage (e.g., the voltage PTAT (“VPTAT”)).

[0016] In this example, the CTAT voltage generator 130 includes three transistors Q3 - Q5 and a resistor R0. The three transistors Q3 - Q5 are NFETs configured to generate VREF. Transistor Q3 is a low threshold voltage (“LVth”) transistor. Transistors Q4 and Q5 are standard threshold voltage (“SVth”) transistors. The threshold voltage of the SVth transistors is higher than that of the LVth transistor. As described above, the threshold voltage is the minimum gate - to - source voltage VGS(th) used to create a conduction path between the source and the source in a transistor. The drain of transistor Q3 is coupled to the drain of transistor Q2 in the current generator 110. The gate of transistor Q3 is coupled to the drain of transistor Q1 in the current generator 110. The source of transistor Q3 is coupled to the drain of transistor Q5. The drain and gate of transistor Q4 are coupled to the drain of transistor Q1 in the current generator 110 and the gate of transistor Q3. The source of transistor Q4 is coupled to the source of transistor Q6 and the drain of transistor Q7 in the PTAT voltage generator 120. The gate of transistor Q5 is coupled to the drain and gate of transistor Q4 and the gate of transistor Q3. The source of transistor Q5 is coupled to a terminal of resistor R0. The other terminal of resistor R0 is coupled to the source of transistor Q6 and the drain of transistor Q7 in the voltage generator 120 and the source of transistor Q4.

[0017] In some instances, the CTAT voltage generator 130 generates VREF by combining the CTAT2 voltage and the CTAT1 voltage (e.g., the voltage CTAT(“VCTAT”)), where the CTAT2 voltage and the CTAT1 voltage are generated using the current received by the current generator 110 and the PTAT voltage generated by the PTAT voltage generator 120. The CTAT voltage is a voltage with a negative temperature coefficient generated using a transistor Q4 with SVth and a transistor Q3 with LVth, both of which are biased by a bias current IB2. The PTAT voltage is a voltage with a positive temperature coefficient generated using a transistor Q5 with SVth, which is also biased by the bias current IB2. The bias current IB1 is mirrored by a transistor Q1 from a transistor Q2 in the current generator 110 and is provided to the PTAT voltage generator 120 and the CTAT voltage generator 130. Subsequently, the PTAT voltage generator 120 generates a PTAT voltage, which serves as the reference ground for the CTAT voltage generator 130. To generate VREF, the CTAT voltage generator 130 generates a CTAT voltage based on the bias current controlled by the current generator 110 and combines the difference in the gate-to-source voltages VGS(Q4)-VGS(Q5) as the CTAT voltage and the PTAT voltage at the coupling of the sources of the transistor Q6 and the transistor Q7. At this coupling in the circuit, the temperature coefficient (“TC”) is approximately zero, such that VREF is a relatively constant voltage (e.g., a stable VREF). The approximately zero TC is generated by combining the negative TC of the CTAT provided by the source of the transistor Q3 and the positive TC of the PTAT provided by the drain of the transistor Q5. The combination of different TCs occurs when the threshold voltage of the transistor Q3 is less than the threshold voltage of the transistor Q4.

[0018] In the voltage reference circuit 100, the drain currents of the transistors Q3 and Q5 are determined by where I 0 is the characteristic current, is the ratio of the channel length (L) to the width (W), V GS is the gate-to-source voltage, V th is the threshold voltage, V DS is the drain-to-source voltage, and V T is the thermal voltage of the transistor Q3. The parameter n is the weak inversion slope factor determined by where C D is the depletion capacitance. Ignoring the V DS dependency, where V DS >V T the drain current of the transistor Q3 is determined by Using the factor (For example, also known as the transconductance coefficient β) As the drain current limit for weak inversion, the drain current of transistor Q3 is given by or I D ≤βV T 2 defined.

[0019] The voltage across resistor R0 can be derived as V R0 = V GS4 - V GS5 . The gate-to-source voltage can be expressed as Assuming transistors Q4 and Q5 are substantially the same but have different widths, and there is no body effect, and the drain currents are equal, then it follows that The current through resistor R0, transistor Q3, and transistor Q4 is equal to Based on this current and assuming I B = IB1 = IB2 = IB3, VREF is defined as V REF = V PTAT + V GS4 - V GS3 , which can be simplified to or Assuming the subthreshold slopes of transistors Q3 and Q4 are approximately equal to n, VREF is finally defined as The foregoing equation for VREF shows that VREF depends only on transistor properties and aspect ratios, while remaining independent of the resistance of resistor R0.

[0020] Figure 2 is a circuit diagram of the voltage reference circuit 200 in one or more instances. The voltage reference circuit 200 is configured to generate VREF, which is relatively invariant with respect to temperature changes in the voltage reference circuit 200 within a specific temperature range. "Relatively invariant" means the value of VREF that is within + / - 10 ppm of the target voltage when the voltage reference circuit 200 is within a specific temperature range. In some instances, the voltage reference circuit 200 includes all of the functionality and electronic components described for the reference voltage reference circuit 100. In Figure 2 the instance of Figure 2The voltage reference circuit 200 includes a current generator 110, and the current generator includes transistors Q0-Q3 coupled together as described above. The PTAT voltage generator 120 also includes transistors Q6 and Q7 coupled together. The drains of transistors Q0 and Q6 are coupled together. The CTAT voltage generator 130 includes transistors Q3-Q5 coupled together. The drain of transistor Q1 is coupled to the drain of transistor Q4. The drain of transistor Q2 is coupled to the drain of transistor Q3. The sources of transistors Q4 and Q5 are coupled to each other and to the source of transistor Q6 and the drain of transistor Q7.

[0021] In Figure 2 it, the voltage reference circuit 200 includes a trimming controller 210, and the trimming controller includes at least two terminals respectively coupled to the source of transistor Q3 and the drain of transistor Q5. In addition, the trimming controller 210 is configured to generate an adjusted version of VREF as an output. The adjusted version of VREF includes an adjusted TC. When the combination of the positive TC from transistor Q5 and the negative TC from transistor Q3 is not equal to zero, the trimming controller 210 adjusts VREF (up or down) by modifying the TC. Based on the manufacturing process variations of all transistors, the TC can be a value other than zero. This version of VREF is the same as the reference Figure 1 described, with the additional adjustment as described above. Since the voltage of VREF depends only on the properties of transistors Q3 and Q4 in the CTAT voltage generator 130, the equation VREF remains the same, where VREF is ultimately defined as

[0022] Figure 3 FIG. shows an example implementation of the trimming controller 210 in one or more instances. In this instance, the trimming controller 210 includes at least two programmable resistors PR0 and PR1. Each of these resistors can be coupled to each other at the corresponding terminals where the value of VREF can be obtained. The other terminals of resistors RP0 and RP1 can be coupled to the source of transistor Q3 and the drain of transistor Q5 respectively. The two programmable resistors RP0 and RP1 can be two variable resistors configured to reduce the combination of TC to zero based on a specific configuration. The two programmable resistors RP0 and RP1 can include predefined values selected based on a specific trimming application. The programmable resistors RP0 and RP1 can be two sets of resistors configured to be programmed using programmable switches. The values of the programmable switches can be programmed digitally to assign a specific resistance to each of the programmable resistors RP0 and RP1. The resistance values of the two programmable resistors RP0 and RP1 can be set when the voltage reference circuit 100 is in the off state (e.g., when AVDD and AVSS are equal to zero).

[0023] Figure 4 System 400 for an electronic device in one or more instances is shown. System 400 includes a voltage reference circuit 100 coupled to a voltage converter 410. The voltage reference circuit 100 provides VREF as an input to the voltage converter 410. The voltage converter 410 may be configured to provide an output voltage VOUT based on an input voltage VIN and VREF. In Figure 4 an instance, the voltage reference circuit 100 provides VREF as a reference value to a power-on reset (POR) stage or a startup stage of the system 400. In the system 400, the voltage converter 410 uses VREF to determine whether an exact voltage from a power source is available. The voltage converter 410 may compare VREF with the exact voltage until the voltages are equal. After the voltages are equal, the voltage converter 410 may be triggered to perform a voltage conversion operation using the power provided from the power source. Instead of the voltage reference circuit 100, the system 400 may include a voltage reference circuit 200, which includes a reference Figure 2 and 3 the trimming controller 210 described.

[0024] The voltage converter 410 may be a DC / DC converter configured as an isolated voltage converter. As described above, VREF may define the voltage from the power source at which the voltage converter 410 begins to provide power from a primary coil to a secondary coil. As described above, the voltage reference circuit 100 maintains a substantially constant value of VREF within a specific temperature range.

[0025] In this specification, unless otherwise stated, “about”, “substantially” or “essentially” before a parameter means within + / - 10% of the parameter.

[0026] In this specification, the term “coupled” may cover a connection, communication or signal path that enables a functional relationship consistent with this specification. For example, if device A generates a signal to control device B to perform an action, then: (a) in a first instance, device A is coupled to device B by a direct connection; or (b) in a second instance, device A is coupled to device B through an intermediate component C, provided that the intermediate component C does not change the functional relationship between device A and device B, such that device B is controlled by device A through the control signal generated by device A.

[0027] A device “configured to” perform a task or function may be configured (e.g., programmed and / or hardwired) to perform the function at the time of manufacture by the manufacturer and / or may be configured (or reconfigured) by the user after manufacture to perform the function and / or other additional or alternative functions. The configuration may be performed through firmware and / or software programming of the device, through the construction and / or layout of the hardware components and interconnections of the device, or a combination thereof.

[0028] As used herein, the terms "terminal," "node," "interconnect," "pin," and "lead" are used interchangeably. Unless specifically stated to the contrary, these terms generally denote the interconnection between device elements, circuit elements, integrated circuits, devices, or other electronic devices or semiconductor components, or their extremities.

[0029] A circuit or device described herein as including certain components may actually be adapted to be coupled to those components to form the described circuitry or device. For example, a structure described as including one or more semiconductor elements (e.g., transistors), one or more passive elements (e.g., resistors, capacitors, and / or inductors), and / or one or more sources (e.g., voltage sources and / or current sources) may alternatively include only semiconductor elements within a single physical device (e.g., a semiconductor die and / or an integrated circuit ("IC") package), and may be adapted to be coupled to at least some of the passive elements and / or sources to form the described structure during manufacture or after the time of manufacture, e.g., by an end user and / or a third party.

[0030] Although the use of specific transistors is described herein, other transistors (or equivalent devices) may alternatively be used. For example, a p-channel field effect transistor ("PFET") may be used in place of an n-channel field effect transistor (NFET) with little or no change to the circuit. Additionally, other types of transistors (e.g., bipolar junction transistors ("BJTs")) may be used.

[0031] A transistor includes three terminals, namely a control terminal and a pair of current terminals. In the case of a field effect transistor, the control terminal is the gate, and the current terminals are the drain and the source. In the case of a bipolar junction transistor, the control terminal is the base, and the current terminals are the emitter and the collector.

[0032] The circuits described herein may be reconfigured to include additional or different components to provide functionality that is at least partially similar to the functionality available prior to the component replacement. Unless otherwise stated, a component shown as a resistor generally represents any one or more elements coupled in series and / or in parallel to provide the amount of impedance represented by the shown resistor. For example, a resistor or capacitor shown and described herein as a single component may actually be multiple resistors or capacitors coupled in parallel between the same nodes. For example, a resistor or capacitor shown and described herein as a single component may actually be multiple resistors or capacitors coupled in series between the same two nodes as the single resistor or capacitor.

[0033] Within the scope of the claims, modifications may be made in the described examples, and other examples are possible.

Claims

1. A circuit, which comprises: a current generator, coupled to a first voltage source and configured to: generate a first current, and mirror the first current into a second current and a third current; a voltage generator proportional to absolute temperature ("PTAT"), coupled to the current generator and a second voltage source, the PTAT voltage generator being configured to: receive the second current from the current generator, and generate a third voltage based on the second current; and a voltage generator complementary to absolute temperature ("CTAT"), coupled to the current generator and the PTAT voltage generator, the CTAT voltage generator being configured to: receive the first current and the third current from the current generator, and generate a reference voltage based on the first current, the second current, and the third voltage.

2. The circuit according to claim 1, wherein: the current generator includes a first field effect transistor (FET), a second FET, and a third FET, the first FET having a first gate, a first source, and a first drain, the second FET having a second gate, a second source, and a second drain, and the third FET having a third gate, a third source, and a third drain; the first FET is configured to generate the first current; the second FET and the third FET are configured to mirror the first current into the second current and the third current respectively; the first source, the second source, and the third source are coupled together and coupled to the first voltage source; the first gate, the second gate, and the third gate are connected to each other and connected to the first drain; the second drain is connected to the FET in the PTAT voltage generator; and the first drain and the third drain are connected to the transistor in the CTAT voltage generator.

3. The circuit according to claim 1, wherein: the PTAT voltage generator includes a first field effect transistor (FET) and a second FET; the first FET includes: a first drain, coupled to the FET in the current generator, a first gate, coupled to the first drain, and a first source, coupled to the FET in the CTAT voltage generator; the second FET includes: a second drain, coupled to the first source and the FET in the CTAT voltage generator, a second gate, coupled to the first drain, the first gate, and the FET in the current generator, and a second source, coupled to the second voltage source; and the third voltage is a voltage proportional to absolute temperature ("VPTAT").

4. The circuit according to claim 1, wherein: the CTAT voltage generator includes a first field effect transistor (FET), a second FET, a third FET, and a resistor; the first FET includes: a first drain, coupled to the FET in the current generator, a first gate, coupled to the first drain and another FET in the current generator, and to the first source of the second FET; The second FET includes: A second drain coupled to the first gate and the FET in the current generator, A second gate coupled to the second drain, the first gate, and the other FET in the current generator, and A second source coupled to the FET in the PTAT voltage generator; The third FET includes: A third drain coupled to the first drain, A third gate coupled to the first gate, the second drain, the second gate, and the other FET in the current generator, and A third source coupled to the first resistor terminal of the resistor; The resistor includes the first resistor terminal and a second resistor terminal, the first resistor terminal being coupled to the third source, and the second resistor terminal being coupled to the second source and the FET in the PTAT voltage generator; And The reference voltage is the voltage at the third drain.

5. The circuit according to claim 4, wherein: The third FET includes a first threshold voltage, and the first FET includes a second threshold voltage, the first threshold voltage being higher than the second threshold voltage.

6. The circuit according to claim 4, wherein: The circuit is configured to maintain the reference voltage within + / - 10 parts per million ("ppm") of a target voltage when the circuit operates in a temperature range from -55 degrees Celsius to 180 degrees Celsius and including the end values.

7. The circuit according to claim 1, wherein: The CTAT voltage generator includes a first field effect transistor (FET), a second FET, a third FET, a resistor, and a trimming controller; The first FET includes: A first drain coupled to the FET in the current generator, A first gate coupled to the first drain and the other FET in the current generator, and A first source coupled to the trimming controller via a first trimming terminal; The second FET includes: A second drain coupled to the first gate and the FET in the current generator, A second gate coupled to the second drain, the first gate, and the other FET in the current generator, and A second source coupled to the FET in the PTAT voltage generator; The third FET includes: A third drain coupled to the second trimming terminal of the trimming controller, A third gate coupled to the first gate, the second drain, the second gate, and the other FET in the current generator, and A third source coupled to the first resistor terminal of the resistor; The resistor includes a first resistor terminal and a second resistor terminal, the first resistor terminal being coupled to the third source, and the second resistor terminal being coupled to the second source and the FET in the PTAT voltage generator; The trimming controller includes the first trimming terminal, the second trimming terminal, and a third terminal. The first trimming terminal is coupled to the first source, the second trimming terminal is coupled to the third drain, the third terminal is configured to output the reference voltage, and the trimming controller is configured to adjust the reference voltage; And The circuit is configured to maintain the reference voltage within + / - 10 parts per million ("ppm") of a target voltage when the circuit is within a temperature range.

8. A circuit, which Comprises: A first transistor, which includes: A first current terminal coupled to a first voltage source, A first control terminal, and A second current terminal coupled to the first control terminal; A second transistor, which includes: A third current terminal coupled to the second current terminal, A second control terminal, and A fourth current terminal; And A third transistor, which includes: A fifth current terminal coupled to the fourth current terminal, A third control terminal coupled to the second control terminal, and A sixth current terminal, Wherein the voltage at the fifth current terminal is the reference voltage, and the circuit is configured to maintain the reference voltage within + / - 10 parts per million ("ppm") of a target voltage when the circuit is within a temperature range.

9. The circuit according to claim 8, Wherein: The voltage at the second control terminal is a voltage complementary to absolute temperature ("VCTAT").

10. The circuit according to claim 9, which further Comprises: A fourth transistor, which includes: A seventh current terminal coupled to the first voltage source, A fourth control terminal coupled to the first control terminal, and An eighth current terminal; A fifth transistor, which includes: A ninth current terminal coupled to the first voltage source, A fifth control terminal coupled to the first control terminal and the fourth control terminal, and A tenth current terminal, Wherein the first transistor is configured to generate a first current, and Wherein the fourth transistor and the fifth transistor are configured to mirror the first current into a second current and a third current, respectively.

11. The circuit according to claim 10, Wherein: A sixth transistor, which includes: An eleventh current terminal coupled to the eighth current terminal, A sixth control terminal coupled to the eleventh current terminal and the eighth current terminal, and A twelfth current terminal; And A seventh transistor, which includes: A thirteenth current terminal coupled to the twelfth current terminal, A seventh control terminal coupled to the sixth control, the eleventh current terminal, and the eighth current terminal, and A fourteenth current terminal coupled to a second voltage source, The voltage at the thirteenth current terminal is a voltage proportional to absolute temperature ("VPTAT").

12. The circuit according to claim 11, Wherein: The reference voltage has a temperature coefficient that is substantially zero within a specific temperature range.

13. The circuit according to claim 11, Wherein: An eighth transistor, which includes: A fifteenth current terminal coupled to the second control terminal, the third control terminal, and the tenth current terminal, an eighth control terminal coupled to the fifteenth current, the second control terminal, the third control terminal, and the tenth current terminal, and a sixteenth current terminal coupled to the twelfth current terminal and the thirteenth current terminal; and a resistor comprising: a first resistor terminal coupled to the fourth current terminal, and a second resistor terminal coupled to the sixteenth current terminal, the twelfth current terminal, and the thirteenth current terminal.

14. The circuit according to claim 13, wherein: the second transistor includes a first threshold voltage, and the third transistor includes a second threshold voltage, the first threshold voltage being higher than the second threshold voltage.

15. A circuit that comprises: a first transistor that includes a first current terminal configured to receive a first current, a first control terminal that includes a voltage complementary to absolute temperature having a first temperature coefficient ("VCTAT"), and a second current terminal; a second transistor that includes a third current terminal coupled to the second current terminal, a second control terminal coupled to the first control terminal, and a fourth current terminal; and a resistor that includes a first resistor terminal coupled to the fourth current terminal, and a second resistor terminal that includes a voltage proportional to absolute temperature having a second temperature coefficient ("VPTAT"), wherein the voltage at the third current terminal is a reference voltage, and the circuit is configured to maintain the reference voltage within + / - 10 parts per million ("ppm") of a target voltage when the circuit operates within a specific temperature range.

16. The circuit according to claim 15, wherein: the first transistor includes a first threshold voltage, and the second transistor includes a second threshold voltage, the first threshold voltage being higher than the second threshold voltage.

17. The circuit according to claim 15, wherein: the reference voltage has a temperature coefficient that is substantially zero within the specific temperature range, and the temperature coefficient is substantially zero based on a combination of the first temperature coefficient and the second temperature coefficient.

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