Charging and discharging circuit and electronic equipment

Abstract

The invention provides a charging and discharging circuit and electronic equipment, relates to the technical field of electronics, and is used for improving the utilization rate of a switched capacitor circuit and reducing the area of the charging and discharging circuit. The charging and discharging circuit provided by the invention comprises a switched capacitor SC circuit used for charging and discharging a battery, and the switched capacitor SC circuit comprises a first end used for receiving an input power supply voltage; the second end is used for providing charging voltage for the battery in the charging process and receiving discharging voltage released by the battery in the discharging process; the third end is used for providing output voltage, and the output voltage is direct-current voltage or pulse width modulation (PWM) voltage.

Description

Charging and discharging circuit and electronic equipment

[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office on October 24, 2022, with application number 202211308046.0 and application name “A Charging and Discharging Circuit and Electronic Device”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of electronic technology, and in particular to a charging and discharging circuit and an electronic device. Background Art

[0003] Currently, consumer electronic devices such as laptops, tablets, mobile phones, car-mounted devices and wearable devices use silicon materials as the negative electrode of the battery in the electronic devices (referred to as silicon negative electrode battery). Compared with traditional graphite batteries, silicon negative electrode batteries have larger battery capacity and longer battery life. During the charging stage, the electronic device needs to obtain energy from an external power source to charge the silicon negative electrode battery and provide energy to the load at the same time; during the discharging stage, the silicon negative electrode battery of the electronic device needs to discharge to provide energy to the load. For example, the energy released in the low-voltage area of ​​the silicon negative electrode battery (voltage less than 3.2 volts (V)) can be boosted to provide energy to the load to meet the power supply requirements of the load. Therefore, a charging and discharging circuit is needed to maintain the operation of the electronic device.

[0004] FIG1 is a schematic diagram of the structure of a charge-discharge circuit provided by the prior art. The charge-discharge circuit includes a charging circuit 10 and a discharging circuit 20. The input terminal of the charging circuit 10 is connected to an external power supply via a power line (VBUS), serving as the input terminal of the charge-discharge circuit. The output terminal of the charging circuit 10 is connected to a first input terminal of the discharging circuit 20. The input and output terminals of the charging circuit 10, the second input terminal of the discharging circuit 20, and a battery are coupled to a first node P1. The multiple output terminals of the discharging circuit 20 serve as the multiple output terminals of the charge-discharge circuit and are respectively connected to a load. Specifically, during the charging process of the charge and discharge circuit, the input voltage V1 provided by the external power supply is converted into the output voltage VO through the charging circuit 10, and the output voltage VO is used to charge the battery. For example, the charging circuit 10 may include a switched capacitor (SC) circuit 101, a buck charge (BC) circuit 102 and a charge and discharge transistor M0. In a scenario where fast charging is required, the input voltage V1 provided by the external power supply is converted into the output voltage VO through the SC circuit 101, and the output voltage VO is used to charge the battery; in a normal charging scenario, the input voltage V1 provided by the external power supply is converted into the output voltage VO through the BC circuit 102 and M0, and the output voltage VO is used to charge the battery. During the discharge process of the charge and discharge circuit, the energy released by the battery is used to power the load through the discharge circuit 20. For example, the discharge circuit 20 may include a low-voltage boost circuit 201, multiple high-voltage power supply circuits 202 and multiple low-voltage power supply circuits 203. If the energy released by the battery is energy in the high-voltage area (that is, the voltage released by the battery is greater than or equal to 3.2V), the energy released by the battery is respectively used to power the load through M0, multiple high-voltage power supply circuits 202 and multiple low-voltage power supply circuits 203; if the energy released by the battery is energy in the low-voltage area (that is, the voltage released by the battery is less than 3.2V), the energy released by the battery is respectively used to power the corresponding load through the low-voltage boost circuit 201, multiple high-voltage power supply circuits 202 and multiple low-voltage power supply circuits 203. Among them, the multiple high-voltage power supply circuits 202 may include: a duck boost (DB) power supply circuit, a flash boost (FB) power supply circuit, a display power supply circuit, a speaker power supply circuit, a linear motor power supply circuit and a 5V boost power supply circuit, etc., and the multiple low-voltage power supply circuits 203 may include: a power management unit (PMU) power supply circuit, a processor core buck (CB) power supply circuit and other buck power supply circuits, etc.

[0005] However, the SC circuit is only used in fast charging scenarios and has a low utilization rate. On the other hand, in order to fully utilize the energy in the low-voltage area of ​​the silicon negative electrode battery, an additional low-voltage boost circuit is required to boost the low voltage released by the battery, which increases the area of ​​the charging and discharging circuit.

[0006] Summary of the Invention

[0007] The present application provides a charging and discharging circuit and an electronic device for improving the utilization rate of a switching capacitor circuit and reducing the area of ​​the charging and discharging circuit.

[0008] To achieve the above objectives, the embodiments of the present application adopt the following technical solutions:

[0009] In a first aspect, a charge and discharge circuit is provided, which includes: a switched capacitor (SC) circuit for charging and discharging a battery, the switched capacitor (SC) circuit including: a first end for receiving an input power supply voltage; a second end for providing a charging voltage to the battery during a charging process, and for receiving a discharge voltage released by the battery during a discharging process; and a third end for providing an output voltage, wherein the output voltage is a DC voltage or a pulse width modulated (PWM) voltage.

[0010] In the above technical solution, when the battery is quickly charged, the input power supply voltage can be converted into a charging voltage through the switching capacitor SC circuit in the charge and discharge circuit to charge the battery. When the battery is discharged, the discharge voltage released by the battery can be converted into a load voltage through the switching capacitor SC circuit. The load voltage can be used to power the load. For example, when the battery releases energy in the low-voltage area, the energy in the low-voltage area is boosted and converted into a load voltage through the switching capacitor SC circuit. In this process, the battery can be charged and discharged through the switching capacitor SC circuit, thereby improving the utilization rate of the switching capacitor SC circuit. On the other hand, compared with the charge and discharge circuit shown in Figure 1, the area of ​​the charge and discharge circuit is reduced.

[0011] In a possible implementation of the first aspect, the output voltage is the pulse-width modulated (PWM) voltage, and the charge-discharge circuit further includes: a DC conversion circuit, wherein the input end of the DC conversion circuit is coupled to the third end, and the output end of the DC conversion circuit is coupled to a load; the DC conversion circuit is configured to convert the pulse-width modulated (PWM) voltage into a DC voltage, which is used to power the load. In this possible implementation, the DC conversion circuit converts the pulse-width modulated (PWM) voltage into a DC voltage, which is used to power the load, thereby meeting the load's power supply requirements and thus completing power supply to the load.

[0012] In a possible implementation of the first aspect, the DC conversion circuit includes: a DC conversion device and a first capacitor; wherein one end of the DC conversion device is coupled to the input end of the DC conversion circuit, the other end of the DC conversion device and one end of the first capacitor are respectively coupled to the output end of the DC conversion circuit, the other end of the DC conversion device and one end of the first capacitor are grounded, and the DC conversion device is a first inductor or a first transistor. In this possible implementation, the pulse-width modulated (PWM) voltage is converted into a DC voltage by the DC conversion device and the first capacitor. The DC voltage can be used to power a load, thereby meeting the power supply requirements of the load and thus completing the power supply to the load.

[0013] In one possible implementation of the first aspect, the charge-discharge circuit further includes: a step-down Buck circuit, wherein the input of the step-down Buck circuit is coupled to the third terminal, and the output of the step-down Buck circuit is coupled to a load; during the charging process, or during the discharging process and when the discharge voltage is less than a first voltage threshold, the step-down Buck circuit is configured to convert the output voltage into a load voltage, and the load voltage is used to power the load. In the above possible implementation, a simple step-down Buck circuit can step down the output voltage provided by the third terminal to a load voltage, and perform low-voltage normal charging on the battery, thereby meeting the charging requirements of different batteries and improving the utilization rate of the charge-discharge circuit.

[0014] In a possible implementation of the first aspect, the buck circuit includes: a second transistor, a third transistor, a second inductor, and a second capacitor, one end of the second transistor being coupled to the input end of the buck circuit, the other end of the second transistor, one end of the third transistor, and one end of the second inductor being coupled to a first node, the other end of the second inductor and one end of the second capacitor being coupled to the output end of the buck circuit, the other end of the third transistor and the other end of the second capacitor being grounded, and the control end of the second transistor and the control end of the third transistor being respectively used to receive a first control signal and a second control signal. In the above possible implementation, during operation of the buck circuit, the second transistor, the third transistor, and the second inductor output a load voltage based on the output voltage, thereby supplying power to the load.

[0015] In one possible implementation of the first aspect, the first control signal is used to turn on the second transistor and the second control signal is used to turn off the third transistor, or the first control signal is used to turn off the second transistor and the second control signal is used to turn on the third transistor. In these possible implementations, during operation of the buck circuit, the second transistor, the third transistor, and the second inductor output a load voltage based on the output voltage, thereby powering the load.

[0016] In a possible implementation of the first aspect, the charge and discharge circuit further includes: a charge and discharge transistor, one end of the charge and discharge transistor being coupled to the output end of the buck circuit, the other end of the charge and discharge transistor being coupled to the second end, and the control end of the charge and discharge transistor being used to receive a charge and discharge control signal; during the discharge process, when the discharge voltage is less than the first voltage threshold, the charge and discharge control signal is used to disconnect the charge and discharge transistor; during the discharge process, when the discharge voltage is greater than or equal to the second voltage threshold, the charge and discharge control signal is used to turn on the charge and discharge transistor, and the charge and discharge transistor is used to convert the discharge voltage into the load voltage, and the second voltage threshold is greater than or equal to the first voltage threshold; during the charging process, when the input power supply voltage is less than or equal to the third voltage threshold, the charge and discharge control signal is used to turn on the charge and discharge transistor, and the charge and discharge transistor is used to convert the load voltage into the charging voltage, and the charging voltage is used to charge the battery. In the above possible implementation methods, during the charging process, when the input power supply voltage is less than or equal to the third voltage threshold, the charge and discharge transistor can output the charging voltage according to the load voltage. During the charging process, when the input power supply voltage is greater than the fourth voltage threshold, the charge and discharge transistor is used to convert the discharge voltage into the load voltage. During the discharging process, when the discharge voltage is greater than or equal to the second voltage threshold, the charge and discharge transistor can also output the load voltage according to the discharge voltage. The energy loss during charging and discharging through the charge and discharge transistor is minimized, thereby improving the charging and discharging efficiency of the charge and discharge circuit.

[0017] In a possible implementation of the first aspect, during the charging process, when the input power supply voltage is less than or equal to a third voltage threshold, the switched capacitor SC circuit is configured to convert the input power supply voltage into the output voltage; during the charging process, when the input power supply voltage is greater than a fourth voltage threshold, the switched capacitor SC circuit is further configured to convert the input power supply voltage into the charging voltage, where the fourth voltage threshold is greater than or equal to the third voltage threshold; and during the discharging process, when the discharge voltage is less than the first voltage threshold, the switched capacitor SC circuit is further configured to convert the discharge voltage into the output voltage. In the above possible implementation, charging and discharging the battery are performed according to the switched capacitor SC circuit, thereby improving the utilization rate of the switched capacitor SC circuit.

[0018] In a possible implementation of the first aspect, the switched capacitor (SC) circuit includes: a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor, a third capacitor, a fourth capacitor, and a fifth capacitor; wherein the fourth transistor, the third capacitor, the seventh transistor, and the fourth capacitor are coupled in series between a first terminal of the switched capacitor (SC) circuit and ground, the fourth transistor and the third capacitor are coupled to a second node, the third capacitor and the seventh transistor are coupled to a third node, the seventh transistor and the fourth capacitor are coupled to a fourth node, the sixth transistor is coupled between the third node and ground, the fifth transistor, the fifth capacitor, and the ninth transistor are coupled in series between the second node and ground, the fifth transistor and the fifth capacitor are coupled to a fifth node, the fifth capacitor and the ninth transistor are coupled to a sixth node, the tenth transistor is coupled between the sixth node and the second terminal, the eighth transistor and the eleventh transistor are coupled in series between the fourth node and the second terminal, the eighth transistor and the eleventh transistor are coupled to the fifth node, and the third terminal is coupled to the fourth node. In the above possible implementation manner, charging and discharging of the battery are performed according to the switched capacitor SC circuit, thereby improving the utilization rate of the switched capacitor SC circuit.

[0019] In a possible implementation of the first aspect, during the discharge process, when the discharge voltage is less than a first voltage threshold, the control terminal of the fourth transistor, the control terminal of the fifth transistor, the control terminal of the sixth transistor, and the control terminal of the seventh transistor are respectively used to receive a third control signal, the control terminal of the eighth transistor and the control terminal of the tenth transistor are respectively used to receive a fourth control signal, and the control terminals of the ninth transistor and the eleventh transistor are respectively used to receive a fifth control signal, the third control signal is used to disconnect the fourth transistor, the fifth transistor, the sixth transistor, and the seventh transistor, the fourth control signal is used to turn on the eighth transistor and the tenth transistor, and the fifth control signal is used to disconnect the ninth transistor and the eleventh transistor; or, the third control signal is used to disconnect the fourth transistor, the fifth transistor, the sixth transistor, and the seventh transistor, the fourth control signal is used to disconnect the eighth transistor and the tenth transistor, and the fifth control signal is used to turn on the ninth transistor and the eleventh transistor. In the above possible implementation, the battery is discharged according to the switched capacitor SC circuit, thereby improving the utilization rate of the switched capacitor SC circuit.

[0020] In a possible implementation of the first aspect, during the charging process, when the input power supply voltage is less than or equal to a third voltage threshold, the control end of the fourth transistor, the control end of the fifth transistor, and the control end of the eighth transistor are respectively used to receive a sixth control signal, and the control end of the sixth transistor, the control end of the seventh transistor, the control end of the ninth transistor, the control end of the tenth transistor, and the control end of the eleventh transistor are respectively used to receive a seventh control signal, the sixth control signal is used to turn on the fourth transistor, the fifth transistor, and the eighth transistor, and the seventh control signal is used to turn off the sixth transistor, the seventh transistor, the ninth transistor, the tenth transistor, and the eleventh transistor. In the above possible implementation, normal charging of the battery is performed according to the switched capacitor (SC) circuit to meet the charging requirements of different batteries.

[0021] In a possible implementation of the first aspect, the switched capacitor SC circuit includes: a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor, a twelfth transistor, a thirteenth transistor, a third capacitor, a fourth capacitor, and a fifth capacitor; wherein the fourth transistor, the third capacitor, the seventh transistor, the fourth capacitor, and the thirteenth transistor are coupled in series between the first end and the second end of the switched capacitor SC circuit, the fourth transistor and the third capacitor are coupled at a second node, the third capacitor and the seventh transistor are coupled at a third node, and the seventh transistor and the fourth capacitor are coupled at a third node. At the fourth node, the fourth capacitor and the thirteenth transistor are coupled to the fifth node, the sixth transistor is coupled between ground and the third node, the twelfth transistor is coupled between ground and the fifth node, the fifth transistor, the fifth capacitor, and the ninth transistor are coupled in series between the second node and the second end, the fifth transistor and the fifth capacitor are coupled to the sixth node, the fifth capacitor and the ninth transistor are coupled to the seventh node, the eighth transistor is coupled between the sixth node and the second end, the tenth transistor is coupled between the seventh node and the second end, the eleventh transistor is coupled between the fourth node and the second end, and the third end is coupled to the second node. In the above possible implementation, charging and discharging the battery is performed according to the switched capacitor SC circuit, thereby improving the utilization rate of the switched capacitor SC circuit.

[0022] In a possible implementation of the first aspect, during the discharge process, and when the discharge voltage is less than a first voltage threshold: the control end of the fourth transistor, the control end of the sixth transistor, the control end of the seventh transistor, the control end of the eleventh transistor, the control end of the twelfth transistor, and the control end of the thirteenth transistor are respectively used to receive a third control signal, the control end of the fifth transistor and the control end of the tenth transistor are respectively used to receive a fourth control signal, and the control end of the eighth transistor and the control end of the ninth transistor are respectively used to receive a fifth control signal, the third control signal is used to disconnect the fourth transistor, the sixth transistor, the seventh transistor, the eleventh transistor, the twelfth transistor, and the thirteenth transistor, the fourth control signal is used to turn on the fifth transistor and the tenth transistor, and the fifth control signal is used to disconnect the eighth transistor and the ninth transistor; or, the third control signal is used to disconnect the fourth transistor, the sixth transistor, the seventh transistor, the eleventh transistor, the twelfth transistor, and the thirteenth transistor, the fourth control signal is used to disconnect the fifth transistor and the tenth transistor, and the fifth control signal is used to turn on the eighth transistor and the ninth transistor. In the above possible implementation manner, the battery is discharged according to the switched capacitor SC circuit, thereby improving the utilization rate of the switched capacitor SC circuit.

[0023] In a possible implementation of the first aspect, during the charging process, when the input power supply voltage is less than or equal to a third voltage threshold, the control end of the fourth transistor is used to receive a sixth control signal, and the control end of the fifth transistor, the control end of the sixth transistor, the control end of the seventh transistor, the control end of the eighth transistor, the control end of the ninth transistor, the control end of the tenth transistor, the control end of the eleventh transistor, the control end of the twelfth transistor, and the control end of the thirteenth transistor are respectively used to receive a seventh control signal, the sixth control signal is used to turn on the fourth transistor, and the seventh control signal is used to turn off the fifth transistor, the sixth transistor, the seventh transistor, the eighth transistor, the ninth transistor, the tenth transistor, the eleventh transistor, the twelfth transistor, and the thirteenth transistor. In the above possible implementation, normal charging of the battery is performed according to the switched capacitor SC circuit to meet the charging requirements of different batteries.

[0024] In a possible implementation of the first aspect, the switched capacitor (SC) circuit includes: a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor, a third capacitor, a fourth capacitor, and a fifth capacitor; wherein the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, the eighth transistor, and the ninth transistor are coupled in series between a first end of the switched capacitor (SC) circuit and ground, the fourth transistor and the fifth transistor are coupled to a second node, the fifth transistor and the sixth transistor are coupled to a third node, the sixth transistor and the seventh transistor are coupled to a fourth node, the seventh transistor and the eighth transistor are coupled to a fifth node, the eighth transistor and the ninth transistor are coupled to a sixth node, the tenth transistor and the eleventh transistor are coupled in series between the fifth node and ground, the tenth transistor and the eleventh transistor are coupled to a seventh node, the third capacitor is coupled between the second node and the seventh node, the fourth capacitor is coupled between the third node and the sixth node, the fifth capacitor is coupled between the fourth node and the seventh node, the fifth node is coupled to the second end, and the third end is coupled to the third node. In the above possible implementation manner, charging and discharging of the battery are performed according to the switched capacitor SC circuit, thereby improving the utilization rate of the switched capacitor SC circuit.

[0025] In a possible implementation of the first aspect, during the discharge process, when the discharge voltage is less than a first voltage threshold, the control terminal of the fourth transistor, the control terminal of the fifth transistor, the control terminal of the eighth transistor, and the control terminal of the ninth transistor are respectively used to receive a third control signal, the control terminal of the sixth transistor and the control terminal of the tenth transistor are respectively used to receive a fourth control signal, and the control terminal of the seventh transistor and the control terminal of the eleventh transistor are respectively used to receive a fifth control signal, the third control signal is used to disconnect the fourth transistor, the fifth transistor, the eighth transistor, and the ninth transistor, the fourth control signal is used to turn on the sixth transistor and the tenth transistor, and the fifth control signal is used to disconnect the seventh transistor and the eleventh transistor; or, the third control signal is used to disconnect the fourth transistor, the fifth transistor, the eighth transistor, and the ninth transistor, the fourth control signal is used to disconnect the sixth transistor and the tenth transistor, and the fifth control signal is used to turn on the seventh transistor and the eleventh transistor. In the above possible implementation, the battery is discharged according to the switched capacitor SC circuit, thereby improving the utilization rate of the switched capacitor SC circuit.

[0026] In a possible implementation of the first aspect, during the charging process, when the input power supply voltage is less than or equal to a third voltage threshold, the control end of the fourth transistor and the control end of the fifth transistor are respectively used to receive a sixth control signal, and the sixth transistor, the seventh transistor, the eighth transistor, the ninth transistor, the tenth transistor, and the eleventh transistor are respectively used to receive a seventh control signal, the sixth control signal is used to turn on the fourth transistor and the fifth transistor, and the seventh control signal is used to turn off the sixth transistor, the seventh transistor, the eighth transistor, the ninth transistor, the tenth transistor, and the eleventh transistor. In the above possible implementation, normal charging of the battery is performed according to the switched capacitor (SC) circuit to meet the charging requirements of different batteries.

[0027] In a second aspect, a charging and discharging method is provided, which is applied to a charging and discharging circuit including a switched capacitor SC circuit, wherein the switched capacitor SC circuit has a first end, a second end, and a third end. The method includes: during a charging process, the switched capacitor SC circuit converts an input power supply voltage received at the first end into a charging voltage, and outputs the charging voltage through the second end to charge the battery; during a discharging process, the switched capacitor SC circuit converts a discharge voltage released by the battery received at the second end into an output voltage, and outputs the output voltage through the third end, wherein the output voltage is a DC voltage or a pulse width modulated PWM voltage.

[0028] In a third aspect, a power chip is provided, which includes a charge and discharge circuit, and the charge and discharge circuit is the charge and discharge circuit provided by the first aspect or any possible implementation of the first aspect.

[0029] In a third aspect, an electronic device is provided, comprising a load, a battery, and a charge-discharge circuit provided by the first aspect or any possible implementation of the first aspect, wherein the output end of the charge-discharge circuit is coupled to the load, and the input and output ends of the charge-discharge circuit are coupled to the battery.

[0030] It can be understood that the above-mentioned charging and discharging method, power chip and electronic device include all the contents of the charging and discharging circuit provided above. Therefore, the beneficial effects that can be achieved can refer to the beneficial effects in the charging and discharging circuit provided above, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] FIG1 is a schematic structural diagram of a charge and discharge circuit provided by the prior art;

[0032] FIG2 is a schematic diagram of the structure of a terminal device provided in an embodiment of the present application;

[0033] FIG3 is a schematic structural diagram of a charging system provided in an embodiment of the present application;

[0034] FIG4 is a schematic structural diagram of a charge and discharge circuit provided in an embodiment of the present application;

[0035] FIG5 is a schematic structural diagram of a charge and discharge circuit provided in an embodiment of the present application;

[0036] FIG6 is a schematic structural diagram of another charging and discharging circuit provided in an embodiment of the present application;

[0037] FIG7 is a schematic structural diagram of another charging and discharging circuit provided in an embodiment of the present application;

[0038] FIG8 is a schematic structural diagram of a charge and discharge circuit provided in an embodiment of the present application;

[0039] FIG9 is a schematic structural diagram of another charging and discharging circuit provided in an embodiment of the present application;

[0040] FIG10 is a schematic structural diagram of a switched capacitor SC circuit provided in an embodiment of the present application;

[0041] FIG11 is a schematic structural diagram of another switched capacitor SC circuit provided in an embodiment of the present application;

[0042] FIG12 is a schematic structural diagram of another switched capacitor SC circuit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0043] In this application, "at least one" means one or more, and "more" means two or more. "And / or" describes the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. "At least one of the following items" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can mean: a, b, c, a and b, a and c, b and c, or a, b and c, where a, b, c can be single or multiple.

[0044] The embodiments of this application use terms such as "first" and "second" to distinguish objects with similar names, functions, or effects. Those skilled in the art will understand that terms such as "first" and "second" do not limit the quantity or order of execution. The term "coupled" is used to indicate an electrical connection, including direct connection via wires or connectors or indirect connection via other devices. Therefore, "coupling" should be considered a broadly defined electronic communication connection.

[0045] The transistor in the embodiment of the present application may refer to a metal oxide semiconductor (MOS), and the type of the transistor may include an N-type metal oxide semiconductor (NMOS) tube and a P-type metal oxide semiconductor (PMOS) tube. The transistor may also be a transistor of other types, such as a gallium nitride transistor. The transistors in the embodiment of the present application are all described using PMOS as an example. The transistor may be a switch tube or a power tube. The difference between the two is that the power tube refers to a MOS tube with a smaller on-resistance. For example, the power tube may be a MOS tube with an on-resistance in the milliohm (mΩ) level. In addition, the two transistors coupled in series herein may refer to the drain of the first transistor of the two transistors being connected to the source of the second transistor, and the source of the first transistor and the drain of the second transistor are both connected to an external circuit.

[0046] The technical solutions provided in the embodiments of the present application can be applied to various electronic devices including charging and discharging circuits, which may include terminal devices. The terminal devices may include, but are not limited to, personal computers, server computers, mobile devices (such as mobile phones, tablet computers, media players, etc.), wearable devices, vehicle-mounted devices, consumer terminal devices, mobile robots, and drones. The following describes the specific structure of the terminal device, taking the electronic device including the terminal device as an example.

[0047] Figure 2 is a schematic diagram of the structure of a terminal device provided in an embodiment of the present application, which is described using a laptop computer as an example. As shown in Figure 2, the terminal device may include: a memory 101, a processor 102, a sensor component 103, a multimedia component 104, a power supply 105, and an input / output interface 106.

[0048] Memory 101 can be used to store data, software programs, and software modules. It primarily includes a program storage area and a data storage area. The program storage area can store an operating system and at least one application required for a function, such as sound playback or image playback. The data storage area can store data generated based on the use of the terminal device, such as audio data, image data, or table data. Furthermore, the terminal device may include high-speed random access memory and non-volatile memory, such as at least one disk storage device, flash memory device, or other volatile solid-state storage device.

[0049] The processor 102 is the control center of the terminal device, which uses various interfaces and lines to connect the various parts of the entire device. By running or executing the software programs and / or software modules stored in the memory 101, and calling the data stored in the memory 101, the processor 102 performs various functions of the terminal device and processes data, thereby monitoring the terminal device as a whole. Optionally, the processor 102 may include one or more processing units. For example, the processor 102 may include a central processing unit (CPU), an application processor (AP), a modem processor, a graphics processing unit (GPU), an image signal processor (ISP), a controller, a video codec, a digital signal processor (DSP), a baseband processor and / or a neural-network processing unit (NPU), etc. Among them, different processing units can be independent devices or integrated into one or more processors. In an embodiment of the present application, the processor 102 may include a controller for outputting different control signals, which are used to control the conduction and disconnection of transistors in the charge and discharge circuit at different times.

[0050] The sensor assembly 103 includes one or more sensors for providing various status assessments for the terminal device. The sensor assembly 103 may include an accelerometer, a gyroscope, a magnetic sensor, a pressure sensor, or a temperature sensor. The sensor assembly 103 can detect the acceleration / deceleration, orientation, open / closed state, relative positioning of components, or temperature changes of the terminal device. Furthermore, the sensor assembly 103 may also include a light sensor for detecting ambient light.

[0051] The multimedia component 104 provides a screen as an output interface between the terminal device and the user. The screen can be a touch panel, and when the screen is a touch panel, the screen can be implemented as a touch screen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touch, sliding and gestures on the touch panel. The touch sensor can not only sense the boundaries of the touch or sliding action, but also detect the duration and pressure associated with the touch or sliding operation. In addition, the multimedia component 104 also includes at least one camera. For example, the multimedia component 104 includes a front camera and / or a rear camera. When the terminal device is in an operating mode, such as a shooting mode or a video mode, the front camera and / or the rear camera can receive external multimedia data. Each front camera and rear camera can be a fixed optical lens system or have focal length and optical zoom capabilities.

[0052] The power supply 105 is used to provide power to the various components of the terminal device. The power supply 105 may include a power management system, one or more power supplies, or other components associated with the generation, management, and distribution of power for the terminal device. In embodiments of the present application, the power supply 105 may include the charge-discharge circuit provided herein. The power supply 105 may also include a battery. The charge-discharge circuit may be used to power the aforementioned components and may also be used to charge the battery. The battery may also be used to power the aforementioned components.

[0053] The input / output interface 106 provides an interface between the processor 102 and a peripheral interface module. For example, the peripheral interface module may be a keyboard, a mouse, or a universal serial bus (USB) device.

[0054] Although not shown, the terminal device may further include an audio component and a communication component, for example, the audio component includes a microphone, and the communication component includes a wireless fidelity (WiFi) module or a Bluetooth module, etc., which will not be described in detail in the embodiments of the present application. It will be understood by those skilled in the art that the terminal device structure shown in FIG2 does not constitute a limitation on the terminal device, and may include more or fewer components than shown, or combine certain components, or arrange the components differently.

[0055] FIG3 is a schematic diagram of the structure of a charging system provided in an embodiment of the present application, wherein the charging system includes: a power adapter and a terminal device. The terminal device may be the terminal device shown in FIG2 above, and the terminal device includes a charge-discharge circuit, a load, and a battery. The load may be the processor, memory, and multimedia component mentioned above, etc. The battery may be the battery included in the power supply described above, and the charge-discharge circuit may be the charge-discharge circuit included in the power supply described above. The charge-discharge circuit has an input end, an output end, and an input-output end. The output end of the power adapter can be connected to the input end of the charge-discharge circuit via a power line (vbus), the output end of the charge-discharge circuit can be connected to the load, and the input and output ends of the charge-discharge circuit can be connected to the battery. The power adapter can be used to provide an input power voltage to the terminal device, and the charge-discharge circuit can be used to convert the input power voltage provided by the power adapter into a load voltage and a charging voltage. The charge-discharge circuit is also used to convert the discharge voltage provided by the battery into a load voltage. The battery can be used to store and release electrical energy. When the power adapter provides an input power voltage to the terminal device, the charge and discharge circuit can convert the input power voltage into a load voltage and a charging voltage. The load voltage can be used to power the load, and the charging voltage can be used to charge the battery. When the input end of the charge and discharge circuit does not receive the input power voltage, the battery can provide a discharge voltage, which is converted into a load voltage through the charge and discharge circuit, and the output voltage can be used to power the load.

[0056] FIG4 is a schematic diagram of the structure of a charge and discharge circuit provided in an embodiment of the present application, which can be applied to the terminal device provided above. As shown in FIG4 , the charge and discharge circuit includes: a switched capacitor SC circuit 401 for charging and discharging the battery, and the switched capacitor SC circuit includes: a first end for receiving an input power supply voltage VI; a second end for providing a charging voltage VC to the battery during the charging process, and for receiving a discharge voltage VF released by the battery during the discharging process; and a third end for providing an output voltage VO, wherein the output voltage VO is a DC voltage or a pulse width modulated PWM voltage. FIG4 is a schematic diagram of the structure of the charge and discharge circuit when the output voltage VO is a DC voltage.

[0057] Among them, the first end can be used as the input end of the charge and discharge circuit, for receiving the input power supply voltage VI, and the input power supply voltage VI can be provided by the power adapter of the terminal device; the second end can be used as the input and output end of the charge and discharge circuit, for providing the charging voltage VC during the charging process and receiving the discharge voltage VF during the discharging process, and the charging voltage VC can be used to charge the battery of the terminal device, and the discharge voltage VF can be the discharge voltage VF released by the battery of the terminal device; the third end can be used as the output end of the charge and discharge circuit, for providing the output voltage VO during the discharge process and the charging process, and the output voltage VO can be used to power the load.

[0058] In addition, the third terminal can be coupled to any node having a voltage greater than zero among the multiple nodes included in the switched capacitor SC circuit 401. Due to the inherent characteristics of the switched capacitor SC circuit 401, the third terminal of the switched capacitor SC circuit 401 can output different types of output voltages VO. The two types of output voltages VO output by the third terminal are described in detail below.

[0059] In a first possible implementation, the output voltage VO of the third terminal may be a DC voltage, that is, the output voltage VO is a fixed voltage. Assuming that the voltage provided by the second terminal is Vb, the output voltage VO and the voltage Vb provided by the second terminal are in a fixed multiple relationship. For example, the output voltage VO may be n times Vb, where n is an integer greater than 1, for example, n may be 2, 3, 4, or 5. In this case, the output voltage VO of the third terminal is greater than the voltage Vb of the second terminal.

[0060] In a second possible implementation, the output voltage VO of the third terminal may be a pulse width modulated PWM voltage, and the pulse width modulated PWM voltage may be an alternating voltage. Assuming that the voltage provided by the second terminal is Vb, the output voltage of the third terminal may be a voltage obtained by alternating between a times Vb and b times Vb, where a and b are both integers, for example, a and b may be 0, 1, 2, 3, 4, or 5. For example, the pulse width modulated PWM voltage may be a voltage obtained by alternating between 2 times Vb and 4 times Vb, that is, within one working cycle, at the first moment T1, the output voltage VO of the third terminal may be 2 times Vb, and at the second moment T2, the output voltage VO of the third terminal may be 4 times Vb.

[0061] Specifically, during the charging process of the charge-discharge circuit, the power adapter can be used to provide an input power voltage VI to the first end of the switch capacitor SC circuit 401. When the input power voltage VI is greater than the fourth voltage threshold (i.e., the fast charging stage): the switch capacitor SC circuit 401 is also used to convert the input power voltage VI into the charging voltage VC and the output voltage VO, and output the charging voltage VC through the second end to charge the battery, and output the output voltage VO through the third end to power the load; during the discharge process of the charge-discharge circuit, the power adapter no longer provides the input power voltage VI. At this time, the first end of the switch capacitor SC circuit 401 does not have the input power voltage VI, and the battery provides a discharge voltage VF. The switch capacitor SC circuit 401 can be used to boost the discharge voltage VF received at the second end into an output voltage VO, and the output voltage VO can be used to power the load. For example, when the discharge voltage VF is less than the first voltage threshold (i.e., the battery releases energy in the low-voltage zone), the switch capacitor SC circuit 401 can be used to boost the discharge voltage VF into an output voltage VO to power the load. The switch capacitor SC circuit 401 can also be called a fast charging circuit.

[0062] The first voltage threshold value is related to the type of battery, and different types of batteries correspond to different first voltage threshold values. For example, when the battery is a silicon negative electrode battery, the first threshold value may be 3.2 volts (V). This application does not make any specific limitation on this.

[0063] In addition, the fourth voltage threshold can be set in advance, and the specific value of the fourth voltage threshold can be set according to the capacity of the battery. For example, the fourth voltage threshold can be 9 V. This application does not make any specific limitation on this.

[0064] Secondly, the switched capacitor SC circuit 401 can be a proportional circuit, that is, during operation of the switched capacitor SC circuit 401, the ratio of the voltage received at the first end to the voltage provided (output) at the second end can be n:1, where n is an integer greater than 1, for example, n can be 2, 3, 4 or 5.

[0065] Since the third terminal of the switched capacitor SC circuit 401 can provide different types of output voltages, when the types of the output voltages are different, the structures of the charge and discharge circuits are different. According to the different types of output voltages, the structures of the charge and discharge circuits can be divided into three types. The following describes the charge and discharge circuits of these three structures in detail.

[0066] In a first possible embodiment, the output voltage is a DC voltage. In this case, the structure of the charge-discharge circuit is the same as that of the charge-discharge circuit shown in FIG4 , and the specific working process of the charge-discharge circuit is the same as that of the charge-discharge circuit shown in FIG4 , and will not be described in detail here. In this embodiment, the switched capacitor SC circuit 401 can be used to charge the battery and to power the load, thereby improving the utilization rate of the switched capacitor SC circuit; on the other hand, when the discharge voltage VF is less than the first voltage threshold (i.e., the battery releases energy in the low-voltage zone), the switched capacitor SC circuit 401 can be used to boost the discharge voltage VF to an output voltage VO, which is output through the third terminal and then powers the load. There is no need to add an additional boost circuit, and compared with the charge-discharge circuit shown in FIG1 , the area of ​​the charge-discharge circuit is reduced.

[0067] In a second possible embodiment, the output voltage is a pulse-width modulated (PWM) voltage. In this case, the charging and discharging circuit is schematically shown in FIG5 . The charging and discharging circuit may further include a DC conversion circuit 402. The input terminal of the DC conversion circuit 402 is coupled to the third terminal, the output terminal of the DC conversion circuit 402 is coupled to the load, and the first terminal of the DC conversion circuit 402 is connected to GND. The DC conversion circuit 402 is configured to convert the pulse-width modulated (PWM) voltage into a DC voltage, which is used to power the load. The specific structure of the DC conversion circuit 402 is described below with reference to FIG6 and FIG7 .

[0068] FIG6 is a schematic diagram of the structure of a charge and discharge circuit provided in an embodiment of the present application. The charge and discharge circuit may include a switched capacitor SC circuit 401 and a DC conversion circuit 402. The DC conversion circuit 402 may include a first inductor L1 and a first capacitor C1. One end of the first inductor L1 is coupled to the input end of the DC conversion circuit 402, the other end of the first inductor L1 and one end of the first capacitor C1 are respectively coupled to the output end of the DC conversion circuit 402, and the other end of the first capacitor C1 is connected to GND. Specifically, assuming that the voltage provided by the second end is Vb, the output voltage of the third end may be a voltage alternately converted from a times Vb to b times Vb. The first inductor L1 and the first capacitor C1 may be used to convert the output voltage of the third end into a voltage VO1. The voltage VO1 satisfies the formula (1): VO1=a×Vb+(ba)×Vb×D (1)

[0069] Where parameter D is the duty cycle of the duration of a times the Vb voltage relative to the total duration within a pulse cycle, with both a and b being integers. At this point, voltage VO1 is a DC voltage that can be used to power the load. As shown in formula (1), voltage VO1 can be adjusted by adjusting parameter D to meet the requirements of different loads.

[0070] FIG7 is a schematic diagram of the structure of another charging and discharging circuit provided in an embodiment of the present application, wherein the charging and discharging circuit may include a switching capacitor SC circuit 401 and a DC conversion circuit 402, wherein the DC conversion circuit 402 may include a first transistor M1 and a first capacitor C1. One end (e.g., source) of the first transistor M1 is coupled to the input end of the DC conversion circuit 402, the other end (e.g., drain) of the first transistor M1 and one end of the first capacitor C1 are coupled to the output end of the DC conversion circuit 402, the other end of the first capacitor C1 is connected to GND, and the control end (gate) of the first transistor M1 is used to receive a first control signal. Specifically, assuming that the voltage provided by the second end is Vb, the output voltage of the third end may be a voltage alternately converted between a times Vb and b times Vb, and the first control signal may be used to turn on the first transistor M1, so that the first transistor M1 and the first capacitor C1 may be used to convert the output voltage of the third end into a voltage VO1, and the voltage VO1 satisfies formula (2): VO1=b×Vb (2)

[0071] It can be seen from formula (2) that the voltage VO1 is a DC voltage, and the voltage VO1 can be used to power a load.

[0072] In this embodiment, the pulse width modulation (PWM) voltage at the third terminal is converted into a DC voltage through a DC conversion circuit. The DC voltage can be used to power a load. Compared with the charge and discharge circuit shown in FIG1 , the area of ​​the charge and discharge circuit is reduced; on the other hand, the utilization rate of the switched capacitor (SC) circuit is increased.

[0073] The charge and discharge circuit provided in the embodiment of the present application can convert the input power supply voltage into a charging voltage to charge the battery through the switching capacitor SC circuit in the charge and discharge circuit when quickly charging the battery. When the battery is discharging, for example, when the battery releases energy in the low-voltage area, the energy released by the battery in the low-voltage area can be boosted and converted into a load voltage through the switching capacitor SC circuit. The load voltage can be used to power the load. In this process, the battery can be charged and discharged through the switching capacitor SC circuit, thereby improving the utilization rate of the switching capacitor SC circuit. On the other hand, compared with the charge and discharge circuit shown in Figure 1, the area of ​​the charge and discharge circuit is reduced.

[0074] In a possible embodiment, during the charging process of the charge and discharge circuit, and when the input power supply voltage VI is less than or equal to the third voltage threshold (i.e., the normal charging stage): the structural schematic diagram of the charge and discharge circuit is shown in Figure 8, and the charge and discharge circuit may further include: a buck circuit 403 and a charge and discharge transistor M0, the input end of the buck circuit 403 is coupled to the third end, the output end of the buck circuit 403 is coupled to the load, the first end of the buck circuit 403 is connected to GND, the source of the charge and discharge transistor M0 is coupled to the output end of the buck circuit 403, the drain of the charge and discharge transistor M0 is coupled to the second end, and the gate of the charge and discharge transistor M0 can be used to receive the charge and discharge control signal S0.

[0075] The third voltage threshold can be set in advance. For example, the specific value of the third voltage threshold can be set according to the battery capacity. The fourth voltage threshold can be greater than or equal to the three voltage thresholds. For example, when the fourth voltage threshold can be 9V, the third voltage threshold can be less than or equal to 9V. This application does not make specific limitations on this.

[0076] The first end of the switched capacitor SC circuit 401 shown in Figure 8 can receive different input power supply voltages. According to the different input power supply voltages received by the first end, the charging mode of the charging and discharging circuit can be divided into two types. The working states of different circuit modules in the charging and discharging circuit under these two charging modes are described in detail below.

[0077] In the first charging mode, when the first end of the switched capacitor SC circuit 401 receives an input power supply voltage VI greater than the fourth voltage threshold, the buck circuit 403 does not operate, and the charge-discharge transistor M0 and the switched capacitor SC circuit 401 are in an operating state. Specifically, the first end of the switched capacitor SC circuit 401 can be used to receive the input power supply voltage, and the second end of the switched capacitor SC circuit 401 can be used to output a charging voltage based on the input power supply voltage. The charging voltage can be used to charge the battery, and the charge-discharge transistor M0 can be used to convert the charging voltage into a load voltage. The load voltage can be used to power the load. At this time, the load is powered by the charge-discharge transistor M0. The first charging mode is a fast charging mode, i.e., a fast charging stage.

[0078] Among them, the conduction and shutdown of the charge and discharge transistor M0 are related to the size of the discharge voltage of the battery. When the first end of the switch capacitor SC circuit 401 receives the input power supply voltage VI greater than the fourth voltage threshold, the voltage released by the battery is high-voltage area energy.

[0079] In the second charging mode, when the first end of the switched capacitor SC circuit 401 receives an input power supply voltage VI that is less than or equal to the third voltage threshold, the switched capacitor SC circuit 401, the buck circuit 403, and the charge-discharge transistor M0 are all in an operating state. Specifically, the first end of the switched capacitor SC circuit 401 can be used to receive the input power supply voltage, the third end of the switched capacitor SC circuit 401 can be used to provide an output voltage based on the input power supply voltage, the input end of the buck circuit 403 can be used to receive the output voltage, the output end of the buck circuit 403 can be used to output a load voltage based on the output voltage, the load voltage can be used to power the load, and the load voltage charges the battery through the charge-discharge transistor M0. The second charging mode is the normal charging mode, that is, the normal charging stage.

[0080] The second end of the switched capacitor SC circuit 401 shown in Figure 8 can receive different discharge voltages. According to the difference in the discharge voltage received by the second end, the discharge mode of the charge-discharge circuit can be divided into two types. The working states of different circuit modules in the charge-discharge circuit under these two discharge modes are described in detail below.

[0081] In the first discharge mode, when the second end of the switched capacitor SC circuit 401 receives a discharge voltage greater than or equal to the second voltage threshold (i.e., the battery releases energy in the high-voltage region), the switched capacitor SC circuit 401 and the buck circuit 403 are deactivated, and the charge-discharge transistor M0 is in operation. Specifically, the charge-discharge transistor M0 can be used to convert the discharge voltage released by the battery into a load voltage, which can be used to power the load.

[0082] The second voltage threshold is related to the type of battery. Different types of batteries correspond to different second voltage thresholds. The second voltage threshold is greater than or equal to the first threshold voltage. For example, when the first threshold is 3.2 V, the second voltage threshold may be greater than or equal to 3.2 V. This application does not impose specific limitations on this.

[0083] In the second discharge mode, when the second end of the switched capacitor SC circuit 401 receives a discharge voltage less than the first voltage threshold (i.e., the battery releases energy in the low-voltage zone), the switched capacitor SC circuit 401 and the buck Buck circuit 403 are in working state, and the charge and discharge transistor M0 does not work. Specifically, the second end of the switched capacitor SC circuit 401 can be used to receive the discharge voltage, the switched capacitor SC circuit 401 can be used to boost and convert the discharge voltage into an output voltage, the third end of the switched capacitor SC circuit 401 can be used to provide the output voltage, the input end of the buck Buck circuit 403 can be used to receive the output voltage, and the output end of the buck Buck circuit 403 can be used to output a load voltage according to the output voltage, and the load voltage can be used to power the load. In this discharge mode, the reverse boost of the discharge voltage can be achieved by the switched capacitor SC circuit 401, and the voltage stabilization of the output voltage can be achieved by utilizing the buck Buck circuit 403, while simultaneously achieving the regulation of the load voltage outputted by the output end of the buck Buck circuit 403.

[0084] The specific structure of the buck circuit 403 is described below with reference to FIG9 . For example, FIG9 is a schematic diagram of the structure of a charge and discharge circuit provided in an embodiment of the present application, wherein the charge and discharge circuit includes: a switched capacitor SC circuit 401, the buck circuit 403 and a charge and discharge transistor M0. The buck circuit 403 includes: a second transistor M2, a third transistor M3, a second inductor L2 and a second capacitor C2, the source of M2 is coupled to the input end of the buck circuit 403, the drain of M2, the drain of M3 and one end of L2 are coupled to the first node P1, the other end of L2 and one end of the second capacitor C2 are coupled to the output end of the buck circuit 403, the source of M3 and the other end of the second capacitor C2 are grounded, and the gate of M2 and the gate of M3 are used to receive the first control signal S1 and the second control signal S2, respectively. In FIG9 , the gate of the charge and discharge transistor M0 is used to receive the charge and discharge control signal S0 as an example.

[0085] In the charge and discharge process of the charge and discharge circuit shown in FIG9 , if the buck circuit 403 is in an operating state, during the charging process, the first control signal S1 is used to turn on M2 and the second control signal S2 is used to turn off M3, or the first control signal S1 is used to turn off M2 and the second control signal S2 is used to turn on M3; during the discharging process, and when the discharge voltage is less than the first voltage threshold, the first control signal S1 is used to turn on M2 and the second control signal S2 is used to turn off M3, or the first control signal S1 is used to turn off M2 and the second control signal S2 is used to turn on M3. If the charge and discharge transistor M0 is in an operating state, during the charging process, and when the input power supply voltage is less than or equal to the third voltage threshold, the charge and discharge control signal S0 is used to turn on the charge and discharge transistor M0; during the discharging process, and when the discharge voltage is greater than or equal to the second voltage threshold, the charge and discharge control signal S0 is used to turn on the charge and discharge transistor M0. If the charge and discharge transistor M0 is not in the working state, during the charging process, and when the input power supply voltage is greater than the fourth voltage threshold, the charge and discharge control signal S0 is used to disconnect the charge and discharge transistor M0. During the discharging process, and when the discharge voltage is less than the first voltage threshold, the charge and discharge control signal S0 is used to disconnect the charge and discharge transistor M0. In this example, the load voltage can be regulated by the buck circuit 403. For example, the load voltage at the output end of the buck circuit 403 can be regulated by turning on and off the second transistor M2 and the third transistor M3. For example, in a flashlight scenario, the output voltage of the third end can be converted (DC conversion and / or step-down conversion) to the voltage required by the flashlight (generally 4.5V) by the buck circuit 403.

[0086] The specific structure and operation of the switched capacitor SC circuit 401 are described in detail below using Figures 10, 11, and 12. Figures 10, 11, and 12 illustrate the voltage received at the first terminal, the voltage provided at the second terminal, and the voltage at each of the multiple nodes included in the switched capacitor SC circuit 401 during operation. Figures 10, 11, and 12 all use a ratio of 4:1 between the voltage received at the first terminal and the voltage provided at the second terminal of the switched capacitor SC circuit 401 as an example.

[0087] In a possible embodiment, as shown in FIG10 , the switched capacitor SC circuit 401 includes: a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, a seventh transistor M7, an eighth transistor M8, a ninth transistor M9, a tenth transistor M10, an eleventh transistor M11, a third capacitor C3, a fourth capacitor C4, and a fifth capacitor C5. Among them, M4, C3, M7 and C4 are coupled in series between the first end of the switched capacitor SC circuit and GND, the drain of M4 and one end of C3 are coupled to the second node P2, the other end of C3 and the drain of M7 are coupled to the third node P3, the source of M7 and one end of C4 are coupled to the fourth node P4, M6 is coupled between the third node P3 and GND, M5, C5 and M9 are coupled in series between the second node P2 and GND, the drain of M5 and one end of C5 are coupled to the fifth node P5, the other end of C5 and the source of M9 are coupled to the sixth node P6, M10 is coupled between the sixth node P6 and the second end, M8 and M11 are coupled in series between the fourth node P4 and the second end, and the drain of M8 and the source of M11 are coupled to the fifth node P5.

[0088] The voltage received by the first terminal is 4V1, the voltage provided by the second terminal is VI, the voltage of the second node P2 is a voltage that alternates between 2V1 and 4V1, the voltage of the third node P3 is a voltage that alternates between 0 and 2V1, the voltage of the fourth node P4 is 2V1, the voltage of the fifth node P5 is a voltage that alternates between 2V1 and VI, and the voltage of the sixth node P6 is a voltage that alternates between VI and 0. In practical applications, the third terminal can be coupled to any one of the second node P2, the third node P3, the fourth node P4, the fifth node P5, and the sixth node P6. If the third terminal is coupled to the fourth node P4, the output voltage provided by the third terminal is a DC voltage. If the third terminal is coupled to any one of the second node P2, the third node P3, the fifth node P5, and the sixth node P6, the output voltage provided is a pulse width modulated (PWM) voltage. FIG10 takes the coupling of the third terminal to the fourth node P4 as an example.

[0089] In the charge and discharge circuit shown in FIG10 , during the charge and discharge process, if the switched capacitor SC circuit 401 is in the working state, during the discharge process, and the discharge voltage is less than the first voltage threshold: the gates of M4, M5, M6, and M7 are respectively used to receive the third control signal S3, the gates of M8 and M10 are respectively used to receive the fourth control signal S4, and the gates of M9 and M11 are respectively used to receive the fifth control signal S5, where the third control signal S3 is used to disconnect M4, M5, M6, and M7, the fourth control signal S4 is used to turn on M8 and M10, and the fifth control signal S5 is used to disconnect M9 and M11; alternatively, the third control signal S3 is used to disconnect M4, M5, M6, and M7, the fourth control signal S4 is used to disconnect M8 and M10, and the fifth control signal S5 is used to turn on M9 and M11.

[0090] During the charging process, and when the input power supply voltage is less than or equal to the third voltage threshold: the gate of M4, the gate of M5 and the gate of M8 are respectively used to receive the sixth control signal S6, the gate of M6, the gate of M7, the gate of M9, the gate of M10 and the gate of M11 are respectively used to receive the seventh control signal S7, the sixth control signal S6 is used to turn on M4, M5 and M8, and the seventh control signal S7 is used to disconnect M6, M7, M9, M10 and M11; during the charging process, and when the input power supply voltage is greater than the fourth voltage threshold: the specific working process of the switched capacitor SC circuit 401 is similar to that of the prior art and will not be repeated here.

[0091] In another possible embodiment, as shown in FIG11 , the switched capacitor SC circuit 401 includes: a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, a seventh transistor M7, an eighth transistor M8, a ninth transistor M9, a tenth transistor M10, an eleventh transistor M11, a twelfth transistor M12, a thirteenth transistor M13, a third capacitor C3, a fourth capacitor C4, and a fifth capacitor C5. Among them, M4, C3, M7, C4, and M13 are coupled in series between the first end and the second end of the switched capacitor SC circuit, the drain of M4 and one end of C3 are coupled to the second node P2, the other end of C3 and the drain of M7 are coupled to the third node P3, the source of M7 and one end of C4 are coupled to the fourth node P4, the other end of C4 and the drain of M13 are coupled to the fifth node P5, M6 is coupled between GND and the third node P3, M12 is coupled between GND and the fifth node P5, M5, C5, and M9 are coupled in series between the second node P2 and GND, the drain of M5 and one end of C5 are coupled to the sixth node P6, the other end of C5 and the source of M9 are coupled to the seventh node P7, M8 is coupled between the sixth node P6 and the second end, M10 is coupled between the seventh node P7 and the second end, and M11 is coupled between the fourth node P4 and the second end.

[0092] The voltage received by the first terminal is 4VI, the voltage provided by the second terminal is VI, the voltage of the second node P2 is a voltage that alternates between 2VI and 4VI, the voltage of the third node P3 is a voltage that alternates between 0 and 2VI, the voltage of the fourth node P4 is a voltage that alternates between VI and 2VI, the voltage of the fifth node P5 is a voltage that alternates between 0 and VI, the voltage of the sixth node P6 is a voltage that alternates between 2VI and VI, and the voltage of the seventh node P7 is a voltage that alternates between VI and 0. In practical applications, the third terminal can be coupled to any one of the second node P2, the third node P3, the fourth node P4, the fifth node P5, the sixth node P6, and the seventh node P7. In this embodiment, the output voltage provided by the third terminal is a pulse width modulated (PWM) voltage. FIG11 takes the coupling of the third terminal to the second node P2 as an example.

[0093] During the charge and discharge process of the charge and discharge circuit shown in Figure 11, if the switched capacitor SC circuit 401 is in the working state, during the discharge process, and the discharge voltage is less than the first voltage threshold: the gate of M4, the gate of M6, the gate of M7, the gate of M11, the gate of M12 and the gate of M13 are respectively used to receive the third control signal S3, the gate of M5 and the gate of M10 are respectively used to receive the fourth control signal S4, and the gate of M8 and the gate of M9 are respectively used to receive the fifth control signal S5, the third control signal S3 is used to disconnect M4, M6, M7, M11, M12 and M13, the fourth control signal S4 is used to turn on M5 and M10, and the fifth control signal S5 is used to disconnect M8 and M9; alternatively, the third control signal S3 is used to disconnect M4, M6, M7, M11, M12 and M13, the fourth control signal S4 is used to disconnect M5 and M10, and the fifth control signal S5 is used to turn on M8 and M9.

[0094] During the charging process, and when the input power supply voltage is less than or equal to the third voltage threshold: the gate of M4 is used to receive the sixth control signal S6, the gate of M5, the gate of M6, the gate of M7, the gate of M8, the gate of M9, the gate of M10, the gate of M11, the gate of M12 and the gate of M13 are respectively used to receive the seventh control signal S7, the sixth control signal S6 is used to turn on M4, and the seventh control signal S7 is used to disconnect M5, M6, M7, M8, M9, M10, M11, M12 and M13; during the charging process, and when the input power supply voltage is greater than the fourth voltage threshold: the specific working process of the switched capacitor SC circuit 401 is similar to that of the prior art and will not be repeated here.

[0095] In another possible embodiment, as shown in FIG12 , the switched capacitor SC circuit 401 includes: the switched capacitor SC circuit includes: a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, a seventh transistor M7, an eighth transistor M8, a ninth transistor M9, a tenth transistor M10, an eleventh transistor M11, a third capacitor C3, a fourth capacitor C4 and a fifth capacitor C5. Among them, M4, M5, M6, M7, M8 and M9 are coupled in series between the first end of the switched capacitor SC circuit and GND, the drain of M4 and the source of M5 are coupled to the second node P2, the drain of M5 and the source of M6 are coupled to the third node P3, the drain of M6 and the source of M7 are coupled to the fourth node P4, the drain of M7 and the source of M8 are coupled to the fifth node P5, the drain of M8 and the source of M9 are coupled to the sixth node P6, M10 and M11 are coupled in series between the fifth node P5 and GND, the drain of M10 and the source of M11 are coupled to the seventh node P7, C3 is coupled between the second node P2 and the seventh node P7, C4 is coupled between the third node P3 and the sixth node P6, C5 is coupled between the fourth node P4 and the seventh node P7, and the fifth node P5 is coupled to the second end.

[0096] The voltage received by the first terminal is 4VI, the voltage provided by the second terminal is VI, the voltage of the second node P2 is a voltage that alternates between 3VI and 4VI, the voltage of the third node P3 is a voltage that alternates between 2VI and 3VI, the voltage of the fourth node P4 is a voltage that alternates between VI and 2VI, the voltage of the fifth node P5 is VI, the voltage of the sixth node P6 is a voltage that alternates between VI and 0, and the voltage of the seventh node P7 is a voltage that alternates between 0 and VI. In practical applications, the third terminal can be coupled to any one of the second node P2, the third node P3, the fourth node P4, the sixth node P6, and the seventh node P7. In this embodiment, the output voltage provided by the third terminal is a pulse width modulated (PWM) voltage. FIG12 takes the coupling of the third terminal and the third node P3 as an example.

[0097] During the charge and discharge process of the charge and discharge circuit shown in Figure 12, if the switched capacitor SC circuit 401 is in the working state, during the discharge process, and the discharge voltage is less than the first voltage threshold: the gate of M4, the gate of M5, the gate of M8 and the gate of M9 are respectively used to receive the third control signal S3, the gate of M6 and the gate of M10 are respectively used to receive the fourth control signal S4, and the gate of M7 and the gate of M11 are respectively used to receive the fifth control signal S5, the third control signal S3 is used to disconnect M4, M5, M8 and M9, the fourth control signal S4 is used to turn on M6 and M10, and the fifth control signal S5 is used to disconnect M7 and M11; alternatively, the third control signal S3 is used to disconnect M4, M5, M8 and M9, the fourth control signal S4 is used to disconnect M6 and M10, and the fifth control signal S5 is used to turn on M7 and M11.

[0098] During the charging process, and when the input power supply voltage is less than or equal to the third voltage threshold: the gate of M4 and the gate of M5 are respectively used to receive the sixth control signal S6, the gate of M6, the gate of M7, the gate of M8, the gate of M9, the gate of M10 and the gate of M11 are respectively used to receive the seventh control signal S7, the sixth control signal S6 is used to turn on M4 and M5, and the seventh control signal S7 is used to disconnect M6, M7, M8, M9, M10 and M11; during the charging process, and when the input power supply voltage is greater than the fourth voltage threshold: the specific working process of the switching capacitor SC circuit 401 is similar to that of the prior art and will not be repeated here.

[0099] An embodiment of the present application provides a charging and discharging method, which is applied to a charging and discharging circuit including: a switching capacitor SC circuit, wherein the switching capacitor SC circuit has a first end, a second end, and a third end. The method includes: during the charging process, the switching capacitor SC circuit converts the input power supply voltage received at the first end into a charging voltage, and outputs the charging voltage through the second end to charge the battery; during the discharging process, the switching capacitor SC circuit converts the discharge voltage released by the battery received at the second end into an output voltage, and outputs the output voltage through the third end, wherein the output voltage is a DC voltage or a pulse width modulated PWM voltage.

[0100] Based on this, an embodiment of the present application further provides a power supply chip, which may include any of the charge-discharge circuits provided above. Furthermore, when each circuit module in the charge-discharge circuit is implemented using a different transistor, inductor, or capacitor, the transistor in the charge-discharge circuit may be integrated into the power supply chip, and the inductor and capacitor other than the transistor may not be integrated into the power supply chip.

[0101] An embodiment of the present application also provides an electronic device, which may include a terminal device, the terminal device including a load, a battery and a charge and discharge circuit, and the charge and discharge circuit may include any one of the charge and discharge circuits provided above.

[0102] It should be noted that, for the relevant description of the charging and discharging circuit, reference can be made to the relevant description of the charging and discharging circuit provided above, and the embodiments of the present application will not be repeated here.

[0103] Finally, it should be noted that the above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any changes or substitutions within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. A charge and discharge circuit, characterized in that: include: A switched capacitor (SC) circuit is used to charge and discharge a battery, the switched capacitor (SC) circuit comprising: A first terminal is used to receive an input power supply voltage; The second terminal is used to provide a charging voltage to the battery during a charging process, and to receive a discharging voltage released by the battery during a discharging process; The third terminal is used to provide an output voltage, wherein the output voltage is a DC voltage or a pulse width modulation (PWM) voltage.

2. The charge and discharge circuit according to claim 1, wherein: The output voltage is the pulse width modulation PWM voltage, and the charge and discharge circuit further includes: a DC conversion circuit, the input end of the DC conversion circuit is coupled to the third end, and the output end of the DC conversion circuit is coupled to a load; The DC conversion circuit is used to convert the pulse width modulation (PWM) voltage into a DC voltage, and the DC voltage is used to power the load.

3. The charge and discharge circuit according to claim 2, wherein: The DC conversion circuit includes: a DC conversion device and a first capacitor; wherein one end of the DC conversion device is coupled to the input end of the DC conversion circuit, the other end of the DC conversion device and one end of the first capacitor are respectively coupled to the output end of the DC conversion circuit, the other end of the first capacitor is grounded, and the DC conversion device is a first inductor or a first transistor.

4. The charge and discharge circuit according to claim 1, wherein: The charging and discharging circuit further includes: a buck circuit, wherein an input end of the buck circuit is coupled to the third end, and an output end of the buck circuit is coupled to a load; During the charging process, or during the discharging process when the discharge voltage is less than a first voltage threshold, the buck circuit is used to convert the output voltage into a load voltage, and the load voltage is used to power the load.

5. The charge and discharge circuit according to claim 4, characterized in that: The step-down Buck circuit includes: a second transistor, a third transistor, a second inductor, and a second capacitor. One end of the second transistor is coupled to the input end of the step-down Buck circuit. The other end of the second transistor, one end of the third transistor, and one end of the second inductor are coupled to a first node. The other end of the second inductor and one end of the second capacitor are both coupled to the output end of the step-down Buck circuit. The other end of the third transistor and the other end of the second capacitor are both grounded. The control end of the second transistor and the control end of the third transistor are used to receive a first control signal and a second control signal, respectively.

6. The charge and discharge circuit according to claim 5, characterized in that: The first control signal is used to turn on the second transistor and the second control signal is used to turn off the third transistor, or the first control signal is used to turn off the second transistor and the second control signal is used to turn on the third transistor.

7. The charge and discharge circuit according to any one of claims 4 to 6, characterized in that: The charge and discharge circuit further includes: a charge and discharge transistor, one end of the charge and discharge transistor is coupled to the output end of the buck circuit, the other end of the charge and discharge transistor is coupled to the second end, and the control end of the charge and discharge transistor is used to receive the first charge and discharge control signal; During the discharging process, when the discharge voltage is less than the first voltage threshold, the charge and discharge control signal is used to turn off the charge and discharge transistor; During the discharge process, when the discharge voltage is greater than or equal to a second voltage threshold, the charge and discharge control signal is used to turn on the charge and discharge transistor, and the charge and discharge transistor is used to convert the discharge voltage into the load voltage, and the load voltage is used to power the load, and the second voltage threshold is greater than or equal to the first voltage threshold; During the charging process, when the input power supply voltage is less than or equal to a third voltage threshold, the charge and discharge control signal is used to turn on the charge and discharge transistor, and the charge and discharge transistor is used to convert the load voltage into the charging voltage, and the charging voltage is used to charge the battery.

8. The charge and discharge circuit according to any one of claims 1 to 7, characterized in that: During the charging process, when the input power supply voltage is less than or equal to a third voltage threshold: the switched capacitor SC circuit is configured to convert the input power supply voltage into the output voltage; During the charging process, when the input power supply voltage is greater than a fourth voltage threshold: the switched capacitor SC circuit is further configured to convert the input power supply voltage into the charging voltage, and the fourth voltage threshold is greater than or equal to the third voltage threshold; During the discharging process, when the discharging voltage is less than a first voltage threshold, the switched capacitor SC circuit is further configured to convert the discharging voltage into the output voltage.

9. The charge and discharge circuit according to any one of claims 1 to 8, characterized in that: The switched capacitor (SC) circuit includes: a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor, a third capacitor, a fourth capacitor, and a fifth capacitor; wherein the fourth transistor, the third capacitor, the seventh transistor, and the fourth capacitor are coupled in series between a first terminal of the switched capacitor (SC) circuit and ground, the fourth transistor and the third capacitor are coupled to a second node, the third capacitor and the seventh transistor are coupled to a third node, the seventh transistor and the fourth capacitor are coupled to a fourth node, the sixth transistor is coupled between the third node and ground, the fifth transistor, the fifth capacitor, and the ninth transistor are coupled in series between the second node and ground, the fifth transistor and the fifth capacitor are coupled to a fifth node, the fifth capacitor and the ninth transistor are coupled to a sixth node, the tenth transistor is coupled between the sixth node and the second terminal, the eighth transistor and the eleventh transistor are coupled in series between the fourth node and the second terminal, the eighth transistor and the eleventh transistor are coupled to the fifth node, and the third terminal is coupled to the fourth node.

10. The charge and discharge circuit according to claim 9, characterized in that: During the discharge process, when the discharge voltage is less than a first voltage threshold: The control terminals of the fourth transistor, the fifth transistor, the sixth transistor, and the seventh transistor are respectively used to receive a third control signal, the control terminals of the eighth transistor and the tenth transistor are respectively used to receive a fourth control signal, and the control terminals of the ninth transistor and the eleventh transistor are respectively used to receive a fifth control signal, the third control signal is used to turn off the fourth transistor, the fifth transistor, the sixth transistor, and the seventh transistor, the fourth control signal is used to turn on the eighth transistor and the tenth transistor, and the fifth control signal is used to turn off the ninth transistor and the eleventh transistor; Alternatively, the third control signal is used to disconnect the fourth transistor, the fifth transistor, the sixth transistor and the seventh transistor, the fourth control signal is used to disconnect the eighth transistor and the tenth transistor, and the fifth control signal is used to turn on the ninth transistor and the eleventh transistor.

11. The charge and discharge circuit according to claim 9, wherein: During the charging process, when the input power supply voltage is less than or equal to a third voltage threshold: The control end of the fourth transistor, the control end of the fifth transistor and the control end of the eighth transistor are respectively used to receive a sixth control signal, and the control end of the sixth transistor, the control end of the seventh transistor, the control end of the ninth transistor, the control end of the tenth transistor and the control end of the eleventh transistor are respectively used to receive a seventh control signal, the sixth control signal is used to turn on the fourth transistor, the fifth transistor and the eighth transistor, and the seventh control signal is used to turn off the sixth transistor, the seventh transistor, the ninth transistor, the tenth transistor and the eleventh transistor.

12. The charge and discharge circuit according to any one of claims 1 to 8, characterized in that: The switched capacitor SC circuit includes: a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor, a twelfth transistor, a thirteenth transistor, a third capacitor, a fourth capacitor and a fifth capacitor; wherein the fourth transistor, the third capacitor, the seventh transistor, the fourth capacitor and the thirteenth transistor are coupled in series between the first end and the second end of the switched capacitor SC circuit, the fourth transistor and the third capacitor are coupled to the second node, the third capacitor and the seventh transistor are coupled to the third node, the seventh transistor and the fourth capacitor are coupled to the fourth node, and the fourth capacitor and the fifth capacitor are coupled to the fourth node. The thirteenth transistor is coupled to a fifth node, the sixth transistor is coupled between ground and the third node, the twelfth transistor is coupled between ground and the fifth node, the fifth transistor, the fifth capacitor, and the ninth transistor are coupled in series between the second node and the second end, the fifth transistor and the fifth capacitor are coupled to a sixth node, the fifth capacitor and the ninth transistor are coupled to a seventh node, the eighth transistor is coupled between the sixth node and the second end, the tenth transistor is coupled between the seventh node and the second end, the eleventh transistor is coupled between the fourth node and the second end, and the third end is coupled to the second node.

13. The charge and discharge circuit according to claim 12, wherein: During the discharge process, when the discharge voltage is less than a first voltage threshold: The control end of the fourth transistor, the control end of the sixth transistor, the control end of the seventh transistor, the control end of the eleventh transistor, the control end of the twelfth transistor and the control end of the thirteenth transistor are respectively used to receive a third control signal, the control end of the fifth transistor and the control end of the tenth transistor are respectively used to receive a fourth control signal, the control end of the eighth transistor and the control end of the ninth transistor are respectively used to receive a fifth control signal, and the third control signal the first control signal is used to turn off the fourth transistor, the sixth transistor, the seventh transistor, the eleventh transistor, the twelfth transistor and the thirteenth transistor, the fourth control signal is used to turn on the fifth transistor and the tenth transistor, and the fifth control signal is used to turn off the eighth transistor and the ninth transistor; Alternatively, the third control signal is used to disconnect the fourth transistor, the sixth transistor, the seventh transistor, the eleventh transistor, the twelfth transistor and the thirteenth transistor, the fourth control signal is used to disconnect the fifth transistor and the tenth transistor, and the fifth control signal is used to turn on the eighth transistor and the ninth transistor.

14. The charge and discharge circuit according to claim 12, wherein: During the charging process, when the input power supply voltage is less than or equal to a third voltage threshold: The control end of the fourth transistor is used to receive a sixth control signal, and the control end of the fifth transistor, the control end of the sixth transistor, the control end of the seventh transistor, the control end of the eighth transistor, the control end of the ninth transistor, the control end of the tenth transistor, the control end of the eleventh transistor, the control end of the twelfth transistor, and the control end of the thirteenth transistor are respectively used to receive a seventh control signal, the sixth control signal is used to turn on the fourth transistor, and the seventh control signal is used to turn off the fifth transistor, the sixth transistor, the seventh transistor, the eighth transistor, the ninth transistor, the tenth transistor, the eleventh transistor, the twelfth transistor, and the thirteenth transistor.

15. The charge and discharge circuit according to any one of claims 1 to 8, characterized in that: The switched capacitor (SC) circuit includes: a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor, a third capacitor, a fourth capacitor, and a fifth capacitor; wherein the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, the eighth transistor, and the ninth transistor are coupled in series between a first terminal of the switched capacitor (SC) circuit and ground, the fourth transistor and the fifth transistor are coupled to a second node, the fifth transistor and the sixth transistor are coupled to a third node, the sixth transistor and the seventh transistor are coupled to a fourth node, the seventh transistor and the eighth transistor are coupled to a fifth node, the eighth transistor and the ninth transistor are coupled to a sixth node, the tenth transistor and the eleventh transistor are coupled in series between the fifth node and ground, the tenth transistor and the eleventh transistor are coupled to a seventh node, the third capacitor is coupled between the second node and the seventh node, the fourth capacitor is coupled between the third node and the sixth node, the fifth capacitor is coupled between the fourth node and the seventh node, the fifth node is coupled to the second terminal, and the third terminal is coupled to the third node.

16. The charge and discharge circuit according to claim 15, characterized in that: During the discharge process, when the discharge voltage is less than a first voltage threshold: The control terminals of the fourth transistor, the fifth transistor, the eighth transistor, and the ninth transistor are respectively used to receive a third control signal, the control terminals of the sixth transistor and the tenth transistor are respectively used to receive a fourth control signal, the control terminals of the seventh transistor and the eleventh transistor are respectively used to receive a fifth control signal, the third control signal is used to turn off the fourth transistor, the fifth transistor, the eighth transistor, and the ninth transistor, the fourth control signal is used to turn on the sixth transistor and the tenth transistor, and the fifth control signal is used to turn off the seventh transistor and the eleventh transistor; Alternatively, the third control signal is used to disconnect the fourth transistor, the fifth transistor, the eighth transistor and the ninth transistor, the fourth control signal is used to disconnect the sixth transistor and the tenth transistor, and the fifth control signal is used to turn on the seventh transistor and the eleventh transistor.

17. The charge and discharge circuit according to claim 15, wherein: During the charging process, when the input power supply voltage is less than or equal to a third voltage threshold: The control end of the fourth transistor and the control end of the fifth transistor are respectively used to receive a sixth control signal, and the sixth transistor, the seventh transistor, the eighth transistor, the ninth transistor, the tenth transistor and the eleventh transistor are respectively used to receive a seventh control signal, the sixth control signal is used to turn on the fourth transistor and the fifth transistor, and the seventh control signal is used to turn off the sixth transistor, the seventh transistor, the eighth transistor, the ninth transistor, the tenth transistor and the eleventh transistor.

18. A charging and discharging method, characterized in that: Applied to a charging and discharging circuit including a switched capacitor (SC) circuit, the switched capacitor (SC) circuit having a first terminal, a second terminal, and a third terminal, the method comprising: During the charging process, the switched capacitor SC circuit converts the input power voltage received by the first terminal into a charging voltage, and outputs the charging voltage through the second terminal to charge the battery; During the discharge process, the switched capacitor SC circuit converts the discharge voltage released by the battery received at the second end into an output voltage, and outputs the output voltage through the third end. The output voltage is a DC voltage or a pulse width modulation PWM voltage.

19. A power chip, characterized in that: The power chip includes the charging and discharging circuit according to any one of claims 1 to 17.

20. An electronic device, characterized in that: The electronic device includes a load, a battery, and the charge-discharge circuit according to any one of claims 1 to 17, wherein the output end of the charge-discharge circuit is coupled to the load, and the input and output ends of the charge-discharge circuit are coupled to the battery.

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