Cache management method and device based on data small granularity

Abstract

The invention provides a cache management method and device based on data small granularity. The method comprises the steps that S1, source equipment is initialized; s2, applying for a memory read request once; s3, judging whether the length of the request data is smaller than the residual space of the datram of the source equipment or not, and if yes, entering the step S4; s4, allocating a tag and a data ram write address for the memory read request, and recording a mapping relationship between the tag and the data ram write address into a mapping table of the tag and the wptr; s5, initiating a memory read request with a tag to the target device to obtain return data; s6, according to the tag of the returned data, reading the tag and the wptr mapping table to obtain a write address wptr of the corresponding data; s7, writing the returned data to a corresponding address of the datram; and S8, reading the datram to obtain the data, and processing the data. The method has the beneficial effects that an address mapping storage mode of applying for the data space based on the actual read data length is provided, the space utilization rate of source equipment data is effectively improved, and the data reading performance of the memory is improved.

Description

Technical Field

[0001] The present invention relates to the technical field, and in particular to a cache management method and device based on small data granularity. Background Art

[0002] The source device initiates a memory read request through PCIe to read data from the target device. The maximum data volume that can be read for each memory read request is MRRS (Max Read Request Size), and the returned data is stored in the data_ram of the source device. The space size of the data_ram is determined by the memory read request latency and the PCIe bus bandwidth to ensure that the data volume of the full PCIe bandwidth is absorbed within the time range of the read latency. Currently, the storage of the data_ram generally adopts an address mapping storage method based on MRRS, that is, when initiating a memory read request, a space of MRRS size is applied for in the data_ram, and recorded with a tag. The range of the data_ram space applied for is represented by tag*MRRS - (tag + 1)*MRRS, and the returned data is stored in this space according to the tag, and then the data is read out in the order of the applied tag. If the actual data volume read by the memory read request is less than MRRS, the space utilization rate of the data_ram is insufficient, affecting the performance of the memory to read data. Summary of the Invention

[0003] The technical problem to be solved by the present invention is: aiming at the problem of insufficient space utilization rate of the data_ram when applying for space based on MRRS currently, to provide a cache management method and device based on small data granularity.

[0004] To solve the above technical problem, the technical solution adopted by the present invention is: a cache management method based on small data granularity, including:

[0005] S1. Initialize the source device;

[0006] S2. Apply for a memory read request once, and divide the request data length into req_num according to the granularity;

[0007] S3. Divide the remaining space of the data_ram with the same granularity, and judge whether the request data length is less than the remaining space of the data_ram of the source device. If so, go to step S4; otherwise, return to S2;

[0008] S4. Allocate a tag and a data_ram write address for this memory read request, and record the mapping relationship between the tag and the data_ram write address in the mapping table of the tag and the wptr;

[0009] S5. Initiate a memory read request with a tag to the target device to obtain the returned data;

[0010] S6. Read the tag and wptr mapping table according to the tag of the returned data to obtain the write address wptr of the corresponding data;

[0011] S7. Write the returned data to the corresponding address of data_ram;

[0012] S8. Read data from data_ram, obtain the data and process it.

[0013] Furthermore, in step S1, the initialization includes clearing data_ram, setting pre_wr_ptr and rd_ptr to 0, and clearing the mapping table of tag and wptr.

[0014] Furthermore, in step S3, judge the remaining size of data_ram space according to pre_wr_ptr, rd_ptr and the total space size of data_ram.

[0015] Furthermore, in step S4, it also includes adding the req_num granularity to pre_wr_ptr and refreshing pre_wr_ptr.

[0016] Furthermore, in step S5, the tags of the returned data are out of order, while the order is maintained within the tag.

[0017] Furthermore, in step S8, it also includes releasing one data_ram space for each read data and incrementing the count of rd_ptr by 1 granularity.

[0018] Furthermore, in step S8, it also includes releasing the tag after the data reading is completed and reading the next tag in the order of tag application.

[0019] The present invention also relates to a cache management device based on small data granularity, including:

[0020] An initialization module for initializing the source device;

[0021] An application module for applying for a memory read request once;

[0022] A division module for dividing the request data length into req_num according to the granularity and dividing the remaining space of data_ram with the same granularity;

[0023] A judgment module for judging whether the request data length is less than the remaining space of data_ram of the source device;

[0024] An allocation module for allocating a tag and a data_ram write address for this memory read request;

[0025] A recording module, configured to record the mapping relationship between tags and the write addresses of the data_ram into the mapping table of tags and wptrs;

[0026] An initiating module, configured to initiate a memory read request with tags to a target device to obtain return data;

[0027] A reading module, configured to read the mapping table of tags and wptrs according to the tags of the return data;

[0028] A writing module, configured to write the return data to the corresponding addresses of the data_ram;

[0029] A processing module, configured to read data from the data_ram and perform processing.

[0030] The present invention further relates to an electronic device, characterized by including:

[0031] One or more processors;

[0032] A storage device, configured to store one or more programs;

[0033] When the one or more programs are executed by the one or more processors, the one or more processors implement the method described above.

[0034] The present invention further relates to a computer-readable storage medium, on which a computer program is stored, characterized in that the method described above is implemented when the program is executed by a processor.

[0035] The beneficial effects of the present invention are as follows: It provides an address mapping storage method for applying for data_ram space based on the actual data length read, effectively improving the space utilization rate of the data_ram of the source device and increasing the data reading performance of the memory. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] By referring to the accompanying drawings and describing its exemplary embodiments in detail, the above and other objects, features and advantages of the present disclosure will become more apparent. The following described drawings are only some embodiments of the present disclosure. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0037] Figure 1 Schematic diagram of the storage method of the data_ram of the source device in the prior art;

[0038] Figure 2 Schematic diagram of the storage method of the data_ram of the source device of the present invention;

[0039] Figure 3Flowchart of the cache management method based on small data granularity of the present invention;

[0040] Figure 4 Schematic diagram of the remaining space calculation method of the source device data_ram of the present invention;

[0041] Figure 5 Block diagram of the cache management device based on small data granularity of the present invention;

[0042] Figure 6 Block diagram of an electronic device of the present invention. Detailed implementation manners

[0043] In order to make the objectives, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0044] It should be noted that the alphabetic reference terms defined in consideration of the various functions in the present invention may be changed according to the intention or practice of the designer. The following terms are used in this specification:

[0045] Target device: The cache device for target data.

[0046] PCIe (peripheral component interconnect express): A high-speed serial computer expansion bus standard.

[0047] Source device: The device that initiates the memory read request.

[0048] t lp: The data transfer unit in the PCIe architecture, used to transfer control information and data between devices.

[0049] data_ram: Caches the data read back from the target device.

[0050] pre_wr_ptr: The write address of data_ram to be allocated.

[0051] rd_ptr: The read address of data_ram to be read.

[0052] tag: The tag carried by a memory read request, used to correspond to the initiated read request when the read data is returned.

[0053] wptr: The storage address of data_ram allocated for each memory read request.

[0054] req_num: The actual data length requested by a memory read request.

[0055] Please refer to Figure 1 , currently, the storage of data_ram generally adopts an address mapping storage method based on MRRS. That is, when a memory read request is initiated, a space of the size of MRRS is applied to data_ram, and it is recorded with a tag. The range of the data_ram space applied is represented by tag*MRRS - (tag + 1)*MRRS, and the returned data is stored in this space according to the tag. If the actual amount of data read by the memory read request is less than MRRS, then the space utilization rate of data_ram is insufficient, affecting the performance of the memory to read data.

[0056] Based on this, the present invention provides a cache management method based on small data granularity as shown in Figure 2 . By applying an address mapping storage method for the data_ram space according to the actual data read length, the space utilization rate of data_ram is improved, and the performance of the memory to read data is increased.

[0057] Among them, the corresponding relationship between pre_wr_ptr and rd_ptr is shown in Table 1, and wptrn = wptr(n - 1)+req_num.

[0058] pre_wr_ptr rd_ptr tag0 wptr1 tag1 wptr2 tag2 wptr3 … … tagn wptrn

[0059] Table 1

[0060] Please refer to Figure 3 . This embodiment provides a cache management method based on small data granularity, including:

[0061] S1. Initialize the source device;

[0062] When the source device has no read / write tasks, initialize the source device to facilitate optimized access through the cache management method when there are read / write tasks. The initialization specifically includes clearing the data_ram of the source device, setting the pre_wr_ptr and rd_ptr of the source device to 0, and clearing the mapping table of tag and wptr.

[0063] S2. Apply for a memory read request once, and divide the request data length into req_num according to the granularity;

[0064] The source device applies for a memory read request once, and divides the actual request data length into req_num according to the granularity.

[0065] S3. Divide the remaining space of data_ram with the same granularity, and determine whether the request data length is less than the remaining space of the data_ram of the source device. If so, go to step S4; otherwise, return to S2;

[0066] The source device determines the remaining data_ram space size based on the data_ram write address pre_wr_ptr to be allocated, the data_ram read address rd_ptr to be read, and the total data_ram space size. After obtaining the remaining space information of the source device's data_ram, it compares the size of req_num, which is the request data length divided by the granularity, with the remaining space of the source device's data_ram. If req_num, which is the request data length divided by the granularity, is greater than the remaining space of the data_ram, the memory read request of the source device fails this time, and it returns to step S2 to apply again; if req_num, which is the request data length divided by the granularity, is less than or equal to the remaining space of the data_ram, the application is successful, and it proceeds to the next step.

[0067] When the memory read request for this time is successful, the next memory read request application can be carried out.

[0068] Specifically, for the calculation of the remaining space of data_ram, please refer to Figure 4 (1),

[0069] When pre_wr_ptr >= rd_ptr, the remaining data_ram space is pre_wr_ptr - rd_ptr;

[0070] Please refer to Figure 4 (2),

[0071] When pre_wr_ptr < rd_ptr, the remaining data_ram space is the total data_ram space + pre_wr_ptr - rd_ptr.

[0072] S4. Allocate a tag and a data_ram write address for this memory read request, and record the mapping relationship between the tag and the data_ram write address in the mapping table of the tag and wptr;

[0073] At the same time, add the req_num granularity to the data_ram write address pre_wr_ptr to be allocated, and refresh the data_ram write address pre_wr_ptr to be allocated.

[0074] S5. Initiate a memory read request with a tag to the target device to obtain the returned data;

[0075] Specifically, the source device initiates a memory read request with a tag to the PCIe, the PCIe sends it to the target device, the target device reads the data and returns it to the PCIe, and the PCIe returns the data to the source device. Among them, the tags of the returned data are out of order, and the order is preserved within the tag.

[0076] S6. According to the tag of the returned data, read the tag and wptr mapping table to obtain the write address wptr of the corresponding data;

[0077] Since multiple tags are allowed to exist simultaneously, as long as one tag is successfully applied for, the next tag can be applied for. Therefore, it is necessary to correspond the tag of each returned data with the tag of the source device one by one, and find the write address information of each returned data in the data_ram of the source device according to the tag and wptr mapping table.

[0078] S7. Write the returned data to the corresponding address in the data_ram;

[0079] Write the returned data to the write address wptr of the corresponding data in the data_ram according to the write address information. After completing the write operation of the returned data, the next step can be entered.

[0080] It should be noted that the data of the same tag may be returned in multiple times. For each written data granularity, the number of written granularities needs to be recorded. wptr + the number of written granularities is the actual write address of the current data.

[0081] S8. Read the data from the data_ram and process it.

[0082] The source device reads the obtained data from the data_ram and processes it. Since the processing of the data needs to maintain the order, the data needs to be read and processed in turn according to the order of applying for the tag.

[0083] For each read data, release a data_ram space and increment the rd_ptr count by one granularity.

[0084] After the data reading is completed, release the tag corresponding to the data, and read the next tag in the order of tag application.

[0085] As can be seen from the above description, the beneficial effect of the present invention is that it provides an address mapping storage method for applying for data_ram space based on the actual read data length, effectively improving the space utilization rate of the data_ram of the source device and increasing the data reading performance of the memory.

[0086] The following is an apparatus embodiment of the present invention, which can be used to execute the method embodiment of the present invention. For the details not disclosed in the apparatus embodiment of the present invention, please refer to the method embodiment of the present invention.

[0087] Please refer to Figure 5 , this embodiment discloses a cache management apparatus based on small data granularity, including:

[0088] An initialization module for initializing the source device;

[0089] An application module for applying for a memory read request once;

[0090] A division module for dividing the requested data length into req_num according to the granularity and dividing the remaining space of data_ram with the same granularity;

[0091] A judgment module for judging whether the requested data length is less than the remaining space of data_ram of the source device;

[0092] An allocation module for allocating a tag and a data_ram write address for this memory read request;

[0093] A recording module for recording the mapping relationship between the tag and the data_ram write address into the mapping table of the tag and wptr;

[0094] An initiation module for initiating a memory read request with a tag to the target device to obtain return data;

[0095] A reading module for reading the tag and wptr mapping table according to the tag of the return data;

[0096] A writing module for writing the return data to the corresponding address of data_ram;

[0097] A processing module for reading data from data_ram and processing it.

[0098] The device provided according to the embodiment of the present invention can, based on the address mapping storage method of applying for data_ram space according to the actual read data length, effectively improve the space utilization rate of data_ram of the source device and increase the memory read data performance.

[0099] Figure 6 It is a block diagram of an electronic device shown according to an exemplary embodiment.

[0100] Next, refer to Figure 6 to describe the electronic device according to this embodiment of the present invention. Figure 6 The shown electronic device is only an example and should not bring any limitation to the functions and usage scope of the embodiments of the present invention.

[0101] As Figure 6 shown, the electronic device is presented in the form of a general computing device. The components of the electronic device may include but are not limited to: at least one processing unit, at least one storage unit, a bus connecting different system components (including the storage unit and the processing unit), a display unit, etc.

[0102] Among them, the storage unit stores program code, and the program code can be executed by the processing unit, so that the processing unit executes the steps according to various exemplary embodiments of the present invention described in the above-mentioned part of the cache management method based on small data granularity in this specification. For example, the processing unit can execute as Figure 3 the steps shown in.

[0103] The storage unit may include a readable medium in the form of a volatile storage unit, such as a random access storage unit (RAM) and / or a cache storage unit, and may further include a read-only storage unit (ROM).

[0104] The storage unit may also include a program / utility having a set (at least one) of program modules. Such program modules include, but are not limited to: an operating system, one or more application programs, other program modules, and program data. Each or some combination of these examples may include the implementation of a network environment.

[0105] The bus may represent one or more of several types of bus structures, including a storage unit bus or a storage unit controller, a peripheral bus, a graphics acceleration port, a processing unit, or a local bus using any of the various bus structures.

[0106] The electronic device can also communicate with one or more external devices (such as a keyboard, a pointing device, a Bluetooth device, etc.), and can also communicate with one or more devices that enable a user to interact with the electronic device, and / or communicate with any device that enables the electronic device to communicate with one or more other computing devices (such as a router, a modem, etc.). Such communication can be carried out through an input / output (I / O) interface. In addition, the electronic device can also communicate with one or more networks (such as a local area network (LAN), a wide area network (WAN), and / or a public network, such as the Internet) through a network adapter. The network adapter can communicate with other modules of the electronic device through the bus. It should be understood that although not shown in the figure, other hardware and / or software modules can be used in combination with the electronic device, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage systems, etc.

[0107] Those skilled in the art can easily understand from the description of the above embodiments that the example embodiments described herein can be implemented by software, or by a combination of software and necessary hardware. Therefore, the technical solutions according to the embodiments of the present invention can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (which can be a CD-ROM, a USB flash drive, a portable hard disk, etc.) or on a network, including several instructions to enable a computing device (which can be a personal computer, a server, or a network device, etc.) to execute the above method according to the embodiments of the present invention.

[0108] A computer-readable medium, a program product for implementing the above method according to the embodiments of the present invention, which can be a portable compact disc read-only memory (CD-ROM) and includes program code, and can run on a terminal device, such as a personal computer. However, the program product of the present invention is not limited thereto. In this document, the readable storage medium can be any tangible medium that contains or stores a program, and the program can be used by or in combination with an instruction execution system, apparatus, or device.

[0109] The program product can adopt any combination of one or more readable media. The readable medium can be a readable signal medium or a readable storage medium. The readable storage medium can be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the above. More specific examples (non-exhaustive list) of the readable storage medium include: an electrical connection with one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above.

[0110] The computer-readable storage medium can include a data signal propagated in a baseband or as part of a carrier wave, which carries the readable program code. Such a propagated data signal can take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. The readable storage medium can also be any readable medium other than the readable storage medium, and the readable medium can send, propagate, or transmit a program for use by or in combination with an instruction execution system, apparatus, or device. The program code contained on the readable storage medium can be transmitted by any appropriate medium, including but not limited to wireless, wired, optical cable, RF, etc., or any suitable combination of the above.

[0111] The program code for performing the operations of the present invention can be written in any combination of one or more programming languages, including object-oriented programming languages such as Java, C++, etc., and also including conventional procedural programming languages such as the "C" language or similar programming languages. The program code can be executed entirely on the user's computing device, partially on the user's device, executed as a stand-alone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server. In the case of a remote computing device, the remote computing device can be connected to the user's computing device through any type of network, including a local area network (LAN) or a wide area network (WAN), or can be connected to an external computing device (e.g., by connecting through the Internet using an Internet service provider).

[0112] The above computer-readable medium carries one or more programs, and when the above one or more programs are executed by a device, the computer-readable medium realizes the following functions:

[0113] S1. Initialize the source device;

[0114] S2. Apply for a memory read request once, and divide the request data length into req_num according to the granularity;

[0115] S3. Divide the remaining space of data_ram with the same granularity, and determine whether the request data length is less than the remaining space of data_ram of the source device. If so, go to step S4; otherwise, return to S2;

[0116] S4. Allocate a tag and a data_ram write address for this memory read request, and record the mapping relationship between the tag and the data_ram write address in the mapping table of the tag and wptr;

[0117] S5. Initiate a memory read request with a tag to the target device to obtain the returned data;

[0118] S6. According to the tag of the returned data, read the mapping table of the tag and wptr to obtain the write address wptr of the corresponding data;

[0119] S7. Write the returned data to the corresponding data_ram;

[0120] S8. Read the data from data_ram and process it.

[0121] Those skilled in the art can understand that the above-mentioned modules can be distributed in the device according to the description of the embodiments, or can be correspondingly changed and distributed in one or more devices that are only different from this embodiment. The modules and / or units and / or subunits of the above embodiments can be combined into one module and / or unit and / or subunit, or can be further split into multiple modules and / or units and / or subunits and / or sub-modules.

[0122] Through the description of the above embodiments, those skilled in the art can easily understand that the exemplary embodiments described herein can be implemented by software or by a combination of software and necessary hardware. Therefore, the technical solutions according to the embodiments of the present invention can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (such as a CD-ROM, a USB flash drive, a mobile hard disk, etc.) or on a network, and includes several instructions to enable a computing device (such as a personal computer, a server, a mobile terminal, or a network device, etc.) to execute the method according to the embodiments of the present invention.

[0123] The above specifically shows and describes the exemplary embodiments of the present invention. It should be understood that the present invention is not limited to the detailed structures, settings, or implementation methods described herein; on the contrary, the present invention is intended to cover various modifications and equivalent settings included within the spirit and scope of the appended claims.

[0124] In addition, the structures, ratios, sizes, etc. shown in this specification and the accompanying drawings are only used to cooperate with the content disclosed in the specification for those skilled in the art to understand and read, and are not used to limit the limiting conditions for the implementation of the present invention. Therefore, they do not have technical substantial meanings. Any modification of the structure, change of the proportional relationship, or adjustment of the size, without affecting the technical effects that the present invention can produce and the purposes that can be achieved, should still fall within the scope that can be covered by the technical content disclosed in the present invention. At the same time, the terms such as "upper", "first", "second", and "one" cited in this specification are only for the convenience of clear narration and are not used to limit the scope of implementation of the present invention. The change or adjustment of their relative relationships, without substantial change in the technical content, should also be regarded as the scope within which the present invention can be implemented.

Claims

1. A cache management method based on small data granularity, comprising: S1. Initialize the source device; S2, apply for a memory read request, and divide the request data length into req_num according to the granularity; S3, divide the remaining space of data_ram into the same granularity, and determine whether the requested data length is smaller than the remaining space of data_ram of the source device. If yes, proceed to step S4, otherwise return to S2; S4, assigning a tag and a data_ram write address to the memory read request, and recording the mapping relationship between the tag and the data_ram write address into a mapping table between tag and wptr; S5. Initiate a memory read request with a tag to the target device and obtain the returned data; S6. According to the tag of the returned data, read the tag and wptr mapping table to obtain the write address wptr of the corresponding data; S7, write the returned data to the corresponding address of data_ram; S8. Read data_ram to obtain data and process it.

2. The method according to claim 1, characterized in that: In step S1, initialization includes clearing data_ram, returning pre_wr_ptr and rd_ptr to 0, and clearing the mapping table between tag and wptr.

3. The method according to claim 1, characterized in that: In step S3, the remaining data_ram space size is determined according to pre_wr_ptr, rd_ptr and the total data_ram space size.

4. The method according to claim 1, characterized in that: In step S4, pre_wr_ptr is added with req_num granularity, and pre_wr_ptr is refreshed.

5. The method according to claim 1, characterized in that: In step S5, the tags of the returned data are out of order, but the order within the tag is preserved.

6. The method according to claim 1, characterized in that: In step S8, each time a data is read, a data_ram space is released and the rd_ptr count is increased by 1.

7. The method according to claim 1, characterized in that: In step S8, after the data reading is completed, the tag is released and the next tag is read in the order of tag application.

8. A cache management device based on small data granularity, characterized in that: include: An initialization module, used to initialize the source device; An application module is used to apply for a memory read request; A partitioning module is used to partition the request data length into req_num according to the granularity and to partition the remaining space of data_ram with the same granularity; A judgment module, used to judge whether the requested data length is less than the remaining space of the data_ram of the source device; An allocation module is used to allocate a tag and a data_ram write address for the memory read request; The recording module is used to record the mapping relationship between the tag and the data_ram write address into the mapping table between the tag and the wptr; The initiating module is used to initiate a memory read request with a tag to the target device and obtain the returned data; The reading module is used to read the tag and wptr mapping table according to the tag of the returned data; The write module is used to write the returned data to the corresponding address of data_ram; The processing module is used to read data_ram to obtain data and process it.

9. An electronic device, characterized in that: include: one or more processors; A storage device for storing one or more programs; When the one or more programs are executed by the one or more processors, the one or more processors implement the method according to any one of claims 1 to 7.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the method according to any one of claims 1 to 7 is implemented.

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