Data processing method, related equipment and computer readable medium

Abstract

The embodiment of the invention discloses a data processing method, related equipment and a computer readable medium, a computing device comprises a processor, a memory and a bus, the processor and the memory are connected through the bus, the memory is used for storing instructions, the processor is used for calling the instructions stored in the memory, and the processor is used for calling the instructions stored in the memory. The method is used for executing a specific data processing method to improve data processing efficiency.

Description

Technical Field

[0001] The present invention relates to the field of computer technologies, and in particular, to a data processing method, related devices, and a computer-readable medium. Background Art

[0002] In the field of computers, the output data of a network model changes with the change of the input data of the network model. Specifically, when the size of the input data changes, the size of the output data of the network model also changes accordingly. Correspondingly, the storage addresses of the input data and the output data also change accordingly.

[0003] Therefore, in the face of dynamically changing input data, how to dynamically adjust the address of the output data is an urgent problem to be solved at present. Summary of the Invention

[0004] An embodiment of the present invention provides a data processing method, which can dynamically adjust the address of an output data block along with variable input data, thereby improving the practicability of data processing.

[0005] In a first aspect, an embodiment of the present invention provides a data processing method, which includes: a computing device obtains the address of a variable data block input for a network model, where the network model is custom-set by the system and includes at least one network layer. Further, the computing device can determine the address of the output data block of each network layer in the at least one network layer according to the address of the variable data block, and the output data block is obtained by processing the input data block through at least one network layer in the network model in sequence.

[0006] In a second aspect, an embodiment of the present invention provides a computing device, which includes a unit for executing the method in the first aspect above.

[0007] In a third aspect, an embodiment of the present invention provides another computing device, including a processor, a memory, and a bus, where the processor is connected to the memory through the bus, the memory is used to store instructions, and the processor is used to call the instructions stored in the memory to execute the method in the first aspect above.

[0008] In a fourth aspect, an embodiment of the present invention provides a computer-readable storage medium, where the computer storage medium stores a computer program, and the computer program includes program instructions, and when the program instructions are executed by a processor, the processor is caused to execute the method in the first aspect above.

[0009] By implementing the embodiments of the present invention, it is possible to dynamically adjust the output data block of each network layer in the network model along with the change of the variable input data block, realize the dynamic adjustment of the output data block, and thereby improve the efficiency and practicability of data processing. Brief Description of the Drawings

[0010] To more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0011] Figure 1 It is a schematic flowchart of a data processing method provided by an embodiment of the present invention.

[0012] Figure 2 It is a schematic structural diagram of a data processing device provided by an embodiment of the present invention.

[0013] Figure 3 It is a schematic structural diagram of a computing device provided by an embodiment of the present invention. Detailed Embodiments

[0014] The following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are some, but not all, of the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present application.

[0015] The terms "first", "second", "third", and "fourth" in the specification and claims of the present application and the drawings thereof are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but optionally further includes steps or units not listed, or optionally further includes other steps or units inherent to these processes, methods, products, or devices.

[0016] Referring to "embodiment" herein means that the specific features, structures, or characteristics described in connection with the embodiment may be included in at least one embodiment of the present application. The phrase appears in various places in the specification and does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art will explicitly and implicitly understand that the embodiments described herein can be combined with other embodiments.

[0017] The present application specifically proposes a data processing method, a related device and equipment applicable to the method for realizing dynamic adjustment of the output data blocks of each network layer in the network model. Please refer toFigure 1 , which is a schematic flowchart of a data processing method provided by an embodiment of the present invention. As Figure 1 shown, the method includes the following implementation steps: Step S101, the computing device obtains information about the variable data block input to the network model, and the information about the variable data block refers to the information used to describe the variable data block. The network model includes at least one network layer.

[0018] In this application, the computing device can obtain information about the variable data block input to the network model. The information about the variable data block refers to the information used for the variable data block or the information related to the variable data block, which may include but is not limited to information such as the address and size of the variable data block.

[0019] The network model is a pre-trained mathematical model, which may include but is not limited to recurrent neural network, long short-term memory neural network, convolutional neural network or other custom network models, etc. In practical applications, the network model can be composed of one or more network layers, and each network layer implements a specific operation function. Taking the network model as a neural network model as an example, the neural network model can be composed of network layers such as convolutional layer, pooling layer, activation layer or other functions.

[0020] The variable data block involved in this application may refer to the input data block input to the network model, and the input data block will change according to actual needs. For example, the size and address of the input data will be different according to different user needs.

[0021] The size of the data block involved in this application is usually expressed as N*C*H*W, where N represents the number of data blocks, C represents the number of channels (also called dimensions), H represents the height, and W represents the width. Taking the data block as the data block for describing an image as an example, N represents the number of input images, C represents the number of channels of the image. Taking the image as an RGB color image as an example, C = 3. H and W respectively represent the height and width of the image.

[0022] In practical applications, the actual operation is usually based on the operation of the data block on the two-dimensional plane. In the following of this application, the data block is taken as the data block described on the HW two-dimensional plane as an example to elaborate on the relevant content. In other words, the size of the data block can be specifically H*W, where H represents the height of the data block and W represents the width of the data block.

[0023] Step S102, the computing device determines the information of the output data block of each network layer in the network model according to the information of the variable data block, and the output data block is obtained by processing the variable data block through at least one network layer in the network model in sequence.

[0024] A computing device can input a variable data block into a network model, and obtain the respective output data blocks of each network layer in the network model through the operations of each network layer in the network model. At this time, information about the output data block is also obtained, which may include but is not limited to the size and address of the output data block.

[0025] It can be understood that for the network model, the computing device provides information about the input data block (i.e., the variable data block) for the first network layer in the network model. As the network model performs layer-by-layer calculations for each network layer, the information of the respective output data of each network layer will change with the change of the input variable data block. To adapt to the change of the variable data block, the computing device can dynamically adjust and allocate the information of the respective output data blocks of each network layer in the network model according to the information of the variable data block.

[0026] In addition, when the size HW of the variable data block input to the first layer of the network model changes, the size HW of the output data blocks of each network layer in the network model will also change accordingly. To implement the functional calculations of each network layer, a data block calculation formula needs to be specifically designed for each network layer during design. This data block calculation formula is related to the input data block input to this network layer, for example, related to the HW of the input data block, etc., and is used to calculate the output data block of this network layer. Among them, the data block calculation formulas of each network layer can be pre-customized and configured by the system. For example, the data block calculation formulas of each network layer can be calculated by the computing device based on a large amount of statistical data, or customized and set according to the actual needs of users, etc. They can be the same or different, and the present application does not make any limitations.

[0027] In practical applications, the expression form of the data block calculation formula is not limited. For example, it can be embodied in the form of a string, a table, or a text, etc. Exemplarily, when performing data calculation for the i-th network layer, the computing device can first obtain the data block calculation formula of the i-th network layer transmitted in the form of a string, and based on the data block calculation formula of the i-th network layer, calculate and obtain the output data block of the i-th network layer.

[0028] Taking the i-th network layer in the network model as an example below, the specific operation process of the output data block of the i-th network layer is described in detail. Specifically, the computing device can first obtain the data calculation formula of the i-th network layer and the input data block of the i-th network layer. The data calculation formula of the i-th network layer is related to the size of the input data block of the i-th network layer, for example, related to the H and W of the input data block. Further, the computing device calculates and obtains the output data block of the i-th network layer according to the data calculation formula of the i-th network layer and the input data block of the i-th network layer. Specifically, the computing device substitutes the size of the input data block of the i-th network layer into the data calculation formula of the i-th network layer, thereby calculating and obtaining the size of the output data block of the i-th network layer. In addition, an address can also be allocated for the output data block of the i-th network layer for storage.

[0029] Among them, i is a user-defined positive integer. When i = 1, the i-th network layer refers to the first network layer of the network model, and the input data block of this i-th network layer is the variable data block input in S101. And in the network model, the output data block of the i-th network layer can be used as the input data block of the (i + 1)-th network layer. In other words, the output data block of the previous network layer is the input data block of the next network layer. Correspondingly, the computing device can calculate according to the calculation principle of the output data of the i-th network layer as described above. By analogy, through the layer-by-layer calculation of each network layer in the network model, the information of the output data block of each network layer can also be obtained. This information includes but is not limited to information such as size and address.

[0030] Optionally, during the calculation process of the computing device for any network layer in the network model, it may also call the static data block involved in this network layer, such as a weight data block or other user-defined fixed data blocks that do not change. For example, taking the network layer as a convolutional layer, the computing device can obtain the input data block a of this convolutional layer, the data block calculation formula f(a) of this convolutional layer, and the weight data block b required to be called by this convolutional layer. Then the computing device can use the convolutional formula c = a * f(a) + b to jointly calculate and obtain the output data block c of this convolutional layer.

[0031] In practical applications, the calculation process involved in this application may only include simple mathematical operations, such as addition, subtraction, and multiplication operations, etc. The types of data blocks involved in the calculation process may include but are not limited to integers and floating-point numbers, etc. When the mathematical operations involved in the calculation process are relatively simple, a simple compiler can be used to implement them, such as relying on a calculator applet with a simple stack to implement, etc. When the mathematical operations involved in the calculation process are relatively complex, the computing device can consider designing an additional simple compiler to implement the corresponding operations, and the present invention does not make any limitations.

[0032] The data blocks involved in this application (such as input data blocks, output data blocks, etc.) can be divided into three categories, namely: user data blocks, intermediate data blocks, and static data blocks. Among them, both user data blocks and intermediate data blocks will change with the change of the input data block of the network model, while static data blocks will not. Specifically, user data blocks mainly refer to the input data block and output data block of the network model, which are specifically data blocks that can be allocated or passed down by users. Intermediate data blocks refer to intermediate result data blocks, which are specifically the intermediate results generated by each network layer in the network model. The addresses of user data blocks and intermediate data blocks will change with the change of the input data block. Therefore, this application needs to reallocate addresses for them to achieve storage. Static data blocks refer to data blocks that do not change with the change of the input data block and remain unchanged, such as weight data blocks, etc.

[0033] Optionally, the data blocks involved in this application may be stored in a direct addressing manner, in which case the address of the data block refers to the storage address directly used to store the data block. Alternatively, they may be stored in an indirect addressing manner, in which case the address of the data block refers to the address of the storage address used to store the data block. When the data block is stored in a direct addressing manner, the computing device can directly obtain the data block based on the address of the data block. When the data block is stored in an indirect addressing manner, the computing device can obtain the storage address of the data block based on the address of the data block, and then obtain the data block based on the storage address of the data block.

[0034] In practical applications, when the data block is stored in an indirect addressing manner, the address of the data block (such as the address of the output data block or the address of the input variable data block, etc.) can be composed of two parts, namely the base address (also known as the base) and the offset address. Among them, the base address refers to the fixed storage address stored in the off-chip memory DDR, and the offset address is used to reflect the size of the data block. The computing device uses the method of adding the base address and the offset address to store the storage address of the data block. In this way, the data obtained based on the address of the data block is no longer the storage address of the data block, but the address storing the storage address of the data block, which is beneficial to improving the security of data block storage.

[0035] Correspondingly, when the computing device adjusts the address of the output data block of each network layer, it can store the allocated address of the output data block of this network layer at the corresponding address. For convenient management, the computing device can use a list form to maintain or manage the address of each data block, facilitating the subsequent computing device to store the data block address at the corresponding address according to the records in the list.

[0036] Optionally, during the compilation process of the computing device, the address of the output data block of each network layer (which may also be the offset address of the output data block) can be written into the network layer instruction corresponding to this network layer (such as a convolution instruction, etc.) to ensure that the address of the output data block of this network layer cannot be modified, which is beneficial to improving the security of data block storage. In this way, during the actual operation of the computing device, it calls the network layer instruction according to actual needs to obtain the output data block of this network layer based on the address of the output data block of the corresponding network layer in this network layer instruction, and then performs the data operations indicated by this network layer instruction on the output data block of this network layer, such as multiply-accumulate operations, convolution operations, etc.

[0037] In an alternative embodiment, since the variable data blocks input to the network model change, the intermediate parameters involved in the operation of each network layer in the network model also change accordingly. The intermediate parameters refer to the parameters used to affect the output result of the network layer, and may include, but are not limited to, the offset and address of the data block input to the network layer, etc. In the current prior art, to implement the operation of the output data block of the network layer, the calculation process of the intermediate parameters involved in the network layer is migrated to an artificial intelligence processing chip (machine leaning unit, MLU) for calculation, which will bring additional calculation overhead. When the calculation amount of the intermediate parameters is too large, the number of instruction calls will also increase, wasting device resources.

[0038] Considering that the intermediate parameters of the network layer are only related to the input data block of the network layer, to solve the above problems, the present application can place the calculation process of the intermediate parameters of the network layer on the CPU side of the processor, and then transfer them back to the MLU after calculating the intermediate parameters of the network layer to save chip resources. Specifically, the computing device can pre-configure the corresponding intermediate parameter calculation formula for each network layer in the network model. The intermediate parameter calculation formula can be used to calculate the intermediate parameters of the network layer, which is convenient for subsequently calculating the output data block of the network layer based on the intermediate parameters. Among them, the network layer and the intermediate parameter calculation formula are in one-to-one correspondence, and one network layer corresponds to one intermediate parameter calculation formula. For different network layers, their intermediate parameter calculation formulas can be the same or different, which is not limited.

[0039] The following takes the intermediate parameters of the i-th network layer in the network model as an example for detailed description. Specifically, the computing device can first obtain the intermediate parameter calculation formula of the i-th network layer and the input data block of the i-th network layer, and calculate the intermediate parameters of the i-th network layer based on them. The intermediate parameters may include the offset of the input data block of the i-th network layer and / or parameters such as the cache address corresponding to the offset. For example, after the computing device obtains the size of the input data of the i-th network layer (such as H*W), it can substitute the size H*W of the input data block into the intermediate parameter calculation formula of the i-th network layer to calculate the offset of the input data block, which may specifically be the offsets of H and W respectively. At this time, the computing device simultaneously obtains a new data block (also called an intermediate data block) corresponding to the offset of the input data block. Optionally, the computing device can also store the intermediate data block at the corresponding cache address for subsequent use. The intermediate data block refers to a new data block obtained by offsetting the input data block by the corresponding offset.

[0040] The computing devices involved in the present invention include, but are not limited to, chips (such as AI chips), smartphones (such as Android phones, IOS phones, etc.), personal computers, tablets, handheld computers, mobile Internet devices (MIDs), or wearable intelligent devices, etc. The embodiments of the present invention are not limited thereto.

[0041] By implementing the embodiments of the present invention, it is possible to dynamically adjust the output data block of each network layer in the network model as the variable data block input changes, realizing the dynamic adjustment of the output data block, which is beneficial to improving the data processing efficiency.

[0042] Please refer to Figure 2 , which is a schematic structural diagram of a data processing device provided by an embodiment of the present invention. As Figure 2 shown, the data processing device 200 may include a communication module 202 and a processing module 204. Among them, The communication module 202 is used to obtain the address of the variable data block input for the network model, and the network model includes at least one network layer; The processing module 204 is used to determine the address of the output data block of each network layer in the at least one network layer according to the address of the variable data block, and the output data block is obtained by processing the variable data block through at least one network layer in the network model in sequence.

[0043] In some possible embodiments, the processing module 204 is specifically used to determine the output data block of the i-th network layer in the network model according to the input data block of the i-th network layer in the network model and the data block calculation formula associated with the i-th network layer, and allocate the address of the output data block of the i-th network layer; where i is a positive integer, the output data block of the i-th network layer is the input data block of the (i + 1)-th network layer in the network model, and when i = 1, the input data block of the i-th network layer is the variable data block.

[0044] In some possible embodiments, the address of the data block is the storage address for storing the data block; or, the address of the data block is the address of the storage address for storing the data block.

[0045] In some possible embodiments, when the address of the data block is the address of the storage address for storing the data block, the address of the data block includes a base address and an offset address, the base address is used to indicate the starting address for storing the data block, and the offset address is used to indicate the size of the data block.

[0046] In some possible embodiments, the processing module 204 is further configured to determine intermediate parameters of the i-th network layer in the network model according to an input data block of the i-th network layer in the network model and an intermediate parameter calculation formula associated with the i-th network layer, where the intermediate parameters include an offset and / or a cache address of the input data block of the i-th network layer, and the cache address is used to store the offset of the input data block of the i-th network layer.

[0047] In some possible embodiments, the processing module 204 is further configured to write the address of the output data block of each network layer into a corresponding network layer instruction, so as to call the output data block of the corresponding network layer according to the network layer instruction to execute the data operation indicated by the network layer instruction.

[0048] Optionally, the data processing device 200 further includes a storage module (not shown in the figure), which stores program codes for implementing related operations of the device 200. In practical applications, each module or unit involved in the device in the embodiments of the present invention may be specifically implemented by a software program or hardware. When implemented by a software program, each module or unit involved in the device is a software module or a software unit. When implemented by hardware, each module or unit involved in the device may be implemented by an application-specific integrated circuit (ASIC) or a programmable logic device (PLD). The above PLD may be a complex programmable logic device (CPLD), a field-programmable gate array (FPGA), a generic array logic (GAL), or any combination thereof. The present invention is not limited thereto.

[0049] It should be noted that Figure 2 This is merely a possible implementation manner of the embodiments of the present application. In practical applications, the data processing device may further include more or fewer components, which are not limited herein. For the content not shown or described in the embodiments of the present invention, reference may be made to the relevant descriptions in the foregoing method embodiments, which will not be elaborated herein.

[0050] Please refer to Figure 3 , which is a schematic structural diagram of a computing device provided by an embodiment of the present invention. As Figure 3The computing device 300 shown includes one or more processors 301, a communication interface 302, and a memory 303. The processors 301, the communication interface 302, and the memory 303 can be connected by a bus, or can communicate through other means such as wireless transmission. In the embodiment of the present invention, taking the connection through the bus 304 as an example, the memory 303 is used to store instructions, and the processor 301 is used to execute the instructions stored in the memory 303. The memory 303 stores program code, and the processor 301 can call the program code stored in the memory 303 to perform the following operations: Obtain the address of a variable data block input to the network model, where the network model includes at least one network layer; According to the address of the variable data block, determine the address of each output data block of each network layer in the at least one network layer, where the output data block is obtained by processing the variable data block through at least one network layer in the network model in sequence.

[0051] Regarding the content not shown or described in the embodiment of the present invention, specifically, reference can be made to the relevant descriptions in the foregoing Figure 1 or Figure 2 the relevant elaborations in the above-mentioned embodiments, which will not be repeated here.

[0052] It should be understood that in the embodiment of the present invention, the so-called processor 301 may be a central processing unit (CPU), and the processor may also be other general-purpose processors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor, or the processor may also be any conventional processor, etc.

[0053] The communication interface 302 can be a wired interface (such as an Ethernet interface) or a wireless interface (such as a cellular network interface or a wireless local area network interface) for communicating with other modules or devices. For example, in the embodiment of the present application, the communication interface 302 can specifically be used to obtain information (such as address and size) of a variable data block input to the network model.

[0054] The memory 303 may include volatile memory, such as random access memory (RAM); the memory may also include non-volatile memory, such as read-only memory (ROM), flash memory, hard disk drive (HDD), or solid-state drive (SSD); the memory may further include a combination of the above types of memory. The memory can be used to store a set of program codes so that the processor can call the program codes stored in the memory to implement the functions of the above-mentioned various functional modules involved in the embodiments of the present invention.

[0055] It should be noted that Figure 3 This is just a possible implementation manner of the embodiments of the present invention. In practical applications, the computing device may also include more or fewer components, which are not limited here. For the content not shown or described in the embodiments of the present invention, reference can be made to the relevant descriptions in the foregoing method embodiments, which will not be elaborated here.

[0056] The embodiments of the present invention further provide a computer-readable storage medium, in which instructions are stored. When the instructions run on a processor, Figure 1 the method flow shown is implemented.

[0057] The embodiments of the present invention further provide a computer program product. When the computer program product runs on a processor, Figure 1 the method flow shown in the embodiments is implemented.

[0058] The computer-readable storage medium may be an internal storage unit of the computing device described in any of the foregoing embodiments, such as the hard disk or memory of the computing device. The computer-readable storage medium may also be an external storage device of the computing device, such as a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, etc. equipped on the computing device. Further, the computer-readable storage medium may also include both the internal storage unit and the external storage device of the client. The computer-readable storage medium is used to store the computer program and other programs and data required by the computing device. The computer-readable storage medium may also be used to temporarily store the data that has been output or will be output.

[0059] Those of ordinary skill in the art will realize that the units and algorithm steps of the examples described in combination with the embodiments disclosed herein can be implemented by electronic hardware, computer software, or a combination of the two. To clearly illustrate the interchangeability of hardware and software, the composition and steps of the examples have been generally described according to their functions in the above description. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. Professional technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present invention.

[0060] Those skilled in the art can clearly understand that for the convenience and conciseness of description, the specific working processes of the above-described terminal devices and units can refer to the corresponding processes in the foregoing method embodiments and will not be elaborated herein.

[0061] In several embodiments provided in the present application, it should be understood that the disclosed terminal devices and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the units is only a logical function division, and there can be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the displayed or discussed couplings or direct couplings or communication connections to each other can be indirect couplings or communication connections through some interfaces, devices, or units, and can also be electrical, mechanical, or other forms of connection.

[0062] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they can be located in one place or distributed to multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiments of the present invention.

[0063] In addition, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically alone, or two or more units can be integrated into one unit. The above-integrated units can be implemented in the form of hardware or in the form of software functional units.

[0064] When the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The foregoing storage medium includes: various media that can store program codes, such as USB flash drives, mobile hard disks, read-only memories (ROMs), random access memories (RAMs), magnetic disks, or optical discs.

[0065] The above is only the specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention can easily think of various equivalent modifications or substitutions, and these modifications or substitutions should all be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims

1. A data processing method, characterized in that, the method includes: A general - purpose processor determines intermediate parameters of the i - th network layer in the network model according to an input data block of the i - th network layer in the network model and an intermediate parameter calculation formula associated with the i - th network layer. The intermediate parameters include an offset and / or a cache address of the input data block of the i - th network layer, and the cache address is used to store the offset of the input data block of the i - th network layer; An artificial intelligence processing chip obtains the intermediate parameters and obtains an address of a variable data block for input to the network model according to the intermediate parameters. The network model includes at least one network layer; The artificial intelligence processing chip determines an address of an output data block of each network layer in the at least one network layer according to the address of the variable data block. The output data block is obtained by processing the variable data block through at least one network layer in the network model in sequence.

2. The method according to claim 1, characterized in that, determining an address of an output data block of each network layer in the at least one network layer according to the address of the variable data block includes: determining an output data block of the i - th network layer in the network model according to an input data block of the i - th network layer in the network model and a data block calculation formula associated with the i - th network layer, and allocating an address of the output data block of the i - th network layer; wherein, i is a positive integer, the output data block of the i - th network layer is an input data block of the (i + 1) - th network layer in the network model, and when i = 1, the input data block of the i - th network layer is the variable data block.

3. The method according to claim 1, characterized in that, the address of the data block is a storage address for storing the data block; or, the address of the data block is an address of a storage address for storing the data block.

4. The method according to claim 2, characterized in that, when the address of the data block is an address of a storage address for storing the data block, the address of the data block includes a base address and an offset address. The base address is used to indicate the start address for storing the data block, and the offset address is used to indicate the size of the data block.

5. The method according to any one of claims 1 - 4, characterized in that, the method further includes: The artificial intelligence processing chip writes the address of the output data block of each network layer into a corresponding network layer instruction, so as to call the output data block of the corresponding network layer according to the network layer instruction to execute the data operation indicated by the network layer instruction.

6. A data processing system, characterized in that, a general - purpose processor and an artificial intelligence processing chip, wherein, the artificial intelligence processing chip includes a communication module and a processing module; The general-purpose processor determines the intermediate parameters of the \(i\)th network layer in the network model according to the input data block of the \(i\)th network layer in the network model and the intermediate parameter calculation formula associated with the \(i\)th network layer. The intermediate parameters include the offset and / or cache address of the input data block of the \(i\)th network layer, and the cache address is used to store the offset of the input data block of the \(i\)th network layer. The communication module is configured to obtain the intermediate parameters and obtain the address of the variable data block for the input of the network model according to the intermediate parameters. The network model includes at least one network layer. The processing module is configured to determine the address of the output data block of each network layer in the at least one network layer according to the address of the variable data block. The output data block is obtained by processing the variable data block through at least one network layer in the network model in sequence.

7. The system according to claim 6, wherein, The processing module is specifically configured to determine the output data block of the \(i\)th network layer in the network model according to the input data block of the \(i\)th network layer in the network model and the data block calculation formula associated with the \(i\)th network layer, and allocate the address of the output data block of the \(i\)th network layer. where \(i\) is a positive integer, the output data block of the \(i\)th network layer is the input data block of the \((i + 1)\)th network layer in the network model, and when \(i = 1\), the input data block of the \(i\)th network layer is the variable data block.

8. The system according to any one of claims 6-7, wherein, The artificial intelligence processing chip writes the address of the output data block of each network layer into the corresponding network layer instruction, so as to call the output data block of the corresponding network layer according to the network layer instruction to execute the data operation indicated by the network layer instruction.

9. A computing device, wherein, It includes a processor, a memory, and a bus. The processor and the memory are connected through the bus. The memory is used to store instructions, and the processor is used to call the instructions stored in the memory to execute the method according to any one of claims 1-5 above.

10. A computer-readable storage medium, wherein, The computer storage medium stores a computer program. The computer program includes program instructions. When the program instructions are executed by a processor, the processor is caused to execute the method according to any one of claims 1-5.

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