Half-bridge over-current protection

Abstract

The invention relates to half-bridge over-current protection. Devices and circuits for overcurrent protection are described. A circuit may be connected to one of a first hybrid switching device and a second hybrid switching device in a half-bridge circuit. The first hybrid switching device may include a first wide band gap (WBG) device and a first FET in a cascode arrangement. The first WBG device may have a higher breakdown voltage than the first FET and a larger band gap than the first FET. The second hybrid switching device may include a second WBG device and a second FET in a cascode arrangement. The second WBG device may have a higher breakdown voltage than the second FET and a larger band gap than the second FET. The circuit may monitor a drive current of the half-bridge circuit to detect an overcurrent condition of the half-bridge circuit.

Description

Technical Field

[0001] The present disclosure relates to power systems, and more particularly to overcurrent protection in a power module having a half-bridge circuit. Background Art

[0002] Wide-bandgap semiconductor devices such as silicon carbide (SiC) and gallium nitride (GaN) devices are formed of semiconductor materials having a relatively large bandgap compared to conventional semiconductors such as silicon. Examples of wide-bandgap devices can include, but are not limited to, silicon carbide (SiC) and gallium nitride (GaN). In one aspect, silicon semiconductors have a bandgap in the range of 0.6 - 1.5 electron volts (eV), while wide-bandgap materials can have a bandgap in the range above 2 eV. Wide-bandgap semiconductors allow devices to operate at relatively higher voltages, frequencies, and temperatures compared to conventional semiconductor materials. Applications where wide-bandgap devices can be used include short-wavelength (green UV) LEDs or lasers, radio frequency applications, military radars, etc. Summary of the Invention

[0003] In one embodiment, an apparatus for overcurrent protection is generally described. The apparatus can include a half-bridge circuit. The half-bridge circuit can include a first hybrid switching device connected to an input voltage. The first hybrid switching device can include a first wide-bandgap (WBG) device and a first FET connected in a cascode arrangement. The first WBG device can have a higher breakdown voltage than the first FET, and the first WBG device can have a larger bandgap than the first FET. The half-bridge circuit can further include a second hybrid switching device connected to ground. The second hybrid switching device can include a second WBG device and a second FET connected in a cascode arrangement. The second WBG device can have a higher breakdown voltage than the second FET, and the second WBG device can have a larger bandgap than the second FET. The apparatus can further include a circuit connected to one of the first hybrid switching device and the second hybrid switching device. The circuit can be configured to monitor a drive current of the half-bridge circuit. The circuit can further be configured to detect an overcurrent condition of the half-bridge circuit based on the monitored drive current.

[0004] In one embodiment, an apparatus for overcurrent protection is generally described. The apparatus may include a controller and a half-bridge circuit. The half-bridge circuit may include a first hybrid switching device connected to an input voltage. The first hybrid switching device may include a first wide bandgap (WBG) device and a first FET connected in a cascode arrangement. The first WBG device may have a higher breakdown voltage than the first FET, and the first WBG device may have a larger bandgap than the first FET. The half-bridge circuit may also include a second hybrid switching device connected to ground. The second hybrid switching device may include a second WBG device and a second FET connected in a cascode arrangement. The second WBG device may have a higher breakdown voltage than the second FET, and the second WBG device may have a larger bandgap than the second FET. The apparatus may also include a circuit connected to one of the first hybrid switching device and the second hybrid switching device. The circuit may be configured to monitor a drive current of the half-bridge circuit. The circuit may also be configured to generate a signal based on the monitored drive current. The signal may indicate the presence or absence of an overcurrent condition in the half-bridge circuit. The circuit may also be configured to output the signal to the controller. The controller may be configured to control the half-bridge circuit based on the signal.

[0005] In one embodiment, an apparatus for overcurrent protection is generally described. The apparatus may include a sensing field effect transistor (FET) connected to an FET in a half-bridge circuit. The half-bridge circuit may include a first hybrid switching device and a second hybrid switching device. The first hybrid switching device may include a first wide bandgap WBG device and a first FET connected in a cascode arrangement. The second hybrid switching device may include a second WBG device and a second FET connected in a cascode arrangement. The apparatus may also include a sample-and-hold circuit configured to sample a drain-source voltage of the FET. The sample-and-hold circuit may remove noise from the sampled drain-source voltage to output a held voltage. The apparatus may also include a comparator configured to compare the held voltage with a predefined threshold voltage. An output of the comparator may indicate the presence or absence of an overcurrent condition in the half-bridge circuit.

[0006] The foregoing summary is illustrative only and is not intended to be limiting in any way. In addition to the illustrative aspects, embodiments, and features described above, other aspects, embodiments, and features will become apparent by reference to the drawings and the following detailed description. In the drawings, like reference numerals indicate like or functionally similar elements. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 is a schematic diagram showing a voltage converter in which half-bridge overcurrent protection can be implemented in one embodiment;

[0008] Figure 2FIG. is a schematic diagram of another voltage converter capable of implementing half - bridge over - current protection in one embodiment;

[0009] Figure 3 FIG. is a schematic diagram of the implementation of half - bridge over - current protection in one embodiment;

[0010] Figure 4 FIG. is a waveform diagram of the implementation of half - bridge over - current protection in a buck converter where no over - current condition is detected in one embodiment;

[0011] Figure 5 FIG. is a waveform diagram of the implementation of half - bridge over - current protection in a buck converter where an over - current condition is detected in one embodiment;

[0012] Figure 6 FIG. is a waveform diagram of the implementation of half - bridge over - current protection for detecting and stabilizing an over - current condition in a buck converter in one embodiment;

[0013] Figure 7 FIG. is a diagram showing the implementation of another half - bridge over - current protection in one embodiment;

[0014] Figure 8 FIG. is a waveform diagram of the implementation of half - bridge over - current protection in a boost converter where no over - current condition is detected in one embodiment;

[0015] Figure 9 FIG. is a waveform diagram of the implementation of half - bridge over - current protection in a buck converter where an over - current condition is detected in one embodiment; and

[0016] Figure 10 FIG. is a waveform diagram of the implementation of half - bridge over - current protection for detecting and stabilizing an over - current condition in a boost converter in one embodiment. DETAILED DESCRIPTION

[0017] In the following description, numerous specific details are set forth, such as specific structures, components, materials, dimensions, processing steps, and techniques, in order to provide an understanding of the various embodiments of the present application. However, those of ordinary skill in the art will understand that the various embodiments of the present application may be practiced without these specific details. In other instances, well - known structures or processing steps have not been described in detail to avoid obscuring the present application.

[0018] Figure 1FIG. 0 is a schematic diagram of a voltage converter that can implement half-bridge overcurrent protection in one embodiment. The voltage converter 100 may include drivers 103H, 103L, a high-voltage power supply HV 107, wide-bandgap (WBG) devices (WBG devices) 102H, 102L, and silicon (Si)-based metal-oxide-semiconductor field-effect transistors (MOSFETs) 104H, 104L. The voltage converter 100 may be a buck DC-DC converter or a buck converter. The voltage converter 100 may convert high-voltage DC power into low-voltage DC power, where the high-voltage DC power may be provided by the high-voltage power supply HV 107. The voltage converter 100 may generate an output voltage Vout based on an input voltage Vin. A pulse-width modulation (PWM) signal 101 may be provided to the drivers 103H and 103L. The drivers 103H and 103L may output complementary signals to drive the MOSFETs 104H and 104L. The complementary signals are non-overlapping to prevent the MOSFETs 104H and 104L from conducting simultaneously, thereby preventing a direct current path from Vin to ground. A load RL may be connected to a switching node SW between the HS switch and the LS switch, and the load RL may receive power generated by Vout via an inductor L. In one aspect, one or more output capacitors (such as Cout) may be connected between the inductor L and the load RL.

[0019] The WBG device 102H and the MOSFET 104H are cascaded in a cascode arrangement to form a hybrid switching device 105H. The gate of the WBG device 102H is connected to the source of the MOSFET 104H, and the source of the WBG device 102H is connected to the drain of the MOSFET 104H. The WBG device 102L and the MOSFET 104L are cascaded in a cascode arrangement to form a hybrid switching device 105L. The gate of the WBG device 102L is connected to the source of the MOSFET 104L, and the source of the WBG device 102L is connected to the drain of the MOSFET 104L. In one embodiment, the MOSFETs 104H and 104L may be N-type metal-oxide-semiconductor (NMOS) devices made of silicon. The WBG device 102H may have a higher breakdown voltage than the MOSFET 104H, and the WBG device 102L may have a higher breakdown voltage than the MOSFET 104L.

[0020] In one embodiment, the WBG devices 102H and 102L can be high-voltage devices, such as transistors made of wide-bandgap materials (such as SiC or GaN). The WBG devices 102H, 102L can be, for example, silicon carbide (SiC)-based junction field-effect transistors (WBG devices) or GaN high electron mobility transistors (HEMTs). The hybrid switching devices 105H and 105L can form a half-bridge circuit that converts Vin to Vout. The half-bridge circuit formed by the hybrid switching devices 105H and 105L can be used in applications and devices that utilize relatively high voltages (e.g., greater than 1 kilovolt (kV)) and relatively high switching frequencies (e.g., up to 1 MHz). The half-bridge circuit can be used in, for example, AC-to-DC converters, power factor correction (PFC) converters, isolated or non-isolated DC-DC converters, encoders, decoders, BLDC motors, AC motor drives, or other applications and devices.

[0021] The MOSFET 104H can be an enhancement-mode device, and the WBG device 102H can be a depletion-mode device. The WBG device 102H can conduct when the voltage between its gate and source exceeds its threshold voltage. The hybrid switching device 105H can operate as an enhancement-mode device such that when the voltage applied between the gate and source of the MOSFET 104H exceeds its threshold voltage, the hybrid switching device 105H conducts, and when the voltage applied between the gate and source of the MOSFET 104H is zero, the hybrid switching device 105H turns off.

[0022] The MOSFET 104L can be an enhancement-mode device, and the WBG device 102L can be a depletion-mode device. The WBG device 102L can conduct when the voltage between its gate and source exceeds its threshold voltage. The hybrid switching device 105L can operate as an enhancement-mode device such that when the voltage applied between the gate and source of the MOSFET 104L exceeds its threshold voltage, the hybrid switching device 105L conducts, and when the voltage applied between the gate and source of the MOSFET 104L is zero, the hybrid switching device 105L turns off. In addition to operating as enhancement-mode devices (which can be important in high-voltage applications), the hybrid switching devices 105H and 105L can also provide high breakdown voltage, low thermal resistance, and other advantages.

[0023] When MOSFET 104H is turned on and MOSFET 104L is turned off, the drive current IQ can flow from HV 107 through the WBG device 102H, MOSFET 104H, and inductor L to the load RL. When MOSFET 104L is turned on and MOSFET 104H is turned off, the inductor L needs to maintain current flowing out to the load RL. Therefore, the inductor current or the current of inductor L can be recycled, resulting in a recycled current IR flowing from L to the load FL. The recycled current can be a reverse current, such as a current flowing in a direction opposite to the body diode of MOSFET 104L and the Rdson of the WBG device 102L.

[0024] The high-voltage and high-speed switching provided by the half-bridge circuit formed by the hybrid switch devices 105H and 105L can reduce the size, weight, and cost of the transformer, choke coil, and capacitor Cout of the power converter. However, such high-voltage, high-power, and high-speed devices may require precise control of the current flowing through the devices to protect the switch devices or the power supply system from damage caused by excessive current. The drive current IQ can depend on the output voltage Vout and the load current (e.g., the current drawn by the load RL). Therefore, to control the current flowing through the voltage converter 100, the output voltage Vout can be adjusted to change the drive current IQ and the load current. In addition, excessive current can degrade the performance of the power converter. For example, excessive current entering the inductor L will accumulate and increase the ripple voltage. In addition, excessive current will introduce additional ringing and noise at the switch node SW.

[0025] To monitor the drive current IQ in a buck converter (such as the voltage converter 100), the overcurrent protection circuit 120 can be connected across MOSFET 104H and connected to the gate of MOSFET 104H. When MOSFET 104H is turned on, the gate voltage for turning on MOSFET 104H can be detected by the overcurrent protection circuit 120, and the drive current IQ can be monitored by the overvoltage protection circuit 120.

[0026] If the drive current IQ exceeds a predefined threshold, the over-current protection circuit 120 can notify the controller 130 to adjust the PWM signal 101 to reduce the drive current IQ and the output voltage Vout. The over-current protection circuit 120 can use a dual-sampling system to eliminate PWM switching noise and can sample the 104H drain-source voltage Vds in a per-cycle manner (e.g., in each PWM cycle), which can be the product of the drain-source current Ids and RDS(on). If Vds exceeds a predefined voltage threshold, the over-current protection circuit 120 can keep Vds constant at a holding voltage and notify the controller of the voltage converter 100. The controller 130 can take specific actions to address the over-current condition. For example, the controller 130 can terminate the drive function that drives the drive current IQ to Vout, then use an attenuation circuit to reduce the holding voltage, and start driving Vds at a level lower than the predefined voltage threshold. The over-current protection circuit 120 can control the output voltage Vout to be relatively close to a target voltage that complies with a safe level of the drive current IQ. In addition, the over-current protection circuit 120 can also provide a smooth waveform of the output power. In addition, the over-current protection circuit 120 can be implemented separately from the voltage converter 100.

[0027] In one aspect, when an over-current condition occurs, the 102H Vds can change from Vin to the saturation voltage in response to Vds turning on or off, which can be a relatively wide range from 800V to 1V. Therefore, the impact of ringing can be strong and noisy, and the accuracy of conventional over-current protection schemes is reduced. However, the over-current protection circuit 120 described herein monitors a device (e.g., MOSFET 104H or MOSFET 104L), where the cut-off mode drain-source voltage (Vds) of MOSFET 104H is equal to the gate-source voltage (Vgs) of the WBG device 102H, where the threshold voltage (Vth) of the WBG device 102H can be about 15V, and the voltage of the WBG device 102 from Vth to the on mode is about 0.2V. Therefore, the change in Vds during turn-on or turn-off can be maintained at a ratio of about 15V / 800V = 1 / 53, which means that less ringing noise can be used in the Vds(sat) voltage to detect Ids. Therefore, compared with the conventional scheme, the accuracy of over-current protection is improved.

[0028] Figure 2FIG. 0 is a schematic diagram showing another voltage converter that can implement half-bridge overcurrent protection in one embodiment. The voltage converter 200 may include drivers 203H, 203L, a high-voltage power supply HV 207, wide-bandgap (WBG) devices 202H, 202L, and silicon (Si)-based metal-oxide-semiconductor field-effect transistors (MOSFETs) 204H, 204L. The voltage converter 200 may be a boost DC-DC converter or a boost converter. The voltage converter 200 may convert input DC power into higher-voltage DC power, where the input DC power may be provided by the high-voltage power supply HV 207. The voltage converter 200 may generate an output voltage Vout based on an input voltage Vin. A pulse-width modulation (PWM) signal 201 may be provided to the drivers 203H and 203L. The drivers 203H and 203L may output complementary signals to drive the MOSFETs 204H and 204L. The complementary signals are non-overlapping to prevent the MOSFETs 204H and 204L from conducting simultaneously, thereby preventing a direct current path from Vin to ground. A load RL may be connected to the WBG device 202H, and the load RL may receive power generated by Vout. In one aspect, one or more output capacitors (such as Cout) may be connected between the WBG device 202H and the load RL.

[0029] The WBG device 202H and the MOSFET 204H are cascaded in a cascode arrangement to form a hybrid switching device 205H. The gate of the WBG device 202H is connected to the source of the MOSFET 204H, and the source of the WBG device 202H is connected to the drain of the MOSFET 204H. The WBG device 202L and the MOSFET 204L are cascaded in a cascode arrangement to form a hybrid switching device 205L. The gate of the WBG device 202L is connected to the source of the MOSFET 204L, and the source of the WBG device 202L is connected to the drain of the MOSFET 204L. In one embodiment, the MOSFETs 204H and 204L may be N-type metal-oxide-semiconductor (NMOS) devices made of silicon.

[0030] In one embodiment, the WBG devices 202H and 202L can be high-voltage devices, such as transistors made of a wide-bandgap material (such as SiC or GaN). The hybrid switch devices 205H and 205L can form a half-bridge circuit that converts Vin to Vout. The half-bridge circuit formed by the hybrid switch devices 205H and 205L can be used in applications and devices that utilize a relatively high voltage (e.g., greater than 1 kilovolt (kV)) and a relatively high switching frequency (e.g., up to 1 MHz). The half-bridge circuit can be used, for example, in AC-to-DC converters, PFCs, isolated or non-isolated DC-DC converters, encoders, decoders, BLDC motors, AC motor drives, or other applications and devices.

[0031] The MOSFET 204H can be an enhancement-mode device, and the WBG device 202H can be a depletion-mode device. The WBG device 202H can conduct when the voltage between its gate and source exceeds its threshold voltage. The hybrid switch device 205H can operate as an enhancement-mode device such that when the voltage applied between the gate and source of the MOSFET 204H exceeds its threshold voltage, the hybrid switch device 205H conducts, and when the voltage applied between the gate and drain of the MOSFET 204H is zero, the hybrid switch device 205H turns off.

[0032] The MOSFET 204L can be an enhancement-mode device, and the WBG device 202L can be a depletion-mode device. The WBG device 202L can conduct when the voltage between its gate and source exceeds its threshold voltage. The hybrid switch device 205L can operate as an enhancement-mode device such that when the voltage applied between the gate and source of the MOSFET 204L exceeds its threshold voltage, the hybrid switch device 205L conducts, and when the voltage applied between the gate and drain of the MOSFET 204L is zero, the hybrid switch device 205L turns off. In addition to operating as enhancement-mode devices (which can be important in high-voltage applications), the hybrid switch devices 205H and 205L can also provide high breakdown voltage, low thermal resistance, and other advantages.

[0033] When MOSFET 204L is turned on and MOSFET 204H is turned off, the drive current IQ can flow from HV 207 through inductor L, WBG device 202L, and MOSFET 204L to ground GND. When MOSFET 204H is turned on and MOSFET 204L is turned off, the inductor L needs to maintain current flowing out to the load RL. Therefore, the inductor current or the current in inductor L can be recycled, resulting in a recycled current IR flowing from L through WBG device 202H and MOSFET 204H to the load RL. The recycled current can be a reverse current, such as a current flowing in a direction opposite to the body diode of MOSFET 204H and the on-resistance (Rdson) of WBG device 202H.

[0034] The high-voltage and high-speed switching provided by the half-bridge circuit formed by the hybrid switch devices 205H and 205L can reduce the size, weight, and cost of the transformer, choke coil, and capacitor of the power converter. However, such high-voltage, high-power, and high-speed devices may require precise control of the current flowing through the devices to protect the switching devices or the power supply system from damage caused by excessive current. The drive current IQ can depend on the output voltage Vout and the load current (e.g., the current drawn by the load RL). Therefore, to control the current flowing through the voltage converter 200, the output voltage Vout can be adjusted to change the drive current IQ and the load current. In addition, excessive current can degrade the performance of the power converter. For example, excessive current entering the inductor L can accumulate and increase the ripple voltage. In addition, excessive current can introduce additional ringing and noise at the switching node SW.

[0035] To monitor the drive current IQ in a boost converter (such as voltage converter 200), the overcurrent protection circuit 120 can be connected across MOSFET 204L and connected to the gate of MOSFET 204L. When MOSFET 204L is turned on, the gate voltage used to turn on MOSFET 204L can be detected by the overcurrent protection circuit 120, and the drive current IQ can be monitored by the overvoltage protection circuit 120.

[0036] If the drive current IQ exceeds a predefined threshold, the overcurrent protection circuit 120 can notify the controller 230 to adjust the PWM signal 201 to reduce the drive current IQ and the output voltage Vout. The overcurrent protection circuit 120 can use a dual-sampling system to eliminate PWM switching noise and can sample the drain-source voltage Vds of the monitored MOSFET (e.g., MOSFET 204L) in a per-cycle manner (e.g., in each PWM cycle), which can be the product of the drain-source current Ids and RDS(on). If Vds exceeds a predefined voltage threshold, the overcurrent protection circuit 120 can keep Vds constant at a holding voltage and notify the controller of the voltage converter 200. The controller 230 can take specific actions to address the overcurrent condition. For example, the controller 230 can terminate the driving function that drives the drive current IQ to Vout, then use an attenuation circuit to reduce the holding voltage, and start driving Vds at a level lower than the predefined voltage threshold. The overcurrent protection circuit 120 can control the output voltage Vout to be relatively close to a target voltage that complies with the safe level of the drive current IQ. In addition, the overcurrent protection circuit 120 can also provide a smooth waveform of the output power. In addition, the overcurrent protection circuit 120 can be implemented separately from the voltage converter 200.

[0037] In one aspect, when an overcurrent condition occurs, the 202L Vds can change from Vin to the saturation voltage in response to Vds turning on or off, which can be a relatively wide range of 800V to 1V. Therefore, the influence of ringing may be strong and noisy, and the accuracy of conventional overcurrent protection schemes is reduced. However, the overcurrent protection circuit 120 described herein monitors the device (e.g., MOSFET 104H or MOSFET 104L), where the cutoff-mode drain-source voltage (Vds) of MOSFET 204L is equal to the gate-source voltage (Vgs) of the WBG device 202L, where the threshold voltage (Vth) of the WBG device 102L can be about 15V, and the voltage of the WBG device 102L from Vth to the conduction mode is about 0.2V. Therefore, the change in Vds during turn-on or turn-off can be maintained at a ratio of approximately 15V / 800V = 1 / 53, which means that less ringing noise can be used in the Vds(sat) voltage to detect Ids. Therefore, compared with the conventional scheme, the accuracy of overcurrent protection is improved.

[0038] Figure 3 is a schematic diagram showing the implementation of half-bridge overcurrent protection in one embodiment. The details of the overcurrent protection circuit 120 are as Figure 3 shown. Figure 3An embodiment is also shown where the overcurrent protection circuit 120 is implemented for a step down converter or buck converter, such as Figure 1 the voltage converter 100 shown. In one embodiment, the overcurrent protection circuit 120 may include a MOSFET 302, switches 304, 306, a sense resistor Rs, a capacitor C1, a resistor R1, a voltage source providing a predefined threshold voltage Vc, and a comparator 308. The size of the MOSFET 302 may be smaller than the size of the MOSFET 104H. In one embodiment, the MOSFET 302 may be about 10 to 100 times smaller than the MOSFET 104H. And the MOSFET 302 may be turned on / off at the same timing. When turned on, since the Vds of the WBG device 102H is relatively small (e.g., very close to zero), the Vds (which is the product of the RDSon of the MOSFET 104H and the drain-source current (Ids) of the MOSFET 104H) is transferred to V1.

[0039] As Figure 1 shown, the WBG device 102H and the MOSFET 104H form a hybrid switch device 105H. The WBG device 102H may be used as a high-voltage blocker of the hybrid switch device 105H, and the ON / OFF switch of the hybrid switch device 105H is controlled by the MOSFET 104H. When the MOSFET 104H is turned on, the hybrid switch device 105H is also turned on, and the drain-source voltage Vds of the MOSFET 104H is the product of the drain-source current Ids of the MOSFET 104H and the drain-source on-resistance (RDS(on)) of the MOSFET 104H (e.g., Vds = Ids × RDS(on)). In one embodiment, the Vds may be several tens of millivolts (mV). In one embodiment, when the MOSFET 104H is turned off, the threshold voltage Vth of the WBG device 102H may be about 15V.

[0040] The MOSFET 302 may be used to monitor the on Vds of the MOSFET 104H (e.g., the Vds when the MOSFET 104H is turned on). The gate of the MOSFET 302 is connected to the gate of the MOSFET 104H and the output of the driver 103H. Thus, when the MOSFET 104H is turned on, the MOSFET 302 is also turned on. The MOSFET 302 may be in parallel with the MOSFET 104H, where the MOSFET 302 may be implemented as an analog switch for detecting the RDS(on) saturation voltage and for transferring the saturated Vds to the voltage V1.

[0041] In one embodiment, MOSFET 302 and MOSFET 104H can be mounted on separate die. In another embodiment, MOSFET 302 and MOSFET 104H can be integrated on the same die. If MOSFET 302 and MOSFET 104H are integrated on the same die, the detected Vds voltage can be more easily transferred to V1 without the noise voltage generated by the large current switching of WBG device 102L and MOSFET 104L. Whether MOSFET 302 and MOSFET 104H are located on different die or the same die can depend on the desired implementation of voltage converter 100.

[0042] The sense resistor Rs can be connected between the source of MOSFET 302 and the switch node SW. The sense resistor Rs can transfer the saturated Vds at MOSFET 302 to the voltage V1. In one aspect, the voltage V1 can be the on Vds voltage of MOSFET 104H (e.g., a few tens of mV) without the off Vds voltage (e.g., 15V). The switch 304 can be connected to the source of MOSFET 302, and the switch 306 can be connected between the switch 304 and the capacitor C1. The switches 304, 306, the capacitor C1, and the resistor R1 can form a second sample and hold circuit 303.

[0043] In one aspect, the voltage V1 can include switching noise generated due to the transition of MOSFET 104H from the off state to the on state. After MOSFET 302 samples V1, the sample and hold circuit 303 can perform a second sample to sample the voltage V2. In one embodiment, the sampling timing of V1 (e.g., the switching time of MOSFET 302 controlled by the controller 130) can control the switches 304 and 306 in the sample and hold circuit 303 to transfer V1 to V2 as the hold voltage. This hold voltage can represent the on-current of MOSFET 104H and WBG device 102H. Sampling of the voltage V2 can suppress the switching noise present in the voltage V1 such that the sampled voltage V2 can have the same voltage as V1 without the switching noise. MOSFET 302 and the sample and hold circuit 303 can perform dual sampling, including the first sampling of V1 and the second sampling of V2. The sample and hold circuit 303 can be controlled by the controller 130. The switches 304 and 306 can be various types of switches. In one embodiment, the switches 304, 306 connected back-to-back in the sample and hold circuit 303 can eliminate the current path formed by the body diodes of the switches 304, 306.

[0044] In one embodiment, switches 304, 306 can be MOSFETs or WBG devices, and controller 130 can send control signals labeled SH to the gates of switches 304, 306 to turn on or off switches 304, 306. In one embodiment, a feedback line can connect the gate and source of MOSFET 104H to controller 130 such that controller 130 can measure the gate-source voltage Vgs of MOSFET 104H. The gate-source voltage Vgs measured by controller 130 can indicate whether MOSFET 104H is on or off. In response to controller 130 measuring Vgs and the measured Vgs indicating that MOSFET 104H is on, controller 130 can send control signal SH to turn on switches 304 and 306.

[0045] Voltage V2 and a predefined threshold voltage Vc can be input into comparator 308. Comparator 308 can output signal COMP to controller 130. In one embodiment, signal COMP can be a binary signal, where a first binary value (e.g., binary 0) can indicate that V2 is less than Vc, and a second binary value (e.g., binary 1) can indicate that V2 is greater than Vc. For example, when the RDS(on) of MOSFET 104H is divided by the predefined threshold voltage Vc (e.g., Vc / RDS(on)), the dividend can be a predefined threshold current, which can be compared with drive current IQ to determine the presence or absence of an overcurrent condition. A change in Vc can change the predefined current threshold. Additionally, when the RDS(on) of MOSFET 104H is divided by V2 (e.g., V2 / RDS(on)), the dividend can be drive current IQ. Thus, V2 being less than Vc can indicate that drive current IQ is less than the predefined current threshold and thus no overcurrent condition exists. V2 being greater than Vc can indicate that drive current IQ is greater than the predefined current threshold and thus an overcurrent condition has occurred.

[0046] In response to V2 being greater than Vc (which indicates that an overcurrent condition has occurred), controller 130 can turn off MOSFET 104H, switches 304, 306 to hold the sampled voltage V2 between switch 306 and comparator 308. Capacitor C1 and resistor R1 can form an attenuation circuit that gradually reduces the held voltage V2. As voltage V2 gradually drops below Vc, the COMP signal can indicate that the overcurrent condition no longer exists, and controller 130 can turn on MOSFET 104H and switches 304, 306 to continue driving MOSFET 104H and monitor drive current IQ. In one embodiment, the time for which controller 130 turns off MOSFET 104H in response to detecting an overcurrent condition can depend on the capacitance value of C1 and the resistance value of R1.

[0047] Figure 4 It is a waveform diagram showing the realization of half - bridge over - current protection where no over - current condition is detected in a buck converter in one embodiment. Figure 4 The description can refer to Figures 1 to 3 the components in Figure 4 It corresponds to the scenario where the over - current protection circuit 120 monitors the high - side FET of the buck converter (such as MOSFET 104H). Additionally, Figure 4 it corresponds to the scenario where no over - current condition occurs.

[0048] Figure 4 The waveforms in are the result of the use of an input voltage Vin of 600V, a switching frequency of 500 kilohertz (kHz), a duty cycle of 50%, an inductor L of 80 microhenries (μH), an output capacitor Cout of 1 microfarad (μF), and a load resistor RL of 300 ohms. Waveform 402 is Figure 3 the waveforms of VSW and Vout of the voltage converter (e.g., buck converter) shown. Since Figure 4 the example shown corresponds to the scenario where no over - current condition occurs, Vout appears as a constant voltage, such as approximately 300V. Waveform 404 is the waveform of the PWM control signal for driving MOSFET 104H and the gate - source voltage Vgs of MOSFET 104H. In one aspect, the rising edge of Vgs can occur after MOSFET 104H turns on or after the rising ringing noise, and the PWM control signal can turn off MOSFET 104H before the falling ringing noise. Waveform 406 shows the drain - source voltage Vds of MOSFET 104H.

[0049] Waveform 408 is the waveform of voltage V1 sampled by MOSFET 302 (or the first sample and hold circuit), and may include switching noise caused by switching MOSFET 104H with the PWM control signal. Waveform 410 is the waveform of control signal SH that can control the sampling time of the sample and hold circuit 303. Waveform 412 is the waveform of voltage V2 sampled and held by the sample and hold circuit 303. When control signal SH is high, MOSFET 302 can sample V1, and the sample and hold circuit 303 can hold the sampled voltage as voltage V2. As shown in waveforms 408, 410, and 412, the timing of control signal SH can be controlled (e.g., by controller 130) such that the noise in waveform 408 of V1 is not sampled and held, as shown in waveform 412. In one embodiment, controller 130 can generate control signal SH based on the delayed rising edge of Vgs and the falling edge of the PWM control signal, such as pushing SH high at the rising edge of Vgs and pulling SH low at the falling edge of PWM. For example, if the threshold voltage Vc is set to 80 mV, then V2 in waveform 412 does not exceed 80 mV, and thus an overcurrent condition does not occur. The absence of an overcurrent condition is indicated by waveform 414 of the COMP signal, where the COMP signal remains zero in waveform 414.

[0050] Figure 5 is a waveform diagram showing the implementation of half-bridge overcurrent protection for detecting an overcurrent condition in a buck converter in one embodiment. Figure 5 The description of can refer to Figures 1 to 3 the components in. Figure 5 corresponds to the scenario where the overcurrent protection circuit 120 monitors the high-side FET of the buck converter (such as MOSFET 104H). In addition, Figure 5 corresponds to the scenario where an overcurrent condition occurs.

[0051] Figure 5 The waveforms in are the result of the use of an input voltage Vin of 600 V, a switching frequency of 500 kilohertz (kHz), a duty cycle of 50%, an inductor L of 80 microhenries (μH), an output capacitor Cout of 1 microfarad (μF), and a load resistor RL of 300 ohms. Waveform 502 is Figure 3 the waveforms of VSW and Vout of the voltage converter (e.g., buck converter) shown in. Due to Figure 5The example shown corresponds to a scenario where an overcurrent condition occurs, and Vout is not a constant voltage but increases with the occurrence of the overcurrent condition. Waveform 504 is the waveform of the PWM control signal for driving MOSFET 104H and the gate-source voltage Vgs of MOSFET 104H. In one aspect, the rising edge of Vgs can occur after MOSFET104H is turned on or after the rising ringing noise, and the PWM control signal can turn off MOSFET 104H before the falling ringing noise. Waveform 506 shows the drain-source voltage Vds of MOSFET 104H.

[0052] Waveform 508 is the waveform of the voltage V1 sampled by MOSFET 302 (or the first sample and hold circuit), and may include switching noise caused by switching MOSFET 104H with the PWM control signal. Waveform 510 is the waveform of the control signal SH that can control the sampling time of the sample and hold circuit 303. Waveform 512 is the waveform of the voltage V2 sampled and held by the sample and hold circuit 303. When the control signal SH is high, MOSFET 302 can sample V1, and the sample and hold circuit 303 can hold the sampled voltage as the voltage V2. As shown in waveforms 508, 510, and 512, the timing of the control signal SH can be controlled (e.g., by the controller 130) such that the noise in waveform 508 of V1 is not sampled and held, as shown in waveform 512. In one embodiment, the controller 130 can generate the control signal SH based on the delayed rising edge of Vgs and the falling edge of the PWM control signal, such as pushing SH high at the rising edge of Vgs and pulling SH low at the falling edge of PWM. For example, if the threshold voltage Vc is set to 80 mV, at approximately time t1, V2 may exceed Vc, and the COMP signal may increase. In response to the increase in the COMP signal, the controller 130 can determine that an overcurrent condition has occurred and stop driving MOSFET 104H, as shown in waveform 504 where Vgs remains at zero until time t2. In addition, as shown in waveform 512, the attenuation circuit formed by C1 and R1 can gradually reduce the voltage V2 held until time t2. At time t2, as the COMP signal reaches zero or approaches zero, the controller 130 can start switching MOSFET 104H again.

[0053] Figure 6 is a waveform diagram showing the implementation of half-bridge overcurrent protection for detecting and stabilizing overcurrent conditions in a buck converter in one embodiment. Figure 6 The description of can refer to Figures 1 to 3 the components in Figure 6 corresponds to the scenario where the overcurrent protection circuit 120 monitors the high-side FET of the buck converter (such as MOSFET 104H). In addition,Figure 6 Corresponding to the scenario where an overcurrent condition is detected at time t1 and stabilized at time t3.

[0054] Figure 6 The waveforms in [description] are the result of the use of an input voltage Vin of 600 V, a switching frequency of 500 kilohertz (kHz), a duty cycle of 50%, an inductor L of 80 microhenries (μH), an output capacitor Cout of 1 microfarad (μF), and a load resistor RL of 300 ohms. Waveform 602 is Figure 3 The waveforms of VSW and Vout of the voltage converter (e.g., buck converter) shown. Waveform 604 is the waveform of the PWM control signal for driving MOSFET 104H and the gate-source voltage Vgs of MOSFET 104H. In one aspect, the rising edge of Vgs can occur after MOSFET 104H turns on or after the rising ringing noise, and the PWM control signal can turn off MOSFET 104H before the falling ringing noise. Waveform 606 shows the drain-source voltage Vds of MOSFET 104H.

[0055] Waveform 608 is the waveform of the voltage V1 sampled by MOSFET 302 (or the first sample and hold circuit), and may include switching noise caused by switching MOSFET 104H with the PWM control signal. Waveform 610 is the waveform of the control signal SH capable of controlling the sampling time of the sample and hold circuit 303. Waveform 612 is the waveform of the voltage V2 sampled and held by the sample and hold circuit 303. When the control signal SH is high, MOSFET 302 can sample V1, and the sample and hold circuit 303 can hold the sampled voltage as voltage V2. As shown in waveforms 608, 610, and 612, the timing of the control signal SH can be controlled (e.g., by the controller 130) such that the noise in the waveform 608 of V1 is not sampled and held, as shown in waveform 612. In one embodiment, the controller 130 can generate the control signal SH based on the delayed rising edge of Vgs and the falling edge of the PWM control signal, such as pushing SH high at the rising edge of Vgs and pulling SH low at the falling edge of PWM. For example, if the threshold voltage Vc is set to 80 mV, then at approximately time t1, V2 may exceed Vc, and the COMP signal may increase.

[0056] In response to an increase in the COMP signal, the controller 130 may determine that an overcurrent condition has occurred and stop driving the MOSFET 104H, as shown in waveform 604 where Vgs remains at zero until time t2. As shown in waveform 612, the attenuation circuit formed by C1 and R1 may gradually reduce the voltage V2 held until time t2. At time t2, as indicated by the increase in the COMP signal, the overcurrent condition may be detected again, and the controller 130 may stop driving the MOSFET 104H until time t3. After time t3, the voltage converter stabilizes, and the overcurrent condition is no longer detected. Additionally, the output voltage Vout is not constant and increases between times t1 and t3 when multiple overcurrent conditions are detected. After time t3, the output voltage Vout becomes constant at approximately 300V, and the voltage converter stabilizes.

[0057] For Figure 6 the example shown, if the MOSFET 104H has an RDS(on) of 5 milliohms, the saturated Vds remains below 80 mV, and the drain-source current Ids remains below 16 amperes (A). In one aspect, the load current (e.g., the current drawn by the load RL) may be 10A, which is below 16A. However, the combination of various currents such as the output ripple capacitor charging current, the load current, and the ripple current may cause the current to exceed 16A. The current that causes the overcurrent condition may be unpredictable, so the overcurrent protection circuit 120 may provide cycle-by-cycle monitoring to mitigate the overcurrent condition.

[0058] Figure 7 shows the implementation of overcurrent protection for the other half-bridge in one embodiment. Figure 7 An embodiment is also shown where the overcurrent protection circuit 120 is implemented for a step up converter or a boost converter, such as Figure 2 the voltage converter 200 shown. As Figure 2As shown, the WBG device 102L and the MOSFET 104L form a hybrid switch device 105L. The WBG device 102L can be used as a high-voltage blocker of the hybrid switch device 105L, and the ON / OFF switch of the hybrid switch device 105L is controlled by the MOSFET 104L. When the MOSFET 104L is turned on, the hybrid switch device 105L is also turned on, and the drain-source voltage Vds of the MOSFET 104L is the product of the drain-source current Ids of the MOSFET 104L and the drain-source on-resistance (RDS(on)) of the MOSFET 104L (e.g., Vds = Ids × RDS(on)). In one embodiment, Vds can be several tens of millivolts (mV). In one embodiment, when the MOSFET 104L is turned off, the threshold voltage Vth of the WBG device 102H can be about 15V.

[0059] The MOSFET 302 can be used to monitor the on-state Vds of the MOSFET 104L (e.g., Vds when the MOSFET 104L is turned on). The gate of the MOSFET 302 is connected to the gate of the MOSFET 104L and the output of the driver 103L. Thus, when the MOSFET 104L is turned on, the MOSFET 302 is also turned on. The MOSFET 302 can be in parallel with the MOSFET 104L, where the MOSFET 302 can implement an analog switch for detecting the RDS(on) saturation voltage and for transferring the saturated Vds to the voltage V1.

[0060] In one embodiment, the MOSFET 302 and the MOSFET 104L can be mounted on separate die. In another embodiment, the MOSFET 302 and the MOSFET 104L can be integrated on the same die. If the MOSFET 302 and the MOSFET 104L are integrated on the same die, the detected Vds voltage can be more easily transferred to V1 without the noise voltage generated by the large-current switching of the WBG device 102L and the MOSFET 104L. Whether the MOSFET 302 and the MOSFET 104L are on different die or the same die can depend on the desired implementation of the voltage converter 200.

[0061] The sense resistor Rs can be connected between the source of the MOSFET 302 and the switch node SW. The sense resistor Rs can receive the saturation Vds at the MOSFET 302 into the voltage V1 as a first sample and hold circuit. In one aspect, the voltage V1 can be the on Vds voltage of the MOSFET 104L (e.g., a few tens of mV) without the off Vds voltage (e.g., 15V). The switch 304 can be connected to the source of the MOSFET 302, and the switch 306 can be connected between the switch 304 and the capacitor C1. The switches 304, 306, the capacitor C1, and the resistor R1 can form a second sample and hold circuit 303.

[0062] In one aspect, the voltage V1 can include switching noise generated due to the transition of the MOSFET 104L from the off state to the on state. After the MOSFET 302 samples V1, the sample and hold circuit 303 can perform a second sample to sample the voltage V2. In one embodiment, the sampling timing of V1 (e.g., the switching time of the MOSFET 302 controlled by the controller 130) can control the switches 304 and 306 in the sample and hold circuit 303 to transfer V1 to V2 as the hold voltage. This hold voltage can represent the on-current of the MOSFET 104L and the WBG device 102L. The sampling of the voltage V2 can suppress the switching noise present in the voltage V1, such that the sampled voltage V2 can have the same voltage as V1 without the switching noise. The MOSFET 302 and the sample and hold circuit 303 can perform dual sampling, including the first sample of V1 and the second sample of V2. The sample and hold circuit 303 can be controlled by the controller 130. The switches 304 and 306 can be various types of switches. In one embodiment, the back-to-back connected switches 304, 306 in the sample and hold circuit 303 can eliminate the current path formed through the body diodes of the switches 304, 306.

[0063] In one embodiment, the switches 304, 306 can be MOSFETs or WBG devices, and the controller 130 can send a control signal labeled SH to the gates of the switches 304, 306 to turn on or off the switches 304, 306. In one embodiment, a feedback line can connect the gate and source of the MOSFET 104L to the controller 130, such that the controller 130 can measure the gate-source voltage Vgs of the MOSFET 104L. The measured gate-source voltage Vgs by the controller 130 can indicate whether the MOSFET 104L is on or off. In response to the controller 130 measuring Vgs and the measured Vgs indicating that the MOSFET 104L is on, the controller 130 can send the control signal SH to turn on the switches 304 and 306.

[0064] The voltage V2 and a predefined threshold voltage Vc can be input into the comparator 308. The comparator 308 can output a signal COMP to the controller 130. In one embodiment, the signal COMP can be a binary signal, where a first binary value (e.g., binary 0) can indicate that V2 is less than Vc, and a second binary value (e.g., binary 1) can indicate that V2 is greater than Vc. For example, when the RDS(on) of the MOSFET 104L is divided by the predefined threshold voltage Vc (e.g., Vc / RDS(on)), the dividend can be a predefined threshold current, which can be compared with the drive current IQ to determine the presence or absence of an overcurrent condition. A change in Vc can change the predefined current threshold. Additionally, when the RDS(on) of the MOSFET 104L is divided by V2 (e.g., V2 / RDS(on)), the dividend can be the drive current IQ. Thus, V2 being less than Vc can indicate that the drive current IQ is less than the predefined current threshold and thus no overcurrent condition exists. V2 being greater than Vc can indicate that the drive current IQ is greater than the predefined current threshold and thus an overcurrent condition has occurred.

[0065] In response to V2 being greater than Vc (which indicates that an overcurrent condition has occurred), the controller 130 can turn off the MOSFET 104L, switches 304, 306 to hold the sampled voltage V2 between the switch 306 and the comparator 308. The capacitor C1 and the resistor R1 can form an attenuation circuit that gradually reduces the held voltage V2. As the voltage V2 gradually drops below Vc, the COMP signal can indicate that the overcurrent condition no longer exists. The controller 130 can turn on the MOSFET 104L and switches 304, 306 to continue driving the MOSFET 104L and monitor the drive current IQ. In one embodiment, the time for which the controller 130 turns off the MOSFET 104L in response to detecting an overcurrent condition can depend on the capacitance value of C1 and the resistance value of R1.

[0066] Figure 8 is a waveform diagram showing the implementation of half - bridge overcurrent protection in a boost converter where no overcurrent condition is detected in one embodiment. Figure 8 The description of can refer to Figures 1 to 3 and Figure 7 the components in. Figure 8 corresponds to the scenario where the overcurrent protection circuit 120 monitors the low - side FET of the boost converter (such as the MOSFET 104L). Additionally, Figure 8 corresponds to the scenario where no overcurrent condition occurs.

[0067] Figure 8The waveform in is the result of the use of an input voltage Vin of 140V, a switching frequency of 500 kilohertz (kHz), a duty cycle of 35%, an inductor L of 80 microhenries (μH), an output capacitor Cout of 0.47 microfarads (μF), and a load resistor RL of 100 ohms. Waveform 802 is Figure 3 the waveforms of VSW and Vout of the voltage converter (e.g., boost converter) shown. Since Figure 8 the example shown corresponds to a scenario where no overcurrent condition occurs, Vout appears as a constant voltage, such as approximately 800V. Waveform 804 is the waveform of the PWM control signal for driving MOSFET 104L and the gate-source voltage Vgs of MOSFET 104L. In one aspect, the rising edge of Vgs can occur after MOSFET 104H conducts or after the rising ringing noise, and the PWM control signal can turn off MOSFET 104L before the falling ringing noise. Waveform 806 shows the drain-source voltage Vds of MOSFET 104L.

[0068] Waveform 808 is the waveform of the voltage V1 sampled by the sample-and-hold circuit 303 and may include switching noise caused by switching MOSFET 104L with the PWM control signal. Waveform 810 is the waveform of the control signal SH that can control the sampling time of the sample-and-hold circuit 303. Waveform 812 is the waveform of the voltage V2 sampled and held by the sample-and-hold circuit 303. When the control signal SH is high, MOSFET 302 can sample V1, and the sample-and-hold circuit 303 can hold the sampled voltage as voltage V2. As shown in waveforms 808, 810, and 812, the timing of the control signal SH can be controlled (e.g., by the controller 130) such that the noise in the waveform 808 of V1 is not sampled and held, as shown in waveform 812. In one embodiment, the controller 130 can generate the control signal SH based on the delayed rising edge of Vgs and the falling edge of the PWM control signal, such as pushing SH high at the rising edge of Vgs and pulling SH low at the falling edge of PWM. For example, if the threshold voltage Vc is set to 80mV, then V2 in waveform 812 does not exceed 80mV, and thus no overcurrent condition occurs. The absence of the overcurrent condition is represented by the waveform 814 of the COMP signal, where the COMP signal remains zero in waveform 814.

[0069] Figure 9 is a waveform showing the implementation of half-bridge overcurrent protection for detecting an overcurrent condition in a buck converter in one embodiment. Figure 9 The description of can refer to Figures 1 to 3 and Figure 7 the components in. Figure 9Corresponding to the scenario where the overcurrent protection circuit 120 monitors the low-side FET of the boost converter (such as MOSFET 104L). Additionally, Figure 9 Corresponding to the scenario where an overcurrent condition occurs.

[0070] Figure 9 The waveforms in are the result of the use of an input voltage Vin of 140V, a switching frequency of 500 kilohertz (kHz), a duty cycle of 35%, an inductor L of 80 microhenries (μH), an output capacitor Cout of 0.47 microfarads (μF), and a load resistor RL of 100 ohms. Waveform 902 is Figure 3 The waveforms of VSW and Vout of the voltage converter (e.g., boost converter) shown. Since Figure 9 The example shown corresponds to the scenario where an overcurrent condition occurs, Vout is not a constant voltage but increases with the occurrence of the overcurrent condition. Waveform 904 is the waveform of the PWM control signal for driving MOSFET 104L and the gate-source voltage Vgs of MOSFET 104L. In one aspect, the Vgs rising edge can occur after MOSFET 104H conducts or after the rising ringing noise, and the PWM control signal can turn off MOSFET 104L before the falling ringing noise. Waveform 906 shows the drain-source voltage Vds of MOSFET 104L.

[0071] Waveform 908 is the waveform of voltage V1 sampled by MOSFET 302 and may include switching noise caused by switching MOSFET 104L with a PWM control signal. Waveform 910 is the waveform of control signal SH that can control the sampling time of the sample and hold circuit 303. Waveform 912 is the waveform of voltage V2 sampled and held by the sample and hold circuit 303. When control signal SH is high, MOSFET 302 can sample V1, and the sample and hold circuit 303 can hold the sampled voltage as voltage V2. As shown in waveforms 908, 910, and 912, the timing of control signal SH can be controlled (e.g., by controller 130) such that the noise in waveform 908 of V1 is not sampled and held, as shown in waveform 912. In one embodiment, controller 130 can generate control signal SH based on the delayed rising edge of Vgs and the falling edge of the PWM control signal, such as pushing SH high at the rising edge of Vgs and pulling SH low at the falling edge of PWM. For example, if the threshold voltage Vc is set to 60 mV, at approximately time t1, V2 may exceed Vc, and the COMP signal may increase. In response to the increase in the COMP signal, controller 130 can determine that an overcurrent condition has occurred and stop driving MOSFET 104L, as shown in waveform 904 where Vgs remains at zero until time t2. Additionally, as shown in waveform 912, the attenuation circuit formed by C1 and R1 can gradually reduce voltage V2 held until time t2. At time t2, as the COMP signal reaches zero or approaches zero, controller 130 can start switching MOSFET 104L again.

[0072] Figure 10 is a waveform diagram showing the implementation of half-bridge overcurrent protection for detecting and stabilizing overcurrent conditions in a boost converter in one embodiment. Figure 10 The description of can refer to Figures 1 to 3 and Figure 7 the components in. Figure 10 corresponds to the scenario where the overcurrent protection circuit 120 monitors the low-side FET of the boost converter (such as MOSFET 104H). Additionally, Figure 10 corresponds to the scenario where the overcurrent condition is detected at time t1 and stabilized at time t2.

[0073] Figure 9 The waveforms in are the result of using an input voltage Vin of 140 V, a switching frequency of 500 kilohertz (kHz), a duty cycle of 35%, an inductor L of 80 microhenries (μH), an output capacitor Cout of 0.47 microfarads (μF), and a load resistor RL of 100 ohms. Waveform 1002 is Figure 3Waveforms of VSW and Vout of the shown voltage converter (e.g., boost converter). Waveform 1004 is the waveform of the PWM control signal for driving MOSFET 104L and the gate-source voltage Vgs of MOSFET 104L. In one aspect, the rising edge of Vgs can occur after MOSFET 104H is turned on or after the rising ringing noise, and the PWM control signal can turn off MOSFET 104L before the falling ringing noise. Waveform 1006 shows the drain-source voltage Vds of MOSFET 104L.

[0074] Waveform 1008 is the waveform of the voltage V1 sampled by MOSFET 302 and may include switching noise caused by switching MOSFET 104L with the PWM control signal. Waveform 1010 is the waveform of the control signal SH that can control the sampling time of the sample-and-hold circuit 303. Waveform 1012 is the waveform of the voltage V2 sampled and held by the sample-and-hold circuit 303. When the control signal SH is high, MOSFET 302 can sample V1, and the sample-and-hold circuit 303 can hold the sampled voltage as voltage V2. As shown in waveforms 1008, 1010, and 1012, the timing of the control signal SH can be controlled (e.g., by controller 130) such that the noise in waveform 1008 of V1 is not sampled and held, as shown in waveform 1012. In one embodiment, controller 130 can generate the control signal SH based on the delayed rising edge of Vgs and the falling edge of the PWM control signal, such as pushing SH high at the rising edge of Vgs and pulling SH low at the falling edge of PWM. For example, if the threshold voltage Vc is set to 60 mV, at approximately time t1, V2 may exceed Vc, and the COMP signal may increase.

[0075] In response to the increase in the COMP signal, controller 130 can determine that an overcurrent condition has occurred and stop driving MOSFET 104L, as shown in waveform 1004 where Vgs remains at zero until time t2. As shown in waveform 1012, the attenuation circuit formed by C1 and R1 can gradually reduce the voltage V2 held until time t2. At time t2, as indicated by the increase in the COMP signal, the overcurrent condition can be detected again, and controller 130 can stop driving MOSFET 104L until time t3. After time t3, the voltage converter stabilizes, and the overcurrent condition is no longer detected. Additionally, the output voltage Vout is not constant and increases between times t1 to t3 when multiple overcurrent conditions are detected. After time t3, the output voltage Vout becomes constant at approximately 400V, and the voltage converter stabilizes.

[0076] For Figure 10In the example shown, if the MOSFET 104L has an RDS(on) of 5 milliohms, the saturation Vds remains below 60 mV, and the drain-source current Ids remains below 12 amperes (A). In one aspect, the load current (e.g., the current drawn by the load RL) can be 10 A, which is below 12 A. However, the combination of various currents such as the output ripple capacitor charging current, the load current, and the ripple current may cause the current to exceed 12 A. The current that causes the overcurrent condition may be unpredictable, so the overcurrent protection circuit 120 can provide cycle-by-cycle monitoring to mitigate the overcurrent condition.

[0077] The terms used herein are for the purpose of describing particular embodiments only and are not intended to limit the invention. Unless the context clearly dictates otherwise, the singular forms "a", "an", and "the" as used herein also include the plural forms. It should be further understood that the terms "comprises" and / or "comprising", when used in this specification, specify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0078] The corresponding structures, materials, acts, and equivalents of all means or step-plus-function elements, if any, in the following claims are intended to include any structure, material, or act in combination with other claimed elements to perform the function. The disclosed embodiments of the invention are presented for purposes of illustration and description, but are not meant to be exhaustive or to limit the invention to the disclosed forms. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the invention. The embodiments were chosen and described in order to best explain the principles of the invention and its practical application, and to enable others of ordinary skill in the art to understand the invention for various embodiments with various modifications as are suited to the particular use contemplated.

Claims

1. A device comprising: Half-bridge circuit, comprising: a first hybrid switch device connected to an input voltage, the first hybrid switch device comprising a first wide bandgap (WBG) device and a first field effect transistor (FET) connected in a cascode arrangement, wherein the first WBG device has a higher breakdown voltage than the first FET, and the first WBG device has a larger bandgap than the first FET; and a second hybrid switch device connected to ground, the second hybrid switch device comprising a second WBG device and a second FET connected in a cascode arrangement, wherein the second WBG device has a higher breakdown voltage than the second FET, and the second WBG device has a larger bandgap than the second FET; and a circuit connected to one of the first hybrid switch device and the second hybrid switch device, the circuit being configured to: monitoring a driving current of the half-bridge circuit; and An overcurrent condition of the half-bridge circuit is detected based on the monitored drive current.

2. The device according to claim 1, wherein: The first WBG device and the second WBG device are one of enhancement mode devices and depletion mode devices; and The first FET and the second FET are enhancement mode devices.

3. The apparatus of claim 1 , wherein the circuit comprises: a sense FET connected to one of the first FET and the second FET, the sense FET being configured to sample a drain-source voltage of the FET connected to the sense FET; a sample and hold circuit configured to remove noise from the sampled drain-source voltage to output a held voltage; as well as A comparator is configured to compare the held voltage to a predefined threshold voltage, wherein an output of the comparator indicates the presence or absence of the overcurrent condition. 4 . The apparatus of claim 3 , wherein the sense FET and the FET connected to the sense FET are integrated on the same die. 5 . The apparatus of claim 3 , wherein the circuit further comprises a damping circuit, and in response to the presence of the overcurrent condition, the damping circuit is configured to reduce the sampled drain-source voltage. 6 . The apparatus of claim 1 , wherein the circuit is connected to the first hybrid switching device in response to the half-bridge circuit being part of a buck voltage converter. 7 . The apparatus of claim 1 , wherein the circuit is connected to the second hybrid switching device in response to the half-bridge circuit being part of a boost voltage converter.

8. An apparatus comprising: Controller; Half-bridge circuit, comprising: a first hybrid switch device connected to an input voltage, the first hybrid switch device comprising a first wide bandgap (WBG) device and a first field effect transistor (FET) connected in a cascode arrangement, wherein the first WBG device has a higher breakdown voltage than the first FET, and the first WBG device has a larger bandgap than the first FET; and a second hybrid switch device connected to ground, the second hybrid switch device comprising a second WBG device and a second FET connected in a cascode arrangement, wherein the second WBG device has a higher breakdown voltage than the second FET, and the second WBG device has a larger bandgap than the second FET; and a circuit connected to one of the first hybrid switch device and the second hybrid switch device, the circuit being configured to: monitoring the driving current of the half-bridge circuit; generating a signal based on the monitored drive current, wherein the signal indicates the presence or absence of an overcurrent condition of the half-bridge circuit; and outputting the signal to the controller, The controller is configured to control the half-bridge circuit based on the signal.

9. The device according to claim 8, wherein: The first WBG device and the second WBG device are one of enhancement mode devices and depletion mode devices; and The first FET and the second FET are enhancement mode devices.

10. The apparatus of claim 8, wherein the circuit comprises: a sense FET connected to one of the first FET and the second FET, the sense FET being configured to sample a drain-source voltage of the FET connected to the sense FET; a sample and hold circuit configured to remove noise from the sampled drain-source voltage to output a held voltage; as well as Comparator, configured as: comparing the held voltage to a predefined threshold voltage; as well as The signal is generated to indicate the presence or absence of the overcurrent condition of the half-bridge circuit. 11 . The apparatus of claim 10 , wherein the sense FET and the FET connected to the sense FET are integrated on the same die.

12. The apparatus of claim 10, wherein the circuit further comprises a damping circuit, and in response to the presence of the overcurrent condition, the damping circuit is configured to reduce the sampled drain-source voltage.

13. The apparatus of claim 10, wherein the sense FET is connected to the first FET in response to the half-bridge circuit being part of a buck voltage converter.

14. The apparatus of claim 10, wherein the sense FET is connected to the second FET in response to the half-bridge circuit being part of a boost voltage converter.

15. The apparatus of claim 8, wherein the controller is configured to: In response to the signal indicating that the overcurrent condition of the half-bridge circuit does not exist, continuing to drive the first hybrid switching device and the second hybrid switching device; and In response to the signal indicating that the overcurrent condition of the half-bridge circuit exists, driving the first hybrid switching device and the second hybrid switching device is stopped.

16. An apparatus comprising: a sense field effect transistor FET connected to a FET in a half-bridge circuit, the half-bridge circuit comprising a first hybrid switch device and a second hybrid switch device, wherein the first hybrid switch device comprises a first wide band gap WBG device and a first FET connected in a cascode arrangement, and the second hybrid switch device comprises a second WBG device and a second FET connected in a cascode arrangement; The sample and hold circuit is configured as: sampling the drain-source voltage of the FET; as well as removing noise from the sampled drain-source voltage to output a held voltage; as well as A comparator is configured to compare the held voltage to a predefined threshold voltage, wherein an output of the comparator indicates the presence or absence of an overcurrent condition in the half-bridge circuit.

17. The apparatus of claim 16, wherein the sense FET is connected to the first FET in response to the half-bridge circuit being part of a buck voltage converter.

18. The apparatus of claim 16, wherein the sense FET is connected to the second FET in response to the half-bridge circuit being part of a boost voltage converter.

19. The apparatus of claim 16, wherein the circuit further comprises a damping circuit, and in response to the presence of the overcurrent condition, the damping circuit is configured to reduce the sampled drain-source voltage.

20. The apparatus of claim 16, wherein the sense FET and the FET connected to the sense FET are integrated on the same die.

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