Dynamic bias millimeter wave power amplifier, dynamic bias method, equipment and medium

By copying two currents from the reference current in the dynamic bias circuit and shunting it, the problem of bias voltage fluctuation in the process fluctuation of the traditional dynamic bias circuit is solved, and a stable bias voltage and efficient dynamic bias effect are achieved.

CN120090575AActive Publication Date: 2025-06-03成都明夷电子科技股份有限公司
View PDF 6 Cites 0 Cited by

Patent Information

Application Number
CN202510578215.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-05-07
Publication Date
2025-06-03
Estimated Expiration
2045-05-07

AI Technical Summary

Technical Problem

When traditional dynamic bias circuits face process fluctuations, the bias voltage will fluctuate undesirably, affecting the output power of the power amplifier.

Method used

By copying two currents from the same reference current and shunting the second current, the separated current changes with the process fluctuation and the other does not change, thus realizing the dynamic bias resistance against process fluctuation.

Benefits of technology

The bias voltage is stable, not affected by resistance fluctuations, and does not require clamping voltage, making the operation simple and efficient.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN120090575A_ABST
    Figure CN120090575A_ABST
Patent Text Reader

Abstract

The invention relates to the technical field of integrated circuit design, in particular to a dynamic bias millimeter wave power amplifier, a dynamic bias method, dynamic bias equipment and a medium. A copying unit is arranged to copy from the same reference current and perform relative comparison, and then a dynamic bias unit is arranged to shunt a second current, so that one of the shunted currents changes along with the influence of process fluctuation and the other current does not change, and the function of dynamic bias process fluctuation resistance is realized; the stability of the output voltage is controlled through the shunting proportion of the current, and clamping voltage is not needed.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuit design, and more specifically, to a dynamic bias millimeter-wave power amplifier, a dynamic bias method, a device, and a medium. Background Art

[0002] When designing a millimeter-wave power amplifier, a dynamic bias circuit is often required to improve the output power of the power amplifier. As shown in the traditional dynamic bias circuit Figure 1 , differential RF signals RFIN_N and RFIN_P are input from the gates of the transistors. Transistors M 0N and crystal M 0P are biased to an appropriate operating state by a first bias voltage VB 1 . When the RF signal increases, it will cause the current passing through resistor R 0 to increase, thereby reducing the voltages at the drains of transistors M 0N and M 0P . This will cause the current of transistor M S to decrease, and the voltage drop of resistor R 1 to decrease, so that the bias voltage VB will increase as the RF signal increases. In this way, the amplifier can output sufficient power when a large signal is input.

[0003] In the traditional dynamic bias circuit, the change of the bias voltage VB depends not only on the magnitude of the input signal, but also on the resistance and the transistors. Due to process fluctuations, the resistance values of resistors R 0 and R 1 fluctuate, and at the same time, the sizes and electrical properties of transistors M 0N , M 0P , and M S also fluctuate. These fluctuations will cause the bias voltage VB to fluctuate in an undesired direction. Summary of the Invention

[0004] In view of the problem that the existing dynamic bias circuit is affected by process fluctuations, resulting in an undesired direction of the bias voltage fluctuation value, the present invention proposes a dynamic bias millimeter-wave power amplifier, a dynamic bias method, a device, and a medium. The method copies from the same reference current, makes a relative comparison, and then shunts the second current, so that one of the shunted currents changes with the process fluctuation effect and the other does not change, realizing the function of dynamic bias against process fluctuations. Without a clamping voltage, the stability of the output voltage is controlled by the shunt ratio of the current.

[0005] The specific implementation content of the present invention is as follows: A dynamic bias millimeter-wave power amplifier is connected to a differential input unit and includes a copy unit, a dynamic bias unit, and a power amplification unit. The input end of the copy unit inputs a reference current, and the output end of the copy unit is connected to the input end of the dynamic biasing unit; The input end of the dynamic biasing unit is connected to the differential input unit, and the output end of the dynamic biasing unit is connected to the input end of the power amplification unit; The copy unit is configured to copy the obtained reference current into a first current and a second current; The dynamic biasing unit is configured to first convert the obtained first current into a second bias voltage, then shunt the second current, convert the shunted second current into a third bias voltage, and finally dynamically adjust the shunted second current according to the differential signal obtained from the differential input unit to keep the third bias voltage unchanged; The power amplification unit is configured to amplify the third bias voltage and output it.

[0006] To better implement the present invention, further, the copy unit includes a first copy unit, a second copy unit, and a third copy unit; The input end of the first copy unit inputs a reference current and is connected to the power supply VDD; The input end of the second copy unit is connected to the power supply VDD and the output end of the first copy unit, and the output end of the second copy unit is connected to the input end of the dynamic biasing unit; The input end of the third copy unit is connected to the power supply VDD and the output end of the first copy unit, and the output end of the third copy unit is connected to the input end of the dynamic biasing unit; The first copy unit is configured to copy the reference current to the second copy unit and the third copy unit; The second copy unit is configured to copy the reference current into a first current; The third copy unit is configured to copy the reference current into a second current.

[0007] To better implement the present invention, further, the dynamic biasing unit includes a first dynamic biasing unit and a second dynamic biasing unit; The input end of the first dynamic biasing unit is connected to the output end of the second copy unit, and the output end of the first dynamic biasing unit is connected to the output end of the differential input unit and the input end of the second biasing unit; The input end of the second biasing unit is connected to the output end of the differential input unit and the output end of the third copy unit, and the output end of the second biasing unit is connected to the input end of the power amplification unit; The first dynamic biasing unit is configured to convert the first current into a second bias voltage and output it to the second dynamic biasing unit; The second dynamic biasing unit is configured to shunt a second current according to a second biasing voltage to obtain a third current and a fourth current; convert the fourth current into a third biasing voltage, and form negative feedback based on the third current and the third bias.

[0008] To better implement the present invention, further, the first copying unit includes a reference current source and an MOS transistor MP 0 ; The source of the MOS transistor MP 0 is connected to the power supply VDD, the drain of the MOS transistor MP 0 is connected to the reference current source, and the gate of the MOS transistor MP 0 is connected to the drain of the MOS transistor MP 0 and the second copying unit.

[0009] To better implement the present invention, further, the second copying unit includes an MOS transistor MP 1 ; The gate of the MOS transistor MP 1 is connected to the drain of the MOS transistor MP 0 The source of the MOS transistor MP 1 is connected to the power supply VDD, and the drain of the MOS transistor MP 1 is connected to the input end of the dynamic biasing unit.

[0010] To better implement the present invention, further, the third copying unit includes an MOS transistor MP 2 ; The gate of the MOS transistor MP 2 is lapped between the gate of the MOS transistor MP 0 and the gate of the MOS transistor MP 1 The source of the MOS transistor MP 2 is connected to the power supply VDD, and the drain of the MOS transistor MP 2 is connected to the input end of the dynamic biasing unit.

[0011] To better implement the present invention, further, the first dynamic biasing unit includes an MOS transistor M 1 , a resistor R D , and a resistor R5 3 ; The source of the MOS transistor M 1 is connected to the resistor R 5 grounded, the drain of the MOS transistor M 1 is connected to the drain of the MOS transistor MP 1 , and the gate of the MOS transistor M 1 is connected to the MOS transistor M 1The drain of, resistor R D is connected to the input terminal of; The resistor R D The output terminal of is connected between the input terminal of the second dynamic biasing unit and the output terminal of the differential input unit.

[0012] To better implement the present invention, further, the second dynamic biasing unit includes MOS transistor M 2—1 , MOS transistor M 2—2 , resistor R 6 ; The drain of the MOS transistor M 2—1 is connected to the drain of the MOS transistor MP 2 , the gate of the MOS transistor M 2—1 is connected to the output terminal of the resistor R D , the output terminal of the differential input unit, the source of the MOS transistor M 2—1 is connected to the resistor R grounded 6 ; The drain of the MOS transistor M 2—2 is connected between the drain of the MOS transistor M 2—1 and the drain of the MOS transistor MP 2 , the source of the MOS transistor M 2—2 is connected to the ground terminal, the gate of the MOS transistor M 2—2 is connected to the drain of the MOS transistor M 2—2 , the input terminal of the power amplification unit.

[0013] To better implement the present invention, further, the power amplification unit includes transformer TF 1 , transformer TF 2 , MOS transistors CG_P, CS_P, CS_N, CG_N, capacitor C 1 , capacitor C 2 ; The primary coil of the transformer TF 1 is connected to the input terminal of the differential input module, the center tap of the secondary coil of the transformer TF 1 is connected to the gate of the MOS transistor M 2—2 ; The gate of the MOS transistor CG_P inputs a fourth bias voltage, the drain of the MOS transistor CG_P is connected to the primary coil of the transformer TF 2 , the source of the MOS transistor CG_P is connected to the drain of the MOS transistor CS_P; The gate of the MOS transistor CS_P is connected to the transformer TF 1The secondary coil of the is connected, and the source of the MOS transistor CS_P is connected to the source of the MOS transistor CS_N; The gate of the MOS transistor CS_N is connected to the transformer TF 1 The secondary coil of the, and the drain of the MOS transistor CS_N is connected to the source of the MOS transistor CG_N; The gate of the MOS transistor CG_N inputs a fourth bias voltage, and the drain of the MOS transistor CG_N is connected to the transformer TF 2 The primary coil of the; One end of the capacitor C 1 Is connected between the source of the MOS transistor CG_P and the drain of the MOS transistor CS_P, and the other end is connected between the secondary coil of the transformer TF 1 And the gate of the MOS transistor CS_N; One end of the capacitor C 2 Is connected between the drain of the MOS transistor CS_N and the source of the MOS transistor CG_N, and the other end is connected between the secondary coil of the transformer TF 1 And the gate of the MOS transistor CS_P; The transformer TF 2 The center tap of the primary coil of the is connected to the power supply VDD, and the secondary coil of the transformer TF 2 Outputs the radio frequency signal after the method.

[0014] Based on the above-mentioned dynamic bias millimeter-wave power amplifier, in order to better implement the present invention, further, a dynamic bias method is proposed. First, the obtained reference current is copied as the first current and the second current; secondly, the obtained first current is converted into the second bias voltage, then the second current is shunted, and the shunted second current is converted into the third bias voltage. Finally, the shunted second current is dynamically adjusted according to the differential signal obtained from the differential input unit, and the third bias voltage is kept unchanged.

[0015] In order to better implement the present invention, further, the shunting the second current and converting the shunted second current into the third bias voltage specifically includes: first, according to the second bias voltage, the second current is shunted into the third current and the fourth current, then the fourth current is converted into the third bias voltage and output, and a negative feedback is formed according to the influence of the third current on the output third bias voltage.

[0016] In order to better implement the present invention, further, the dynamically adjusting the shunted second current according to the differential signal obtained from the differential input unit and keeping the third bias voltage unchanged specifically includes: When the input differential signal is a relatively small signal, that is, when the power of the input differential signal is less than the set power threshold, it is biased in the cut-off state according to the first bias voltage of the input differential signal. At this time, there is no current at the second bias voltage node, and the second bias voltage is completely controlled by the first current. The first current and the second current remain unchanged, and the second bias voltage remains unchanged. Therefore, the third current and the fourth current remain unchanged, and the output control voltage, that is, the third bias voltage, remains unchanged. When the input differential signal increases, the differential input unit conducts, there is current at the second bias voltage node, the second bias voltage decreases, the third current decreases, the fourth current increases, and the output voltage, that is, the third bias voltage, remains unchanged, realizing dynamic biasing.

[0017] Based on the above-mentioned dynamically biased millimeter-wave power amplifier, in order to better implement the present invention, further, an electronic device is proposed, including the above-mentioned dynamically biased millimeter-wave power amplifier; the dynamically biased millimeter-wave power amplifier is used to control the stability of the output voltage according to the current shunt ratio, realizing dynamic biasing to resist process fluctuations.

[0018] Based on the above-mentioned dynamically biased millimeter-wave power amplifier, in order to better implement the present invention, further, a computer-readable storage medium is proposed. The computer-readable storage medium includes instructions that, when the instructions run on the above-mentioned electronic device, cause the electronic device to execute the above-mentioned dynamic biasing method.

[0019] The present invention has the following beneficial effects: (1) By using two current copy circuits, the present invention copies from the same reference current, makes a relative comparison, and then shunts the second current, so that one of the shunted currents changes with process fluctuations and the other does not change, realizing the function of dynamic biasing to resist process fluctuations.

[0020] (2) The bias voltage in the current copy circuit of the present invention is only related to the process fluctuations of the transistors, realizing that the bias voltage is not affected by the resistance value fluctuations.

[0021] (3) The present invention does not require a clamping voltage and controls the stability of the output voltage through the current shunt ratio, with simple and efficient operation. Description of the Drawings

[0022] Figure 1 It is a traditional dynamic biasing circuit diagram.

[0023] Figure 2 It is the dynamic biasing circuit diagram provided by the present invention.

[0024] Figure 3 It is the differential cascode power amplifier circuit diagram provided by the present invention.

[0025] Figure 4Schematic block diagram of the overall structure of the dynamic bias millimeter-wave power amplifier provided by the present invention. Detailed implementation manners

[0026] To more clearly illustrate the technical solutions of the embodiments of the present invention, the following will combine the accompanying drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. It should be understood that the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments, and therefore should not be regarded as a limitation of the protection scope. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the protection scope of the present invention.

[0027] In the description of the present invention, it should be noted that unless otherwise clearly defined and limited, the terms "arranged", "connected" and "coupled" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can also be directly connected, or indirectly connected through an intermediate medium, and can be the communication inside two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific situations.

[0028] Embodiment 1: This embodiment proposes a dynamic bias millimeter-wave power amplifier, as Figure 4 shown, including a copy unit, a dynamic bias unit, and a power amplification unit; The input end of the copy unit inputs a reference current, and the output end of the copy unit is connected to the input end of the dynamic bias unit; The input end of the dynamic bias unit is connected to the differential input unit, and the output end of the dynamic bias unit is connected to the input end of the power amplification unit; The copy unit is used to copy the obtained reference current into a first current and a second current; The dynamic bias unit is used to first convert the obtained first current into a second bias voltage, then shunt the second current, and convert the shunted second current into a third bias voltage, and finally dynamically adjust the shunted second current according to the differential signal obtained from the differential input unit to keep the third bias voltage unchanged; The power amplification unit is used to amplify the third bias voltage and output it.

[0029] The copy unit includes a first copy unit, a second copy unit, and a third copy unit; The input end of the first copy unit inputs a reference current and is connected to the power supply VDD; The input end of the second copy unit is connected to the power supply VDD and the output end of the first copy unit, and the output end of the second copy unit is connected to the input end of the dynamic bias unit; The input end of the third copy unit is connected to the power supply VDD and the output end of the first copy unit, and the output end of the third copy unit is connected to the input end of the dynamic bias unit; The first copy unit is configured to copy a reference current to the second copy unit and the third copy unit; The second copy unit is configured to copy the reference current into a first current; The third copy unit is configured to copy the reference current into a second current.

[0030] The dynamic bias unit includes a first dynamic bias unit and a second dynamic bias unit; The input end of the first dynamic bias unit is connected to the output end of the second copy unit, and the output end of the first dynamic bias unit is connected to the output end of the differential input unit and the input end of the second bias unit; The input end of the second bias unit is connected to the output end of the differential input unit and the output end of the third copy unit, and the output end of the second bias unit is connected to the input end of the power amplification unit; The first dynamic bias unit is configured to convert the first current into a second bias voltage and output it to the second dynamic bias unit; The second dynamic bias unit is configured to shunt the second current according to the second bias voltage to obtain a third current and a fourth current; convert the fourth current into a third bias voltage, and form a negative feedback according to the third current and the third bias.

[0031] Working principle: In this embodiment, by setting a copy unit to copy from the same reference current and making a relative comparison, and then setting a dynamic bias unit to shunt the second current, so that one of the shunted currents changes with process fluctuations and the other does not change, the function of dynamic bias against process fluctuations is realized. There is no need for a clamping voltage, and the stability of the output voltage is controlled by the shunt ratio of the current.

[0032] Embodiment 2: On the basis of the above Embodiment 1, as Figure 2 shown, the specific structure of the copy circuit is described in detail.

[0033] The first copy unit includes a reference current source and a MOS transistor MP 0 ; The MOS transistor MP 0 has its source connected to the power supply VDD, and the MOS transistor MP 0The drain of the MOS transistor MP is connected to a reference current source. 0 The gate of the MOS transistor MP 0 is connected to the drain of the MOS transistor MP and the second copy unit.

[0034] The second copy unit includes a MOS transistor MP 1 ; The gate of the MOS transistor MP 1 is connected to the drain of the MOS transistor MP 0 The source of the MOS transistor MP 1 is connected to the power supply VDD. The drain of the MOS transistor MP 1 is connected to the input terminal of the dynamic bias unit.

[0035] The third copy unit includes a MOS transistor MP 2 ; The gate of the MOS transistor MP 2 is overlapped between the gate of the MOS transistor MP 0 and the gate of the MOS transistor MP 1 The source of the MOS transistor MP 2 is connected to the power supply VDD. The drain of the MOS transistor MP 2 is connected to the input terminal of the dynamic bias unit.

[0036] Working principle: First, the differential transistors M 0N and M 0P for differential signal input are the same as those of the traditional dynamic bias and are both biased in a suitable working state by VB 1 Looking from the left at the top of the differential transistors, first there is a current mirror. MP 0 is a PMOS transistor, and its function is to copy out the reference current I REF On the right, MP 1 and MP 2 respectively copy the reference current I REF into the first current I 1 and the second current I 2 where the magnitudes of the first current I 1 and the second current I 2 are related to the sizes of the PMOS transistors for copying; For example: Among them, E 1 / L 1 is the aspect ratio of MP 1 and E REF / L REF is the aspect ratio of MP 0

[0037] The other parts of this embodiment are the same as those of the above-mentioned Embodiment 1, so they will not be elaborated here.

[0038] Embodiment 3: Based on any one of the above-mentioned Embodiments 1-2, this embodiment will illustrate the specific structure of the dynamic bias unit with a specific example as Figure 2 shown.

[0039] The first dynamic bias unit includes MOS transistor M 1 , resistor R D , resistor R 5 ; The source of the MOS transistor M 1 is connected to the grounded resistor R 5 , the drain of the MOS transistor M 1 is connected to the drain of the MOS transistor MP 1 , and the gate of the MOS transistor M 1 is connected to the drain of the MOS transistor M 1 and the input terminal of the resistor R D ; The output terminal of the resistor R D is connected between the input terminal of the second dynamic bias unit and the output terminal of the differential input unit.

[0040] The second dynamic bias unit includes MOS transistor M 2—1 , MOS transistor M 2—2 , resistor R 6 ; The drain of the MOS transistor M 2—1 is connected to the drain of the MOS transistor MP 2 , the gate of the MOS transistor M 2—1 is connected to the output terminal of the resistor R D and the output terminal of the differential input unit, the source of the MOS transistor M 2—1 is connected to the grounded resistor R 6 ; The drain of the MOS transistor M 2—2 is connected between the drain of the MOS transistor M 2—1 and the drain of the MOS transistor MP 2 , the source of the MOS transistor M 2—2 is connected to the ground terminal, and the gate of the MOS transistor M 2—2 is connected to the drain of the MOS transistor M 2—2 and the input terminal of the power amplification unit.

[0041] Working principle: When the first current I 1 is copied, the transistor M 1Convert this current into a corresponding second bias voltage VB 2 , and output it through a large resistor R D . The second bias voltage VB 2 turns on M 2—1 , and the current flowing through M 2—1 is the third current I 2—1 . The function of this current is to shunt from the second current I 2 , so as to form negative feedback on the influence of the output bias voltage. The fourth current I 2—2 is the current passing through M 2—2 . M 2—2 converts this current into a corresponding third bias voltage VB 3 and outputs it.

[0042] The working principle of this dynamic bias is as follows: when the input differential signal is a relatively small signal, that is, when the power of the input differential signal is less than the set power threshold, M 0N and M 0P remain in the same working state, and are biased in the cut-off state by the first bias voltage VB 1 . At this time, there is no current at the node of the second bias voltage VB 2 . The second bias voltage VB 2 is completely controlled by the first current I 1 . The first current I 1 and the second current I 2 remain unchanged, and the second bias voltage VB 2 remains unchanged. Therefore, I 2—1 and I 2—2 remain unchanged, and the output control voltage VB 3 remains unchanged; when the input differential signal increases, causing M 0N and M 0P to turn on, there is current flowing through the tube at this time. There is current at the node of the second bias voltage VB 2 . There will be a voltage drop across the resistor R D . The second bias voltage VB 2 decreases, which causes the third current I 2—1 to decrease and the fourth current I 2—2 to increase, so that the output voltage, that is, the third bias voltage VB 3 increases, achieving the effect of dynamic bias; in this embodiment, the set power threshold is related to the saturation power psat of the power amplifier and the gain gain of the power amplifier. When the power of the input differential signal is less than psat - gain, it is a relatively small signal.

[0043] The principle of this dynamic bias against process fluctuations is as follows: Since the first current I 1 and the second current I 2 are both from the reference current IREF The first current I 1 and the second current I 2 The fluctuation direction is consistent. Assuming that the first current I 1 and the second current I 2 At the same time, it is too large, which will cause the second bias voltage VB 2 is too large, resulting in the third current I 2—1 Too large, and the second current I 2 The large size of the fourth current I 2—2 The change approaches 0, so the third bias voltage VB 3 Almost unaffected by process fluctuations.

[0044] The other parts of this embodiment are the same as any one of the above-mentioned embodiments 1-2, so they will not be repeated here.

[0045] Embodiment 4: This embodiment is based on any one of the above embodiments 1 to 3. Figure 3 As shown, the structure of the power amplification unit is described with a specific embodiment.

[0046] The power amplification unit includes a transformer TF 1 , Transformer TF 2 , MOS tube CG_P, MOS tube CS_P, MOS tube CS_N, MOS tube CG_N, capacitor C 1 , capacitor C 2 ; The transformer TF 1 The primary coil is connected to the input terminal of the differential input module, and the transformer TF 1 The center tap of the secondary coil is connected to the MOS tube M 2—2 The gate connection; The gate of the MOS tube CG_P inputs a fourth bias voltage, and the drain of the MOS tube CG_P is connected to the transformer TF. 2 The primary coil is connected to the MOS tube CG_P, and the source of the MOS tube CG_P is connected to the drain of the MOS tube CS_P; The gate of the MOS tube CS_P is connected to the transformer TF 1 The secondary coil is connected, and the source of the MOS tube CS_P is connected to the source of the MOS tube CS_N; The gate of the MOS tube CS_N is connected to the transformer TF 1 The secondary coil is connected, and the drain of the MOS tube CS_N is connected to the source of the MOS tube CG_N; The gate of the MOS tube CG_N inputs a fourth bias voltage, and the drain of the MOS tube CG_N is connected to the transformer TF2 is connected to the primary coil; The capacitor C 1 has one end connected between the source of the MOS transistor CG_P and the drain of the MOS transistor CS_P, and the other end connected between the secondary coil of the transformer TF 1 and the gate of the MOS transistor CS_N; The capacitor C 2 has one end connected between the drain of the MOS transistor CS_N and the source of the MOS transistor CG_N, and the other end connected between the secondary coil of the transformer TF 1 and the gate of the MOS transistor CS_P; The transformer TF 2 has the center tap of its primary coil connected to the power supply VDD, and the secondary coil of the transformer TF 2 outputs the radio frequency signal after the method.

[0047] Working principle: The third bias voltage VB generated by dynamic biasing 3 is connected to the differential cascode power amplifier, such as Figure 3 , the transformer TF 1 and the transformer TF 2 are transformers, which are commonly used for amplifier matching and biasing. The gate bias voltages of the cascode transistors CS_P and CS_N are given by the center tap of the secondary coil of the transformer connected to the bias voltage VB of the dynamic bias 3 . The gate bias voltages of the common gate transistors CG_P and CG_N are given by the fourth bias voltage VB from the ordinary bias circuit 4 . In addition, this amplifier uses neutralizing capacitors C 1 and C 2 to reduce the parasitic capacitance Cgd of the cascode transistor, thereby improving the gain and OP1dB. Finally, the radio frequency signal is output through the transformer TF 2 . The drain power supply bias VDD of the amplifier is given by the center tap of the primary coil of TF 2 .

[0048] Other parts of this embodiment are the same as any one of the above-mentioned Embodiment 1 - Embodiment 3, so they will not be described in detail.

[0049] Embodiment 5: Based on any one of the above-mentioned Embodiment 1 - Embodiment 4, this embodiment proposes a dynamic biasing method. First, the obtained reference current is copied as the first current and the second current; secondly, the obtained first current is converted into the second bias voltage, then the second current is shunted, and the shunted second current is converted into the third bias voltage. Finally, the shunted second current is dynamically adjusted according to the differential signal obtained from the differential input unit, and the third bias voltage remains unchanged.

[0050] Shunt the second current and convert the shunted second current into a third bias voltage, which specifically includes: First, according to the second bias voltage, shunt the second current into a third current and a fourth current, then convert the fourth current into a third bias voltage for output, and form a negative feedback based on the influence of the third current on the output third bias voltage.

[0051] Dynamically adjust the shunted second current according to the differential signal obtained from the differential input unit and keep the third bias voltage unchanged, which specifically includes: When the input differential signal is a relatively small signal, that is, when the power of the input differential signal is less than the set power threshold, it is biased in the cut-off state according to the first bias voltage of the input differential signal. At this time, there is no current at the second bias voltage node, and the second bias voltage is completely controlled by the first current. The first current and the second current remain unchanged, and the second bias voltage remains unchanged. Therefore, the third current and the fourth current remain unchanged, and the output control voltage, that is, the third bias voltage, remains unchanged; when the input differential signal increases, the differential input unit conducts, there is current at the second bias voltage node, the second bias voltage decreases, the third current decreases, the fourth current increases, and the output voltage, that is, the third bias voltage, increases, realizing dynamic biasing.

[0052] Other parts of this embodiment are the same as any one of the above Embodiment 1 - Embodiment 4, so they will not be elaborated here.

[0053] Embodiment 6: Based on any one of the above Embodiment 1 - Embodiment 5, this embodiment proposes an electronic device, including the above dynamic bias millimeter-wave power amplifier; the dynamic bias millimeter-wave power amplifier is used to control the stability of the output voltage according to the shunt ratio of the current, and realize dynamic bias against process fluctuations.

[0054] A computer-readable storage medium is proposed. The computer-readable storage medium includes instructions. When the instructions run on the above electronic device, the electronic device is enabled to execute the above dynamic bias method.

[0055] Other parts of this embodiment are the same as any one of the above Embodiment 1 - Embodiment 5, so they will not be elaborated here.

[0056] The above are only preferred embodiments of the present invention, and do not impose any form of limitation on the present invention. Any simple modification and equivalent change made to the above embodiments based on the technical essence of the present invention all fall within the protection scope of the present invention.

Claims

1. A dynamically biased millimeter wave power amplifier connected to a differential input unit; characterized in that: Including copy unit, dynamic bias unit, power amplifier unit; The reference current is input to the input end of the copy unit, and the output end of the copy unit is connected to the input end of the dynamic bias unit; The input end of the dynamic bias unit is connected to the differential input unit, and the output end of the dynamic bias unit is connected to the input end of the power amplification unit; The copy unit is used to copy the acquired reference current into the first current and the second current; The dynamic bias unit is used to first convert the acquired first current into a second bias voltage, then shunt the second current and convert the shunted second current into a third bias voltage, and finally dynamically adjust the shunted second current according to the differential signal obtained from the differential input unit to achieve dynamic bias of the third bias voltage; The power amplification unit is used to amplify and output the third bias voltage.

2. A dynamically biased millimeter wave power amplifier according to claim 1, characterized in that: The copying unit includes a first copying unit, a second copying unit, and a third copying unit; The input end of the first copy unit inputs a reference current and is connected to a power source VDD; The input end of the second copy unit is connected to the power supply VDD and the output end of the first copy unit, and the output end of the second copy unit is connected to the input end of the dynamic bias unit; The input end of the third copy unit is connected to the power supply VDD and the output end of the first copy unit, and the output end of the third copy unit is connected to the input end of the dynamic bias unit; The first copy unit is used to copy the reference current to the second copy unit and the third copy unit; The second copy unit is used to copy the reference current into the first current; The third copy unit is used to copy the reference current into the second current.

3. A dynamically biased millimeter wave power amplifier according to claim 2, characterized in that: The dynamic bias unit includes a first dynamic bias unit and a second dynamic bias unit; The input end of the first dynamic bias unit is connected to the output end of the second copy unit, and the output end of the first dynamic bias unit is connected to the output end of the differential input unit and the input end of the second bias unit; The input end of the second bias unit is connected to the output end of the differential input unit and the output end of the third copy unit, and the output end of the second bias unit is connected to the input end of the power amplification unit; The first dynamic bias unit is used to convert the first current into a second bias voltage and output it to the second dynamic bias unit; The second dynamic bias unit is used to divide the second current according to the second bias voltage to obtain a third current and a fourth current; The fourth current is converted into a third bias voltage, and negative feedback is formed according to the third current and the third bias voltage.

4. A dynamically biased millimeter wave power amplifier according to claim 3, characterized in that: The first copy unit includes a reference current source and a MOS tube MP0; The source of the MOS transistor MP0 is connected to the power source VDD, the drain of the MOS transistor MP0 is connected to the reference current source, and the gate of the MOS transistor MP0 is connected to the drain of the MOS transistor MP0 and the second copy unit.

5. A dynamically biased millimeter wave power amplifier according to claim 4, characterized in that: The second copy unit includes a MOS tube MP1; The gate of the MOS transistor MP1 is connected to the drain of the MOS transistor MP0 , the source of the MOS transistor MP1 is connected to the power supply VDD, and the drain of the MOS transistor MP1 is connected to the input end of the dynamic bias unit.

6. A dynamically biased millimeter wave power amplifier according to claim 5, characterized in that: The third copy unit includes a MOS tube MP2; The MOS tube MP2; The gate of the MOS transistor MP2 is connected between the gate of the MOS transistor MP0 and the gate of the MOS transistor MP1, the source of the MOS transistor MP2 is connected to the power supply VDD, and the drain of the MOS transistor MP2 is connected to the input end of the dynamic bias unit.

7. A dynamically biased millimeter wave power amplifier according to claim 6, characterized in that: The first dynamic bias unit includes a MOS tube M1, a resistor R D , resistor R5; The source of the MOS tube M1 is connected to the grounded resistor R5, the drain of the MOS tube M1 is connected to the drain of the MOS tube MP1, and the gate of the MOS tube M1 is connected to the drain of the MOS tube M1 and the resistor R D The input terminal connection of The resistor R D The output end of the differential input unit is connected between the input end of the second dynamic bias unit and the output end of the differential input unit.

8. The dynamic bias millimeter wave power amplifier according to claim 7, characterized in that: The second dynamic bias unit includes a MOS tube M 2—1 、MOS tube M 2—2 , resistor R6; The MOS tube M 2—1 The drain of the MOS tube MP2 is connected to the drain of the MOS tube MP2. 2—1 The gate and the resistor R D The output end of the MOS tube M is connected to the output end of the differential input unit. 2—1 The source is connected to the grounded resistor R6; The MOS tube M 2—2 The drain of the MOS tube M 2—1 The drain of the MOS tube MP2 is connected to the drain of the MOS tube M 2—2 The source of MOS tube M is connected to the ground terminal. 2—2 The gate and MOS tube M 2—2 The drain of the power amplifier unit is connected.

9. The dynamic bias millimeter wave power amplifier according to claim 8, characterized in that: The power amplification unit includes a transformer TF1, a transformer TF2, a MOS tube CG_P, a MOS tube CS_P, a MOS tube CS_N, a MOS tube CG_N, a capacitor C1, and a capacitor C2; The primary coil of the transformer TF1 is connected to the input end of the differential input module, and the center tap of the secondary coil of the transformer TF1 is connected to the MOS tube M 2—2 The gate connection; A fourth bias voltage is input to the gate of the MOS transistor CG_P, a drain of the MOS transistor CG_P is connected to the primary coil of the transformer TF2, and a source of the MOS transistor CG_P is connected to the drain of the MOS transistor CS_P; The gate of the MOS transistor CS_P is connected to the secondary coil of the transformer TF1, and the source of the MOS transistor CS_P is connected to the source of the MOS transistor CS_N; The gate of the MOS transistor CS_N is connected to the secondary coil of the transformer TF1, and the drain of the MOS transistor CS_N is connected to the source of the MOS transistor CG_N; A fourth bias voltage is input to the gate of the MOS transistor CG_N, and a drain of the MOS transistor CG_N is connected to the primary coil of the transformer TF2; One end of the capacitor C1 is connected between the source of the MOS transistor CG_P and the drain of the MOS transistor CS_P, and the other end is connected between the secondary coil of the transformer TF1 and the gate of the MOS transistor CS_N; One end of the capacitor C2 is connected between the drain of the MOS transistor CS_N and the source of the MOS transistor CG_N, and the other end is connected between the secondary coil of the transformer TF1 and the gate of the MOS transistor CS_P; The center tap of the primary coil of the transformer TF2 is connected to the power supply VDD, and the secondary coil of the transformer TF2 outputs the amplified radio frequency signal.

10. A dynamic bias method, characterized in that: First, the obtained reference current is copied into a first current and a second current; secondly, the obtained first current is converted into a second bias voltage, and then the second current is shunted, and the shunted second current is converted into a third bias voltage, and finally, the shunted second current is dynamically adjusted according to the differential signal obtained from the differential input unit, keeping the third bias voltage unchanged.

11. A dynamic bias method according to claim 10, characterized in that: The method of shunting the second current and converting the shunted second current into a third bias voltage specifically includes: firstly, according to the second bias voltage, shunting the second current into a third current and a fourth current, then converting the fourth current into a third bias voltage output, and forming negative feedback according to the influence of the third current on the output third bias voltage.

12. A dynamic bias method according to claim 11, characterized in that: The dynamically adjusting the second current after shunting according to the differential signal obtained from the differential input unit to keep the third bias voltage unchanged specifically includes: When the power of the input differential signal is less than the set power threshold, the first bias voltage according to the input differential signal is biased in the cut-off state. At this time, there is no current at the second bias voltage node, and the second bias voltage is completely controlled by the first current. The first current and the second current remain unchanged, and the second bias voltage remains unchanged. Therefore, the third current and the fourth current remain unchanged, and the output control voltage, the third bias voltage, remains unchanged; when the input differential signal increases, the differential input unit is turned on, there is current at the second bias voltage node, the second bias voltage decreases, the third current decreases, the fourth current increases, and the output voltage, that is, the third bias voltage, increases, thereby realizing dynamic biasing that is resistant to process fluctuations.

13. An electronic device, characterized in that: It includes a dynamically biased millimeter-wave power amplifier as described in any one of claims 1 to 9; the dynamically biased millimeter-wave power amplifier is used to control the stability of the output voltage according to the current diversion ratio to achieve dynamic bias that is resistant to process fluctuations.

14. A computer-readable storage medium, characterized in that: The computer-readable storage medium comprises instructions, and when the instructions are executed on the electronic device as claimed in claim 13, the electronic device executes the dynamic bias method as claimed in any one of claims 10-12.

Citation Information

Patent Citations

  • CMOS power amplifier with high linearity

    CN106712729A

  • Bias and gain adjustable radio frequency amplifier

    CN113992165A

  • Differential amplifier system and method for improving common mode stability

    CN115333491A

  • Millimeter wave reconfigurable power amplifier with high linearity and high output power

    CN116915193A

  • Current bias circuit and power amplifier system

    CN117713714A