A dynamic bias millimeter-wave power amplifier, dynamic bias method, device and medium

Abstract

The present invention relates to the technical field of integrated circuit design. Specifically, it relates to a dynamic bias millimeter-wave power amplifier, a dynamic bias method, a device, and a medium. By setting a copy unit to copy from the same reference current and making a relative comparison, and then setting a dynamic bias unit to shunt the second current, so that one of the shunted currents changes with the process fluctuation and the other does not change, the function of dynamic bias against process fluctuation is realized. The stability of the output voltage is controlled by the shunt ratio of the current, and no clamping voltage is required.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuit design, and more specifically, to a dynamic bias millimeter-wave power amplifier, a dynamic bias method, a device, and a medium. Background Art

[0002] When designing a millimeter-wave power amplifier, a dynamic bias circuit is often required to improve the output power of the power amplifier. As shown in the traditional dynamic bias circuit Figure 1 , differential RF signals RFIN_N and RFIN_P are input from the gates of the transistors. Transistors M 0N and crystal M 0P are biased to an appropriate operating state by a first bias voltage VB1. When the RF signal increases, the current passing through resistor R0 will increase, causing the voltages at the drains of transistors M 0N and transistor M 0P to decrease. This will cause the current of transistor M S to decrease and the voltage drop across resistor R1 to decrease, so that the bias voltage VB will increase as the RF signal increases. In this way, the amplifier can output sufficient power when a large signal is input.

[0003] In the traditional dynamic bias circuit, the change of the bias voltage VB depends not only on the magnitude of the input signal but also on the resistors and transistors. Due to process fluctuations, the resistance values of resistors R0 and R1 fluctuate, and at the same time, the sizes and electrical properties of transistors M 0N , transistor M 0P , transistor M S also fluctuate. These fluctuations will cause the bias voltage VB to fluctuate in an undesired direction. Summary of the Invention

[0004] Aiming at the problem that the existing dynamic bias circuit is affected by process fluctuations, resulting in the bias voltage fluctuating in an undesired direction, the present invention proposes a dynamic bias millimeter-wave power amplifier, a dynamic bias method, a device, and a medium. The method copies from the same reference current, makes a relative comparison, and then shunts the second current, so that one of the shunted currents changes with process fluctuations and the other does not, realizing the function of dynamic bias against process fluctuations. Without a clamping voltage, the stability of the output voltage is controlled by the shunt ratio of the current.

[0005] The specific implementation content of the present invention is as follows:

[0006] A dynamic bias millimeter-wave power amplifier is connected to a differential input unit; it includes a copy unit, a dynamic bias unit, and a power amplification unit;

[0007] A reference current is input to the input end of the copy unit, and the output end of the copy unit is connected to the input end of the dynamic bias unit;

[0008] The input end of the dynamic bias unit is connected to the differential input unit, and the output end of the dynamic bias unit is connected to the input end of the power amplification unit;

[0009] The copy unit is used to copy the acquired reference current into a first current and a second current;

[0010] The dynamic bias unit is used to first convert the acquired first current into a second bias voltage, then shunt the second current, and convert the shunted second current into a third bias voltage, and finally dynamically adjust the shunted second current according to the differential signal acquired from the differential input unit to keep the third bias voltage unchanged;

[0011] The power amplification unit is used to amplify the third bias voltage and output it.

[0012] To better implement the present invention, further, the copy unit includes a first copy unit, a second copy unit, and a third copy unit;

[0013] The reference current is input to the input end of the first copy unit, and it is connected to the power supply VDD;

[0014] The input end of the second copy unit is connected to the power supply VDD and the output end of the first copy unit, and the output end of the second copy unit is connected to the input end of the dynamic bias unit;

[0015] The input end of the third copy unit is connected to the power supply VDD and the output end of the first copy unit, and the output end of the third copy unit is connected to the input end of the dynamic bias unit;

[0016] The first copy unit is used to copy the reference current to the second copy unit and the third copy unit;

[0017] The second copy unit is used to copy the reference current into a first current;

[0018] The third copy unit is used to copy the reference current into a second current.

[0019] To better implement the present invention, further, the dynamic bias unit includes a first dynamic bias unit and a second dynamic bias unit;

[0020] The input end of the first dynamic bias unit is connected to the output end of the second copy unit, and the output end of the first dynamic bias unit is connected to the output end of the differential input unit and the input end of the second bias unit;

[0021] The input end of the second biasing unit is connected to the output end of the differential input unit and the output end of the third copying unit, and the output end of the second biasing unit is connected to the input end of the power amplification unit;

[0022] The first dynamic biasing unit is configured to convert a first current into a second biasing voltage and output the second biasing voltage to the second dynamic biasing unit;

[0023] The second dynamic biasing unit is configured to shunt a second current according to the second biasing voltage to obtain a third current and a fourth current; convert the fourth current into a third biasing voltage, and form negative feedback according to the third current and the third biasing voltage.

[0024] To better implement the present invention, further, the first copying unit includes a reference current source and a MOS transistor MP0;

[0025] The source of the MOS transistor MP0 is connected to the power supply VDD, the drain of the MOS transistor MP0 is connected to the reference current source, and the gate of the MOS transistor MP0 is connected to the drain of the MOS transistor MP0 and the second copying unit.

[0026] To better implement the present invention, further, the second copying unit includes a MOS transistor MP1;

[0027] The gate of the MOS transistor MP1 is connected to the drain of the MOS transistor MP0, the source of the MOS transistor MP1 is connected to the power supply VDD, and the drain of the MOS transistor MP1 is connected to the input end of the dynamic biasing unit.

[0028] To better implement the present invention, further, the third copying unit includes a MOS transistor MP2;

[0029] The gate of the MOS transistor MP2 is connected between the gate of the MOS transistor MP0 and the gate of the MOS transistor MP1, the source of the MOS transistor MP2 is connected to the power supply VDD, and the drain of the MOS transistor MP2 is connected to the input end of the dynamic biasing unit.

[0030] To better implement the present invention, further, the first dynamic biasing unit includes a MOS transistor M1, a resistor R D , a resistor R53;

[0031] The source of the MOS transistor M1 is connected to the resistor R5 grounded, the drain of the MOS transistor M1 is connected to the drain of the MOS transistor MP1, and the gate of the MOS transistor M1 is connected to the drain of the MOS transistor M1 and the input end of the resistor R D ;

[0032] The resistor RD The output terminal is connected between the input terminal of the second dynamic biasing unit and the output terminal of the differential input unit.

[0033] To better implement the present invention, further, the second dynamic biasing unit includes MOS transistor M 2—1 , MOS transistor M 2—2 , and resistor R6;

[0034] The drain of the MOS transistor M 2—1 is connected to the drain of the MOS transistor MP2, the gate of the MOS transistor M 2—1 is connected to the output terminal of the resistor R D and the output terminal of the differential input unit, and the source of the MOS transistor M 2—1 is connected to the grounded resistor R6;

[0035] The drain of the MOS transistor M 2—2 is connected between the drain of the MOS transistor M 2—1 and the drain of the MOS transistor MP2, the source of the MOS transistor M 2—2 is connected to the ground terminal, and the gate of the MOS transistor M 2—2 is connected to the drain of the MOS transistor M 2—2 and the input terminal of the power amplification unit.

[0036] To better implement the present invention, further, the power amplification unit includes transformer TF1, transformer TF2, MOS transistor CG_P, MOS transistor CS_P, MOS transistor CS_N, MOS transistor CG_N, capacitor C1, and capacitor C2;

[0037] The primary coil of the transformer TF1 is connected to the input terminal of the differential input module, and the center tap of the secondary coil of the transformer TF1 is connected to the gate of the MOS transistor M 2—2 ;

[0038] The gate of the MOS transistor CG_P inputs a fourth bias voltage, the drain of the MOS transistor CG_P is connected to the primary coil of the transformer TF2, and the source of the MOS transistor CG_P is connected to the drain of the MOS transistor CS_P;

[0039] The gate of the MOS transistor CS_P is connected to the secondary coil of the transformer TF1, and the source of the MOS transistor CS_P is connected to the source of the MOS transistor CS_N;

[0040] The gate of the MOS transistor CS_N is connected to the secondary coil of the transformer TF1, and the drain of the MOS transistor CS_N is connected to the source of the MOS transistor CG_N;

[0041] The gate of the MOS transistor CG_N receives a fourth bias voltage, and the drain of the MOS transistor CG_N is connected to the primary coil of the transformer TF2;

[0042] One end of the capacitor C1 is connected between the source of the MOS transistor CG_P and the drain of the MOS transistor CS_P, and the other end is connected between the secondary coil of the transformer TF1 and the gate of the MOS transistor CS_N;

[0043] One end of the capacitor C2 is connected between the drain of the MOS transistor CS_N and the source of the MOS transistor CG_N, and the other end is connected between the secondary coil of the transformer TF1 and the gate of the MOS transistor CS_P;

[0044] The center tap of the primary coil of the transformer TF2 is connected to the power supply VDD, and the secondary coil of the transformer TF2 outputs the radio frequency signal after the method.

[0045] Based on the above-mentioned dynamic bias millimeter-wave power amplifier, in order to better implement the present invention, further, a dynamic bias method is proposed. First, the obtained reference current is copied as the first current and the second current; secondly, the obtained first current is converted into a second bias voltage, then the second current is shunted, and the shunted second current is converted into a third bias voltage. Finally, the shunted second current is dynamically adjusted according to the differential signal obtained from the differential input unit, and the third bias voltage is kept unchanged.

[0046] In order to better implement the present invention, further, the shunting of the second current and the conversion of the shunted second current into a third bias voltage specifically include: first, according to the second bias voltage, the second current is shunted into a third current and a fourth current, then the fourth current is converted into a third bias voltage for output, and a negative feedback is formed according to the influence of the third current on the output third bias voltage.

[0047] In order to better implement the present invention, further, the dynamic adjustment of the shunted second current according to the differential signal obtained from the differential input unit and keeping the third bias voltage unchanged specifically includes:

[0048] When the input differential signal is a relatively small signal, that is, when the power of the input differential signal is less than the set power threshold, it is biased in the cut-off state according to the first bias voltage of the input differential signal. At this time, there is no current at the second bias voltage node, and the second bias voltage is completely controlled by the first current. The first current and the second current remain unchanged, and the second bias voltage remains unchanged. Therefore, the third current and the fourth current remain unchanged, and the output control voltage, that is, the third bias voltage, remains unchanged; when the input differential signal increases, the differential input unit conducts, there is current at the second bias voltage node, the second bias voltage decreases, the third current decreases, the fourth current increases, and the output voltage, that is, the third bias voltage, remains unchanged, realizing dynamic biasing.

[0049] Based on the above-mentioned dynamically biased millimeter-wave power amplifier, in order to better implement the present invention, further, an electronic device is proposed, including the above-mentioned dynamically biased millimeter-wave power amplifier; the dynamically biased millimeter-wave power amplifier is used to control the stability of the output voltage according to the current shunt ratio, realizing dynamic biasing to resist process fluctuations.

[0050] Based on the above-mentioned dynamically biased millimeter-wave power amplifier, in order to better implement the present invention, further, a computer-readable storage medium is proposed. The computer-readable storage medium includes instructions, and when the instructions run on the above-mentioned electronic device, the electronic device is made to execute the above-mentioned dynamic biasing method.

[0051] The present invention has the following beneficial effects:

[0052] (1) By using two current copy circuits, the present invention copies from the same reference current, makes a relative comparison, and then shunts the second current, so that one of the shunted currents changes with process fluctuations and the other does not change, realizing the function of dynamic biasing to resist process fluctuations.

[0053] (2) The bias voltage in the current copy circuit of the present invention is only related to the process fluctuations of the transistors, realizing that the bias voltage is not affected by the resistance value fluctuations.

[0054] (3) The present invention does not require a clamping voltage, controls the stability of the output voltage through the current shunt ratio, and the operation is simple and efficient. BRIEF DESCRIPTION OF THE DRAWINGS

[0055] Figure 1 It is a traditional dynamic biasing circuit diagram.

[0056] Figure 2 It is the dynamic biasing circuit diagram provided by the present invention.

[0057] Figure 3 It is the differential cascode power amplifier circuit diagram provided by the present invention.

[0058] Figure 4 This is a schematic block diagram of the overall structure of the dynamic bias millimeter-wave power amplifier provided by the present invention. Specific embodiments

[0059] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. It should be understood that the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments, and therefore should not be regarded as a limitation of the protection scope. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the protection scope of the present invention.

[0060] In the description of the present invention, it should be noted that unless otherwise clearly defined and limited, the terms "set", "connected", and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can also be directly connected, or indirectly connected through an intermediate medium, and can be the communication inside two components. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0061] Embodiment 1:

[0062] This embodiment proposes a dynamic bias millimeter-wave power amplifier, as Figure 4 shown, including a copy unit, a dynamic bias unit, and a power amplification unit;

[0063] A reference current is input to the input end of the copy unit, and the output end of the copy unit is connected to the input end of the dynamic bias unit;

[0064] The input end of the dynamic bias unit is connected to the differential input unit, and the output end of the dynamic bias unit is connected to the input end of the power amplification unit;

[0065] The copy unit is used to copy the obtained reference current into a first current and a second current;

[0066] The dynamic bias unit is used to first convert the obtained first current into a second bias voltage, then shunt the second current, convert the shunted second current into a third bias voltage, and finally dynamically adjust the shunted second current according to the differential signal obtained from the differential input unit to keep the third bias voltage unchanged;

[0067] The power amplification unit is used to amplify the third bias voltage and output it.

[0068] The copy unit includes a first copy unit, a second copy unit, and a third copy unit;

[0069] The input end of the first copy unit inputs a reference current and is connected to the power supply VDD;

[0070] The input end of the second copy unit is connected to the power supply VDD and the output end of the first copy unit, and the output end of the second copy unit is connected to the input end of the dynamic bias unit;

[0071] The input end of the third copy unit is connected to the power supply VDD and the output end of the first copy unit, and the output end of the third copy unit is connected to the input end of the dynamic bias unit;

[0072] The first copy unit is used to copy the reference current to the second copy unit and the third copy unit;

[0073] The second copy unit is used to copy the reference current into a first current;

[0074] The third copy unit is used to copy the reference current into a second current.

[0075] The dynamic bias unit includes a first dynamic bias unit and a second dynamic bias unit;

[0076] The input end of the first dynamic bias unit is connected to the output end of the second copy unit, and the output end of the first dynamic bias unit is connected to the output end of the differential input unit and the input end of the second bias unit;

[0077] The input end of the second bias unit is connected to the output end of the differential input unit and the output end of the third copy unit, and the output end of the second bias unit is connected to the input end of the power amplification unit;

[0078] The first dynamic bias unit is used to convert the first current into a second bias voltage and output it to the second dynamic bias unit;

[0079] The second dynamic bias unit is used to shunt the second current according to the second bias voltage to obtain a third current and a fourth current; convert the fourth current into a third bias voltage, and form negative feedback according to the third current and the third bias.

[0080] Working principle: In this embodiment, by setting the copy unit to copy from the same reference current and making a relative comparison, and then setting the dynamic bias unit to shunt the second current, so that one of the shunted currents changes with the process fluctuation and the other does not change, realizing the function of dynamic bias against process fluctuation. There is no need for a clamping voltage, and the stability of the output voltage is controlled by the shunt ratio of the current.

[0081] Embodiment 2:

[0082] Based on Embodiment 1 above, as Figure 2 shown, the specific structure of the copy circuit will be described in detail.

[0083] The first copy unit includes a reference current source and MOS transistor MP0;

[0084] The source of the MOS transistor MP0 is connected to the power supply VDD, the drain of the MOS transistor MP0 is connected to the reference current source, and the gate of the MOS transistor MP0 is connected to the drain of the MOS transistor MP0 and the second copy unit.

[0085] The second copy unit includes MOS transistor MP1;

[0086] The gate of the MOS transistor MP1 is connected to the drain of the MOS transistor MP0, the source of the MOS transistor MP1 is connected to the power supply VDD, and the drain of the MOS transistor MP1 is connected to the input end of the dynamic bias unit.

[0087] The third copy unit includes MOS transistor MP2;

[0088] The gate of the MOS transistor MP2 is connected between the gates of the MOS transistor MP0 and the MOS transistor MP1, the source of the MOS transistor MP2 is connected to the power supply VDD, and the drain of the MOS transistor MP2 is connected to the input end of the dynamic bias unit.

[0089] Working principle: First, the differential transistors M 0N and M 0P are the same as those in the traditional dynamic bias and are both biased in the appropriate working state by VB1. Looking from the left at the top of the differential transistors, first is a current mirror. MP0 is a PMOS transistor, and its function is to copy out the reference current I REF . On the right, MP1 and MP2 respectively copy the reference current I REF into the first current I1 and the second current I2, where the magnitudes of the first current I1 and the second current I2 are related to the sizes of the PMOS transistors being copied;

[0090] For example:

[0091]

[0092] Among them, E1 / L1 is the aspect ratio of MP1, and E REF / L REF is the aspect ratio of MP0.

[0093] Other parts of this embodiment are the same as those in Embodiment 1 above, so they will not be elaborated here.

[0094] Embodiment 3:

[0095] Based on any one of the above Embodiment 1 - Embodiment 2, as Figure 2 shown, a specific embodiment is used to illustrate the specific structure of the dynamic bias unit.

[0096] The first dynamic bias unit includes MOS transistor M1, resistor R D , resistor R5;

[0097] The source of the MOS transistor M1 is connected to the grounded resistor R5, the drain of the MOS transistor M1 is connected to the drain of the MOS transistor MP1, and the gate of the MOS transistor M1 is connected to the drain of the MOS transistor M1 and the input terminal of the resistor R D ;

[0098] The output terminal of the resistor R D is connected between the input terminal of the second dynamic bias unit and the output terminal of the differential input unit.

[0099] The second dynamic bias unit includes MOS transistor M 2—1 , MOS transistor M 2—2 , resistor R6;

[0100] The drain of the MOS transistor M 2—1 is connected to the drain of the MOS transistor MP2, the gate of the MOS transistor M 2—1 is connected to the output terminal of the resistor R D and the output terminal of the differential input unit, and the source of the MOS transistor M 2—1 is connected to the grounded resistor R6;

[0101] The drain of the MOS transistor M 2—2 is connected between the drain of the MOS transistor M 2—1 and the drain of the MOS transistor MP2, the source of the MOS transistor M 2—2 is connected to the ground terminal, and the gate of the MOS transistor M 2—2 is connected to the drain of the MOS transistor M 2—2 and the input terminal of the power amplification unit.

[0102] Working principle: When the first current I1 is copied, the transistor M1 converts this current into a corresponding second bias voltage VB2 and outputs it through a large resistor R D . The second bias voltage VB2 turns on M 2—1 , and the current flowing through M 2—1 is the third current I 2—1, the function of this current is to shunt from the second current I2, so as to form negative feedback on the influence of the output bias voltage. The fourth current I 2—2 is the current passing through M 2—2 , and M 2—2 converts this current into the corresponding third bias voltage VB3 for output.

[0103] The working principle of this dynamic bias is as follows: when the input differential signal is a relatively small signal, that is, when the power of the input differential signal is less than the set power threshold, M 0N and M 0P remain in the same working state and are biased in the cut-off state by the first bias voltage VB1. At this time, there is no current at the node of the second bias voltage VB2, and the second bias voltage VB2 is completely controlled by the first current I1. The first current I1 and the second current I2 remain unchanged, and the second bias voltage VB2 remains unchanged. Therefore, I 2—1 and I 2—2 remain unchanged, and the output control voltage VB3 remains unchanged; when the input differential signal increases, causing M 0N and M 0P to conduct, there is current flowing through the tube at this time, and there is current at the node of the second bias voltage VB2. The resistor R D will have a voltage drop, and the second bias voltage VB2 decreases, which will cause the third current I 2—1 to decrease and the fourth current I 2—2 to increase, so that the output voltage, that is, the third bias voltage VB3, increases, achieving the effect of dynamic bias; in this embodiment, the set power threshold is related to the saturation power psat of the power amplifier and the gain gain of the power amplifier. When the power of the input differential signal is less than psat - gain, it is a relatively small signal.

[0104] The principle of this dynamic bias against process fluctuations is as follows: since both the first current I1 and the second current I2 are copied from the reference current I REF , the fluctuation directions of the first current I1 and the second current I2 are the same. Assuming that the first current I1 and the second current I2 are both too large at the same time, this will cause the second bias voltage VB2 to be too large, resulting in the third current I 2—1 being too large, which cancels out the increase of the second current I2. In this way, the change of the fourth current I 2—2 can approach 0, so that the third bias voltage VB3 is hardly affected by process fluctuations.

[0105] Other parts of this embodiment are the same as any one of the above Embodiment 1 - Embodiment 2, so they will not be elaborated here.

[0106] Embodiment 4:

[0107] Based on any one of the above Embodiment 1 - Embodiment 3, this embodiment, as Figure 3As shown, the structure of the power amplification unit is described with a specific embodiment.

[0108] The power amplification unit includes a transformer TF1, a transformer TF2, a MOS transistor CG_P, a MOS transistor CS_P, a MOS transistor CS_N, a MOS transistor CG_N, a capacitor C1, and a capacitor C2;

[0109] The primary coil of the transformer TF1 is connected to the input terminal of the differential input module, and the center tap of the secondary coil of the transformer TF1 is connected to the gate of the MOS transistor M 2—2 ;

[0110] The gate of the MOS transistor CG_P inputs a fourth bias voltage. The drain of the MOS transistor CG_P is connected to the primary coil of the transformer TF2, and the source of the MOS transistor CG_P is connected to the drain of the MOS transistor CS_P;

[0111] The gate of the MOS transistor CS_P is connected to the secondary coil of the transformer TF1, and the source of the MOS transistor CS_P is connected to the source of the MOS transistor CS_N;

[0112] The gate of the MOS transistor CS_N is connected to the secondary coil of the transformer TF1, and the drain of the MOS transistor CS_N is connected to the source of the MOS transistor CG_N;

[0113] The gate of the MOS transistor CG_N inputs a fourth bias voltage, and the drain of the MOS transistor CG_N is connected to the primary coil of the transformer TF2;

[0114] One end of the capacitor C1 is connected between the source of the MOS transistor CG_P and the drain of the MOS transistor CS_P, and the other end is connected between the secondary coil of the transformer TF1 and the gate of the MOS transistor CS_N;

[0115] One end of the capacitor C2 is connected between the drain of the MOS transistor CS_N and the source of the MOS transistor CG_N, and the other end is connected between the secondary coil of the transformer TF1 and the gate of the MOS transistor CS_P;

[0116] The center tap of the primary coil of the transformer TF2 is connected to the power supply VDD, and the secondary coil of the transformer TF2 outputs the radio frequency signal after the method.

[0117] Working principle: The third bias voltage VB3 generated by dynamic biasing is applied to the differential cascode power amplifier, as Figure 3, The transformers TF1 and TF2 are transformers, which are commonly used for the matching and biasing of amplifiers. The gate bias voltages of the common-source transistors CS_P and CS_N are supplied by the center tap of the secondary coil of the transformer connected to the bias voltage VB3 of the dynamic bias. The gate bias voltages of the common-gate transistors CG_P and CG_N are given by the fourth bias voltage VB4 from a common bias circuit. In addition, this amplifier uses neutralizing capacitors C1 and C2 to reduce the parasitic capacitance Cgd of the common-source transistors, thereby improving the gain and OP1dB. Finally, the radio frequency signal is output through the transformer TF2. The drain power supply bias VDD of the amplifier is given by the center tap of the primary coil of TF2.

[0118] Other parts of this embodiment are the same as any one of the above Embodiments 1 - 3, so they will not be described in detail.

[0119] Embodiment 5:

[0120] Based on any one of the above Embodiments 1 - 4, this embodiment proposes a dynamic biasing method. First, the obtained reference current is copied as the first current and the second current. Secondly, the obtained first current is converted into the second bias voltage. Then, the second current is shunted, and the shunted second current is converted into the third bias voltage. Finally, the shunted second current is dynamically adjusted according to the differential signal obtained from the differential input unit, while keeping the third bias voltage unchanged.

[0121] The shunting of the second current and the conversion of the shunted second current into the third bias voltage specifically include: First, according to the second bias voltage, the second current is shunted into the third current and the fourth current. Then, the fourth current is converted into the third bias voltage for output, and a negative feedback is formed according to the influence of the third current on the output third bias voltage.

[0122] The dynamic adjustment of the shunted second current according to the differential signal obtained from the differential input unit while keeping the third bias voltage unchanged specifically includes:

[0123] When the input differential signal is a relatively small signal, that is, when the power of the input differential signal is less than the set power threshold, it is biased in the cut-off state according to the first bias voltage of the input differential signal. At this time, there is no current at the second bias voltage node, and the second bias voltage is completely controlled by the first current. The first current and the second current remain unchanged, and the second bias voltage remains unchanged. Therefore, the third current and the fourth current remain unchanged, and the output control voltage, that is, the third bias voltage, remains unchanged. When the input differential signal increases, the differential input unit conducts, there is current at the second bias voltage node, the second bias voltage decreases, the third current decreases, the fourth current increases, and the output voltage, that is, the third bias voltage, increases, realizing dynamic biasing.

[0124] Other parts of this embodiment are the same as any one of the above Embodiments 1 - 4, so they will not be described in detail.

[0125] Embodiment 6:

[0126] Based on any one of the above Embodiments 1 - 5, this embodiment provides an electronic device, including the above-mentioned dynamic bias millimeter-wave power amplifier; the dynamic bias millimeter-wave power amplifier is used to control the stability of the output voltage according to the current shunt ratio, so as to achieve dynamic bias against process fluctuations.

[0127] A computer-readable storage medium is provided, and the computer-readable storage medium includes instructions. When the instructions run on the above-mentioned electronic device, the electronic device is caused to execute the above-mentioned dynamic bias method.

[0128] Other parts of this embodiment are the same as any one of the above Embodiments 1 - 5, so they will not be elaborated herein.

[0129] The above are only the preferred embodiments of the present invention, and do not impose any form of limitation on the present invention. Any simple modification or equivalent change made to the above embodiments based on the technical essence of the present invention falls within the protection scope of the present invention.

Claims

1. A dynamic bias millimeter-wave power amplifier, connected to a differential input unit; characterized in that, It includes a copy unit, a dynamic bias unit, and a power amplification unit; A reference current is input to the input terminal of the copy unit, and the output terminal of the copy unit is connected to the input terminal of the dynamic bias unit; The input terminal of the dynamic bias unit is connected to the differential input unit, and the output terminal of the dynamic bias unit is connected to the input terminal of the power amplification unit; The copy unit is configured to copy the obtained reference current into a first current and a second current; The dynamic bias unit is configured to first convert the obtained first current into a second bias voltage, then shunt the second current, and convert the shunted second current into a third bias voltage, and finally dynamically adjust the shunted second current according to the differential signal obtained from the differential input unit to achieve dynamic biasing of the third bias voltage; The power amplification unit is configured to amplify the third bias voltage and output it; The copy unit includes a first copy unit, a second copy unit, and a third copy unit; The reference current is input to the input terminal of the first copy unit and is connected to the power supply VDD; The input terminal of the second copy unit is connected to the power supply VDD and the output terminal of the first copy unit, and the output terminal of the second copy unit is connected to the input terminal of the dynamic bias unit; The input terminal of the third copy unit is connected to the power supply VDD and the output terminal of the first copy unit, and the output terminal of the third copy unit is connected to the input terminal of the dynamic bias unit; The first copy unit is configured to copy the reference current to the second copy unit and the third copy unit; The second copy unit is configured to copy the reference current into a first current; The third copy unit is configured to copy the reference current into a second current; The dynamic bias unit includes a first dynamic bias unit and a second dynamic bias unit; The input terminal of the first dynamic bias unit is connected to the output terminal of the second copy unit, and the output terminal of the first dynamic bias unit is connected to the output terminal of the differential input unit and the input terminal of the second dynamic bias unit; The input terminal of the second dynamic bias unit is connected to the output terminal of the differential input unit and the output terminal of the third copy unit, and the output terminal of the second dynamic bias unit is connected to the input terminal of the power amplification unit; The first dynamic bias unit is configured to convert the first current into a second bias voltage and output it to the second dynamic bias unit; The second dynamic bias unit is configured to shunt the second current according to the second bias voltage to obtain a third current and a fourth current; Convert the fourth current into a third bias voltage, and form negative feedback according to the third current and the third bias voltage.

2. The dynamic bias millimeter-wave power amplifier according to claim 1, wherein The first copy unit includes a reference current source and a MOS transistor MP0; The source of the MOS transistor MP0 is connected to the power supply VDD, the drain of the MOS transistor MP0 is connected to the reference current source, and the gate of the MOS transistor MP0 is connected to the drain of the MOS transistor MP0 and the second copy unit; 3. The dynamic bias millimeter-wave power amplifier according to claim 2, wherein The second copy unit includes a MOS transistor MP1; The gate of the MOS transistor MP1 is connected to the drain of the MOS transistor MP0, the source of the MOS transistor MP1 is connected to the power supply VDD, and the drain of the MOS transistor MP1 is connected to the input end of the dynamic biasing unit.

4. The dynamic bias millimeter-wave power amplifier according to claim 3, wherein, The third copy unit includes a MOS transistor MP2; The MOS transistor MP2; The gate of the MOS transistor MP2 is connected between the gates of the MOS transistor MP0 and the MOS transistor MP1, the source of the MOS transistor MP2 is connected to the power supply VDD, and the drain of the MOS transistor MP2 is connected to the input end of the dynamic biasing unit.

5. The dynamic bias millimeter-wave power amplifier according to claim 4, wherein The first dynamic bias unit includes MOS transistor M1 and resistor R D , and resistor R5; The source of the MOS transistor M1 is connected to the resistor R5 grounded, the drain of the MOS transistor M1 is connected to the drain of the MOS transistor MP1, and the gate of the MOS transistor M1 is connected to the drain of the MOS transistor M1 and the input end of the resistor R D ; The resistor R D has its output terminal connected between the input terminal of the second dynamic biasing unit and the output terminal of the differential input unit.

6. The dynamic bias millimeter-wave power amplifier according to claim 5, characterized in that, The second dynamic bias unit includes MOS transistor M 2—1 , MOS transistor M 2—2 , and resistor R6; The MOS transistor M 2—1 has its drain connected to the drain of the MOS transistor MP2. The MOS transistor M 2—1 has its gate connected to the output terminal of the resistor R D and the output terminal of the differential input unit. The MOS transistor M 2—1 has its source connected to the resistor R6 grounded; The MOS transistor M 2—2 has its drain connected between the drain of the MOS transistor M 2—1 and the drain of the MOS transistor MP2. The source of the MOS transistor M 2—2 is connected to the ground terminal. The gate of the MOS transistor M 2—2 is connected to the drain of the MOS transistor M 2—2 and the input terminal of the power amplification unit.

7. The dynamic bias millimeter-wave power amplifier according to claim 6, wherein The power amplification unit includes a transformer TF1, a transformer TF2, a MOS transistor CG_P, a MOS transistor CS_P, a MOS transistor CS_N, a MOS transistor CG_N, a capacitor C1, and a capacitor C2; The primary coil of the transformer TF1 is connected to the input end of the differential input module, and the center tap of the secondary coil of the transformer TF1 is connected to the gate of the MOS transistor M 2—2 ; The gate of the MOS transistor CG_P receives a fourth bias voltage, the drain of the MOS transistor CG_P is connected to the primary coil of the transformer TF2, and the source of the MOS transistor CG_P is connected to the drain of the MOS transistor CS_P; The gate of the MOS transistor CS_P is connected to the secondary coil of the transformer TF1, and the source of the MOS transistor CS_P is connected to the source of the MOS transistor CS_N; The gate of the MOS transistor CS_N is connected to the secondary coil of the transformer TF1, and the drain of the MOS transistor CS_N is connected to the source of the MOS transistor CG_N; The gate of the MOS transistor CG_N receives a fourth bias voltage, and the drain of the MOS transistor CG_N is connected to the primary coil of the transformer TF2; One end of the capacitor C1 is connected between the source of the MOS transistor CG_P and the drain of the MOS transistor CS_P, and the other end is connected between the secondary coil of the transformer TF1 and the gate of the MOS transistor CS_N; One end of the capacitor C2 is connected between the drain of the MOS transistor CS_N and the source of the MOS transistor CG_N, and the other end is connected between the secondary coil of the transformer TF1 and the gate of the MOS transistor CS_P; The center tap of the primary coil of the transformer TF2 is connected to the power supply VDD, and the secondary coil of the transformer TF2 outputs an amplified radio frequency signal.

8. A dynamic biasing method, implemented based on the dynamic biasing millimeter-wave power amplifier as described in claim 1, characterized in that First, copy the obtained reference current into a first current and a second current; secondly, convert the obtained first current into a second bias voltage, then shunt the second current, and convert the shunted second current into a third bias voltage. Finally, dynamically adjust the shunted second current according to the differential signal obtained from the differential input unit while keeping the third bias voltage unchanged.

9. A dynamic biasing method according to claim 8, characterized in that, The shunting of the second current and the conversion of the shunted second current into a third bias voltage specifically include: first, shunt the second current into a third current and a fourth current according to the second bias voltage, then convert the fourth current into the third bias voltage for output, and form a negative feedback according to the influence of the third current on the output third bias voltage.

10. A dynamic biasing method according to claim 9, wherein The dynamically adjusting the shunted second current according to the differential signal obtained from the differential input unit while keeping the third bias voltage unchanged specifically includes: When the power of the input differential signal is less than the set power threshold, it is biased in the cut-off state according to the first bias voltage of the input differential signal. At this time, there is no current at the second bias voltage node, and the second bias voltage is completely controlled by the first current. The first current and the second current remain unchanged, and the second bias voltage remains unchanged. Therefore, the third current and the fourth current remain unchanged, and the output control voltage, i.e., the third bias voltage, remains unchanged. When the input differential signal increases, the differential input unit conducts, there is current at the second bias voltage node, the second bias voltage decreases, the third current decreases, the fourth current increases, and the output voltage, i.e., the third bias voltage, increases, realizing dynamic bias against process fluctuations.

11. An electronic device, characterized in that, It includes the dynamic bias millimeter-wave power amplifier according to any one of claims 1-7; the dynamic bias millimeter-wave power amplifier is used to control the stability of the output voltage according to the current shunt ratio, realizing dynamic bias against process fluctuations.

12. A computer-readable storage medium, characterized in that, The computer-readable storage medium includes instructions that, when the instructions run on the electronic device according to claim 11, cause the electronic device to execute the dynamic bias method according to any one of claims 8-10.

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