Device and method for measuring high-speed signal rate on VPX backboard

Abstract

A device and method for measuring a high-speed signal rate on a VPX backboard, the device comprises a power supply part, a kernel part, a connector part and a peripheral part, the connector part realizes interconnection with a tested board card through installing a VPX plug module which needs to be plugged with the tested board card on the front side of an FPGA test board, and the peripheral part realizes interconnection with the tested board card through externally connecting an optical port connector on the upper edge of the board card. The optical module signal connection quality on the tested board card is measured through the processing of the kernel part of the FPGA test board, the power supply part provides a power supply used by each chip for the FPGA test board through a power supply conversion chip, the tested board card is inserted into the connector part of the FPGA test board during testing, the interconnection between the tested board card and the FPGA test board is realized, and the testing quality of the optical module signal on the tested board card is measured. And testing is carried out through IBERT software after power-on. According to the invention, high-speed VPX backboard products can be tested by replacing VPX plugs of different manufacturers, and the method can also be used for verifying the signal rate after plugging by different manufacturers.

Description

Technical Field

[0001] The present invention relates to the technical field of high-speed signal detection, and in particular to a device and method for measuring the rate of a high-speed signal on a VPX backplane. Background Art

[0002] The VPX structure has become the preferred architecture for high-performance computer systems due to its high-speed data transmission and processing capabilities, modular design, support for multiple operating systems, a wide range of application scenarios, and energy efficiency and reliability for future development. Therefore, it is widely used in aerospace, energy, finance and other fields, especially in radar, communication, navigation and control systems. In recent years, with the increasing demand for high-speed VPX backplanes, how to verify that the high-speed signals on the backplane can meet the requirements has to be solved. Summary of the invention

[0003] The invention aims to solve the deficiencies of the prior art and provide a device and method for measuring the high-speed signal rate on a VPX backplane.

[0004] In order to achieve the above-mentioned purpose, the invention adopts the following technical solutions:

[0005] A device for measuring the high-speed signal rate on a VPX backplane comprises a power supply part, a core part, a connector part and a peripheral part. The connector part realizes interconnection with a board under test by installing a VPX plug module which needs to be plugged with a board under test on the front of an FPGA test board. The core part is the core of the FPGA test board and processes and simulates signals. The peripheral part realizes measurement of the signal connection quality of an optical module on the board under test by connecting an external optical port connector on the upper edge of the board and processing the signal through the core part of the FPGA test board. The power supply part uses a 12V power supply as input and provides power for each chip of the FPGA test board through a power conversion chip. During testing, the board under test is inserted into the connector part of the FPGA test board to realize interconnection between the board under test and the FPGA test board. After power-on, the test is performed through IBERT software. The VPX plug module is directly connected to the connector part of the FPGA test board through the VPX plug to realize high-speed interconnection of VPX signals.

[0006] The optical port connector connects the optical module on the FPGA test board to the optical module on the board under test to achieve testing.

[0007] The peripheral part mainly realizes the signal quality connection of the optical module or realizes the external function connection through SMA.

[0008] A method for measuring the high-speed signal rate on a VPX backplane, the steps of which are:

[0009] 1) According to the definition of J1, J2 power supply 12V or GND in the FPGA test board, prepare two J1, J2 plug-in connectors;

[0010] 2) Prepare relevant test products: such as FPGA test board, optical port connector, ATX power supply, fan or VPX backplane;

[0011] 3) Connect the VPX backplane to be tested according to the test schematic: When connecting, insert the two FPGA test boards into the same position on the front and back of the VPX backplane; connect the J1 and J2 plug connectors to J1 / J2 of the FPGA test board; the ATX power supply supplies power to the VPX backplane, FPGA test board and fan; the fan cools the entire test environment; JTAG connects to the debugger of XILINX, and connects to the peripheral computer to open the relevant software;

[0012] 4) After powering on, observe the power indicator light on the FPGA test board. The FPGA working light is on, and the preparation test work is completed;

[0013] 5) Use IBERT software to configure the parts that need to be tested: Test the signal connection quality of the optical port connector on the VPX backplane. The test method is to connect the optical module on the FPGA test board with the optical module on the target board. The test method for testing the interconnection signal of the VPX plug module is to use the high-speed signal port of the FPGA to directly connect with the VPX plug to achieve high-speed interconnection of the VPX signal. The signal quality test of the front and back communication of the VPX backplane is performed by installing the key on the FPGA test board, locating the position of P1-P6 in the VPX backplane, installing key4 and vpx connector, measuring the VPX backplane module J1, installing key2 and vpx connector, measuring the VPX backplane module J2, installing key3 and vpx connector, measuring the VPX backplane module J3, installing key1 and vpx connector, and measuring the VPX backplane module J6;

[0014] 6) Test after configuration is completed: Build a test environment, set the relevant protocols to the corresponding signal rate requirements or other protocols that can meet the requirements during software testing, and then run in the current environment;

[0015] 7) Observe the results after the test is completed. If the software shows that it is passed, it means that the VPX backplane under test can meet the 10G signal rate requirements. If there is a problem in the entire system, this part of the link can be guaranteed to be correct, which is convenient for troubleshooting;

[0016] 8) Compare the signal rate and eye diagram requirements and draw a conclusion: Comparing the signal rate and eye diagram requirements is a verification of the auxiliary signal passing. Compare the tested eye diagram with the eye diagram required by the protocol. If the requirements are met, it means that the test part has passed;

[0017] 9) If the result meets the requirements, the VPX backplane under test meets the usage requirements.

[0018] The beneficial effect of the invention is that the present invention can test high-speed VPX backplane products by replacing VPX plugs from different manufacturers, and can also be used for verifying the signal rate after insertion by different manufacturers, which has considerable versatility. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 It is a system framework diagram of the present invention;

[0020] Figure 2 It is a framework diagram of testing the transmission rate of an optical port of the present invention;

[0021] Figure 3 It is the PCB layout diagram of the present invention;

[0022] Figure 4 It is a working principle diagram of the present invention.

[0023] The following is a detailed description of the embodiments of the present invention with reference to the accompanying drawings. DETAILED DESCRIPTION

[0024] The invention will be further described below in conjunction with the accompanying drawings and embodiments:

[0025] like Figure 1-Figure 4 As shown, a device for measuring the high-speed signal rate on a VPX backplane, the FPGA test board includes a power supply part, a core part, a connector part and a peripheral part. The connector part realizes interconnection with the board under test by installing a VPX plug module that needs to be plugged into the board under test on the front of the FPGA test board. The core part is the core of the FPGA test board, and the core part processes and simulates the signal. The peripheral part realizes the measurement of the signal connection quality of the optical module on the board under test by connecting an external optical port connector on the edge of the board and processing it through the core part of the FPGA test board. The power supply part uses a 12V power supply as input, and the power supply part provides power for each chip of the FPGA test board through a power conversion chip. When testing, the board under test is inserted into the connector part of the FPGA test board to realize the interconnection between the board under test and the FPGA test board. After power-on, the test is performed through the IBERT software;

[0026] The VPX plug module is directly connected to the high-speed signal port of the FPGA test board through the VPX plug to achieve high-speed interconnection of the VPX signal.

[0027] The optical port connector connects the optical module on the FPGA test board to the optical module on the board under test to achieve testing.

[0028] The peripheral part mainly realizes the signal quality connection of the optical module or realizes the external function connection through SMA.

[0029] like Figure 3 In the PCB layout shown, J1 / J2, U182 / U183 constitute the power part; U1, U6, U8, U9, U10 and the memory particles on the back constitute the core part; J22 and KEY1, KEY2, KEY3 and KEY4 constitute the connector part; SFP1 / J35 / J18 / J19 / J20 constitute the peripheral part.

[0030] When conducting the test, the specific test steps are:

[0031] 1) According to the definition of J1, J2 power supply 12V or GND in the FPGA test board, prepare two J1, J2 plug-in connectors;

[0032] 2) Prepare relevant test products, such as FPGA test board, optical port connector, ATX power supply, fan, VPX backplane, etc.;

[0033] 3) Connect the VPX backplane to be tested according to the test schematic: When connecting, insert the two FPGA test boards into the same position on the front and back of the VPX backplane; connect the J1 and J2 plug connectors to the J1 / J2 of the test board; the ATX power supply supplies power to the VPX backplane, FPGA test board and fan; the fan cools the entire test environment; JTAG connects to the debugger of XILINX, and connects to the peripheral computer to open the relevant software;

[0034] 4) After powering on, observe the power indicator light on the FPGA test board. The FPGA working light is on, and the preparation test work is completed;

[0035] 5) Use IBERT software to configure the parts that need to be tested: Test the signal connection quality of the optical port connector on the VPX backplane. The test method is to connect the optical module on the FPGA test board with the optical module on the VPX backplane. The test method for testing the interconnection signal of the VPX plug module is to use the high-speed signal port of the FPGA to directly connect with the VPX plug to achieve high-speed interconnection of the VPX signal. The signal quality test of the front and back communication of the VPX backplane is performed by installing the key on the FPGA test board, locating the position of P1-P6 in the VPX backplane, installing key4 and vpx connector, measuring the VPX backplane module J1, installing key2 and vpx connector, measuring the VPX backplane module J2, installing key3 and vpx connector, measuring the VPX backplane module J3, installing key1 and vpx connector, and measuring the VPX backplane module J6;

[0036] 6) After the configuration is completed, perform the test; if the front and rear plug-ins need to meet the 10G signal quality, set the relevant protocol to 10Gbase-kr or other corresponding protocols that can meet the requirements during the software test, and then run it in the current environment;

[0037] 7) Observe the results after the test is completed. If the software shows that it is passed, it means that the VPX backplane under test can meet the 10G signal rate requirements. If there is a problem in the entire system, this part of the link can be guaranteed to be correct, which is convenient for troubleshooting;

[0038] 8) Compare the signal rate and eye diagram requirements and draw a conclusion: Comparing the signal rate and eye diagram requirements is a verification of the auxiliary signal passing. Compare the tested eye diagram with the eye diagram required by the protocol. If the requirements are met, it means that the test part has passed;

[0039] 9) If the result meets the requirements, the VPX backplane under test meets the usage requirements.

[0040] In the description of the invention, it is to be understood that the terms “center”, “longitudinal”, “lateral”, “length”, “width”, “thickness”, “up”, “down”, “front”, “back”, “left”, “right”, “vertical”, “horizontal”, “top”, “bottom”, “inside”, “outside”, “clockwise”, “counterclockwise”, “axial”, “radial”, “circumferential”, etc., indicating orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, are only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the invention.

[0041] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of the invention, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0042] In the invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be fixedly connected, detachably connected, or integrated; it can be mechanically connected, electrically connected, or able to communicate with each other; it can be directly connected, or indirectly connected through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the invention can be understood according to specific circumstances.

[0043] The invention is described above by way of example in conjunction with the accompanying drawings. It is obvious that the specific implementation of the invention is not limited to the above-mentioned method. As long as various improvements are made using the method concept and technical solution of the invention, or they are directly applied to other occasions without improvement, they are all within the scope of protection of the invention.

Claims

1. A device for measuring high-speed signal rates on a VPX backplane, characterized in that: The FPGA test board includes a power supply part, a core part, a connector part and a peripheral part. The connector part realizes interconnection with the board under test by installing a VPX plug module on the front of the FPGA test board that needs to be plugged into the board under test. The core part is the core of the FPGA test board. The core part processes and simulates signals. The peripheral part measures the signal connection quality of the optical module on the board under test by connecting an external optical port connector on the edge of the board and processing it through the core part of the FPGA test board. The power supply part uses a 12V power supply as input. The power supply part provides power for each chip of the FPGA test board through a power conversion chip. During the test, the board under test is inserted into the connector part of the FPGA test board to realize the interconnection between the board under test and the FPGA test board. After power on, the test is performed through the IBERT software. The VPX plug module is directly connected to the connector part of the FPGA test board through the VPX plug to achieve high-speed interconnection of VPX signals.

2. The device for measuring high-speed signal rate on a VPX backplane according to claim 1, characterized in that: The optical port connector connects the optical module on the FPGA test board to the optical module on the FPGA test board to achieve testing.

3. The device for measuring high-speed signal rate on a VPX backplane according to claim 1, characterized in that: The peripheral part mainly realizes the signal quality connection of the optical module or realizes the external function connection through SMA.

4. A method for measuring the high-speed signal rate on a VPX backplane, using the device for measuring the high-speed signal rate on a VPX backplane as claimed in any one of claims 1 to 4, characterized in that: The specific steps are: 1) According to the definition of J1, J2 power supply 12V or GND in the FPGA test board, prepare two J1, J2 plug-in connectors; 2) Prepare relevant test products, such as FPGA test board, optical port connector, ATX power supply, fan or VPX backplane; 3) Connect the VPX backplane to be tested according to the test schematic: When connecting, insert the two FPGA test boards into the same position on the front and back of the VPX backplane; connect the J1 and J2 plug connectors to J1 / J2 of the FPGA test board; the ATX power supply supplies power to the VPX backplane, FPGA test board and fan; the fan cools the entire test environment; JTAG connects to the debugger of XILINX, and connects to the peripheral computer to open the relevant software; 4) After powering on, observe the power indicator light on the FPGA test board. The FPGA working light is on, and the preparation test work is completed; 5) Use IBERT software to configure the parts that need to be tested: Test the signal connection quality of the optical port connector on the VPX backplane. The test method is to connect the optical module on the FPGA test board with the optical module on the VPX backplane. The test method for testing the interconnection signal of the VPX plug module is to use the high-speed signal port of the FPGA to directly connect with the VPX plug to achieve high-speed interconnection of the VPX signal. The signal quality test of the front and back communication of the VPX backplane is performed by installing the key on the FPGA test board, locating the position of P1-P6 in the VPX backplane, installing key4 and vpx connector, measuring the VPX backplane module J1, installing key2 and vpx connector, measuring the VPX backplane module J2, installing key3 and vpx connector, measuring the VPX backplane module J3, installing key1 and vpx connector, and measuring the VPX backplane module J6; 6) Test after configuration is completed: Build a test environment, set the relevant protocols to the corresponding signal rate requirements or other protocols that can meet the requirements during software testing, and then run in the current environment; 7) Observe the results after the test is completed. If the software shows that it is passed, it means that the VPX backplane under test can meet the 10G signal rate requirements. If there is a problem in the entire system, this part of the link can be guaranteed to be correct, which is convenient for troubleshooting; 8) Compare the signal rate and eye diagram requirements and draw a conclusion: Comparing the signal rate and eye diagram requirements is a verification of the auxiliary signal passing. Compare the tested eye diagram with the eye diagram required by the protocol. If the requirements are met, it means that the test part has passed; 9) If the result meets the requirements, the VPX backplane under test meets the usage requirements.

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