Firmware management for updating diagnostic capabilities

Abstract

The invention relates to firmware management for updating diagnostic capabilities. Methods, systems, and apparatus include receiving, by a memory subsystem, an activation command for firmware of the memory subsystem, where the firmware includes a core firmware sub-portion and a diagnostic firmware sub-portion, the content of the diagnostic firmware sub-portion being different from the content of the core firmware sub-portion, and the diagnostic firmware sub-part and the core firmware sub-part are executed independently of each other. The core firmware sub-portion is activated to cause the memory subsystem to operate using the core firmware sub-portion in response to the received activation command. The diagnostic firmware sub-portion is deactivated to prevent the memory subsystem from operating using the diagnostic firmware sub-portion in response to the received activation command.

Description

Technical Field

[0001] The present disclosure relates generally to firmware management, and more particularly, to firmware management for updating diagnostic capabilities. Background Art

[0002] The memory subsystem may include one or more memory devices that store data. The memory devices may be, for example, non-volatile memory devices and volatile memory devices. In general, the host system may use the memory subsystem to store data at the memory devices and retrieve data from the memory devices. Summary of the invention

[0003] According to aspects of the present disclosure, a method is provided. The method includes: receiving, by a memory subsystem, an activation command for firmware of the memory subsystem, wherein the firmware includes a core firmware subsection and a diagnostic firmware subsection, the content of the diagnostic firmware subsection is different from the content of the core firmware subsection, and the diagnostic firmware subsection and the core firmware subsection are executed independently of each other; activating the core firmware subsection so that the memory subsystem operates using the core firmware subsection in response to the received activation command; and deactivating the diagnostic firmware subsection to prevent the memory subsystem from operating using the diagnostic firmware subsection in response to the received activation command.

[0004] According to another aspect of the present disclosure, a non-transitory computer-readable storage medium is provided. The non-transitory computer-readable storage medium includes instructions, which, when executed by a processing device, cause the processing device to: receive an activation command for firmware for the memory subsystem from a memory subsystem, wherein the firmware includes a core firmware subsection and a diagnostic firmware subsection, the content of the diagnostic firmware subsection is different from the content of the core firmware subsection, and the diagnostic firmware subsection and the core firmware subsection are executed independently of each other; activate the core firmware subsection so that the memory subsystem operates using the core firmware subsection in response to the received activation command; and deactivate the diagnostic firmware subsection to prevent the memory subsystem from operating using the diagnostic firmware subsection in response to the received activation command.

[0005] According to another aspect of the present disclosure, a system is provided. The system includes: a plurality of memory devices; and a processing device, which is coupled to the plurality of memory devices in an operational manner to: receive an activation command and a download command for firmware for the memory subsystem by a memory subsystem, wherein the firmware includes a core firmware subsection and a diagnostic firmware subsection, the content of the diagnostic firmware subsection is different from the content of the core firmware subsection, and the diagnostic firmware subsection and the core firmware subsection are executed independently of each other; update the diagnostic firmware subsection based on the download command, wherein the update of the diagnostic firmware subsection does not update the core firmware subsection; activate the core firmware subsection so that the memory subsystem operates using the core firmware subsection in response to the received activation command; and deactivate the diagnostic firmware subsection to prevent the memory subsystem from operating using the diagnostic firmware subsection in response to the received activation command. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] The present disclosure will be more fully understood from the detailed description given below and the accompanying drawings of various embodiments of the present disclosure. However, the drawings should not be considered to limit the present disclosure to specific embodiments, but are only for explanation and understanding.

[0007] Figure 1 An example computing system including a memory subsystem according to some embodiments of the present disclosure is described.

[0008] Figure 2 Another example computing system including a firmware management component according to some embodiments of the present disclosure is described.

[0009] Figure 3 is a flow chart of an example method for managing firmware for updating diagnostic capabilities according to some embodiments of the present disclosure.

[0010] Figure 4 is another flow chart of an example method for managing firmware for updating diagnostic capabilities according to some embodiments of the present disclosure.

[0011] Figure 5 is a block diagram of an example computer system in which embodiments of the present disclosure may operate. DETAILED DESCRIPTION

[0012] Various aspects of the present disclosure relate to managing firmware for updating diagnostic capabilities in a memory subsystem. The memory subsystem may be a storage device, a memory module, or a mixture of a storage device and a memory module. Figure 1Examples of storage devices and memory modules are described. Typically, a host system may utilize a memory subsystem that includes one or more components, such as a memory device that stores data. The host system may provide data to be stored at the memory subsystem and may request data to be retrieved from the memory subsystem.

[0013] The memory device may be a non-volatile memory device. A non-volatile memory device is a package of one or more dies. An example of a non-volatile memory device is a NAND memory device. Figure 1 Other examples of non-volatile memory devices are described. A die in a package may be assigned to one or more channels for communicating with a memory subsystem controller. Each die may be composed of one or more planes. Planes may be grouped into logical units identified by logical unit numbers (LUNs). For some types of non-volatile memory devices (e.g., NAND memory devices), each plane is composed of a set of physical blocks, which are groups of memory cells used to store data. A cell is an electronic circuit that stores information.

[0014] Depending on the cell type, a cell can store one or more binary bits of information and have various logical states related to the number of bits being stored. The logical state can be represented by a binary value such as "0" and "1" or a combination of such values. There are various types of cells such as single-level cells (SLC), multi-level cells (MLC), triple-level cells (TLC), quad-level cells (QLC), and penta-level cells (PLC). For example, an SLC can store one bit of information and have two logical states, while a QLC can store four bits of information and have sixteen logical states.

[0015] In conventional memory systems, the firmware for the memory subsystem manages the functionality of the memory devices in the memory subsystem and diagnoses various aspects of the memory subsystem (e.g., providing a device field self-test). For ease of explanation, these are referred to as core firmware functionality and diagnostic firmware functionality, respectively. These individual functionalities are contained in a single monolithic production firmware. Therefore, an update of the diagnostic firmware functionality causes an update of the entire firmware. In industries with memory system applications that are sensitive to updates, such as military, satellite, automotive, etc., testing and verifying memory firmware is a time-consuming and costly task. Due to the high cost of defective firmware in these industries (e.g., permanent loss of satellite connectivity or causing a car crash), any changes to the memory firmware must undergo this expensive and extensive firmware verification process, even if the changes are limited to changes to the diagnostic firmware that are run in a controlled environment (e.g., an auto repair shop) and are therefore not associated with the increased risk typically present in these applications.

[0016] Aspects of the present disclosure address the above and other deficiencies by separating the firmware into core firmware and diagnostic firmware. The memory subsystem stores different firmware sub-parts in different firmware slots so that only one of the core firmware and the diagnostic firmware is active at a time. Thus, the diagnostic firmware can be updated without incurring additional firmware verification costs or risking the reliability and security of the core firmware.

[0017] Figure 1 An example computing environment 100 is illustrated that includes a memory subsystem 110 according to some embodiments of the present disclosure. Memory subsystem 110 may include media such as one or more volatile memory devices (e.g., memory device 140), one or more non-volatile memory devices (e.g., memory device 130), or a combination of the like.

[0018] The memory subsystem 110 may be a storage device, a memory module, or a mixture of a storage device and a memory module. Examples of storage devices include solid state drives (SSDs), flash drives, universal serial bus (USB) flash drives, embedded multimedia controller (eMMC) drives, universal flash storage (UFS) drives, secure digital (SD) cards, and hard disk drives (HDDs). Examples of memory modules include dual inline memory modules (DIMMs), small outline DIMMs (SO-DIMMs), and various types of non-volatile dual inline memory modules (NVDIMMs).

[0019] The computing system 100 may be a computing device, such as a desktop computer, a laptop computer, a network server, a mobile device, a vehicle (e.g., an airplane, drone, train, car, or other transportation vehicle), an Internet of Things (IoT) enabled device, an embedded computer (e.g., an embedded computer included in a vehicle, industrial equipment, or a networked commercial device), or such a computing device that includes a memory and a processing device.

[0020] The computing system 100 may include a host system 120 coupled to one or more memory subsystems 110. In some embodiments, the host system 120 is coupled to memory subsystems 110 of different types. Figure 1 An example of a host system 120 coupled to one memory subsystem 110 is illustrated. As used herein, "coupled to" or "coupled with..." generally refers to a connection between components, which may be an indirect communication connection or a direct communication connection (e.g., without intermediate components), whether wired or wireless, including connections such as electrical connections, optical connections, magnetic connections, etc.

[0021] The host system 120 may include a processing device such as a processor chipset and a software stack executed by the processor chipset. The processor chipset may include one or more cores, one or more caches, a memory controller (e.g., an NVDIMM controller), and / or a storage protocol controller (e.g., a peripheral component interconnect express (PCIe) controller, a serial advanced technology attachment (SATA) controller). The host system 120 uses, for example, the memory subsystem 110 to write data to the memory subsystem 110 and read data from the memory subsystem 110.

[0022] The host system 120 may be coupled to the memory subsystem 110 via a physical host interface. Examples of the physical host interface include, but are not limited to, a SATA interface including a micro SATA (mSATA) interface, a PCIe interface including a micro PCIe (mPCIE) interface, a non-volatile memory express (NVMe) interface, a universal serial bus (USB) interface, a Fibre Channel, a serial attached SCSI (SAS), a small computer system interface (SCSI), a double data rate (DDR) memory bus, a dual in-line memory module (DIMM) interface (e.g., a DIMM socket interface supporting double data rate (DDR)), an advanced host controller (AHCI) interface, an open NAND flash interface (ONFI) interface, a double data rate (DDR) interface, a low power double data rate (LPDDR) interface, any other interface, and / or a combination of these interfaces. The physical host interface may be used to transfer data between the host system 120 and the memory subsystem 110. When the memory subsystem 110 is coupled to the host system 120 through a PCIe interface, the host system 120 may further utilize an NVMe interface to access components (e.g., memory devices 130 and 140). The physical host interface may provide an interface for passing control, address, data, and other signals between the memory subsystem 110 and the host system 120. Figure 1 Memory subsystem 110 is illustrated as an example. In general, host system 120 can access multiple memory subsystems via the same communication connection, multiple separate communication connections, and / or a combination of communication connections.

[0023] Memory devices 130 and 140 may include any combination of different types of non-volatile memory devices and / or volatile memory devices. Volatile memory devices (e.g., memory device 140) may be, but are not limited to, random access memory (RAM), such as dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), video random access memory (VRAM), and cache memory.

[0024] Some examples of non-volatile memory devices (e.g., memory device 130) include non-and (NAND) type flash memory devices and write-in-place type memory devices, such as three-dimensional cross-point ("3D cross-point") memory devices, which are cross-point arrays of non-volatile memory cells. The cross-point array of non-volatile memory can be combined with a stackable cross-grid data access array to perform bit storage based on changes in body resistance. In addition, compared to many flash-based memories, cross-point non-volatile memory can perform write-in-place operations, where non-volatile memory cells can be programmed without previously erasing the non-volatile memory cells. NAND type flash memory includes, for example, two-dimensional NAND (2D NAND) and three-dimensional NAND (3D NAND).

[0025] Although nonvolatile memory devices such as NAND type memories (e.g., 2D NAND, 3D NAND) and 3D cross-point nonvolatile memory cell arrays are described, the memory device 130 may be based on any other type of nonvolatile memory, such as read-only memory (ROM), phase change memory (PCM), self-selected memory, other chalcogenide-based memories, ferroelectric transistor random access memory (FeTRAM), ferroelectric random access memory (FeRAM), magnetic random access memory (MRAM), spin transfer torque (STT)-MRAM, nano-RAM (NRAM), polycrystalline silicon-silicon oxide-silicon nitride-silicon oxide-single crystal silicon (SONOS) memory, conductive bridge RAM (CBRAM), resistive random access memory (RRAM), oxide-based RRAM (OxRAM), non-OR (NOR) flash memory, and erasable programmable read-only memory (EPROM), including electrically erasable programmable read-only memory (EEPROM).

[0026] The memory subsystem controller 115 (or, for simplicity, the controller 115) may communicate with the memory device 130 to perform operations, such as reading data, writing data, or erasing data and other such operations at the memory device 130 (e.g., in response to commands dispatched by the controller 115 on a command bus). The memory subsystem controller 115 may include hardware, such as one or more integrated circuits and / or discrete components, buffer memory, or a combination thereof. The hardware may include digital circuitry with dedicated (i.e., hard-coded) logic to perform the operations described herein. The buffer memory of the subsystem controller 115 may include any of the volatile or non-volatile memory types described above, including combinations thereof. The memory subsystem controller 115 may be a microcontroller, dedicated logic circuitry (e.g., a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), etc.), or another suitable processor.

[0027] The memory subsystem controller 115 may include a processing device 117 (processor) configured to execute instructions stored in the memory subsystem 110 (e.g., stored in the local memory 119). In some examples, the local memory 119 of the memory subsystem controller 115 includes an embedded memory configured to store instructions for executing various processes, operations, logic flows, and routines that control the operation of the memory subsystem 110, including handling communications between the memory subsystem 110 and the host system 120.

[0028] In some embodiments, local memory 119 may include memory registers that store memory pointers, fetched data, etc. Local memory 119 may also include read-only memory (ROM) for storing microcode. Figure 1 The example memory subsystem 110 in FIG. 1 has been described as including a memory subsystem controller 115, but in another embodiment of the present disclosure, the memory subsystem 110 does not include a memory subsystem controller 115 and may instead rely on external control (e.g., provided by an external host, or provided by a processing device or controller separate from the memory subsystem 110).

[0029] In general, the memory subsystem controller 115 may receive commands or operations from the host system 120 and may convert the commands or operations into instructions or appropriate commands to achieve the desired access to the memory device (memory device 130 and / or 140). The memory subsystem controller 115 may be responsible for other operations such as wear leveling operations, garbage collection operations, error detection and error correction code (ECC) operations, encryption operations, cache operations, and address conversion between logical addresses (e.g., logical block addresses (LBAs) and / or name spaces) and physical addresses (e.g., physical block addresses) associated with the memory device (e.g., memory device 130 and / or 140). The memory subsystem controller 115 may further include a host interface circuit system to communicate with the host system 120 via a physical host interface. The host interface circuit system may convert commands received from the host system into command instructions for accessing the memory device (e.g., memory device 130 and / or 140) and convert responses associated with the memory device into information for the host system 120.

[0030] The memory subsystem 110 may also include additional circuitry or components not illustrated. In some embodiments, the memory subsystem 110 may include a cache or buffer (e.g., DRAM) and address circuitry (e.g., row decoders and column decoders) that may receive addresses from the memory subsystem controller 115 and decode the addresses to access memory devices (e.g., memory devices 130 and / or 140).

[0031] In some embodiments, a memory device (e.g., memory device 130 and / or 140) includes a local media controller 135 that operates in conjunction with the memory subsystem controller 115 to perform operations on one or more memory cells of the memory device (e.g., memory device 130 and / or 140). An external controller (e.g., memory subsystem controller 115) may manage the memory device externally (e.g., perform media management operations on the memory device 130 and / or 140). In some embodiments, a memory device (e.g., memory device 130) is a managed memory device, which is a raw memory device combined with a local controller (e.g., local controller 135) to perform media management within the same memory device package. An example of a managed memory device is a managed NAND (MNAND) device.

[0032] The memory subsystem 110 includes a firmware management component 113 that manages firmware for updating diagnostic capabilities. In some embodiments, the controller 115 includes at least a portion of the firmware management component 113. For example, the controller 115 may include a processing device 117 configured to execute instructions stored in a local memory 119 for performing the operations described herein. In some embodiments, the firmware management component 113 is part of a host system 120, an application, or an operating system.

[0033] The firmware management component 113 manages diagnostic capabilities by separating the firmware for the memory subsystem into diagnostic firmware and core firmware. Additional details regarding the operation of the firmware management component 113 are described below.

[0034] Figure 2 Another example computing system 200 including a firmware management component 113 according to some embodiments of the present disclosure is illustrated. The example computing system 200 also includes a host system 120, a memory subsystem 110, and a device firmware storage device 205. Figure 2 As shown in , the host system 120 is coupled to the firmware management component 113 via the memory subsystem 110. The firmware management component 113 is coupled to the device firmware storage 205 and is configured to download firmware to the device firmware storage 205 and activate and deactivate firmware slots (e.g., the core firmware storage 215 and the diagnostic firmware storage 225) of the device firmware storage 205. The device firmware storage 205 stores firmware for the memory subsystem 110. In some embodiments, the device firmware storage 205 is incorporated into the local memory of the memory subsystem 110 (e.g., Figure 1 in the local memory 119).

[0035] like Figure 2As shown in FIG. 1 , the device firmware storage device 205 includes a core firmware storage device 215 and a diagnostic firmware storage device 225 sub-portion. The core firmware storage device 215 stores firmware sub-portions that manage memory devices (e.g., Figure 1 The core firmware storage 215 includes firmware for performing functions to manage NAND devices. The diagnostic firmware storage 225 stores sub-portions of firmware for diagnosing and monitoring various aspects of the memory subsystem 110. For example, the diagnostic firmware storage 225 includes firmware for performing functions related to device field self-test or built-in self-test. In some embodiments, performing the self-test functions enables the memory subsystem 110 to test itself to enhance the safety and reliability of the memory subsystem 110 and reduce repair cycle time. In some embodiments, the diagnostic firmware storage 225 and the core firmware storage 215 execute independently of each other. For example, the memory subsystem 110 can execute either the core firmware storage 215 or the diagnostic firmware storage 225, but not both at the same time.

[0036] The contents of the core firmware storage 215 are different from the contents of the diagnostic firmware storage 225. For example, the core firmware storage 215 includes contents related to the functionality of managing the memory device, but does not include contents for performing the self-test function, and the diagnostic firmware storage 225 includes contents for performing the self-test function and does not include contents related to the functionality of managing the memory device. In some embodiments, the core firmware storage 215 and the diagnostic firmware storage 225 are separate firmware slots of the device firmware storage 205, and only one of the firmware slots may be activated at a given time. In some embodiments, although only two firmware slots are illustrated, the device firmware storage 205 includes multiple firmware slots. However, in such embodiments, the device firmware storage 205 contains only one diagnostic firmware storage 225. Although the device firmware storage 205 may use partitions and / or subdivisions other than firmware slots, for simplicity, the term firmware slot will be used when referring to the partitions and / or subdivisions of the device firmware storage 205.

[0037] like Figure 2, the host system 120 sends a firmware command 202 to the memory subsystem 110. The firmware command 202 may include a command type 204, a slot identifier 206, firmware data 208, a memory initialization instruction 210, and a deactivation type 212. Although illustrated as including the command type 204, the slot identifier 206, the firmware data 208, the memory initialization instruction 210, and the deactivation type 212, the firmware command 202 may contain only a subset of these items. For example, a firmware command 202 with an activation command type 204 may include only the slot identifier 206.

[0038] In some embodiments, the command type 204 is an activation command. For example, the host system 120 sends a firmware command 202 having an activation command type 204 to the memory subsystem 110. In such embodiments, the memory subsystem 110 receives the firmware command 202, and the firmware management component 113 activates a firmware sub-portion of a core firmware storage device 215 or a diagnostic firmware storage device 225. For example, the firmware command 202 includes a slot identifier 206 that identifies a firmware slot of a device firmware storage device 205 to be activated. In response to receiving the firmware command 202 having the activation command 204 and including the slot identifier 206 that identifies the firmware slot, the firmware management component 113 activates firmware stored in, for example, the core firmware storage device 215. For example, the firmware management component 113 activates the core firmware storage device 215, thereby causing the memory subsystem 110 to execute the firmware stored in the core firmware storage device 215.

[0039] In some embodiments, in response to receiving a firmware command 202 having an activation command type 204, the firmware management component 113 deactivates a firmware slot that is not identified by a slot identifier 206. For example, the host system 120 sends a firmware command 202 having an activation command type 204 and a slot identifier 206 identifying a firmware slot to be activated to the memory subsystem 110. In response to the memory subsystem 110 receiving the firmware command 202, the firmware management component 113 activates the core firmware storage 215 and deactivates the diagnostic firmware storage 225. For example, when the firmware management component 113 deactivates the diagnostic firmware storage 225, the firmware management component prevents the memory subsystem 110 from executing firmware stored in the diagnostic firmware storage 225.

[0040] In some embodiments, the firmware command 202 includes a memory initialization instruction 210. For example, the host system 120 sends a firmware command 202 having an activation command type 204 and a memory initialization instruction 210 to the memory subsystem 110. The memory subsystem 110 receives the firmware command 202 having the memory initialization instruction 210, thereby causing the firmware management component 113 to perform a warm boot of the memory subsystem 110. In some embodiments, the firmware command 202 is an activation command type 204 including a slot identifier 206 and a memory initialization instruction 210. For example, the host system 120 sends a firmware command 202 to the memory subsystem 110, the firmware command including the memory initialization instruction 210 and a slot identifier 206 identifying the diagnostic firmware storage device 225. In response to receiving the firmware command 202, the memory subsystem 110 performs a warm boot and reinitialization, thereby executing the firmware in the diagnostic firmware storage device 225 after the reinitialization.

[0041] In some embodiments, the command type 204 is a download command. For example, the host system 120 sends a firmware command 202 having a download command type 204, a slot identifier 206, and firmware data 208. The firmware command 202 having the download command type 204 is a firmware command for the firmware management component 113 to save and / or store the firmware data 208 in a firmware storage device (e.g., a core firmware storage device 215 or a diagnostic firmware storage device 225). In response to receiving the firmware command 202, the firmware management component 113 downloads the firmware data 208 to the firmware slot identified by the slot identifier 206. In one embodiment, in response to receiving the firmware command 202 having the download command type 204, the firmware management component 113 updates the firmware stored in the firmware slot identified by the slot identifier 206. For example, in response to receiving the firmware command 202 having the download command type 204 and the slot identifier 206 identifying the diagnostic firmware storage device 225, the firmware management component 113 updates the firmware in the diagnostic firmware storage device 225 using the firmware data 208. Due to the separation using different firmware slots, the firmware management component 113 does not update the firmware in the firmware slot that is not identified by the slot identifier 206. For example, in response to receiving the firmware command 202 including the slot identifier 206 identifying the diagnostic firmware storage 225, the firmware management component 113 does not update the firmware in the core firmware storage 215. In some embodiments, the download type firmware command only downloads the firmware data 208 and does not activate the firmware stored in the updated firmware storage (e.g., until an activation command is received). In some embodiments, the firmware management component 113 updates the firmware in the core firmware storage 215 using the firmware data 208.

[0042] In some embodiments, the firmware command 202 includes a download command type 204 and an activate command type 204. In such embodiments, the firmware command 202 includes a slot identifier 206 for each of the download command type 204 and the activate command type 204. For example, the host system 120 sends a firmware command 202 including both the download command type and the activate command type 204, the firmware command having a slot identifier for the download command identifying the diagnostic firmware storage 225 and a slot identifier for the activate command identifying the core firmware storage 215. In response to the memory subsystem 110 receiving the firmware command 202, the firmware management component 113 downloads the firmware data 208 into the diagnostic firmware storage 225 and activates the core firmware storage 215.

[0043] In some embodiments, in response to activating the core firmware storage device 215, the firmware management component 113 deactivates the diagnostic firmware storage device 225. For example, the firmware management component 113 downloads the firmware data 208 to the diagnostic firmware storage device 225 and causes the memory subsystem 110 to execute the firmware stored in the core firmware storage device 215, thereby preventing the memory subsystem 110 from executing the firmware stored in the diagnostic firmware storage device 225.

[0044] In some embodiments, the command type 204 is a deactivation command. For example, the host system 120 sends a firmware command 202 having a deactivation command type 204 and a slot identifier 206 identifying a core firmware storage device 215. In response to the memory subsystem 110 receiving the firmware command 202, the firmware management component 113 deactivates the core firmware storage device 215, thereby preventing the memory subsystem 110 from executing the firmware stored in the core firmware storage device 215. In some embodiments, in response to the memory subsystem 110 receiving the firmware command 202 having the deactivation command type 204 and the slot identifier 206, the firmware management component 113 activates the firmware in the slot not identified by the slot identifier 206. For example, in response to receiving the firmware command 202 having the deactivation command type 204 and the slot identifier 206 identifying the diagnostic firmware storage device 225, the firmware management component 113 activates the diagnostic firmware storage device 225.

[0045] In some embodiments, the firmware command 202 is a deactivation command type 204 and includes a deactivation type 212. For example, the deactivation type 212 includes a temporary deactivation type, a password protection deactivation type, and / or a permanent deactivation type. For example, the host system 120 sends a firmware command 202 with the deactivation command type 204, a slot identifier 206 identifying the diagnostic firmware storage device 225, and the temporary deactivation type 212. In response to the memory subsystem 110 receiving the firmware command 202, the firmware management component 113 deactivates the diagnostic firmware storage device 225 for a set period of time, or until a certain condition is met.

[0046] In response to the memory subsystem 110 receiving the firmware command 202 having the deactivation command type 204, the slot identifier 206 identifying the diagnostic firmware storage device 225, and the temporary deactivation type 212, the firmware management component 113 deactivates the diagnostic firmware storage device 225, thereby preventing the memory subsystem 110 from executing the firmware stored in the diagnostic firmware storage device 225 until the memory subsystem 110 is power cycled (e.g., until the memory subsystem 110 is powered off and then powered on again). In some embodiments, the host system 120 sends the firmware command 202 having the deactivation command type 204 and the temporary deactivation type 212 when the memory subsystem 110 is powered on.

[0047] In some embodiments, the deactivation type 212 includes a password protected deactivation type. For example, the host system 120 sends a firmware command 202 having a deactivation command type 204, a slot identifier 206 identifying the diagnostic firmware storage device 225, a password protected deactivation type 212, and a deactivation password. In response to the memory subsystem 110 receiving the firmware command 202, if the deactivation password is correct, the firmware management component 113 deactivates the diagnostic firmware storage device 225. For example, the firmware management component 113 compares the received deactivation password with a stored password (e.g., stored in a local memory). In response to receiving the firmware command 202 and verifying that the provided deactivation password is correct, the firmware management component 113 deactivates the diagnostic firmware storage device 225.

[0048] In some embodiments, a firmware slot deactivated with a deactivation command having a deactivation type of password protection can be reactivated only with an activation command having a correct password. For example, in response to the memory subsystem 110 receiving a firmware command 202 having an activation command type 204, a slot identifier 206 identifying a deactivated firmware slot, and an activation password, the firmware management component 113 compares the activation password with the correct password. If the activation password is correct, the firmware management component 113 reactivates the firmware slot identified by the slot identifier 206.

[0049] In some embodiments, the deactivation type 212 is a permanent deactivation type. For example, the host system 120 sends a firmware command 202 having a deactivation command type 204, a slot identifier 206 identifying the diagnostic firmware storage device 225, and a permanent deactivation type 212. In response to the memory subsystem 110 receiving the firmware command 202, the firmware management component 113 permanently deactivates the diagnostic firmware storage device 225. For example, the firmware management component 113 permanently deactivates the diagnostic firmware storage device 225, thereby permanently preventing the memory subsystem from executing the firmware stored in the diagnostic firmware storage device 225.

[0050] Figure 3 is a flow chart of an example method 300 for managing firmware for updating diagnostic capabilities according to some embodiments of the present disclosure. The method 300 may be performed by processing logic, which may include hardware (e.g., a processing device, a circuit system, dedicated logic, programmable logic, microcode, hardware of a device, an integrated circuit, etc.), software (e.g., instructions running or executed on a processing device), or a combination thereof. In some embodiments, the method 300 is performed by Figure 1 The firmware management component 113 of the embodiment of the present invention is executed. Although shown in a specific order or sequence, the order of the process can be modified unless otherwise specified. Therefore, it should be understood that the illustrated embodiments are only examples, and the illustrated processes can be performed in a different order, and some processes can be performed in parallel. In addition, one or more processes can be omitted in various embodiments. Therefore, not all processes are required in each embodiment. Other process flows are also possible.

[0051] At operation 305, the processing device receives a firmware command. For example, the firmware management component 113 receives a firmware command 202 from the host system 120. In some embodiments, the firmware command 202 includes one or more of a command type 204, a slot identifier 206, firmware data 208, a memory initialization instruction 210, and / or a deactivation type 212.

[0052] At operation 310, the processing device determines the firmware command type. For example, the firmware management component 113 determines the command type 204 of the received firmware command 202. If the processing device determines that the command type is download, the method 300 proceeds to operation 315. If the processing device determines that the command type is activation, the method 300 proceeds to operation 335. If the processing device determines that the command type is deactivation, the method 300 proceeds to operation 360.

[0053] At operation 315, the processing device determines the firmware sub-portion identified in the received download command. For example, the firmware management component 113 determines whether the slot identifier 206 of the firmware command 202 identifies a firmware slot for the core firmware storage device 215 or a firmware slot for the diagnostic firmware storage device 225. If the processing device determines that the identified firmware sub-portion is a core firmware sub-portion, the method 300 proceeds to operation 320. If the processing device determines that the identified firmware sub-portion is a diagnostic firmware sub-portion, the method 300 proceeds to operation 325.

[0054] At operation 320 , the processing device updates the core firmware. For example, the firmware management component 113 downloads the firmware data 208 received in the firmware command 202 to the core firmware storage device 215 .

[0055] At operation 325 , the processing device updates the diagnostic firmware. For example, the firmware management component 113 downloads the firmware data 208 received in the firmware command 202 to the diagnostic firmware storage device 225 .

[0056] At operation 330, the processing device determines whether the received download command includes an activation command. For example, the firmware management component 113 determines whether the firmware command 202 includes both a download command type and an activation command type 204. If the processing device determines that the received download command includes an activation command, the method 300 proceeds to operation 335. If the processing device determines that the received download command does not include an activation command, the method 300 returns to operation 305 and waits for the next firmware command.

[0057] At operation 335, the processing device determines whether the activation command includes a memory initialization instruction. For example, the firmware management component 113 determines whether the firmware command 202 includes a memory initialization instruction 210. If the processing device determines that the activation command includes a memory initialization instruction, the method 300 proceeds to operation 340. If the processing device does not determine that the activation command includes a memory initialization instruction, the method 300 proceeds to operation 345.

[0058] At operation 340, the processing device performs a warm boot of the memory subsystem. For example, the memory subsystem 110 performs a warm boot and reinitialization.

[0059] At operation 345, the processing device determines the firmware sub-portion identified in the activation command. For example, the firmware management component 113 determines whether the slot identifier 206 of the firmware command 202 identifies a firmware slot for the core firmware storage device 215 or the diagnostic firmware storage device 225. If the processing device determines that the identified firmware sub-portion is a core firmware sub-portion, the method 300 proceeds to operation 350. If the processing device determines that the identified firmware sub-portion is a diagnostic firmware sub-portion, the method 300 proceeds to operation 355.

[0060] At operation 350, the processing device activates the core firmware. For example, the firmware management component 113 causes the memory subsystem 110 to execute the firmware stored in the core firmware storage device 215. In some embodiments, if the core firmware has been deactivated, the processing device does not activate the core firmware. For example, if the core firmware storage device 215 has been deactivated with a deactivation command having a permanent deactivation type, the firmware management component 113 does not activate the core firmware storage device 215. Figure 2 Explain additional details with respect to the deactivation type.

[0061] At operation 355, the processing device activates the diagnostic firmware. For example, the firmware management component 113 causes the memory subsystem 110 to execute the firmware stored in the diagnostic firmware storage device 225. In some embodiments, if the diagnostic firmware has been deactivated, the processing device does not activate the diagnostic firmware. For example, if the diagnostic firmware storage device 225 has been deactivated with a deactivation command having a permanent deactivation type, the firmware management component 113 does not activate the diagnostic firmware storage device 225. Figure 2 Explain additional details with respect to the deactivation type.

[0062] At operation 360, the processing device determines the firmware sub-portion identified in the received deactivation command. For example, the firmware management component 113 determines whether the slot identifier 206 of the firmware command 202 identifies a firmware slot for the core firmware storage device 215 or the diagnostic firmware storage device 225. If the processing device determines that the identified firmware sub-portion is a core firmware sub-portion, the method 300 proceeds to operation 365. If the processing device determines that the identified firmware sub-portion is a diagnostic firmware sub-portion, the method 300 proceeds to operation 370.

[0063] At operation 365, the processing device deactivates the core firmware. For example, the firmware management component 113 prevents the memory subsystem 110 from executing the firmware stored in the core firmware storage device 215. In some embodiments, the processing device deactivates the core firmware using a deactivation type. For example, if the deactivation type 212 of the firmware command 202 is permanent, the firmware management component 113 permanently deactivates the core firmware storage device 215. In some embodiments, in response to the processing device activating the diagnostic firmware (e.g., operation 355), the method 300 proceeds to operation 365 and deactivates the core firmware. Reference Figure 2 Explain additional details with respect to the deactivation type.

[0064] At operation 370, the processing device deactivates the diagnostic firmware. For example, the firmware management component 113 prevents the memory subsystem 110 from executing the firmware stored in the diagnostic firmware storage device 225. In some embodiments, the processing device deactivates the diagnostic firmware using a deactivation type. For example, if the deactivation type 212 of the firmware command 202 is permanent, the firmware management component 113 permanently deactivates the diagnostic firmware storage device 225. In some embodiments, in response to the processing device activating the core firmware (e.g., operation 350), the method 300 proceeds to operation 370 and deactivates the diagnostic firmware. Reference Figure 2 Explain additional details with respect to the deactivation type.

[0065] Figure 4 is another flow chart of an example method 400 for managing firmware for updating diagnostic capabilities according to some embodiments of the present disclosure. The method 400 may be performed by processing logic, which may include hardware (e.g., a processing device, a circuit system, a dedicated logic, a programmable logic, a microcode, hardware of a device, an integrated circuit, etc.), software (e.g., instructions running or executed on a processing device), or a combination thereof. In some embodiments, the method 400 is performed by Figure 1 The firmware management component 113 of the embodiment of the present invention is executed. Although shown in a specific order or sequence, the order of the process can be modified unless otherwise specified. Therefore, it should be understood that the illustrated embodiments are only examples, and the illustrated processes can be performed in a different order, and some processes can be performed in parallel. In addition, one or more processes can be omitted in various embodiments. Therefore, not all processes are required in each embodiment. Other process flows are also possible.

[0066] At operation 405, the processing device receives an activation command for memory subsystem firmware. For example, the memory subsystem 110 receives a firmware command 202 having an activation command type 204 from the host system 120. In some embodiments, the activation command includes a slot identifier. For example, the firmware command 202 includes a slot identifier 206 that identifies the firmware slot to be activated. In some embodiments, the activation command includes a memory initialization instruction. For example, the firmware command 202 includes a memory initialization instruction 210, so that the memory subsystem 110 performs a warm boot using the firmware slot identified by the slot identifier 206 when reinitializing. In some embodiments, the activation command includes a download command. Reference Figure 2 Additional details are described with respect to receiving an activation command.

[0067] At operation 410, the processing device activates the core firmware sub-portion based on the received activation command. For example, the firmware management component 113 determines that the slot identifier 206 identifies the core firmware storage device 215 and activates the core firmware storage device 215, thereby causing the memory subsystem 110 to execute the firmware stored in the core firmware storage device 215. In some embodiments having both an activation command and a download command, the activation command includes a slot identifier for the firmware slot to be activated, and the download command includes a slot identifier for the firmware slot to store the downloaded firmware. For example, the firmware command 202 includes an activation command type 204 and a download command type 204. In response to the memory subsystem 110 receiving the firmware command 202, the firmware management component 113 downloads the firmware data 208 of the firmware command 202 to the firmware slot identified by the slot identifier of the download command type 204, and activates the firmware slot identified by the activation command type. In some embodiments, the firmware management component 113 causes the memory subsystem 110 to perform a hot boot and executes the firmware stored in the core firmware storage device 215 when the memory subsystem 110 performs a hot boot. Reference Figure 2 Describes additional details relative to activating the core firmware sub-portion.

[0068] At operation 415, the processing device deactivates the diagnostic firmware sub-portion in response to determining to activate the core firmware sub-portion. For example, the firmware management component 113 prevents the memory subsystem 110 from executing the firmware stored in the diagnostic firmware storage device 225. Figure 2 Describes additional details relative to deactivating the diagnostic firmware sub-portion.

[0069] Figure 5 An example machine illustrating a computer system 500 within which a set of instructions for causing the machine to perform any one or more of the methodologies discussed herein may be executed. In some embodiments, the computer system 500 may correspond to a host system (e.g., Figure 11) a host system 120 that includes, is coupled to, or utilizes a memory subsystem (e.g., Figure 1 The memory subsystem 110 of the controller may be used to execute the operation of the controller (for example, execute the operating system to execute the corresponding Figure 1 In some embodiments, the machine may be connected (e.g., using a network) to other machines. The machine may operate in the capacity of a server or a client machine in a client-server network environment, or in the capacity of a peer machine in a peer-to-peer (or distributed) network environment, or as a server or a client machine in a cloud computing infrastructure or environment.

[0070] The machine may be a personal computer (PC), a tablet PC, a set-top box (STB), a personal digital assistant (PDA), a cellular phone, a smart device, a network appliance, a server, a network router, a switch or a bridge, or any machine capable of executing (sequentially or otherwise) a set of instructions that specify actions to be taken by the machine. Further, while a single machine is described, the term "machine" shall also be taken to include any collection of machines that individually or collectively execute a set (or multiple sets) of instructions to perform any one or more of the methodologies discussed herein.

[0071] The example computer system 500 includes a processing device 502, a main memory 504 (e.g., read-only memory (ROM), flash memory, dynamic random access memory (DRAM), such as synchronous DRAM (SDRAM) or Rambus DRAM (RDRAM)), etc.), a static memory 506 (e.g., flash memory, static random access memory (SRAM), etc.), and a data storage system 518, which communicate with each other via a bus 530.

[0072] The processing device 502 represents one or more general-purpose processing devices, such as a microprocessor, a central processing unit, etc. More specifically, the processing device may be a complex instruction set computing (CISC) microprocessor, a reduced instruction set computing (RISC) microprocessor, a very long instruction word (VLIW) microprocessor, a processor implementing other instruction sets, or a processor implementing a combination of instruction sets. The processing device 502 may also be one or more special-purpose processing devices, such as an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA), a digital signal processor (DSP), a network processor, etc. The processing device 502 is configured to execute instructions 526 for performing the operations and steps discussed herein. The computer system 500 may further include a network interface device 508 to communicate over a network 520.

[0073] The data storage system 518 may include a machine-readable storage medium 524 (also referred to as a computer-readable medium) having stored thereon one or more sets of instructions 526 or software embodying any one or more of the methodologies or functions described herein. The instructions 526 constituting the machine-readable storage medium may also reside completely or at least partially within the main memory 504 and / or within the processing device 502 during execution thereof by the computer system 500, the main memory 504, and the processing device 502. The machine-readable storage medium 524, the data storage system 518, and / or the main memory 504 may correspond to Figure 1 Memory subsystem 110.

[0074] In one embodiment, instructions 526 include instructions for implementing instructions corresponding to a firmware management component (e.g., Figure 1 The term "machine-readable storage medium" should also be considered to include any medium capable of storing or encoding a set of instructions for execution by a machine and causing the machine to perform any one or more of the methods of the present disclosure. Thus, the term "machine-readable storage medium" should be considered to include, but not be limited to, solid-state memory, optical media, and magnetic media.

[0075] Some portions of the previous detailed description have been presented in terms of algorithms and symbolic representations of operations on data bits within a computer memory. These algorithmic descriptions and representations are the means by which those skilled in the art of data processing can most effectively convey the substance of their work to others skilled in the art. An algorithm is conceived herein and generally as a self-consistent sequence of steps that produce a desired result. An operation is one that requires physical manipulation of physical quantities. Typically (but not necessarily), these quantities take the form of electrical or magnetic signals that can be stored, combined, compared, and otherwise manipulated. It has been demonstrated that it is sometimes convenient, primarily for common reasons, to refer to these signals as bits, values, elements, symbols, characters, terms, numbers, and the like.

[0076] It should be borne in mind, however, that all of these and similar terms will be associated with the appropriate physical quantities and are merely convenient labels applied to these quantities. The present disclosure may refer to the actions and processes of a computer system or similar electronic computing device to control and transform data represented as physical (electronic) quantities within the computer system's registers and memories into other data similarly represented as physical quantities within the computer system's memories or registers or other such information storage systems.

[0077] The present disclosure also relates to an apparatus for performing the operations herein. This apparatus may be specially constructed for the intended purpose, or it may include a general-purpose computer selectively activated or reconfigured by a computer program stored in the computer. For example, a computer system or other data processing system (e.g., controller 115) may perform computer-implemented methods 300 and 400 in response to its processor executing a computer program (e.g., a sequence of instructions) contained in a memory or other non-transitory machine-readable storage medium. This computer program may be stored in a computer-readable storage medium, such as, but not limited to, any type of disk, including a floppy disk, an optical disk, a CD-ROM, and a magneto-optical disk, a read-only memory (ROM), a random access memory (RAM), an EPROM, an EEPROM, a magnetic card or an optical card, or any type of medium coupled to a computer system bus suitable for storing electronic instructions.

[0078] The algorithms and displays presented herein are not inherently related to any particular computer or other device. Various general purpose systems may be used with the program according to the teachings herein, or it may prove convenient to construct more specialized equipment to perform the methods. The structures of various these systems will be presented as set forth in the description below. In addition, the present disclosure is not described with reference to any particular programming language. It should be appreciated that the teachings of the present disclosure as described herein may be implemented using various programming languages.

[0079] The present disclosure may be provided as a computer program product or software, which may include a machine-readable medium having instructions stored thereon, the instructions being usable to program a computer system (or other electronic device) to perform a process according to the present disclosure. A machine-readable medium includes any mechanism for storing information in a form readable by a machine (e.g., a computer). In some embodiments, a machine-readable (e.g., computer-readable) medium includes a machine (e.g., computer) readable storage medium, such as a read-only memory ("ROM"), a random access memory ("RAM"), a magnetic disk storage medium, an optical storage medium, a flash memory component, etc.

[0080] In the foregoing description, embodiments of the present disclosure have been described with reference to specific example embodiments thereof. It will be apparent that various modifications may be made to the present disclosure without departing from the broader spirit and scope of the embodiments of the present disclosure as set forth in the appended claims. Accordingly, the description and drawings should be viewed in an illustrative rather than a restrictive sense.

Claims

1. A method comprising: receiving, by a memory subsystem, an activation command for firmware of the memory subsystem, wherein the firmware includes a core firmware subsection and a diagnostic firmware subsection, the content of the diagnostic firmware subsection is different from the content of the core firmware subsection, and the diagnostic firmware subsection and the core firmware subsection execute independently of each other; activating the core firmware subsection so that the memory subsystem operates using the core firmware subsection in response to the received activation command; and The diagnostic firmware subportion is deactivated to prevent the memory subsystem from operating using the diagnostic firmware subportion in response to the received activate command.

2. The method according to claim 1, further comprising: receiving, by the memory subsystem, a download command for the firmware; and The diagnostic firmware subportion is updated based on the download command, wherein the updating of the diagnostic firmware subportion does not update the core firmware subportion.

3. The method of claim 2, wherein the download command comprises the activation command, and wherein activating the core firmware sub-portion is in response to receiving the download command.

4. The method of claim 1 , wherein the activation command comprises a memory initialization instruction, and wherein activating the core firmware sub-portion comprises: A warm boot of the memory subsystem is performed such that the memory subsystem operates using the core firmware subportion in response to the warm boot.

5. The method of claim 1, wherein the memory subsystem includes a plurality of firmware slots, and wherein the core firmware subportion and the diagnostic firmware subportion are stored in different ones of the plurality of firmware slots.

6. The method according to claim 1, further comprising: receiving, by the memory subsystem, a deactivation command for the firmware; and The diagnostic firmware subportion is deactivated based on the deactivation command, wherein the deactivation prevents the memory subsystem from using the diagnostic firmware subportion.

7. The method of claim 6, wherein the deactivation command includes a deactivation type, and wherein deactivating the core firmware sub-portion uses the deactivation type, the method further comprising: receiving, by the memory subsystem, a second activation command for the core firmware subportion; and Determining to reactivate the diagnostic firmware subportion based on the deactivation type.

8. A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to: receiving, by a memory subsystem, an activation command for firmware of the memory subsystem, wherein the firmware includes a core firmware subsection and a diagnostic firmware subsection, the content of the diagnostic firmware subsection is different from the content of the core firmware subsection, and the diagnostic firmware subsection and the core firmware subsection execute independently of each other; activating the core firmware subsection so that the memory subsystem operates using the core firmware subsection in response to the received activation command; and The diagnostic firmware subportion is deactivated to prevent the memory subsystem from operating using the diagnostic firmware subportion in response to the received activate command.

9. The non-transitory computer-readable storage medium of claim 8, wherein the processing device is further configured to: receiving, by the memory subsystem, a download command for the firmware; and The diagnostic firmware subportion is updated based on the download command, wherein the updating of the diagnostic firmware subportion does not update the core firmware subportion.

10. The non-transitory computer-readable storage medium of claim 9, wherein the download command includes the activation command, and wherein activating the core firmware subportion is in response to receiving the download command.

11. The non-transitory computer-readable storage medium of claim 8, wherein the activation command comprises a memory initialization instruction, and wherein activating the core firmware sub-portion comprises: A warm boot of the memory subsystem is performed such that the memory subsystem operates using the core firmware subportion in response to the warm boot.

12. The non-transitory computer-readable storage medium of claim 8, wherein the memory subsystem includes a plurality of firmware slots, and wherein the core firmware subportion and the diagnostic firmware subportion are stored in different ones of the plurality of firmware slots.

13. The non-transitory computer-readable storage medium of claim 8, wherein the processing device is further configured to: receiving, by the memory subsystem, a deactivation command for the firmware; and The diagnostic firmware subportion is deactivated based on the deactivation command, wherein the deactivation prevents the memory subsystem from using the diagnostic firmware subportion.

14. The non-transitory computer-readable storage medium of claim 13, wherein the deactivation command comprises a deactivation type, wherein deactivating the core firmware sub-portion uses the deactivation type, and wherein the processing device is further configured to: receiving, by the memory subsystem, a second activation command for the core firmware subportion; and Determining to reactivate the diagnostic firmware subportion based on the deactivation type.

15. A system comprising: a plurality of memory devices; and a processing device operatively coupled to the plurality of memory devices to: receiving, by the memory subsystem, an activation command and a download command for firmware of the memory subsystem, wherein the firmware includes a core firmware subsection and a diagnostic firmware subsection, the content of the diagnostic firmware subsection is different from the content of the core firmware subsection, and the diagnostic firmware subsection and the core firmware subsection are executed independently of each other; updating the diagnostic firmware subportion based on the download command, wherein the updating of the diagnostic firmware subportion does not update the core firmware subportion; activating the core firmware subsection so that the memory subsystem operates using the core firmware subsection in response to the received activation command; and The diagnostic firmware subportion is deactivated to prevent the memory subsystem from operating using the diagnostic firmware subportion in response to the received activate command.

16. The system of claim 15, wherein the download command includes the activation command, and wherein activating the core firmware sub-portion is in response to receiving the download command.

17. The system of claim 15, wherein the activation command comprises a memory initialization instruction, and wherein activating the core firmware sub-portion comprises: A warm boot of the memory subsystem is performed such that the memory subsystem operates using the core firmware subportion in response to the warm boot.

18. The system of claim 15, wherein the memory subsystem includes a plurality of firmware slots, and wherein the core firmware subportion and the diagnostic firmware subportion are stored in different ones of the plurality of firmware slots.

19. The system of claim 15, wherein the processing device is further configured to: receiving, by the memory subsystem, a deactivation command for the firmware; and The diagnostic firmware subportion is deactivated based on the deactivation command, wherein the deactivation prevents the memory subsystem from using the diagnostic firmware subportion.

20. The system of claim 19, wherein the deactivation command includes a deactivation type, wherein deactivating the core firmware sub-portion uses the deactivation type, and wherein the processing means is further configured to: receiving, by the memory subsystem, a second activation command for the core firmware subportion; and Determining to reactivate the diagnostic firmware subportion based on the deactivation type.

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