A method, apparatus, device, medium and product for partitioning a buffer
By dynamically adjusting the controller memory cache area partition of NVMe devices, the read and write cache area capacity is optimized according to the input and output request characteristics, and the resource waste and performance bottlenecks caused by traditional static partitioning are solved, and the performance and flexibility of the storage system are improved.
Patent Information
- Application Number
- CN202510601408.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-12
- Publication Date
- 2025-07-22
- Estimated Expiration
- 2045-05-12
AI Technical Summary
Traditional NVMe devices adopt static allocation in CMB partitioning, resulting in waste of resources and performance bottlenecks, and cannot dynamically adjust according to changes in real-time input and output modes, affecting the overall performance of the system.
By analyzing the read and write ratio, sequence and load strength of input and output requests in real time, the partition allocation of the controller memory cache area is dynamically adjusted, including the capacity of the read and write cache area, and the adjustment factor is used to optimize cache resource utilization and system performance.
The cache resource utilization rate and system performance of the controller memory cache area are optimized, the flexibility and adaptability of the storage system are improved, and resource waste and performance bottlenecks caused by static partitioning are avoided.
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Figure CN120104521B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of storage technology, and in particular to a method, apparatus, device, medium and product for partitioning a buffer area. Background Art
[0002] NVMe (Non-Volatile Memory Express) is a high-performance and low-latency storage protocol used for communication between fast NVMe storage devices and host systems. The NVMe storage device provides the CMB (Controller Memory Buffer) function, allowing the host system to configure a part of the NVMe controller memory as a cache to improve data access performance. The purpose of the CMB is to reduce data movement between the host and the device. By placing certain NVMe-specific data types (such as SQ submission queues, CQ completion queues, PRP lists, write data, read data) in the controller memory instead of the host memory, performance is improved. A schematic diagram of the CMB function of the NVMe device is as Figure 1 shown.
[0003] Compared with the HMB (Host Memory Buffer), the CMB is located inside the NVMe controller and is implemented through the PCIe BAR (Base Address Register), allowing the host CPU to directly access the CMB through memory read and write instructions. The advantage of this is to reduce the number of PCIe DMA operations on the host side. For example, by establishing the NVMe SQ on the CMB, the host side only needs to write once to update the SQE (Submission Queue Entry), and the device does not need to pass through the PCIe bus when fetching the SQE. At the same time, the CMB can also be used as a DMA buffer area, allowing NVMe device copy operations, thereby improving performance and reducing the burden on the host CPU. Using the CMB as the buffer area of the NVMe storage device, through PCIe point-to-point technology, the CPU overhead and data access latency are reduced.
[0004] However, the traditional NVMe device is usually static in terms of CMB partitioning, that is, when the system is initialized, the CMB resources are fixedly allocated, which is likely to cause waste of resources or performance bottlenecks and affect the overall performance of the system. Summary of the Invention
[0005] The purpose of the embodiments of the present invention is to provide a method, apparatus, device, medium and product for partitioning a buffer area, which can dynamically adjust the partition allocation of the controller memory buffer area in the storage device to optimize the cache resource utilization rate of the controller memory buffer area and the system performance.
[0006] In a first aspect, a method for partitioning a buffer is provided, which is applied to a storage system. The storage system includes a storage device and a host. A controller memory buffer is set in a memory unit of a storage device controller of the storage device for direct access by the host. The controller memory buffer includes: a read buffer, a write buffer, a management area, and a reserved area. The method for partitioning the buffer includes: obtaining the read-write ratio, sequentiality, and load intensity of a current input / output request; determining the read buffer capacity and the write buffer capacity according to the read-write ratio, the sequentiality, and the load intensity; determining a read adjustment capacity and a write adjustment capacity according to the read buffer capacity, the write buffer capacity, an initial read buffer capacity, and an initial write buffer capacity; wherein the read adjustment capacity and the write adjustment capacity are used to indicate that according to the read adjustment capacity and the write adjustment capacity, the capacity of the reserved area is allocated to the read buffer and the write buffer.
[0007] In a preferred example of the present invention, it can be further configured that: determining the read buffer capacity and the write buffer capacity according to the read-write ratio, the sequentiality, and the load intensity includes: determining the read buffer capacity according to the read-write ratio, the sequentiality, the load intensity, a first adjustment factor, and a third adjustment factor; determining the write buffer capacity according to the read-write ratio, the sequentiality, the load intensity, a second adjustment factor, and a fourth adjustment factor.
[0008] In a preferred example of the present invention, it can be further configured that: the management area is used to store the first adjustment factor, the second adjustment factor, the third adjustment factor, and the fourth adjustment factor.
[0009] In a preferred example of the present invention, it can be further configured that: before determining the read buffer capacity and the write buffer capacity according to the read-write ratio, the sequentiality, and the load intensity, it further includes: obtaining a target workload scenario; matching the initial adjustment factor corresponding to the target workload scenario from initial value setting information; wherein the initial value setting information is the corresponding relationship between the scenario and the initial adjustment factor, and the initial adjustment factor includes: an initial first adjustment factor, an initial second adjustment factor, an initial third adjustment factor, and an initial fourth adjustment factor.
[0010] In a preferred example, the present invention can be further configured as follows: after determining the read cache capacity and the write cache capacity according to the read-write ratio, the sequentiality, and the load intensity, it further includes: obtaining the operation performance metrics of the storage device controller; wherein, the operation performance metrics include: cache hit rate, input / output latency, the cache hit rate includes: read cache hit rate, write cache hit rate, and the input / output latency includes: read input / output latency, write input / output latency; determining whether to adjust the adjustment factor according to the cache hit rate and / or the input / output latency; if it is necessary to adjust the adjustment factor, then adjusting the corresponding adjustment factor according to the cache hit rate and the input / output latency; wherein, the adjusted adjustment factor is used to determine the corresponding cache capacity.
[0011] In a preferred example, the present invention can be further configured as follows: obtaining the operation performance metrics of the storage device controller includes: when receiving a factor adjustment request, obtaining the operation performance metrics of the storage device controller; or, determining whether the adjustment is reasonable according to the adjusted read cache capacity, the adjusted write cache capacity, and the remaining capacity of the pre-storage area; if the adjustment is unreasonable, then obtaining the operation performance metrics of the storage device controller.
[0012] In a preferred example, the present invention can be further configured as follows: determining whether the adjustment is reasonable according to the adjusted read cache capacity, the adjusted write cache capacity, and the remaining capacity of the pre-storage area includes: determining whether the remaining capacity of the pre-storage area is greater than a preset minimum reservation threshold; determining whether the adjusted read cache capacity is within a first preset cache capacity range; determining whether the adjusted write cache capacity is within a second preset cache capacity range; if the remaining capacity of the pre-storage area is greater than the preset minimum reservation threshold, the adjusted read cache capacity is within the first preset cache capacity range, and the adjusted write cache capacity is within the second preset cache capacity range, then the adjustment is reasonable; otherwise, the adjustment is unreasonable.
[0013] In a preferred example, the present invention can be further configured as follows: if the adjustment is unreasonable, then obtaining the operation performance metrics of the storage device controller includes: if the adjustment is unreasonable, then if there is an adjusted target cache capacity that is not within the corresponding target preset cache capacity range, then sequentially determine the target cache capacity according to the preset capacity. If the determined target cache capacity is within the corresponding target preset cache capacity range and the remaining capacity of the pre-storage area is greater than the preset minimum reservation threshold, then adjust the capacity of the target cache; otherwise, obtain the operation performance metrics of the storage device controller; wherein, the target cache capacity includes: read cache capacity and write cache capacity.
[0014] In a preferred example, the present invention can be further configured as follows: adjusting corresponding adjustment factors according to the cache hit rate and the input / output delay, including: if it is necessary to adjust the first adjustment factor and the third adjustment factor corresponding to the read cache, then adjusting the first adjustment factor and the third adjustment factor according to the read cache hit rate, the read input / output delay, the sensitivity coefficient of the read cache hit rate, and the sensitivity coefficient of the read input / output delay; if it is necessary to adjust the second adjustment factor and the fourth adjustment factor corresponding to the write cache, then adjusting the second adjustment factor and the fourth adjustment factor according to the write cache hit rate, the write input / output delay, the sensitivity coefficient of the write cache hit rate, and the sensitivity coefficient of the write input / output delay.
[0015] In a preferred example, the present invention can be further configured as follows: further including: obtaining a first difference between the adjusted read cache area capacity and the unadjusted read cache area capacity; if the first difference is greater than the maximum threshold of the first preset difference, then adjusting down the sensitivity coefficient of the cache hit rate and / or the sensitivity coefficient of the input / output delay, so that the first difference obtained after adjustment is between the minimum threshold of the first preset difference and the maximum threshold of the first preset difference; if the first difference is less than the minimum threshold of the first preset difference, then adjusting up the sensitivity coefficient of the cache hit rate and / or the sensitivity coefficient of the input / output delay, so that the first difference obtained after adjustment is between the minimum threshold of the preset difference and the maximum threshold of the first preset difference.
[0016] In a preferred example, the present invention can be further configured as follows: further including: obtaining a second difference between the adjusted write cache area capacity and the unadjusted write cache area capacity; if the second difference is greater than the maximum threshold of the second preset difference, then adjusting up the sensitivity coefficient of the cache hit rate and / or the sensitivity coefficient of the input / output delay, so that the first difference obtained after adjustment is between the minimum threshold of the second preset difference and the maximum threshold of the second preset difference; if the second difference is less than the minimum threshold of the second preset difference, then adjusting down the sensitivity coefficient of the cache hit rate and / or the sensitivity coefficient of the input / output delay, so that the second difference obtained after adjustment is between the minimum threshold of the second preset difference and the maximum threshold of the second preset difference.
[0017] In a preferred example, the present invention can be further configured as follows: further including: adding configuration commands and query commands in the non-volatile memory express protocol; wherein, the configuration commands are used to adjust the partition capacity and / or adjust the adjustment factors; the query commands are used to query the configuration information, cache hit rate, and input / output delay of the current controller memory cache area.
[0018] In a preferred example, the present invention can be further configured as follows: The structures of the configuration command and the query command both include: an operation code field for indicating the operation type, and a custom field; the custom field of the configuration command includes: the read buffer capacity, the write buffer capacity, the first adjustment factor, the second adjustment factor, the third adjustment factor, and the fourth adjustment factor; the custom field of the query command includes: the read buffer capacity, the write buffer capacity, the cache hit rate, and the input / output latency.
[0019] In a preferred example, the present invention can be further configured as follows: obtaining the read / write ratio, sequentiality, and load intensity of the current input / output request, including: obtaining the number of read input / output requests, the number of write input / output requests, the number of accesses to consecutive logical blocks, the total number of input / output requests, the maximum input / output depth of the current input / output request, and the maximum queue depth supported by the device; determining the read / write ratio according to the number of read input / output requests and the number of write input / output requests; determining the sequentiality according to the number of accesses to consecutive logical blocks and the total number of input / output requests; determining the load intensity according to the maximum input / output depth of the current input / output request and the maximum queue depth supported by the device.
[0020] In a preferred example, the present invention can be further configured as follows: further including at least one of the following: recording partition configuration information to a partition metadata storage module, where the partition configuration information includes the read buffer capacity, the write buffer capacity, and the management area capacity; if the input / output request mode is a sequential input / output mode, pre-storing high-frequency data to the controller memory cache; if the input / output request mode is a random input / output mode, migrating low-frequency data from the controller memory cache to a secondary cache, where the secondary cache is the host memory or a storage medium.
[0021] In a preferred example, the present invention can be further configured as follows: further including: feeding back the adjusted read buffer capacity and the adjusted write buffer capacity to the host, so that the host determines the request order of the current input / output request according to the adjusted read buffer capacity and the adjusted write buffer capacity, and sends the input / output request in accordance with the request order; receiving the input / output request sent by the host, and processing the request according to the type of the input / output request and the corresponding buffer.
[0022] In a second aspect, a partitioning device for a buffer is provided, which is applied to a storage system. The storage system includes a storage device and a host. A controller memory buffer is set in a memory unit of a storage device controller of the storage device for direct access by the host. The controller memory buffer includes: a read buffer, a write buffer, a management area, and a reserved area. The partitioning device for the buffer includes: an acquisition module, configured to acquire a read-write ratio, sequentiality, and load intensity of a current input / output request; a capacity determination module, configured to determine a read buffer capacity and a write buffer capacity according to the read-write ratio, the sequentiality, and the load intensity; an adjustment value determination module, configured to determine a read adjustment capacity and a write adjustment capacity according to the read buffer capacity, the write buffer capacity, an initial read buffer capacity, and an initial write buffer capacity. Wherein, the read adjustment capacity and the write adjustment capacity are used to indicate that, according to the read adjustment capacity and the write adjustment capacity, the capacity of the reserved area is allocated to the read buffer and the write buffer.
[0023] In a third aspect, a partitioning device for a buffer is provided, including: a memory, configured to store a computer program; a processor, configured to execute the computer program to implement the method according to any one of the first aspect.
[0024] In a preferred example of the present invention, it can be further configured that: the partitioning device for the buffer is a host.
[0025] In a preferred example of the present invention, it can be further configured that: the partitioning device for the buffer is a storage device.
[0026] In a fourth aspect, a computer-readable storage medium is provided. At least one program code is stored in the computer-readable storage medium, and the program code is loaded and executed by a processor to implement the method according to any one of the first aspect.
[0027] In a fifth aspect, a computer program product is provided, including a computer program or instruction, and when the computer program or instruction is executed by a processor, the method according to any one of the first aspect is implemented.
[0028] In a sixth aspect, a storage device system is provided, including: a storage device and a host. A controller memory buffer is set in the memory unit of the storage device controller of the storage device for direct access by the host. The controller memory buffer includes: a read buffer, a write buffer, a management area, and a reserved area; the host is used to obtain the read-write ratio, sequentiality, and load intensity of the current input / output request; determine the read buffer capacity and the write buffer capacity according to the read-write ratio, the sequentiality, and the load intensity; determine the read adjustment capacity and the write adjustment capacity according to the read buffer capacity, the write buffer capacity, the initial read buffer capacity, and the initial write buffer capacity; the storage device is used to allocate the capacity of the reserved area to the read buffer and the write buffer according to the read adjustment capacity and the write adjustment capacity.
[0029] In summary, the method for partitioning the buffer provided by the present invention includes the following beneficial technical effects:
[0030] Utilizing the characteristics of the controller memory buffer of the storage device, taking the controller memory buffer as the buffer of the storage device, by analyzing the input / output request characteristics in real time, that is, the read-write ratio, sequentiality, and load intensity, to determine the read buffer capacity and the write buffer capacity, and then obtain the read adjustment capacity and the write adjustment capacity, to realize the dynamic adjustment of the partition allocation of the controller memory buffer in the storage device, so as to optimize the cache resource utilization rate of the controller memory buffer and the system performance.
[0031] In addition, the present invention also provides a buffer partitioning device, device, medium, and product, all of which have the above beneficial technical effects. BRIEF DESCRIPTION OF THE DRAWINGS
[0032] In order to more clearly illustrate the embodiments of the present invention, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.
[0033] Figure 1 It is a schematic diagram of the CMB function of an NVME device.
[0034] Figure 2 It is a schematic flow chart of a method for partitioning a buffer provided by an embodiment of the present invention.
[0035] Figure 3 It is a schematic diagram of the CMB cache partition provided by an embodiment of the present invention.
[0036] Figure 4 It is a schematic flow chart of another method for partitioning a buffer provided by an embodiment of the present invention.
[0037] Figure 5 This is a schematic structural diagram of a partition device for a buffer provided by an embodiment of the present invention.
[0038] Figure 6 This is a schematic structural diagram of a partition device for a buffer provided by an embodiment of the present invention. Detailed implementation manners
[0039] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.
[0040] The terms "including" and "having" in the specification of the present invention and the accompanying drawings above, as well as any variations related to "including" and "having", are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but may include steps or units that are not listed.
[0041] In order to enable those skilled in the art of this technology to better understand the solution of the present invention, some professional terms will be explained below.
[0042] CMB is an important feature in the NVMe protocol. It allows the SSD controller to map the internal general buffer to the host side, enabling the host to directly access it in the form of PCIe memory read / write. PCIe, peripheral component interconnect express, is a high-speed serial computer expansion bus standard. SQ, Submission Queue, is the NVMe protocol instruction submission queue. CQ, Completion Queue, is the NVMe protocol instruction completion queue. EP, EndPoint, an EP device usually represents a serial or I / O device; in EP mode, the type value in the PCIE configuration header is 0; in EP mode, the PCIE controller receives read and write operations for the local memory space. Host, the host, refers to a device that provides services for other software and hardware. It is usually defined as a large time-sharing computer system in the centralized computer mode. In this mode, multiple terminals communicate with it and rely on it for processing. In this article, the Host is the server host. LMU, Local Memory Unit, is a module for local storage and data processing, commonly found in embedded systems or system-on-chip (SoC), and describes the storage unit for storing local data in a processor or computer system. It mainly provides access to volatile memory resources, and in this invention, it refers to the NVMe device controller memory unit.
[0043] The present invention relates to a method, device, and related apparatus for dynamically caching and partitioning the CMB of an NVMe device in the fields of storage and embedded systems.
[0044] In traditional NVMe devices, CMB partitioning is usually static, that is, at system initialization, CMB resources are fixedly allocated. This static partitioning method cannot dynamically adjust the allocation of CMB resources according to the real-time IO load situation, resulting in waste of resources or performance bottlenecks, affecting the overall performance of the system. It cannot be dynamically adjusted according to the change of the real-time input / output mode, resulting in poor caching effect or inability to maximize the utilization of CMB resources, reducing the flexibility and adaptability of the system.
[0045] In the present invention, CMB is used as the cache area of the NVMe storage device. On the basis of fixedly allocating CMB resources during the initialization of the existing system, it aims to dynamically adjust the allocation of CMB resources according to the real-time change of the input / output mode, thereby optimizing the performance and efficiency of the storage system. It avoids the waste of resources caused by static partitioning and improves the utilization rate of CMB resources. The NVMe storage system can adaptively adjust the cache partition according to the change of the workload, improving the flexibility and adaptability of the system.
[0046] Next, a method, device, equipment, medium, and product for partitioning a cache area provided by an embodiment of the present invention will be introduced in detail.Figure 2 This is a schematic diagram of a method for partitioning a buffer area provided by an embodiment of the present invention. The method for partitioning the buffer area is applied to a storage system, which includes a storage device and a host. In the memory unit of the storage device controller of the storage device, a controller memory buffer is set for direct access by the host. The controller memory buffer includes: a read buffer, a write buffer, a management area, and a reserved area; the NVMe device supports CMB partitioning through firmware and hardware (for example, the CMB area is divided into multiple logical blocks).
[0047] When the host is initialized, it requests initial CMB allocation information from the NVMe device through an NVMe command. Default partitioning: According to the initial configuration of the device, the CMB is divided into static partitions. For example: Read buffer: Allocate a part of the CMB for read requests. Write buffer: Allocate a part of the CMB for write requests. Management area: Used for metadata or temporary buffering. The reserved area is the capacity reserved for dynamically allocating to the read buffer and the write buffer, serving as a capacity buffer pool that can be flexibly adjusted according to actual needs.
[0048] In the embodiment of the present application, the method for partitioning the buffer area can be executed by a buffer area partitioning device, which can be either the host or the storage device, and is not limited here. Preferably, the buffer area partitioning device is the host, and the host provides computing power support for the storage device, enabling the storage device to perform partitioning based on the read adjustment capacity and write adjustment capacity determined by the host. Refer to Figure 3 , the method for partitioning the buffer area, includes:
[0049] S101. Obtain the read-write ratio, sequentiality, and load intensity of the current input-output request.
[0050] Among them, the current input-output request refers to the input-output operation request of the system at the current moment; the read-write ratio represents the ratio of read operation requests to write operation requests among all input-output requests of the current input-output request; the sequentiality is used to describe the data access mode in the current input-output request; the load intensity is used to represent the size of the workload currently borne by the IO system.
[0051] In a feasible implementation, obtain the number of read input-outputs, the number of write input-outputs, the number of accesses to consecutive logical blocks, the total number of input-output requests, the maximum input-output depth of the current input-output request, and the maximum queue depth supported by the device; determine the read-write ratio according to the number of read input-outputs and the number of write input-outputs; determine the sequentiality according to the number of accesses to consecutive logical blocks and the total number of input-output requests; determine the load intensity according to the maximum input-output depth of the current input-output request and the maximum queue depth supported by the device.
[0052] Among them, the host driver monitors the IO characteristics in real time, including: read / write ratio (R / W ratio), which analyzes the ratio of read and write operations in the current input / output requests; sequentiality, which determines whether it is a sequential access; and load intensity, which evaluates the current load according to the IO queue depth (QueueDepth, QD). Specifically, (1) Read / write ratio: RW_ratio = (Read_IOs) / ((Read_IOs + Write_IOs)), where Read_IOs is the number of read input / outputs and Write_IOs is the number of write input / outputs. (2) Sequentiality formula: Sequentiality = (Seq_IOs) / (Total_IOs), where Seq_IOs is the number of accesses to consecutive logical blocks and Total_IOs is the total number of input / output requests; specifically, the calculation of IO sequentiality further includes: determining whether the logical addresses of consecutive input / output requests increase; if the logical addresses increase consecutively, it is counted as a sequential access; calculating the sequential access ratio as a metric for sequentiality. (3) Load intensity formula: Load_Intensity = QD / ((Max_QD)), where QD is the maximum input / output depth of the current input / output request and Max_QD is the maximum queue depth supported by the device.
[0053] S102. Determine the read buffer capacity and the write buffer capacity according to the read / write ratio, sequentiality, and load intensity;
[0054] In the embodiment of the present invention, the host driver dynamically adjusts the partitioning of the CMB according to the collected IO characteristics. The partitioning strategy can be based on the following: (1) Allocate according to the read / write ratio. When the proportion of read requests is high, the read cache partition is preferentially enlarged; when the proportion of write requests is high, the write cache partition is preferentially enlarged. (2) Allocate according to sequentiality. Sequential read: Allocate a larger cache area for prefetching; Random read: Reduce cache allocation to avoid waste. (3) Adjust according to load intensity. High load: Increase the cache space to accelerate request processing; Low load: Reduce cache allocation and release resources to other tasks. Specifically, the determination method for the read buffer capacity and the write buffer capacity is shown in the following embodiments.
[0055] S103. Determine the read adjustment capacity and the write adjustment capacity according to the read buffer capacity, the write buffer capacity, the initial read buffer capacity, and the initial write buffer capacity;
[0056] Among them, the read adjustment capacity = read buffer capacity - initial read buffer capacity; the write adjustment capacity = write buffer capacity - initial write buffer capacity.
[0057] Among them, the read adjustment capacity and the write adjustment capacity are used to indicate that, according to the read adjustment capacity and the write adjustment capacity, the capacity of the reserved area is allocated to the read buffer and the write buffer.
[0058] Furthermore, in a possible case, after the host determines the read adjustment capacity and the write adjustment capacity, it issues the read adjustment capacity and the write adjustment capacity to the storage device, so that the storage device can allocate the capacity of the reserved area to the read buffer and the write buffer according to the read adjustment capacity and the write adjustment capacity.
[0059] In another possible case, the host issues the read-write ratio, sequentiality, and load intensity of the current input / output request to the storage device. The storage device determines the read buffer capacity and the write buffer capacity according to the read-write ratio, sequentiality, and load intensity; determines the read adjustment capacity and the write adjustment capacity according to the read buffer capacity, the write buffer capacity, the initial read buffer capacity, and the initial write buffer capacity; and allocates the capacity of the reserved area to the read buffer and the write buffer according to the read adjustment capacity and the write adjustment capacity. For which case to choose, the embodiments of the present invention do not limit any more, and users can choose according to actual needs.
[0060] Specifically, when performing the allocation operation, it is necessary to comprehensively consider the size relationship among the total capacity of the reserved area, the read adjustment capacity, and the write adjustment capacity. If the capacity of the reserved area is sufficient to meet the requirements of the read adjustment capacity and the write adjustment capacity, then the allocation can be directly performed according to the adjustment capacity; if the capacity of the reserved area is insufficient, the allocation may be performed according to the ratio of the read adjustment capacity and the write adjustment capacity.
[0061] It can be seen that in the embodiments of the present invention, by using the characteristics of the controller memory buffer of the storage device, the controller memory buffer is used as the buffer of the storage device. By analyzing the characteristics of the input / output requests sent by the host in real time, that is, the read-write ratio, sequentiality, and load intensity, the read buffer capacity and the write buffer capacity are determined, and then the read adjustment capacity and the write adjustment capacity are obtained, so as to realize the dynamic adjustment of the partition allocation of the controller memory buffer in the storage device, and optimize the cache resource utilization rate of the controller memory buffer and the system performance.
[0062] In a possible implementation embodiment, S102 determines the read buffer capacity and the write buffer capacity according to the read-write ratio, sequentiality, and load intensity, including: determining the read buffer capacity according to the read-write ratio, sequentiality, load intensity, and the first adjustment factor and the third adjustment factor; determining the write buffer capacity according to the read-write ratio, sequentiality, load intensity, and the second adjustment factor and the fourth adjustment factor.
[0063] Among them, the first formula for determining the read cache capacity is:
[0064] CMB_Read = RW_ratio × Total_CMB × (1 + α × Sequentiality) × (1 + γ × Load_Intensity);
[0065] The first formula for determining the write cache capacity is:
[0066] CMB_Write = (1 - RW_ratio) × Total_CMB × (1 - β × Sequentiality) × (1 + δ × Load_Intensity);
[0067] CMB_Read is the read cache capacity, CMB_Write is the write cache capacity, RW_ratio is the read - write ratio; Total_CMB is the total capacity of the CMB; Sequentiality is the sequentiality; Load_Intensity is the load intensity; α is the first adjustment factor, β is the second adjustment factor, γ is the third adjustment factor, and δ is the fourth adjustment factor.
[0068] Among them, α and β control the influence of sequentiality on the partition size; the typical value of α is between 0.5 and 2, indicating the influence of sequentiality on the read cache; the typical value of β is between 0.1 and 0.5, indicating the influence of sequentiality on the write cache. γ and δ control the influence of load intensity on the partition size; the typical value of γ is between 1 and 3, indicating the influence of load intensity on the read cache; the typical value of δ is between 0.5 and 2, indicating the influence of load intensity on the write cache.
[0069] It can be seen that in the embodiment of the present invention, the CMB dynamic cache partitioning method is applicable to a high - performance storage system. By real - time monitoring of IO characteristics and dynamic adjustment of the partitioning strategy, the CMB resources are fully utilized, and flexible cache management is achieved through formula - based modeling, which can significantly improve storage performance and resource utilization.
[0070] In a possible implementation embodiment, the management area is used to store the first adjustment factor, the second adjustment factor, the third adjustment factor, and the fourth adjustment factor.
[0071] In a possible implementation embodiment, before S102 determines the read cache area capacity and the write cache area capacity according to the read - write ratio, sequentiality, and load intensity, it further includes: obtaining the target workload scenario; matching the initial adjustment factors corresponding to the target workload scenario from the initial value setting information; where the initial value setting information is the corresponding relationship between the scenario and the initial adjustment factors, and the initial adjustment factors include: the initial first adjustment factor, the initial second adjustment factor, the initial third adjustment factor, and the initial fourth adjustment factor.
[0072] The cache partitioning method is applicable to the following scenarios: a) Read-intensive scenarios, i.e., scenarios with more reads than writes. By increasing the adjustment factors α and γ, more cache resources are preferentially allocated to sequential read requests; b) Write-intensive scenarios, i.e., scenarios with more writes than reads. By increasing the adjustment factors β and δ, more cache resources are preferentially allocated to sequential write requests; c) Mixed workload scenarios, i.e., balanced load scenarios. By dynamically monitoring the change of RW_ratio, the allocation ratio of read cache and write cache is adjusted in real time.
[0073] Among them, the method for obtaining the target workload scenario is not limited in the embodiments of the present invention. It can be specified by the user or determined according to the current read-write ratio. For example, if the read-write ratio is greater than the first preset threshold, it is determined as a scenario with more reads than writes; if the read-write ratio is less than the second preset threshold, it is determined as a scenario with more writes than reads; otherwise, it is determined as a balanced load scenario.
[0074] In the embodiments of the present invention, initial weight adjustment factors and target performance indicators are set in the initialization stage. According to common workload scenarios, initial values can be set with reference to Table 1.
[0075] Table 1
[0076]
[0077] It can be understood that in the scenario of more reads than writes, sequentiality has a greater impact on the read cache, so α is higher; the write cache is less affected by sequentiality, so β is lower; the load intensity significantly improves the read cache, so γ is higher; the write cache needs to appropriately compensate for the load, so δ is lower. In the scenario of more writes than reads, sequentiality has a greater impact on the write cache, so α is appropriately reduced; the write cache is more sensitive, so β is slightly higher; the load intensity has a greater impact on the write cache, so δ is higher. In the balanced load scenario, intermediate values are adopted to adapt to various load scenarios.
[0078] It can be seen that in the embodiments of the present invention, by matching the initial adjustment factors corresponding to the target workload scenario from the initial value setting information, the initial adjustment factors can be flexibly allocated, so that the adjustment of the allocation ratio of the read cache and the write cache can better meet the actual needs.
[0079] In a possible implementation embodiment, after determining the read cache capacity and the write cache capacity according to the read-write ratio, sequentiality, and load intensity in S102, it further includes: obtaining the operating performance metrics of the storage device controller; wherein, the operating performance metrics include: cache hit rate, input / output latency, the cache hit rate includes: read cache hit rate, write cache hit rate, and the input / output latency includes: read input / output latency, write input / output latency; determining whether to adjust the adjustment factor according to the cache hit rate and / or the input / output latency; if it is necessary to adjust the adjustment factor, then adjusting the corresponding adjustment factor according to the cache hit rate and the input / output latency; wherein, the adjusted adjustment factor is used to determine the corresponding cache capacity.
[0080] In the embodiment of the present invention, the adjustment factor can be dynamically adjusted according to the operating performance metrics. Specifically, the dynamic adjustment objectives of the adjustment factor include: (1) improving the cache hit rate. If the cache hit rate is low, increase α or γ, and allocate more resources to the read cache to ensure a high hit rate. If the cache hit rate is high but the write performance is limited, increase β or δ to optimize the write cache allocation. (2) reducing the IO latency. If the IO latency is high, increase δ or γ to optimize the dynamic allocation of the write cache and the read cache and reduce the latency.
[0081] Specifically, if there is a read cache hit rate or a write cache hit rate less than the corresponding preset hit rate threshold, it is determined that the adjustment factor needs to be adjusted; or, if: the read I / O latency or the write I / O latency is greater than the corresponding preset I / O latency, it is determined that the adjustment factor needs to be adjusted. Among them, the preset hit rate threshold and the preset I / O latency can be set by the user according to actual needs.
[0082] For the adjusted adjustment factor, it can be applied to the current partition parameters and can also be used as the next partition parameters.
[0083] It can be seen that in the embodiment of the present invention, the adjustment factor can also be adjusted according to the operating performance metrics of the storage device controller, so that the partitioning effect is excellent.
[0084] In a possible implementation embodiment, obtaining the operating performance metrics of the storage device controller includes: obtaining the operating performance metrics of the storage device controller when a factor adjustment request is received.
[0085] When the administrator or the performance monitoring tool discovers that the performance metrics of the storage system are abnormal, a factor adjustment request will be issued to indicate factor adjustment.
[0086] In a possible implementation embodiment, determine whether the adjustment is reasonable according to the adjusted read buffer capacity, the adjusted write buffer capacity, and the remaining capacity of the pre-storage area; if the adjustment is unreasonable, obtain the operating performance metrics of the storage device controller. Specifically, in a possible implementation embodiment, determining whether the adjustment is reasonable according to the adjusted read buffer capacity, the adjusted write buffer capacity, and the remaining capacity of the pre-storage area includes: determining whether the remaining capacity of the pre-storage area is greater than a preset minimum reservation threshold; determining whether the adjusted read buffer capacity is within a first preset buffer capacity range; determining whether the adjusted write buffer capacity is within a second preset buffer capacity range; if the remaining capacity of the pre-storage area is greater than the preset minimum reservation threshold, the adjusted read buffer capacity is within the first preset buffer capacity range, and the adjusted write buffer capacity is within the second preset buffer capacity range, then the adjustment is reasonable; otherwise, the adjustment is unreasonable. Wherein, the preset minimum reservation threshold is a preset minimum capacity value used to ensure that a certain amount of available space is always reserved in the pre-storage area; the first preset buffer capacity range refers to the set capacity range of the read buffer; the second preset buffer capacity range refers to the set capacity range of the write buffer. In the embodiments of the present invention, by checking whether the remaining capacity of the pre-storage area, the read buffer capacity, and the write buffer capacity are within a reasonable range, it is convenient to adjust the subsequent adjustment factors to improve the overall performance and reliability of the system.
[0087] In a possible implementation embodiment, if the adjustment is unreasonable, obtain the operating performance metrics of the storage device controller, including: if the adjustment is unreasonable, if there is a target buffer capacity after adjustment that is not within the corresponding target preset buffer capacity range, then determine the target buffer capacity in sequence according to the preset capacity. If the determined target buffer capacity is within the corresponding target preset buffer capacity range and the remaining capacity of the pre-storage area is greater than the preset minimum reservation threshold, then adjust the capacity of the target buffer; otherwise, obtain the operating performance metrics of the storage device controller; wherein, the target buffer capacity includes: the read buffer capacity and the write buffer capacity.
[0088] If the read buffer capacity is not within the first preset buffer capacity, adjust the read buffer capacity up / down according to the preset capacity. If the finally determined read buffer capacity is within the first preset buffer capacity and the remaining capacity of the pre-storage area is greater than the preset minimum reservation threshold, then the adjustment is successful; otherwise, obtain the operating performance metrics of the storage device controller. If the write buffer capacity is not within the second preset buffer capacity, adjust the write buffer capacity up / down according to the preset capacity. If the finally determined write buffer capacity is within the second preset buffer capacity and the remaining capacity of the pre-storage area is greater than the preset minimum reservation threshold, then the adjustment is successful; otherwise, obtain the operating performance metrics of the storage device controller. For the number of times of adjusting according to the preset capacity, the embodiments of the present invention do not limit it, and it can be 1, 2, or 3 times.
[0089] It can be seen that in the embodiments of the present invention, when the cache adjustment is unreasonable, by readjusting the capacity of the target buffer, the cache configuration is made to reach a reasonable state as much as possible. If the adjustment is unsuccessful, the running performance indicators of the storage device controller are obtained to adjust the adjustment factors, so that the adjustment effect of that time is more excellent.
[0090] In a possible embodiment, according to the cache hit rate and input / output latency, the corresponding adjustment factors are adjusted, including: if it is necessary to adjust the first adjustment factor and the third adjustment factor corresponding to the read cache, then according to the read cache hit rate, read input / output latency, sensitivity coefficient of the read cache hit rate, and sensitivity coefficient of the read input / output latency, the first adjustment factor and the third adjustment factor are adjusted; if it is necessary to adjust the second adjustment factor and the fourth adjustment factor corresponding to the write cache, then according to the write cache hit rate, write input / output latency, sensitivity coefficient of the write cache hit rate, and sensitivity coefficient of the write input / output latency, the second adjustment factor and the fourth adjustment factor are adjusted.
[0091] In the embodiments of the present invention, a feedback optimization mechanism is added. The host obtains the running performance indicators (cache hit rate, IO latency) of the controller through a custom command, and adjusts and optimizes the adjustment factors according to the performance data to continuously improve the partition strategy. This feedback mechanism can dynamically optimize α, β, γ, δ, realize the efficient adaptive adjustment of the CMB read and write cache partitions, and improve the system performance.
[0092] The formula for adjusting the first adjustment factor is: ; the formula for adjusting the second adjustment factor is: ; the formula for adjusting the third adjustment factor is: ; the formula for adjusting the fourth adjustment factor is: ; where represents the sensitivity coefficient of the read cache hit rate, represents the sensitivity coefficient of the read IO latency, represents the read cache hit rate, represents the read IO latency, represents the first adjustment factor before adjustment, represents the first adjustment factor after adjustment, represents the third adjustment factor before adjustment, represents the third adjustment factor after adjustment; represents the sensitivity coefficient of the write cache hit rate, represents the sensitivity coefficient of the write IO latency, represents the write cache hit rate, represents the write IO latency, represents the second adjustment factor before adjustment, represents the second adjustment factor after adjustment; Represents the fourth adjustment factor before adjustment, Represents the fourth adjustment factor after adjustment.
[0093] : The sensitivity coefficient of the cache hit rate, usually in the range [0.1 - 0.5]. The lower the hit rate, the larger α is increased. : The sensitivity coefficient of the IO delay, usually in the range [0.1 - 0.3]. The higher the delay, the larger α is increased.
[0094] In a possible implementation embodiment, it further includes: obtaining a first difference between the adjusted read cache capacity and the read cache capacity before adjustment; if the first difference is greater than the first preset difference maximum threshold, then reducing the sensitivity coefficient of the cache hit rate and / or the sensitivity coefficient of the input / output delay, so that the first difference obtained after adjustment is between the first preset difference minimum threshold and the first preset difference maximum threshold; if the first difference is less than the first preset difference minimum threshold, then increasing the sensitivity coefficient of the cache hit rate and / or the sensitivity coefficient of the input / output delay, so that the first difference obtained after adjustment is between the preset difference minimum threshold and the first preset difference maximum threshold. The first preset difference maximum threshold and the first preset difference maximum threshold can be set by the user according to actual needs. When reducing the sensitivity coefficient of the cache hit rate and / or the sensitivity coefficient of the input / output delay, the sensitivity coefficient of the cache hit rate can be reduced according to the first cache hit rate adjustment step, and the sensitivity coefficient of the input / output delay can be reduced according to the first input / output delay adjustment step.
[0095] In a possible implementation embodiment, it further includes: obtaining a second difference between the adjusted write cache capacity and the write cache capacity before adjustment; if the second difference is greater than the second preset difference maximum threshold, then increasing the sensitivity coefficient of the cache hit rate and / or the sensitivity coefficient of the input / output delay, so that the first difference obtained after adjustment is between the second preset difference minimum threshold and the second preset difference maximum threshold; if the second difference is less than the second preset difference minimum threshold, then reducing the sensitivity coefficient of the cache hit rate and / or the sensitivity coefficient of the input / output delay, so that the second difference obtained after adjustment is between the second preset difference minimum threshold and the second preset difference maximum threshold. The second preset difference maximum threshold and the second preset difference maximum threshold can be set by the user according to actual needs. When increasing the sensitivity coefficient of the cache hit rate and / or the sensitivity coefficient of the input / output delay, the sensitivity coefficient of the cache hit rate can be increased according to the second cache hit rate adjustment step, and the sensitivity coefficient of the input / output delay can be increased according to the second input / output delay adjustment step.
[0096] In a possible implementation embodiment, if the partition device of the cache partition is a host, the host can also add configuration commands and query commands in the Non-Volatile Memory Express (NVMe) protocol; wherein, the configuration commands are used to adjust the partition capacity and / or adjust the adjustment factors; and the query commands are used to query the configuration information, cache hit rate, and input / output latency of the current controller memory buffer.
[0097] In the embodiment of the present invention, partition commands for dynamically adjusting the CMB are added in the NVMe protocol to support dynamic management of the CMB buffer division; the host driver dynamically adjusts the partition of the CMB according to the collected IO characteristics and the partition policy, dynamically updates the CMB division by customizing NVMe commands, the NVMe device firmware reconfigures the CMB, and feeds back the configuration result to the host. The host performs data transmission according to the new partition.
[0098] Specifically, in a possible implementation embodiment, the structures of both the configuration commands and the query commands include: an opcode field for indicating the operation type and a custom field; the custom field of the configuration commands includes: read buffer capacity, write buffer capacity, first adjustment factor, second adjustment factor, third adjustment factor, and fourth adjustment factor; the custom field of the query commands includes: read buffer capacity, write buffer capacity, cache hit rate, and input / output latency.
[0099] Specifically, Table 2 is the definition of the partition configuration commands for dynamically adjusting the CMB.
[0100] Table 2
[0101]
[0102] Table 3 is the definition of the partition query commands for dynamically adjusting the CMB.
[0103] Table 3
[0104]
[0105] Of course, the custom field of the query commands can also include: management area capacity and reserved area capacity.
[0106] According to the structure and mechanism of the management commands in the NVMe specification. The NVMe command structure consists of fixed fields (such as OpCode, NamespaceID) and custom fields. According to the function division, the custom commands can be divided into the following two categories: configuration commands are used for the host to send dynamic partition configurations to the controller, such as adjusting the capacity of the read and write caches or updating the adjustment factors. Query commands are used for the host to query the current CMB configuration from the controller and obtain runtime performance data such as cache hit rate and latency.
[0107] In a possible implementation embodiment, if the partitioning device of the cache partition is the host, the host can also: record the partition configuration information into the partition metadata storage module, where the partition configuration information includes the read buffer capacity, the write buffer capacity, and the management area capacity.
[0108] In the embodiment of the present invention, a partition metadata storage module is also provided for recording partition configuration information, including the sizes of the read cache, the write cache, and the management area.
[0109] Further, a cache hit rate statistics module is used to count the number of access hits and the total number of accesses to the read and write caches; a queue management module is used to monitor the input / output queue depth and the maximum queue depth in real time;
[0110] In a possible implementation embodiment, it further includes: if the input / output request mode is a sequential input / output mode, pre-store high-frequency data into the controller memory cache; if the input / output request mode is a random input / output mode, migrate low-frequency data from the controller memory cache to the secondary cache, where the secondary cache is the host memory or a storage medium.
[0111] In a realizable manner, if the partitioning device of the cache partition is the host, then if the host determines that the input / output request mode is a sequential input / output mode, issue a first storage command to the storage device so that the storage device pre-stores high-frequency data into the controller memory cache; if the host determines that the input / output request mode is a random input / output mode, issue a second storage command to the storage device so that the storage device migrates low-frequency data from the controller memory cache to the secondary cache, where the secondary cache is the host memory or a storage medium.
[0112] In another realizable manner, if the partitioning device of the cache partition is the storage device, the storage device receives the input / output request mode issued by the host. If the input / output request mode is a sequential input / output mode, pre-store high-frequency data into the controller memory cache; if the input / output request mode is a random input / output mode, migrate low-frequency data from the controller memory cache to the secondary cache, where the secondary cache is the host memory or a storage medium. In the embodiment of the present invention, a dynamic allocation mechanism for adding multiple levels of caches is set up to protect the NVMe CMB and the host memory or storage medium. Specifically, the NVMe controller memory cache (CMB) is used as the first-level cache; the host memory or storage medium is used as the second-level cache; the data migration strategy between the first-level cache and the second-level cache is dynamically adjusted according to the input / output request characteristics, including: in the sequential input / output mode, prefetch more data into the first-level cache; in the random input / output mode, migrate low-frequency data from the first-level cache to the second-level cache. According to the different input / output request modes, pre-storing high-frequency data into the CMB or migrating low-frequency data from the CMB to the secondary cache can effectively improve the IO performance, optimize resource utilization, and enhance system stability.
[0113] In a possible implementation embodiment, if the partition device of the cache partition is a storage device, after the storage device allocates the capacity of the reservation area to the read cache area and the write cache area according to the read adjustment capacity and the write adjustment capacity, it further includes: feeding back the adjusted read cache area capacity and the adjusted write cache area capacity to the host, so that the host determines the request order of the current input / output request according to the adjusted read cache area capacity and the adjusted write cache area capacity, and sends the input / output request according to the request order; receiving the input / output request sent by the host, and processing the request according to the type of the input / output request and the corresponding cache area.
[0114] After adjusting the capacities of the read cache area and the write cache area, the adjusted capacity information is sent to the host through the communication interface. The host receives the read cache area and write cache area capacity adjustment information from the storage device; according to the adjusted cache area capacity, if the read cache area capacity increases, read requests can be preferentially processed; if the write cache area capacity increases and the write operation is not sensitive to latency, write requests can be batch-processed. Based on this, the request order corresponding to each request in the current input / output request can be determined, and the input / output request is sent according to the request order, so that the input / output request processing efficiency is higher.
[0115] Further, cache coordination of multiple NVMe controllers can be implemented in a distributed storage device. Optimize cross-device data allocation and cache consistency. a) Multiple NVMe controllers are included in the distributed storage system, and each controller has an independent memory cache buffer (CMB); b) Dynamically adjust the CMB partition ratio of each controller according to the global input / output request characteristics; c) Implement cross-controller data consistency and partition optimization through the cache coordination mechanism.
[0116] Further, the dynamic cache partition method of the NVMe controller is implemented through firmware, and supports the following functions: a) Firmware update to adjust the parameters of the partition formula and the adjustment factor; b) Support for a new IO feature monitoring method through firmware update; c) Provide a visualization interface for real-time monitoring and performance feedback.
[0117] Further, in the embodiment of the present invention, cache resources can also be dynamically allocated in a virtualized environment according to the IO characteristics of different virtual machines. a) Dynamically allocate the NVMe controller memory cache buffer (CMB) according to the input / output request characteristics of each virtual machine, including the read / write ratio, sequentiality, and load intensity; b) Implement isolation and sharing of cache resources among virtual machines; c) When the input / output request characteristics of a certain virtual machine change significantly, dynamically adjust its cache partition ratio.
[0118] An embodiment of the present invention proposes a dynamic cache partitioning method for the CMB of an NVMe device, aiming to adapt to the performance requirements under different input / output modes by dynamically adjusting the read / write partition ratio of the CMB, thereby improving the cache utilization rate and overall performance of the storage device. The following will be combined with Figure 4 , to further elaborate on the technical solution of the present invention.
[0119] Step 1: When the NVMe firmware is initialized, complete the controller initialization and CMB setting, and divide the CMB according to the default partitioning policy (read:write = 50%:45%, management area = 5%). Read the maximum memory (LMU) of the device and the total size of the CMB (CMB_Total); the host side completes the NVMe driver initialization and CMB attribute setting,
[0120] Step 2: The NVMe device sets the location and size attributes of the CMB to support the host to directly access the CMB through the NVMe driver, reducing the CPU overhead and data access latency. The host obtains the initial partition information of the CMB through the NVMe command. The read cache area CMB is used for read requests, the write cache area CMB is used for write requests, and the management area is used for metadata or temporary buffering.
[0121] Step 3: The host monitors the following IO characteristics in real time: 1) Read / write ratio (R / W ratio): Analyze the ratio of read and write operations in the current input / output request; 2) Sequentiality: Determine whether it is sequential access. It can be calculated through a continuous logical address range; 3) Load intensity (LoadIntensity): Evaluate the current load according to the IO queue depth (QueueDepth, QD);
[0122] Step 4: The host-side driver, based on the collected IO characteristics, comprehensively considers the read / write ratio, sequentiality, and load intensity. According to the partitioning policy, if it is necessary to dynamically adjust the partition of the CMB, the host sends a dynamic partition configuration to the NVMe device controller through the CMB custom configuration command to adjust the ratio of the read / write cache of the CMB;
[0123] Step 5: The NVMe device controller parses the CMB configuration command, and at the same time the NVMe device firmware reconfigures the CMB. After the configuration is successful, the CQ feedbacks the host configuration result, and the host performs data transmission according to the new partition;
[0124] Step 6: The host uses the CMB custom query command to regularly monitor performance metrics such as cache hit rate and IO latency. If the cache hit rate is low or the latency increases, adjust the weight parameters of the partition policy. Analyze the performance data (cache hit rate, IO latency) of the actual workload to determine the optimal adjustment factor, and send the adjustment factor update command to the NVMe device controller through the CMB custom configuration command to adjust the values of the adjustment factors (α, β, γ, δ). Then, based on the updated adjustment factors, recalculate the allocation ratio of the CMB cache and re-dynamically allocate the cache.
[0125] The solution of the present invention includes at least the following aspects. 1. Self - adaptability of dynamic partitioning: Different from traditional static partitioning methods, the present invention dynamically adjusts the partition ratio of the CMB based on the real - time changes in the host input - output mode, according to the read - write ratio, sequentiality, and load intensity of the input - output requests. It provides a flexible partition adjustment formula, optimizes the read - write cache allocation based on adjustment factors, and adapts to variable workload scenarios. For example, expand the read cache in a read - intensive scenario and increase the write cache in a write - intensive scenario. 2. Multi - dimensional IO feature analysis: Considering multi - dimensional features such as read - write ratio, sequentiality, and load intensity comprehensively, rather than adjusting partitions in a single dimension, improves the accuracy of partition optimization. 3. Lightweight implementation: The dynamic partitioning strategy is based on the NVMe protocol and internal controller implementation, without the need for additional hardware support, and can be directly deployed through firmware updates, with high scalability and economy. 4. Adjustment factor optimization: Introduce adjustment factors (α, β, γ, δ) to flexibly control the influence of sequentiality and load intensity on cache allocation, and adapt to various storage scenarios. 5. Custom command extension: Design a set of custom commands in the NVMe protocol to extend the standard protocol functions, support the dynamic interaction between the host and the NVMe controller. Use a fixed NVMe command format to design the command fields, and flexibly transfer partition configuration, query conditions, or feedback data. Support efficient interaction between the host and the controller.
[0126] Moreover, continuously optimize the dynamic partitioning strategy through performance feedback data such as cache hit rate and IO latency. Implement a dynamic partitioning module in the NVMe controller, including an IO feature monitoring module, a partition adjustment module, and a performance feedback module.
[0127] Through the above - mentioned technical solutions, the embodiments of the present invention implement a method for dynamically managing the CMB cache area, improving the performance and efficiency of the storage system, reducing resource waste, optimizing the utilization rate of storage resources, and increasing the data transfer speed and system response ability.
[0128] Adjust the CMB resource allocation according to the real-time input-output mode to improve the overall system performance and response speed. It avoids the resource waste caused by static CMB partitions and improves the utilization rate of CMB resources. The storage system can adaptively adjust the CMB cache partitions according to the changes in the workload, improving the flexibility and adaptability of the system.
[0129] Next, an apparatus provided by an embodiment of the present invention will be introduced. The apparatus described below can be correspondingly referred to the method described above. Refer to Figure 5 , Figure 5 is the structural block diagram of the apparatus of one embodiment of the present invention, which is applied to a storage system. The storage system includes a storage device and a host. A controller memory buffer is set in the memory unit of the storage device controller of the storage device for direct access by the host. The controller memory buffer includes: a read buffer, a write buffer, a management area, and a reserved area;
[0130] The partitioning device of the buffer includes:
[0131] An acquisition module 210, configured to acquire the read-write ratio, sequentiality, and load intensity of the current input-output request;
[0132] A capacity determination module 220, configured to determine the capacity of the read buffer and the capacity of the write buffer according to the read-write ratio, sequentiality, and load intensity;
[0133] An adjustment value determination module 230, configured to determine the read adjustment capacity and the write adjustment capacity according to the capacity of the read buffer, the capacity of the write buffer, the initial capacity of the read buffer, and the initial capacity of the write buffer;
[0134] Wherein, the read adjustment capacity and the write adjustment capacity are used to indicate that the capacity of the reserved area is allocated to the read buffer and the write buffer according to the read adjustment capacity and the write adjustment capacity.
[0135] In a preferred example of the present invention, it can be further configured that: the capacity determination module 220 is configured to: determine the capacity of the read buffer according to the read-write ratio, sequentiality, load intensity, and a first adjustment factor and a third adjustment factor; determine the capacity of the write buffer according to the read-write ratio, sequentiality, load intensity, and a second adjustment factor and a fourth adjustment factor.
[0136] In a preferred example of the present invention, it can be further configured that: the management area is used to store the first adjustment factor, the second adjustment factor, the third adjustment factor, and the fourth adjustment factor.
[0137] In a preferred example, the present invention can be further configured to further include: an initial adjustment factor determination module, configured to obtain a target workload scenario; match an initial adjustment factor corresponding to the target workload scenario from the initial value setting information; wherein, the initial value setting information is the corresponding relationship between the scenario and the initial adjustment factor, and the initial adjustment factors include: an initial first adjustment factor, an initial second adjustment factor, an initial third adjustment factor, and an initial fourth adjustment factor.
[0138] In a preferred example, the present invention can be further configured to further include: an adjustment factor adjustment module, configured to obtain the operating performance metrics of the storage device controller; wherein, the operating performance metrics include: cache hit rate, input / output latency, the cache hit rate includes: read cache hit rate, write cache hit rate, and the input / output latency includes: read input / output latency, write input / output latency; determine whether to adjust the adjustment factor according to the cache hit rate and / or the input / output latency; if it is necessary to adjust the adjustment factor, then adjust the corresponding adjustment factor according to the cache hit rate and the input / output latency; wherein, the adjusted adjustment factor is used to determine the corresponding cache capacity.
[0139] In a preferred example, the present invention can be further configured to further include: the adjustment factor adjustment module is further configured to: when receiving a factor adjustment request, obtain the operating performance metrics of the storage device controller; or, determine whether the adjustment is reasonable according to the adjusted read cache area capacity, the adjusted write cache area capacity, and the remaining capacity of the pre-storage area; if the adjustment is unreasonable, then obtain the operating performance metrics of the storage device controller.
[0140] In a preferred example, the present invention can be further configured to further include: the adjustment factor adjustment module is further configured to: determine whether the remaining capacity of the pre-storage area is greater than a preset minimum reservation threshold; determine whether the adjusted read cache area capacity is within a first preset cache area capacity range; determine whether the adjusted write cache area capacity is within a second preset cache area capacity range; if the remaining capacity of the pre-storage area is greater than the preset minimum reservation threshold, the adjusted read cache area capacity is within the first preset cache area capacity range, and the adjusted write cache area capacity is within the second preset cache area capacity range, then the adjustment is reasonable; otherwise, the adjustment is unreasonable.
[0141] In a preferred example, the present invention may be further configured to further include: an adjustment factor adjustment module, which is further used for: if the adjustment is unreasonable, then if the adjusted target buffer capacity is not within the corresponding target preset buffer capacity range, determine the target buffer capacity in sequence according to the preset capacity. If the determined target buffer capacity is within the corresponding target preset buffer capacity range and the remaining capacity of the pre-storage area is greater than the preset minimum reservation threshold, adjust the capacity of the target buffer; otherwise, obtain the operating performance index of the storage device controller; wherein, the target buffer capacity includes: the read buffer capacity and the write buffer capacity.
[0142] In a preferred example, the present invention may be further configured to further include: an adjustment factor adjustment module, which is further used for: if it is necessary to adjust the first adjustment factor and the third adjustment factor corresponding to the read buffer, adjust the first adjustment factor and the third adjustment factor according to the read buffer hit rate, the read input / output delay, the sensitivity coefficient of the read buffer hit rate, and the sensitivity coefficient of the read input / output delay; if it is necessary to adjust the second adjustment factor and the fourth adjustment factor corresponding to the write buffer, adjust the second adjustment factor and the fourth adjustment factor according to the write buffer hit rate, the write input / output delay, the sensitivity coefficient of the write buffer hit rate, and the sensitivity coefficient of the write input / output delay.
[0143] In a preferred example, the present invention may be further configured to further include: an adjustment factor adjustment module, which is further used for: obtaining a first difference between the adjusted read buffer capacity and the read buffer capacity before adjustment; if the first difference is greater than the first preset difference maximum threshold, reduce the sensitivity coefficient of the buffer hit rate and / or the sensitivity coefficient of the input / output delay, so that the first difference obtained after adjustment is between the first preset difference minimum threshold and the first preset difference maximum threshold; if the first difference is less than the first preset difference minimum threshold, increase the sensitivity coefficient of the buffer hit rate and / or the sensitivity coefficient of the input / output delay, so that the first difference obtained after adjustment is between the preset difference minimum threshold and the first preset difference maximum threshold.
[0144] In a preferred example, the present invention may be further configured to further include: an adjustment factor adjustment module, which is further used for: obtaining a second difference between the adjusted write buffer capacity and the write buffer capacity before adjustment; if the second difference is greater than the second preset difference maximum threshold, increase the sensitivity coefficient of the buffer hit rate and / or the sensitivity coefficient of the input / output delay, so that the first difference obtained after adjustment is between the second preset difference minimum threshold and the second preset difference maximum threshold; if the second difference is less than the second preset difference minimum threshold, reduce the sensitivity coefficient of the buffer hit rate and / or the sensitivity coefficient of the input / output delay, so that the adjusted second difference is between the second preset difference minimum threshold and the second preset difference maximum threshold.
[0145] In a preferred example, the present invention may be further configured to further include: a command configuration module for adding configuration commands and query commands in the non-volatile memory express protocol; wherein, the configuration commands are used to adjust the partition capacity and / or adjust the adjustment factor; the query commands are used to query the configuration information, cache hit rate, and input / output latency of the current controller memory buffer.
[0146] In a preferred example, the present invention may be further configured to: the structures of both the configuration commands and the query commands include: an opcode field for indicating the operation type, and a custom field; the custom field of the configuration commands includes: the read adjustment capacity of the read buffer, the write adjustment capacity of the write buffer, a first adjustment factor, a second adjustment factor, a third adjustment factor, and a fourth adjustment factor; the custom field of the query commands includes: the read buffer capacity, the write buffer capacity, the cache hit rate, and the input / output latency.
[0147] In a preferred example, the present invention may be further configured to: an acquisition module 210 for: acquiring the number of read input / outputs, the number of write input / outputs, the number of accesses to consecutive logical blocks, the total number of input / output requests, the maximum input / output depth of the current input / output request, and the maximum queue depth supported by the device for the current input / output request; determining the read / write ratio according to the number of read input / outputs and the number of write input / outputs; determining the sequentiality according to the number of accesses to consecutive logical blocks and the total number of input / output requests; determining the load intensity according to the maximum input / output depth of the current input / output request and the maximum queue depth supported by the device.
[0148] In a preferred example, the present invention may be further configured to further include at least one of the following: a recording module for recording partition configuration information to a partition metadata storage module, where the partition configuration information includes the read buffer capacity, the write buffer capacity, and the management area capacity; a control module for pre-storing high-frequency data to the controller memory buffer if the input / output request mode is a sequential input / output mode; and migrating low-frequency data from the controller memory buffer to a secondary cache if the input / output request mode is a random input / output mode, where the secondary cache is the host memory or a storage medium.
[0149] In a preferred example, the present invention may be further configured to further include: a processing module for feeding back the adjusted read buffer capacity and the adjusted write buffer capacity to the host, so that the host determines the request order of the current input / output request according to the adjusted read buffer capacity and the adjusted write buffer capacity, and sends the input / output request according to the request order; receiving the input / output request sent by the host, and performing request processing according to the type of the input / output request and the corresponding buffer.
[0150] Figure 6 It is a structural diagram of a partition device for a buffer area provided by an embodiment of the present invention, asFigure 6 As shown, the partitioning device of the buffer includes: a memory 60 for storing computer programs;
[0151] a processor 61 for implementing the steps of the method in the above embodiments when executing the computer program.
[0152] Among them, the processor 61 may include one or more processing cores, such as a 4-core processor, an 8-core processor, etc. The processor 61 may be implemented in at least one hardware form of digital signal processing (DSP), field-programmable gate array (FPGA), or programmable logic array (PLA). The processor 61 may also include a main processor and a coprocessor. The main processor is a processor for processing data in the wake state, also known as the central processing unit (CPU); the coprocessor is a low-power processor for processing data in the standby state. In some embodiments, the processor 61 may be integrated with a graphics processing unit (GPU), and the GPU is responsible for rendering and drawing the content to be displayed on the display screen. In some embodiments, the processor 61 may further include an artificial intelligence (AI) processor, and the AI processor is used to process computational operations related to machine learning.
[0153] The memory 60 may include one or more computer-readable storage media, and the computer-readable storage media may be non-transitory. The memory 60 may further include a high-speed random access memory and a non-volatile memory, such as one or more disk storage devices and flash storage devices. In this embodiment, the memory 60 is at least used to store the following computer program 601. After the computer program is loaded and executed by the processor 61, it can implement the relevant steps of the method disclosed in any of the foregoing embodiments. In addition, the resources stored in the memory 60 may further include an operating system 602 and data 603, etc., and the storage method may be temporary storage or permanent storage. Among them, the operating system 602 may include Windows, Unix, Linux, etc.
[0154] In some embodiments, the partitioning device of the buffer may further include a display screen 62, an input / output interface 63, a communication interface 64, a power supply 65, and a communication bus 66.
[0155] Those skilled in the art can understand, Figure 6The structure shown does not constitute a limitation on the partitioning device of the buffer area, and may include more or fewer components than shown in the figure.
[0156] It can be understood that if the methods in the above embodiments are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the current technology, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and executes all or part of the steps of the methods in the various embodiments of the present invention. The foregoing storage medium includes: USB flash drive, mobile hard disk, read-only memory (ROM), random access memory (RAM), electrically erasable programmable ROM, register, hard disk, removable disk, CD-ROM, magnetic disk or optical disk, etc., all of which can store program codes.
[0157] Based on this, the embodiments of the present invention further provide a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the above method are implemented.
[0158] Based on this, the embodiments of the present invention further provide a computer program product, including a computer program or instruction, and when the computer program or instruction is executed by a processor, the above method is implemented.
[0159] Based on this, the embodiments of the present invention further provide a storage device system, including: a storage device and a host. In the memory unit of the storage device controller of the storage device, a controller memory buffer area is set for direct access by the host. The controller memory buffer area includes: a read buffer area, a write buffer area, a management area, and a reserved area; the host is used to obtain the read-write ratio, sequentiality, and load intensity of the current input-output request; determine the read buffer area capacity and write buffer area capacity according to the read-write ratio, sequentiality, and load intensity; determine the read adjustment capacity and write adjustment capacity according to the read buffer area capacity, write buffer area capacity, initial read buffer area capacity, and initial write buffer area capacity; the storage device is used to allocate the capacity of the reserved area to the read buffer area and write buffer area according to the read adjustment capacity and write adjustment capacity. The above has introduced in detail a method, device, equipment, medium, and product for partitioning a buffer area provided by the embodiments of the present invention. The various embodiments in the specification are described in a progressive manner. Each embodiment focuses on the differences from other embodiments. The same or similar parts among the various embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the description of the method part.
[0160] Those skilled in the art may further realize that the units and algorithm steps of each example described in combination with the embodiments disclosed herein can be implemented by electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described according to functions in the above description. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present invention.
[0161] The above has introduced in detail a method, apparatus, device, medium, and product for partitioning a buffer area provided by the present invention. Specific examples are used herein to elaborate on the principles and implementation manners of the present invention. The description of the above embodiments is only used to help understand the method and its core idea of the present invention. It should be noted that for those of ordinary skill in the art in the technical field, without departing from the principle of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also fall within the protection scope of the present invention.
Claims
1. A method for partitioning a buffer, characterized in that, Applied to a storage system, the storage system includes a storage device and a host, and a controller memory buffer is set in a memory unit of a storage device controller of the storage device for direct access by the host. The controller memory buffer includes: a read buffer, a write buffer, a management area, and a reserved area; The method for partitioning the buffer area includes: Obtaining the read-write ratio, sequentiality, and load intensity of the current input-output request; Determining the capacity of the read buffer and the capacity of the write buffer according to the read-write ratio, the sequentiality, and the load intensity; Determining a read adjustment capacity and a write adjustment capacity according to the capacity of the read buffer, the capacity of the write buffer, the initial capacity of the read buffer, and the initial capacity of the write buffer; wherein, the read adjustment capacity and the write adjustment capacity are used to indicate that according to the read adjustment capacity and the write adjustment capacity, the capacity of the reserved area is allocated to the read buffer and the write buffer.
2. The partitioning method of the buffer according to claim 1, wherein, Determining the capacity of the read buffer and the capacity of the write buffer according to the read-write ratio, the sequentiality, and the load intensity includes: Determining the capacity of the read buffer according to the read-write ratio, the sequentiality, the load intensity, a first adjustment factor, and a third adjustment factor; Determining the capacity of the write buffer according to the read-write ratio, the sequentiality, the load intensity, a second adjustment factor, and a fourth adjustment factor.
3. The partitioning method of the buffer according to claim 2, characterized in that, The management area is used to store the first adjustment factor, the second adjustment factor, the third adjustment factor, and the fourth adjustment factor.
4. The partitioning method of the buffer according to claim 2, characterized in that, Before determining the capacity of the read buffer and the capacity of the write buffer according to the read-write ratio, the sequentiality, and the load intensity, it further includes: Obtaining a target workload scenario; Matching the initial adjustment factors corresponding to the target workload scenario from the initial value setting information; Wherein, the initial value setting information is the corresponding relationship between the scenario and the initial adjustment factors, and the initial adjustment factors include: an initial first adjustment factor, an initial second adjustment factor, an initial third adjustment factor, and an initial fourth adjustment factor.
5. The partitioning method of the buffer according to claim 2, characterized in that, After determining the capacity of the read buffer and the capacity of the write buffer according to the read-write ratio, the sequentiality, and the load intensity, it further includes: Obtaining the operating performance indicators of the storage device controller; wherein, the operating performance indicators include: cache hit rate, input-output delay, the cache hit rate includes: read cache hit rate, write cache hit rate, and the input-output delay includes: read input-output delay, write input-output delay; Determining whether to adjust the adjustment factors according to the cache hit rate and / or the input-output delay; If it is necessary to adjust the adjustment factors, adjusting the corresponding adjustment factors according to the cache hit rate and the input-output delay; Wherein, the adjusted adjustment factors are used to determine the corresponding cache capacity.
6. The partitioning method of the buffer according to claim 5, characterized in that, Obtaining the operating performance indicators of the storage device controller includes: When receiving a factor adjustment request, obtaining the operating performance indicators of the storage device controller; Or, Determining whether the adjustment is reasonable according to the adjusted capacity of the read buffer, the adjusted capacity of the write buffer, and the remaining capacity of the pre-storage area; if the adjustment is unreasonable, obtaining the operating performance indicators of the storage device controller.
7. The method for partitioning a buffer according to claim 6, wherein Determining whether the adjustment is reasonable according to the adjusted read buffer capacity, the adjusted write buffer capacity, and the remaining capacity of the pre-storage area includes: Determining whether the remaining capacity of the pre-storage area is greater than a preset minimum reserved threshold; Determining whether the adjusted read buffer capacity is within the range of the first preset buffer capacity; Determining whether the adjusted write buffer capacity is within the range of the second preset buffer capacity; If the remaining capacity of the pre-storage area is greater than the preset minimum reserved threshold, the adjusted read buffer capacity is within the range of the first preset buffer capacity, and the adjusted write buffer capacity is within the range of the second preset buffer capacity, then the adjustment is reasonable; otherwise, the adjustment is unreasonable.
8. The method for partitioning a buffer according to claim 6, wherein If the adjustment is unreasonable, obtain the operating performance metrics of the storage device controller, including: If the adjustment is unreasonable, and if the adjusted target buffer capacity is not within the corresponding target preset buffer capacity range, then determine the target buffer capacity in sequence according to the preset capacity. If the determined target buffer capacity is within the corresponding target preset buffer capacity range and the remaining capacity of the pre-storage area is greater than the preset minimum reserved threshold, then adjust the capacity of the target buffer; otherwise, obtain the operating performance metrics of the storage device controller; Wherein, the target buffer capacity includes: the read buffer capacity and the write buffer capacity.
9. The partitioning method of the buffer according to claim 5, characterized in that Adjusting the corresponding adjustment factors according to the cache hit rate and the input / output delay, including: If it is necessary to adjust the first adjustment factor and the third adjustment factor corresponding to the read buffer, then adjust the first adjustment factor and the third adjustment factor according to the read cache hit rate, the read input / output delay, the sensitivity coefficient of the read cache hit rate, and the sensitivity coefficient of the read input / output delay; If it is necessary to adjust the second adjustment factor and the fourth adjustment factor corresponding to the write buffer, then adjust the second adjustment factor and the fourth adjustment factor according to the write cache hit rate, the write input / output delay, the sensitivity coefficient of the write cache hit rate, and the sensitivity coefficient of the write input / output delay.
10. The method for partitioning a buffer according to claim 9, wherein It also includes: Obtaining a first difference between the adjusted read buffer capacity and the read buffer capacity before adjustment; If the first difference is greater than the first preset maximum difference threshold, then reduce the sensitivity coefficient of the cache hit rate and / or the sensitivity coefficient of the IO delay so that the first difference obtained after adjustment is between the first preset minimum difference threshold and the first preset maximum difference threshold; If the first difference is less than the first preset minimum difference threshold, then increase the sensitivity coefficient of the cache hit rate and / or the sensitivity coefficient of the IO delay so that the first difference obtained after adjustment is between the preset minimum difference threshold and the first preset maximum difference threshold.
11. The method for partitioning the buffer according to claim 9, wherein It also includes: Obtaining a second difference between the adjusted write buffer capacity and the write buffer capacity before adjustment; If the second difference is greater than the second preset maximum difference threshold, then increase the sensitivity coefficient of the cache hit rate and / or the sensitivity coefficient of the IO delay so that the first difference obtained after adjustment is between the second preset minimum difference threshold and the second preset maximum difference threshold; If the second difference is less than the minimum threshold of the second preset difference, the sensitivity coefficient of the cache hit rate and / or the sensitivity coefficient of the IO latency is adjusted to make the adjusted second difference between the minimum threshold and the maximum threshold of the second preset difference.
12. The method for partitioning a buffer according to claim 2, wherein It further includes: Adding configuration commands and query commands in the non-volatile memory fast channel protocol; Among them, the configuration command is used to adjust the partition capacity and / or adjust the adjustment factor; The query command is used to query the configuration information, cache hit rate and input / output latency of the current controller memory buffer.
13. The method for partitioning a buffer according to claim 12, wherein The structures of the configuration command and the query command both include: an opcode field for indicating the operation type, and a custom field; The custom field of the configuration command includes: the read adjustment capacity of the read buffer, the write adjustment capacity of the write buffer, the first adjustment factor, the second adjustment factor, the third adjustment factor and the fourth adjustment factor; The custom field of the query command includes: the read buffer capacity, the write buffer capacity, the cache hit rate and the input / output latency.
14. The partitioning method of the buffer according to claim 1, wherein, Obtaining the read / write ratio, sequentiality and load intensity of the current input / output request, including: Obtaining the number of read input / output requests, the number of write input / output requests, the number of accesses to consecutive logical blocks, the total number of input / output requests, the maximum input / output depth of the current input / output request, and the maximum queue depth supported by the device for the current input / output request; Determining the read / write ratio according to the number of read input / output requests and the number of write input / output requests; Determining the sequentiality according to the number of accesses to consecutive logical blocks and the total number of input / output requests; Determining the load intensity according to the maximum input / output depth of the current input / output request and the maximum queue depth supported by the device.
15. The method for partitioning a buffer according to claim 1, wherein It further includes at least one of the following: Recording the partition configuration information into the partition metadata storage module, where the partition configuration information includes the read buffer capacity, the write buffer capacity and the management area capacity; If the input / output request mode is a sequential input / output mode, pre-storing high-frequency data into the controller memory buffer; If the input / output request mode is a random input / output mode, migrating low-frequency data from the controller memory buffer to the secondary cache, and the secondary cache is the host memory or the storage medium.
16. The method for partitioning a buffer according to claim 1, wherein It further includes: Feeding back the adjusted read buffer capacity and the adjusted write buffer capacity to the host, so that the host determines the request order of the current input / output request according to the adjusted read buffer capacity and the adjusted write buffer capacity, and sends the input / output request according to the request order; Receiving the input / output request sent by the host, and processing the request according to the type of the input / output request and the corresponding buffer.
17. A partitioning device for a buffer, characterized in that, Applied to a storage system, the storage system includes a storage device and a host, and a controller memory buffer is set in the memory unit of the storage device controller of the storage device for direct access by the host, and the controller memory buffer includes: a read buffer, a write buffer, a management area and a reserved area; The partition device of the buffer includes: An acquisition module for acquiring the read / write ratio, sequentiality and load intensity of the current input / output request; A capacity determination module, configured to determine a read buffer capacity and a write buffer capacity according to the read-write ratio, the sequentiality, and the load intensity; An adjustment value determination module, configured to determine a read adjustment capacity and a write adjustment capacity according to the read buffer capacity, the write buffer capacity, the initial read buffer capacity, and the initial write buffer capacity; wherein the read adjustment capacity and the write adjustment capacity are used to indicate that the capacity of the reserved area is allocated to the read buffer and the write buffer according to the read adjustment capacity and the write adjustment capacity.
18. A partitioning device for a buffer, characterized in that, It includes: A memory, configured to store a computer program; A processor, configured to execute the computer program to implement the steps of the buffer partitioning method according to any one of claims 1 to 16.
19. A computer-readable storage medium, characterized in that, A computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, the steps of the buffer partitioning method according to any one of claims 1 to 16 are implemented.
20. A computer program product, comprising a computer program / instructions, characterized in that, When the computer program / instructions are executed by a processor, the steps of the buffer partitioning method according to any one of claims 1 to 16 are implemented.
Citation Information
Patent Citations
Method and system for managing virtual machine cache resource
CN105511798A
Read-write cache optimization method and system based on storage pool, terminal and storage medium
CN111338579A