Signal processing platform online reconstruction method based on RFSOC chip

Abstract

The invention discloses a signal processing platform online reconstruction method based on an RFSOC chip, and belongs to the field of electronic reconnaissance. According to the on-line reconstruction technology based on the RFSOC, the functionality of the platform can be increased, the reliability is improved, the working modules of the platform are more convenient to switch, the functions are more diversified, and the current engineering requirements are better met. The technology is realized by means of the RFSOC chip and the plug-in Flash, so that the problem that functional software of the current RFSOC chip cannot be reconstructed online is effectively solved, and meanwhile, the problem that the current functional software is single is solved. According to the invention, the function expansibility and the operation convenience of the RFSOC signal processing platform are improved.

Description

Technical Field

[0001] The invention belongs to the field of electronic reconnaissance, and in particular relates to an online reconstruction method of a signal processing platform based on an RFSOC chip. Background Art

[0002] With the continuous development of electronic information technology, RFSOC chips have recently begun to emerge in large areas. The chip integrates ARM, FPGA, AD, and DA. The chip configuration program can only be mounted on ARM, and it is difficult to reconstruct the configuration program online in this case. However, there is an urgent need for online reconstruction of the configuration program on multiple platforms. If online reconstruction based on RFSOC can be reliably implemented, it will greatly reduce the difficulty of equipment development and improve the flexibility of system operation.

[0003] Currently, the configuration program of RFSOC is mainly updated through JTAG burning, which is difficult to operate. If the program is updated after the device is debugged and installed, the device needs to be disassembled. In addition, the current RFSOC can only have one version program. This method makes the signal processing platform single-function and inconvenient to use. Summary of the invention

[0004] The present invention proposes an online reconstruction method for a signal processing platform based on an RFSOC chip, which communicates with the RFSOC chip in the signal processing platform through a network, realizes configuring different versions of functional programs for the RFSOC chip, increases the functional flexibility of the signal processing platform, and realizes remote updating of the RFSOC configuration program. The present invention solves the technical problems that the current general signal processing platform based on the RFSOC chip has a single function and cannot complete remote updating through the network and switching of functional software during the working process.

[0005] The technical solution to realize the present invention is: a method for online reconstruction of a signal processing platform based on an RFSOC chip, comprising the following steps:

[0006] Step 1: Use the development tool to compile and generate different versions of FPGA function programs, generate corresponding MCS files, and store them in local files on the computer.

[0007] Step 2: Use the host computer to read any version of the function program from the local file, and transmit the decoding of the function program to the RFSOC in the signal processing platform through the network according to the specified data format. The ARM module in the RFSOC temporarily stores the function program in DDR4. After the host computer completes the download, it sends an end instruction and the function program solidification location to RFSOC.

[0008] Step 3: The host network sends a control instruction to the MCU to reset the Flash. Then the RFSOC writes the function program into the Flash. After completing the reading, comparison and verification of the function program, it feeds back a successful write flag of the function program to the host computer.

[0009] Step 4: The host computer starts to send instructions to the auxiliary controller to control the auxiliary controller to operate the RFSOC to realize the loading verification of the functional program.

[0010] Step 5: Repeat the above steps 2, 3 and 4 to solidify the functional programs in the remaining Flash and complete the loading verification of the functional programs.

[0011] Compared with the prior art, the present invention has the following significant advantages:

[0012] (1) Realize the switching of multiple functional software versions of the signal processing platform;

[0013] (2) Realize online update of functional software through the network.

[0014] (3) The online reconstruction function of the RFSOC chip can be realized through the host computer. The configuration program of the RFSOC chip can be expanded from the original one version to four versions, and the number of software versions increases by 300%. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 Functional block diagram of the RFSOC online reconstruction method application platform.

[0016] Figure 2 Reconstruct the flow chart for RFSOC online. DETAILED DESCRIPTION

[0017] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0018] The technical solutions between the various embodiments of the present invention can be combined with each other, but it must be based on the fact that ordinary technicians in the field can implement it. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0019] The following will further introduce the specific implementation method, as well as the technical difficulties and inventive points of this invention in combination with this design example.

[0020] A general signal processing platform based on RFSOC chip online reconstruction implementation platform, such as Figure 1 As shown, the platform includes a signal processing platform and ground equipment, and the lower computer and the signal processing platform communicate through a network; the lower computer includes: an RFSOC chip, DDR4, an auxiliary controller (MCU) and a Flash module composed of multiple Flash chips; the ground equipment includes a computer.

[0021] Combination Figure 2 The method for online reconstruction of a signal processing platform based on an RFSOC chip of the present invention comprises the following steps:

[0022] Step 1: Use the development tool to compile and generate different versions of FPGA function programs, generate corresponding MCS files, and store them in local files on the computer.

[0023] Step 2: Use the host computer to read a certain version of the function program from the local file, and transmit the decoding of the function program to the RFSOC in the signal processing platform through the network according to the specified data format. The ARM module in the RFSOC temporarily stores the function program in DDR4. After the host computer completes the download, it sends an end instruction and the function program solidification location to RFSOC.

[0024] Step 21: Read the MCS file of the functional program through the host computer.

[0025] Step 22: Determine the network communication protocol between the upper computer and the lower computer.

[0026] Step 23: Transmit the MCS data to RFSOC through the network, and RFSOC puts the MCS data in DDR4.

[0027] Step 24: After the downloading of the functional program is completed, the host computer sends a function program downloading completion instruction and the fixed location of the function program to RFSOC via the network.

[0028] Step 3: The host network sends a control instruction to the auxiliary controller (MCU) to reset the Flash. Then RFSOC writes the function program into the Flash. After completing the reading, comparison, and verification of the function program, it feeds back a successful write flag of the function program to the host computer.

[0029] Step 31: Determine the network communication protocol between the host computer and the microcontroller.

[0030] Step 32: Transmit the control instruction downward through the network to control the auxiliary controller to pull down the reset pin of the Flash into which the functional program is to be written.

[0031] Step 33: RFSOC writes the function program into the Flash in step 32.

[0032] Step 34, RFSOC reads the above function program from Flash and compares it with the original data in DDR4 one by one to prevent data errors.

[0033] Step 35: If the data read from the Flash by RFSOC is incorrect, then rewrite the data in DDR4 to the Flash to correct the incorrect data.

[0034] Step 36: RFSOC sends a function program write success flag to the lower computer via the network.

[0035] Step 4: The host computer starts to send instructions to the auxiliary controller to control the auxiliary controller to operate the RFSOC to realize the loading verification of the functional program.

[0036] Step 41: Transmit the control instruction downward through the network to control the auxiliary controller to implement the reset operation of RFSOC.

[0037] Step 42: Restart the RFSOC and load the function program.

[0038] Step 43: Verify that the function program is loaded successfully.

[0039] Step 5: Repeat the above steps 2, 3 and 4 to solidify the functional programs in the remaining Flash and complete the loading verification of the functional programs.

Claims

1. A signal processing platform online reconstruction method based on RFSOC chip, characterized in that: The following steps are involved: Step 1: Compile and generate different versions of FPGA function programs in the development tool, generate corresponding MCS files, and store them in local files on the computer; Step 2: Use the host computer to read any version of the function program from the local file, and transmit the decoding of the function program to the RFSOC in the signal processing platform through the network according to the specified data format. The ARM module in the RFSOC temporarily stores the function program in DDR4. After the host computer completes the download, it sends an end instruction and the function program solidification position to the RFSOC; Step 3: The host computer network sends a control instruction to the MCU to reset the Flash, and then the RFSOC writes the function program into the Flash. After completing the reading, comparison, and verification of the function program, it feeds back a successful write flag of the function program to the host computer; Step 4: The host computer starts to send instructions to the auxiliary controller to control the auxiliary controller to operate the RFSOC to realize the loading verification of the functional program; Step 5: Repeat the above steps 2, 3 and 4 to solidify the functional programs in the remaining Flash and complete the loading verification of the functional programs.

2. The online reconstruction method of the signal processing platform based on the RFSOC chip according to claim 1, characterized in that: In step 2, the host computer reads any version of the function program from the local file, and transmits the decoding of the function program to the RFSOC in the signal processing platform through the network according to the specified data format. The ARM module in the RFSOC temporarily stores the function program in DDR4. After the host computer downloads the program, it sends the end instruction and the function program solidification location to the RFSOC, as follows: Step 21, read the MCS file of the functional program through the host computer; Step 22, determine the network communication protocol between the upper computer and the lower computer; Step 23, transmit the MCS data to RFSOC through the network, and RFSOC puts the MCS data in DDR4; Step 24: After the downloading of the functional program is completed, the host computer sends a function program downloading completion instruction and the fixed location of the function program to RFSOC via the network.

3. The online reconstruction method of the signal processing platform based on the RFSOC chip according to claim 1, characterized in that: In step 3, the host network sends a control instruction to the MCU to reset the Flash, and then the RFSOC writes the function program into the Flash. After completing the reading, comparison, and verification of the function program, it feeds back a successful write flag of the function program to the host computer, as follows: Step 31, determine the network communication protocol between the host computer and the microcontroller; Step 32: Transmit the control instruction downward through the network to control the auxiliary controller to pull down the reset pin of the Flash into which the functional program is to be written; Step 33, RFSOC writes the function program into the Flash in step 32; Step 34, RFSOC reads the above function program from Flash and compares it with the original data in DDR4 one by one to prevent data errors; Step 35: If the data read by RFSOC from Flash is wrong, then rewrite the data in DDR4 into Flash to correct the wrong data; Step 36: RFSOC sends a function program write success flag to the lower computer via the network.

4. The online reconstruction method of the signal processing platform based on the RFSOC chip according to claim 1 is characterized in that: In step 4, the host computer starts to send instructions to the auxiliary controller to control the auxiliary controller to operate the RFSOC to implement the loading verification of the functional program, as follows: Step 41, transmitting the control instruction downward through the network to control the auxiliary controller to implement the reset operation of the RFSOC; Step 42, restart the power supply and load the RFSOC function program; Step 43: Verify that the function program is loaded successfully.

5. A general signal processing platform for implementing the online reconstruction method according to any one of claims 1 to 4, characterized in that: The universal signal processing platform includes a signal processing platform and ground equipment, and the lower computer and the signal processing platform communicate through a network; the lower computer includes: an RFSOC chip, DDR4, MCU and a Flash module composed of multiple Flash chips; the ground equipment includes a computer.

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