An electronic paper driving method, device and display device

Abstract

The present invention discloses an electronic paper driving method, device and display device, including: generating multiple rows of source data rows; generating multiple rows of zero-padding data rows corresponding one-to-one to the multiple rows of source data rows; combining the multiple rows of source data rows and the multiple rows of zero-padding data rows into a global continuous data stream, and configuring preset timing parameters for the global continuous data stream to sequentially output the source data row and the zero-padding data row of the same row within a single-row gate period; generating a driving timing signal, and according to the driving timing signal, turning on the gate line and synchronously controlling the source driver circuit to write data twice within a single-row gate period to drive the display. The electronic paper driving method, device and display device of the present application generate source data rows and zero-padding data rows, and sequentially output two groups of data within a single-row gate period, forcing the pixel electrode to discharge to zero potential, eliminating the voltage difference caused by TFT leakage, and significantly improving the display uniformity.

Description

Technical Field

[0001] The present invention relates to the field of display technologies, and in particular, to an electronic paper driving method, apparatus, and display device. Background Art

[0002] Figure 1 For a conventional cholesteric LCD single-pixel driving architecture, it mainly consists of a source line, a gate line, a common terminal, a TFT transistor, and a pixel electrode. Among them, the source line is used to send data to the drain of the TFT transistor, the gate line controls the gate of the TFT transistor to control the opening or closing of the TFT, and the pixel electrode is connected to the source of the TFT transistor to receive and store the data signal and form an electric field with the common terminal electrode to control the deflection of the liquid crystal. Figure 2 And Figure 3 respectively show the voltage and timing characteristics of the conventional driving architecture. Among them, Figure 2 is the driving timing of the conventional reflective LCD / ink screen DC common-level voltage and source voltage, Figure 3 is a schematic diagram of the write data timing of a conventional cholesteric LCD, that is, the gate waveform output by the gate driving circuit scans row by row, and when each row is turned on, the source will write the corresponding data (positive voltage / negative voltage / GND). However, after writing the voltage data in the conventional timing, before writing in the next frame, this voltage will drop due to TFT leakage (generally 2 - 3V). Also, due to the fluctuations in the TFT transistor process, there are differences in the uniformity of the characteristics of the TFT transistors on the entire control board. This difference will cause different degrees of voltage drop between the TFT transistors, so the maximum difference between the TFT transistors on the entire screen may reach more than 3V. This will cause uniformity and image quality problems when the cholesteric display screen enters the FC state or the gray-scale display between the P state and the FC state. Summary of the Invention

[0003] To solve the technical problems in the background art, the present invention proposes an electronic paper driving method, apparatus, and display device.

[0004] In a first aspect, an electronic paper driving method proposed by the present invention includes:

[0005] Generating multiple rows of source data rows, where each row of source data rows contains a valid voltage sequence equal to the number of columns of the panel;

[0006] Generating multiple rows of zero-padding data rows corresponding one-to-one to the multiple rows of source data rows;

[0007] Combining the multiple rows of source data rows and the multiple rows of zero-padding data rows into a global continuous data stream, and configuring preset timing parameters for the global continuous data stream so that the source data row and the zero-padding data row of the same row are sequentially output within a single-row gate period;

[0008] Generate a driving timing signal, turn on the gate lines according to the driving timing signal, and synchronously control the source driving circuit to write data twice within a single-row gate period to drive the display.

[0009] Preferably, generating multiple rows of zero-padding data rows corresponding one-to-one to multiple rows of source data rows according to the source data rows specifically includes: supplementing a zero-value sequence at the end of the effective voltage sequence of the source data row to generate a zero-padding data row, where the zero-value sequence is equal to the number of columns of the source data row; the zero-value sequence of the zero-padding data row is used to force the pixel electrode to discharge to zero potential within a single-row gate period.

[0010] Preferably, making the multiple rows of source data rows and multiple rows of zero-padding data rows into a globally continuous data stream specifically includes: arranging the multiple rows of source data rows and multiple rows of zero-padding data rows alternately by row and then splicing them into a globally continuous data stream.

[0011] Preferably, the generating of the multiple rows of source data rows specifically includes:

[0012] Obtain the image to be displayed, analyze the pixel-level target optical state of the image to be displayed, and convert the target optical state of each pixel into a corresponding driving voltage value according to the voltage-optical characteristic mapping relationship of the cholesteric liquid crystal;

[0013] The row data formed by arranging the driving voltage values according to the number of columns of the display panel is the multiple rows of source data rows.

[0014] Preferably, the converting of the target optical state of each pixel into a corresponding driving voltage value specifically includes:

[0015] Receive the digital image signal of the image to be displayed;

[0016] Map the gray value of the image pixel to the target optical state of the cholesteric liquid crystal, and the target optical state includes a planar state, a focal conic state, and an intermediate gray scale state;

[0017] Convert the target optical state into a corresponding driving voltage value according to the voltage-optical characteristic look-up table of the cholesteric liquid crystal.

[0018] Preferably, the two data writes specifically include:

[0019] The first write operation, apply the source data row voltage to the source line to drive the liquid crystal molecules to switch to the target optical state;

[0020] The second write operation, apply the zero-padding data row voltage to the source line to make the pixel electrode return to zero potential.

[0021] Preferably, the single-row gate period in the preset timing parameters specifically is ; within the same single-row gate period, the output period of the source data row accounts for 40%-55% of the period; the output period of the zero-padding data row accounts for 45%-60% of the period.

[0022] Preferably, the method further includes:

[0023] After driving all the rows is completed, the display panel is kept in a state without an electric field, and the bistable characteristic of the cholesteric liquid crystal is utilized to maintain the image display.

[0024] In a second aspect, an electronic paper driving device proposed by the present invention includes:

[0025] A data generation module, configured to generate multiple rows of source data rows;

[0026] A data processing module, configured to generate multiple rows of zero-filled data rows corresponding one-to-one to the multiple rows of source data rows according to the source data rows;

[0027] A timing generation module, configured to form a global continuous data stream from the multiple rows of source data rows and the multiple rows of zero-filled data rows, and configure preset timing parameters for the global continuous data stream so as to sequentially output the source data row and the zero-filled data row of the same row within a single row gate period;

[0028] A driving module, configured to generate a driving timing signal, turn on the gate line according to the driving timing signal, and synchronously control the source driving circuit to write data twice within a single row gate period to drive the display.

[0029] In a third aspect, an electronic paper display device proposed by the present invention includes the above-mentioned electronic paper driving device and a cholesteric liquid crystal display panel; the device is applied to an e-reader, an electronic label or a low-power information display terminal.

[0030] In the present invention, the proposed electronic paper driving method, device and display device generate source data rows and zero-filled data rows, and sequentially output two groups of data within a single row gate period, forcing the pixel electrode to discharge to zero potential, eliminating the voltage difference caused by the leakage of the TFT transistor, and significantly improving the display uniformity. At the same time, by optimizing the timing parameters through the logic control core, the data writing and discharging operations are integrated into a single row period, reducing the number of gate switching times. This solution is applicable to cholesteric liquid crystal display devices, and has the characteristics of low power consumption and high refresh efficiency, and can be widely applied to scenarios such as e-readers and electronic labels. Description of the Drawings

[0031] Figure 1 It is a schematic diagram of a single-pixel driving architecture of a conventional cholesteric LCD;

[0032] Figure 2 It is a schematic diagram of the driving timing of the DC common-pole voltage and the source voltage of a conventional reflective LCD / ink screen;

[0033] Figure 3 It is a schematic diagram of the scanning timing structure of a conventional reflective LCD / ink screen;

[0034] Figure 4 Schematic diagram of the scanning timing structure of an electronic paper driving method proposed by the present invention;

[0035] Figure 5 Schematic diagram of the implementation process structure of an electronic paper driving method proposed by the present invention;

[0036] Figure 6 Schematic diagram of the working process structure of an electronic paper driving method proposed by the present invention. Detailed implementation manners

[0037] Referring to Figures 4 - 6 , an electronic paper driving method proposed by the present invention includes the following steps:

[0038] S1. Generate multiple rows of source data rows.

[0039] In this embodiment, generating multiple rows of source data rows specifically includes:

[0040] Obtain the image to be displayed, analyze the pixel-level target optical state of the image to be displayed, and convert the target optical state of each pixel into a corresponding driving voltage value according to the voltage-optical characteristic mapping relationship of the cholesteric liquid crystal;

[0041] The row data formed by arranging the driving voltage values according to the number of columns of the display panel is the multiple rows of source data rows.

[0042] In this embodiment, converting the target optical state of each pixel into a corresponding driving voltage value specifically includes: receiving the digital image signal of the image to be displayed; mapping the gray value of the image pixel to the target optical state of the cholesteric liquid crystal, and the target optical state includes the planar state, the focal conic state, and the intermediate gray scale state; converting the target optical state into a corresponding driving voltage value according to the voltage-optical characteristic look-up table of the cholesteric liquid crystal.

[0043] Specifically, each row of source data rows contains a valid voltage sequence equal to the number of columns of the panel.

[0044] Specifically, mapping the target optical state to the corresponding driving voltage value, for example, the planar state P corresponds to +50V, the focal conic state FC corresponds to +15V, and the gray scale state is allocated 1-30V as required.

[0045] S2. Generate multiple rows of zero-filled data rows corresponding one-to-one to the multiple rows of source data rows.

[0046] In this embodiment, generating multiple rows of zero-supplemented data rows corresponding one-to-one to multiple rows of source data rows specifically includes: supplementing a zero value sequence at the end of the effective voltage sequence of the source data row to generate a zero-supplemented data row, where the zero value sequence is equal in number of columns to the source data row; the zero value sequence of the zero-supplemented data row is used to force the pixel electrode to discharge to zero potential within a single-row gate period.

[0047] In this embodiment, the zero value sequence of the zero-supplemented data row is used to force the pixel electrode to discharge to zero potential within a single-row gate period.

[0048] Specifically, supplement a zero value sequence of the same length at the end of each row of effective voltage data. For example, if a row of effective data is [+15V, +10V, +5V], then the zero-supplemented data is [0V, 0V, 0V].

[0049] S3. Generate a global continuous data stream from multiple rows of source data rows and multiple rows of zero-supplemented data rows, and configure preset timing parameters for the global continuous data stream so that within a single-row gate period, the source data row and the zero-supplemented data row of the same row are output sequentially.

[0050] In this embodiment, generating a global continuous data stream from multiple rows of source data rows and multiple rows of zero-supplemented data rows specifically includes: arranging the multiple rows of source data rows and the multiple rows of zero-supplemented data rows alternately by row and then splicing them into a global continuous data stream.

[0051] In this embodiment, the single-row gate period in the preset timing parameters specifically is .

[0052] Specifically, within the same single-row gate period, the output period of the source data row accounts for 40% - 55% of the period; the output period of the zero-supplemented data row accounts for 45% - 60% of the period.

[0053] Further, the source data and the zero-supplemented data are alternately arranged through the FPGA logic control core to generate a driving timing signal. For example, within each row of gate opening period, the source data row → zero-supplemented data row is output sequentially.

[0054] S4. Generate a driving timing signal, and according to the driving timing signal, turn on the gate line and synchronously control the source driver circuit to write data twice within a single-row gate period to drive the display.

[0055] In this embodiment, the two data writes specifically include: the first write operation, applying the source data row voltage to the source line to drive the liquid crystal molecules to switch to the target optical state; the second write operation, applying the zero-supplemented data row voltage to the source line to make the pixel electrode return to zero potential.

[0056] In this embodiment, it further includes:

[0057] After driving all the rows, the display panel is kept in a state without an electric field, and the bistable characteristics of the cholesteric liquid crystal are utilized to maintain the image display.

[0058] It should be noted that the LCD display screen includes a display panel, and the display panel includes a gate driving circuit, a plurality of gate lines arranged in rows, a plurality of pixel electrodes, a plurality of source lines arranged in columns, and a source driving circuit. The gate driving circuit drives and controls the plurality of gate lines arranged in rows, and the source driving circuit drives and controls the plurality of source lines arranged in columns.

[0059] Specifically, as Figure 4 shown, in order to solve the voltage leakage difference caused by TFT differences, the driving timing completes writing data for N - 1 frames and the last frame N (discharge frame, discharging the charged voltage to GND) of the displayed image when the same row of gates is opened, and writes 2 frames of data in the same frame in the conventional timing. That is, when a row of gates is opened, the source writes the values of the current pixel corresponding voltage and GND twice. In this way, after each row of gates is opened and closed, all pixel electrodes return to GND after completing the voltage operation on the LC. This timing allows the pixels not to have to hold the high - voltage data until the next frame, so there is no problem of voltage difference caused by leakage, which can improve the display uniformity and image quality. And because there is no need to maintain the voltage between frames, the time for the LC to apply an electric field can be reduced, and the polarization problem of the LC can also be improved. In addition, writing data twice when a gate is opened only experiences one rise and fall of the gate, compared with opening the gate twice (2 frames) and experiencing two rises and falls of the gate, which requires 3 - 5 frames to be fully charged or completely discharged, the overall drawing time can be reduced.

[0060] Specifically, as Figure 5 shown, an FPGA can be used as the logic control core to replace the conventional Tcon for image processing. All the last data of the source effective data in the row direction are filled with 0 data to generate two groups of source data, and the driving timing is realized by cooperating with the timing to double the single - row scanning time of the gate.

[0061] Referring to Figures 4 - 6 , an electronic paper driving device proposed by the present invention includes:

[0062] A data generation module, used to generate multiple rows of source data rows;

[0063] A data processing module, used to generate multiple rows of zero - filled data rows corresponding one - to - one with the multiple rows of source data rows according to the source data rows;

[0064] A timing generation module, used to make the multiple rows of source data rows and the multiple rows of zero - filled data rows into a global continuous data stream, and the global continuous data stream configures preset timing parameters to sequentially output the source data row and the zero - filled data row of the same row within a single - row gate period;

[0065] A driving module, which is used to generate driving timing signals, turn on the gate lines according to the driving timing signals, and synchronously control the source driving circuit to write data twice within a single-line gate cycle to drive the display.

[0066] Refer to Figures 4 - 6 , an electronic paper display device proposed by the present invention includes the above-mentioned electronic paper driving device and a cholesteric liquid crystal display panel.

[0067] In this embodiment, the device is applied to an e-reader, an electronic tag or a low-power information display terminal.

[0068] The above is only a preferred specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention, according to the technical solution and inventive concept of the present invention, makes equivalent substitutions or changes, and should be covered by the protection scope of the present invention.

Claims

1. An electronic paper driving method, characterized in that: include: generating a plurality of source data rows, wherein each source data row contains a valid voltage sequence equal to the number of panel columns; Generate multiple zero-filled data rows corresponding to multiple source data rows one by one according to the source data rows; A plurality of source data rows and a plurality of zero-filled data rows are formed into a global continuous data stream, wherein the global continuous data stream is configured with preset timing parameters so that the source data rows and the zero-filled data rows of the same row are sequentially output within a single gate cycle; Generate a driving timing signal, turn on the gate line according to the driving timing signal and synchronously control the source driving circuit to write data twice within a single row gate cycle to drive the display; The two data writings specifically include: In the first write operation, a source data row voltage is applied to the source line to drive the liquid crystal molecules to switch to the target optical state; In the second write operation, a zero-filled data row voltage is applied to the source line to return the pixel electrode to zero potential; The target optical states include a planar state, a focal conic state and an intermediate grayscale state. After driving all rows, the display panel is kept in a field-free state, and the image display is maintained by utilizing the bistable characteristics of the cholesteric liquid crystal.

2. The electronic paper driving method according to claim 1, wherein Generating multiple rows of zero-padded data rows corresponding one-to-one to multiple rows of source data rows according to source data rows is specifically as follows: a zero-value sequence is added to the end of the effective voltage sequence of the source data row to generate a zero-padded data row, wherein the zero-value sequence is equal to the number of source data rows and columns; the zero-value sequence of the zero-padded data row is used to force the pixel electrode to discharge to zero potential within a single row gate cycle.

3. The electronic paper driving method according to claim 1, wherein The global continuous data stream of the multiple source data rows and the multiple zero-padded data rows is specifically: the multiple source data rows and the multiple zero-padded data rows are alternately arranged row by row and then spliced into the global continuous data stream.

4. The electronic paper driving method according to claim 1, wherein: Generating multiple source data rows specifically includes: Acquire an image to be displayed, analyze the pixel-level target optical state of the image to be displayed, and convert the target optical state of each pixel into a corresponding driving voltage value based on the voltage-optical characteristic mapping relationship of the cholesteric liquid crystal; The row data formed by arranging the driving voltage values according to the number of columns of the display panel is a plurality of source data rows.

5. The electronic paper driving method according to claim 4, wherein Converting the target optical state of each pixel into a corresponding driving voltage value specifically includes: receiving a digital image signal of an image to be displayed; Mapping the grayscale values of image pixels to target optical states of cholesteric liquid crystal, wherein the target optical states include a planar state, a focal conic state, and an intermediate grayscale state; The target optical state is converted into a corresponding driving voltage value according to a voltage-optical characteristic lookup table of the cholesteric liquid crystal.

6. The electronic paper driving method according to claim 1, wherein The single row gate period in the preset timing parameters is specifically: ; In the same single-row gate cycle, the source data row output period accounts for 40%-55% of the cycle; the zero-filled data row output period accounts for 45%-60% of the cycle.

7. An electronic paper driving device, characterized in that, include: A data generation module is used to generate multiple source data rows; A data processing module is used to generate multiple zero-filled data rows corresponding to multiple source data rows according to the source data rows; A timing generation module is used to convert multiple source data rows and multiple zero-filled data rows into a global continuous data stream, and the global continuous data stream is configured with preset timing parameters so that the source data rows and zero-filled data rows of the same row are output sequentially within a single gate cycle; A driving module is used to generate a driving timing signal, turn on the gate line according to the driving timing signal, and synchronously control the source driving circuit to write data twice within a single row gate cycle to drive the display; In the driver module, the two data writing steps specifically include: For the first write operation, a source data line voltage is applied to the source line to drive the liquid crystal molecules to switch to the target optical state; For the second write operation, a zero-filled data line voltage is applied to the source line to return the pixel electrode to zero potential; Wherein, the target optical states include the planar state, the focal conic state and the intermediate gray scale state. After driving all rows, the display panel is maintained in a zero-electric field state, and the bistable characteristics of the cholesteric liquid crystal are utilized to maintain the image display.

8. An electronic paper display device, characterized in that, It includes the electronic paper driving device according to claim 7 and a cholesteric liquid crystal display panel; the device is applied to an e-reader, an electronic tag or a low-power information display terminal.

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