Ultra-wideband planar dielectric integrated phased-array antenna unit

Abstract

The invention discloses an ultra-wideband planar dielectric integrated phased-array antenna unit, which comprises a feed part and a radiation part, the feed part is realized based on a quasi-coaxial structure and a horizontal mode conversion structure, the radiation part is realized based on a stacked stepped slotted structure, the quasi-coaxial structure is used for accessing an externally input signal, and the horizontal mode conversion structure is used for converting the horizontal mode conversion structure into the stacked stepped slotted structure. An externally input signal is transmitted to the horizontal mode conversion structure in a quasi-coaxial mode, and the horizontal mode conversion structure is used for smoothly converting the signal transmitted to the horizontal mode conversion structure by the quasi-coaxial structure from the quasi-coaxial mode to a quasi-parallel plate waveguide mode and then feeding the signal into the radiation part; the radiation part is used for transmitting a signal fed into the radiation part by the horizontal mode conversion structure to a free space; the antenna has the advantages of low profile and low cross polarization performance.

Description

Technical Field

[0001] The invention relates to a broadband phased array, and in particular to an ultra-wideband planar dielectric integrated phased array antenna unit. Background Art

[0002] The rapid development of multi-function radars and modern wireless communication systems has led to a significant increase in the number of sensing and communication systems on various platforms, usually operating in different frequency bands. Traditional narrowband phased array antennas are gradually unable to meet these complex application requirements. Wideband phased arrays that can cover multiple frequency bands have the advantages of reducing system complexity, reducing space requirements and saving costs, and have high application prospects in modern radar and communication systems.

[0003] The broadband phased array is formed by multiple broadband phased array antenna units distributed in an array. At present, in the research of broadband phased array antennas, the ultra-wideband performance exhibited by the phased array antenna formed by the gradient slot phased array antenna units distributed in an array has been widely recognized.

[0004] However, the gradient slot phased array antenna unit usually needs to form a sufficient height in the vertical direction to realize a complete gradient structure, so as to support the effective propagation and radiation of electromagnetic wave signals in the slot. This will not only cause the gradient slot phased array antenna unit to have a higher profile, but also easily cause a higher cross-polarization component. These unfavorable factors limit their applicability in certain key scenarios. Summary of the invention

[0005] The technical problem to be solved by the present invention is to provide an ultra-wideband planar dielectric integrated phased array antenna unit with low profile and low cross-polarization performance.

[0006] The technical solution adopted by the present invention to solve the above technical problems is: an ultra-wideband planar dielectric integrated phased array antenna unit, including a feeding part and a radiating part, wherein the feeding part is implemented based on a quasi-coaxial structure and a horizontal mode conversion structure, and the radiating part is implemented based on a stacked stepped slot structure, the quasi-coaxial structure is used to access external input signals and transmit the external input signals to the horizontal mode conversion structure in a quasi-coaxial mode, the horizontal mode conversion structure is used to smoothly convert the signals transmitted thereto by the quasi-coaxial structure from the quasi-coaxial mode to the quasi-parallel plate waveguide mode and then feed them into the radiating part, and the radiating part is used to transmit the signals fed thereto by the horizontal mode conversion structure to free space.

[0007] Compared with the prior art, the advantage of the present invention is that the feeding part is realized based on a quasi-coaxial structure and a horizontal mode conversion structure, and the horizontal mode conversion structure can smoothly convert the external input signal into a broadband quasi-parallel plate waveguide mode in a lower plane structure, so that the cross-sectional height of the antenna unit can be greatly reduced, and the radiation part is realized based on a stacked step-type slot structure. When the electromagnetic wave signal propagating in the quasi-parallel plate waveguide mode is fed into the radiation part, it is transmitted to the free space through the stacked step-type slot structure. The stacked step-type slot structure can ensure that the electric field distribution in the main polarization direction is highly symmetrical, and can effectively reduce the cross-polarization component. Therefore, the present invention has low profile and low cross-polarization performance.

[0008] Furthermore, the ultra-wideband planar dielectric integrated phased array antenna unit further includes three dielectric substrates, and the feeding part and the radiating part are respectively arranged on the three dielectric substrates.

[0009] Furthermore, the three dielectric substrates are all rectangular parallelepiped structures, and the three dielectric substrates are respectively referred to as the first dielectric substrate, the second dielectric substrate and the third dielectric substrate; the length direction of the first dielectric substrate is defined as the left-right direction, the width direction is defined as the front-back direction, and the height direction is defined as the up-down direction; the second dielectric substrate is located below the first dielectric substrate; the front end surface of the second dielectric substrate is located in the same plane as the front end surface of the first dielectric substrate; the rear end surface of the second dielectric substrate is located in the same plane as the rear end surface of the first dielectric substrate; and the right end surface of the second dielectric substrate is located at the right end of the first dielectric substrate. The left end surface of the second dielectric substrate is located between the plane where the left end surface of the first dielectric substrate is located, the left end surface of the second dielectric substrate is located on the left side of the plane where the left end surface of the first dielectric substrate is located, the third dielectric substrate is located below the second dielectric substrate, the front end surface of the third dielectric substrate and the front end surface of the second dielectric substrate are located in the same plane, the rear end surface of the third dielectric substrate and the rear end surface of the second dielectric substrate are located in the same plane, the left end surface of the third dielectric substrate and the left end surface of the second dielectric substrate are located in the same plane, and the right end surface of the third dielectric substrate and the right end surface of the second dielectric substrate are located in the same plane.

[0010] Further, the plane that makes the first dielectric substrate symmetrical in left and right is called the first symmetrical plane, the plane that makes the second dielectric substrate symmetrical in front and back is called the second symmetrical plane, and the plane that makes the second dielectric substrate symmetrical in left and right is called the third symmetrical plane; the radiation part includes a first rectangular patch, a second rectangular patch, a third rectangular patch, a fourth rectangular patch, a fifth rectangular patch, a first air through hole group, a second air through hole group, a third air through hole group, a first metal via group, a second metal via group and a third metal via group; the first rectangular patch is attached to the upper surface of the first dielectric substrate, the length of the first rectangular patch is along the front-to-back direction, the width is along the left-to-right direction, the thickness is along the up-down direction, and the first A rectangular patch is located on the left side of the first symmetry plane, and there is a distance between the two. The left end face of the first rectangular patch and the left end face of the first dielectric substrate are located in the same plane. The front end face of the first rectangular patch and the front end face of the first dielectric substrate are located in the same plane. The rear end face of the first rectangular patch and the rear end face of the first dielectric substrate are located in the same plane. The second rectangular patch is attached to the upper surface of the first dielectric substrate. The second rectangular patch is located on the right side of the first symmetry plane. The first rectangular patch and the second rectangular patch are bilaterally symmetrical about the first symmetry plane. The third rectangular patch is attached to the lower surface of the first dielectric substrate. The third rectangular patch is located on the left side of the first symmetric plane, and there is a distance between the two. The length of the third rectangular patch is along the front-to-back direction, the width is along the left-to-right direction, and the thickness is along the up-down direction. The width of the third rectangular patch is greater than the width of the first rectangular patch. The left end face of the third rectangular patch and the left end face of the first dielectric substrate are located in the same plane. The front end face of the third rectangular patch and the front end face of the first dielectric substrate are located in the same plane. The rear end face of the third rectangular patch and the rear end face of the first dielectric substrate are located in the same plane. The fourth rectangular patch is located on the right side of the first symmetric plane. The fourth rectangular patch is attached to the first The lower surface of the dielectric substrate, the third rectangular patch and the fourth rectangular patch are bilaterally symmetrical about the first symmetry plane; the fifth rectangular patch is attached to the lower surface of the second dielectric substrate, the length of the fifth rectangular patch is along the front-to-back direction, the width is along the left-to-right direction, and the thickness is along the up-down direction, the fifth rectangular patch is located on the right side of the first symmetry plane, and there is a distance between the two, the right end face of the fifth rectangular patch and the right end face of the second dielectric substrate are located in the same plane, the front end face of the fifth rectangular patch and the front end face of the second dielectric substrate are located in the same plane, and the rear end face of the fifth rectangular patch and the rear end face of the second dielectric substrate are located in the same plane;The first air through hole group is located on the left side of the first symmetry plane and on the right side of the plane where the right end face of the first rectangular patch is located. The first air through hole group includes a plurality of first air through holes evenly spaced from front to back. The plurality of first air through holes are cylindrical holes with the same radius and axes perpendicular to the first dielectric substrate, and all penetrate the first dielectric substrate from top to bottom. The central axes of the plurality of first air through holes are located in the same plane, which is referred to as the first plane. The distance from the first plane to the first symmetry plane and the distance from the first plane to the plane where the right end face of the first rectangular patch is located are both greater than the radius of the first air through hole. Among the plurality of first air through holes, the distance from the central axis of the frontmost first air through hole to the front end face of the first dielectric substrate is greater than its radius, and the distance from the central axis of the rearmost first air through hole to the rear end face of the first dielectric substrate is greater than its radius. The second air through hole group is located on the right side of the first symmetry plane. The third air hole group is bilaterally symmetrical with the second air hole group about the first symmetry plane; the third air hole group is located on the right side of the third symmetry plane and on the left side of the fifth rectangular patch, the third air hole group includes two third air holes spaced from front to back, the two third air holes are cylindrical holes with the same radius and the axes are perpendicular to the second dielectric substrate, the two third air holes penetrate the second dielectric substrate and the third dielectric substrate from top to bottom, the central axes of the two third air holes are located in the same plane, which is called the second plane, the distance from the second plane to the plane where the left end face of the fifth rectangular patch is located and the distance from the second plane to the third symmetry plane are both greater than the radius of the third air hole; in the third air hole group, the distance from the central axis of the front third air hole to the front end face of the second dielectric substrate is greater than its radius, and the distance from the central axis of the rear third air hole to the rear end face of the second dielectric substrate is greater than its radius;The first metal via group is located on the left side of the first symmetry plane, and the first metal via group includes a semi-cylindrical metal via and a plurality of cylindrical first metal vias. The axes of the semi-cylindrical metal via and the plurality of first metal vias are perpendicular to the first dielectric substrate. The radius of the semi-cylindrical metal via and the plurality of first metal vias are equal. The semi-cylindrical metal via and the plurality of first metal vias pass through the first rectangular patch, the first dielectric substrate and the third rectangular patch from top to bottom in sequence. The front end face of the semi-cylindrical metal via is the plane where the axis thereof is located, and the front end face of the semi-cylindrical metal via coincides with the front end face of the first dielectric substrate. , multiple first metal vias are evenly spaced from front to back on the rear side of the semi-cylindrical metal via, the central axis of the semi-cylindrical metal via and the multiple first metal vias are located in the same plane, which is called the third plane, and there is a distance between the third plane and the plane where the left end face of the first rectangular patch is located, and the distance is greater than the radius of the first metal via; there is a distance between the third plane and the plane where the right end face of the first rectangular patch is located, and the distance is greater than the radius of the first metal via; among the multiple first metal vias, the spacing between the first metal via located at the front and the semi-cylindrical metal via is equal to the spacing between any two adjacent first metal vias among the multiple first metal vias The spacing between the holes is such that the distance between the central axis of the last first metal via and the rear end surface of the first dielectric substrate is greater than its radius; the second metal via group is located on the right side of the first symmetry plane, and the first metal via group and the second metal via group are bilaterally symmetrical about the first symmetry plane; the third metal via group is located on the right side of the third air via group, and the third metal via group includes a plurality of semi-cylindrical third metal vias, the axes of the plurality of third metal vias are perpendicular to the second dielectric substrate, the radius of the plurality of third metal vias are equal, and the plurality of third metal vias pass through the second dielectric substrate, the fifth rectangular patch and the third from top to bottom in sequence. The dielectric substrate, the right end faces of the plurality of third metal vias are the plane where the central axis thereof is located, the plurality of third metal vias are evenly spaced from front to back, the right end faces of the plurality of third metal vias are located in the same plane, and the plane coincides with the plane where the right end face of the second dielectric substrate is located, there is a distance between the plane where the right end faces of the plurality of third metal vias are located and the left end face of the fifth rectangular patch, and the distance is greater than the radius of the third metal vias; among the plurality of third metal vias, the distance between the central axis of the frontmost third metal via and the front end face of the third dielectric substrate is greater than its radius, and the distance between the central axis of the rearmost third metal via and the rear end face of the third dielectric substrate is greater than its radius. ;

[0011] Furthermore, the horizontal mode conversion structure includes a sixth rectangular patch, a T-shaped stripline patch, a seventh rectangular patch, a fourth air through hole group, a short-circuit pin group and a metal pin group; the sixth rectangular patch is attached to the upper surface of the second dielectric substrate, the length of the sixth rectangular patch is along the left-right direction, the width is along the front-to-back direction, and the thickness is along the up-down direction; the front end surface of the sixth rectangular patch is located in the same plane as the front end surface of the second dielectric substrate, the rear end surface of the sixth rectangular patch is located in the same plane as the rear end surface of the second dielectric substrate, the right end surface of the sixth rectangular patch is located between the third symmetry plane and the third air through hole group, and the left end surface of the sixth rectangular patch is located at the same plane as the second dielectric substrate. The left end surface of the board is located in the same plane; the T-shaped stripline patch is attached to the lower surface of the second dielectric substrate, the T-shaped stripline patch includes a first branch, a second branch, a third branch and a fourth branch, the first branch and the second branch are both rectangular metal patches, the lengths of the first branch and the second branch are both along the front-to-back direction, the widths are both along the left-to-right direction, the thicknesses are both along the up-down direction, and the first branch and the second branch are both front-to-back symmetrical about the second symmetry plane; the right end surface of the first branch is located on the left side of the third air through hole group and on the right side of the third symmetry plane, the right end surface of the first branch is at a distance from the central axis of the third air through hole, and the distance is greater than The radius of the third air through hole, the right end face of the first branch and the right end face of the sixth rectangular patch are located in the same plane, the left end face of the first branch is located on the left side of the third symmetry plane, and the length of the first branch is less than the width of the second dielectric substrate; the second branch is located on the left side of the first branch, the right end face of the second branch is connected to the left end face of the first branch and is in a fitted state, the width of the second branch is less than the width of the first branch, and the length of the second branch is less than the length of the first branch; the third branch is located on the left side of the second branch, the third branch is a semicircular metal patch, and the third branch is front-to-back with respect to the second symmetry plane. Symmetrical, the end face where the central axis of the third branch is located is its right end face, the right end face of the third branch is connected to the left end face of the second branch and is in a fitted state, and the diameter of the third branch is equal to the length of the second branch; the fourth branch is a circular metal patch, the fourth branch is symmetrical front-to-back about the second symmetry plane, the fourth branch is located on the left side of the third branch, and the fourth branch partially overlaps with the third branch, and the distance from the center of the fourth branch to the center of the third branch is less than the sum of the outer ring radius of the fourth branch and the radius of the third branch, and is not less than nine-tenths of the sum of the outer ring radius of the fourth branch and the radius of the third branch;The outer ring diameter of the fourth branch node is smaller than the diameter of the third branch node, the inner ring radius of the fourth branch node is smaller than half of its outer ring radius, and the distance between the center of the circle of the fourth branch node and the plane where the left end surface of the second dielectric substrate is located is greater than the outer ring radius of the fourth branch node; the seventh rectangular patch is attached to the lower surface of the second dielectric substrate, the length of the seventh rectangular patch is along the front-to-back direction, the width is along the left-to-right direction, and the thickness is along the up-down direction. The front end surface of the seventh rectangular patch is in the same plane as the front end surface of the second dielectric substrate, and the rear end surface of the seventh rectangular patch is in the same plane as the left end surface of the second dielectric substrate. The rear end surface is in the same plane; the left end surface of the seventh rectangular patch is in the same plane as the left end surface of the second dielectric substrate; the right end surface of the seventh rectangular patch is located on the left side of the overlap of the fourth branch and the third branch, and there is a distance between the two; the seventh rectangular patch is provided with a groove concave to the left starting from the middle of its right end surface; the fourth branch is embedded in the groove and does not contact the side wall of the groove; the side surface of the groove is a curved surface, and the groove is symmetrical front-to-back about the second symmetry plane; the fourth air through hole group is located on the left side of the third air through hole group, The fourth air through hole group includes two fourth air through holes spaced apart from each other in the front and back, the two fourth air through holes are cylindrical holes, and the radius is equal to the radius of the third air through hole, the axes of the two fourth air through holes are perpendicular to the third dielectric substrate, the two fourth air through holes penetrate the third dielectric substrate from top to bottom, the central axes of the two fourth air through holes are located in the same plane, which is called the fourth plane, the distance from the fourth plane to the second plane is greater than the diameter of the fourth air through hole, the seventh rectangular patch is located on the left side of the fourth plane, and the distance from the fourth plane to the seventh rectangular patch is greater than the distance from the fourth plane to the seventh rectangular patch. The distance from the right end face of the patch is greater than the radius of the fourth air through hole, the distance from the central axis of a fourth air through hole located in the front of the fourth air through hole group to the front end face of the third dielectric substrate is equal to the distance from the central axis of a third air through hole located in the front of the third air through hole group to the front end face of the third dielectric substrate, and the distance from the central axis of a fourth air through hole located in the back of the fourth air through hole group to the rear end face of the third dielectric substrate is equal to the distance from the central axis of a third air through hole located in the back of the third air through hole group to the rear end face of the third dielectric substrate;The short-circuit pin group includes two cylindrical short-circuit pins, the two short-circuit pins are arranged at intervals in front and back, and both pass through the sixth rectangular patch, the second dielectric substrate and the first branch in sequence from top to bottom, the central axes of the two short-circuit pins are perpendicular to the second dielectric substrate, the two short-circuit pins are symmetrical in front and back about the second symmetry plane, the two short-circuit pins are located between the left end face of the first branch and the right end face of the first branch, and of the two short-circuit pins, the distance from the central axis of the short-circuit pin located in the front to the front end face of the first branch is greater than its radius, and the distance from the central axis of the short-circuit pin located in the back to the rear end face of the first branch is greater than its radius; the The metal pin group includes two cylindrical metal pins arranged at intervals in front and back, the two metal pins have the same radius and the axes are perpendicular to the second dielectric substrate, the two metal pins pass through the sixth rectangular patch, the second dielectric substrate and the third dielectric substrate from top to bottom in sequence, the central axes of the two metal pins are located in the same plane, and the plane is called the fifth plane, the fifth plane is located on the left side of the left end face of the second branch and on the right side of the right end face of the seventh rectangular patch, the two metal pins are symmetrical about the second symmetry plane, and the distance between the central axis of the front metal pin and the front end face of the third dielectric substrate is greater than the distance between the central axis of the front metal pin and the front end face of the third dielectric substrate. The radius of the metal pin; the quasi-coaxial structure includes an eighth rectangular patch, a feeding via, a fourth metal via group, a fifth metal via group, a sixth metal via group and a seventh metal via group; the eighth rectangular patch is attached to the lower surface of the third dielectric substrate, the length of the eighth rectangular patch is along the left-right direction, the width is along the front-back direction, and the thickness is along the up-down direction; the front end face of the eighth rectangular patch is located in the same plane as the front end face of the third dielectric substrate, the rear end face of the eighth rectangular patch is located in the same plane as the rear end face of the third dielectric substrate, the left end face of the eighth rectangular patch is located in the same plane as the left end face of the third dielectric substrate, and the right end face of the eighth rectangular patch is located in the same plane as the left end face of the third dielectric substrate. The end face is located in the same plane as the right end face of the third dielectric substrate; the feed via is a cylindrical hole, and the feed via passes through the fourth branch, the third dielectric substrate and the eighth rectangular patch from top to bottom in sequence, the radius of the feed via is equal to the radius of the inner ring of the fourth branch, the axis of the feed via is perpendicular to the third dielectric substrate, the feed via is located in the same straight line as the central axis of the fourth branch, an annular gap is opened on the eighth rectangular patch, the annular gap surrounds the feed via and is coaxial with the feed via, and the annular gap is used to separate the feed via from the eighth rectangular patch;The fourth metal via group includes a plurality of semi-cylindrical fourth metal vias, the axes of the plurality of fourth metal vias are perpendicular to the second dielectric substrate, the radii of the plurality of fourth metal vias are equal, and are evenly spaced from front to back, and the plurality of fourth metal vias penetrate the sixth rectangular patch, the second dielectric substrate, the seventh rectangular patch, and the third dielectric substrate from top to bottom in sequence, the left end face of each fourth metal via is the plane where the axis thereof is located, and the left end faces of the plurality of fourth metal vias are located in the same plane as the left end face of the second dielectric substrate; the fifth metal via group is located on the left side of the right end face of the seventh rectangular patch, on the right side of the fourth metal via group, and on the front side of the groove, the fifth metal via group includes a plurality of cylindrical fifth metal vias spaced from front to back, the axes of the plurality of fifth metal vias are perpendicular to the second dielectric substrate, the plurality of fifth metal vias penetrate the sixth rectangular patch, the second dielectric substrate, the seventh rectangular patch, and the third dielectric substrate from top to bottom in sequence, the radii of the plurality of fifth metal vias are equal, and the plurality of fifth metal vias are spaced from front to back. The central axes of the fifth metal vias are in the same plane, which is called the fifth plane. The distance from the fifth plane to the right end face of the seventh rectangular patch is greater than the radius of the fifth metal via, and the distance from the fifth plane to the left end face of the second dielectric substrate is greater than the sum of the radius of the fifth metal via and the radius of the fourth metal via. In the fifth metal via group, the distance from the central axis of the fifth metal via located at the front to the front end face of the second dielectric substrate is greater than its radius. The sixth metal via group is located at the rear side of the second symmetric plane, and the fifth metal via group and the sixth metal via group are symmetrical with respect to the second symmetric plane. The seventh metal via group includes two seventh metal vias arranged at intervals in front and back, one of which is located at the front side of the groove, and the other is located at the rear side of the groove. The central axes of the two seventh metal vias are located in the same plane, which is called the sixth plane. The sixth plane is located on the left side of the fifth plane, and the distance between the two is greater than the sum of the radius of the fifth metal via and the radius of the sixth metal via. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 A three-dimensional diagram of an ultra-wideband planar dielectric integrated phased array antenna unit of the present invention;

[0013] Figure 2 A burst diagram of the ultra-wideband planar dielectric integrated phased array antenna unit of the present invention;

[0014] Figure 3 A top view of the first dielectric substrate and the structure thereon of the ultra-wideband planar dielectric integrated phased array antenna unit of the present invention;

[0015] Figure 4 A bottom view of the first dielectric substrate and the structure thereon of the ultra-wideband planar dielectric integrated phased array antenna unit of the present invention;

[0016] Figure 5 A top view of the second dielectric substrate and the structure thereon of the ultra-wideband planar dielectric integrated phased array antenna unit of the present invention;

[0017] Figure 6 A bottom view of the second dielectric substrate and the structure thereon of the ultra-wideband planar dielectric integrated phased array antenna unit of the present invention;

[0018] Figure 7 A top view of a third dielectric substrate and structures thereon of the ultra-wideband planar dielectric integrated phased array antenna unit of the present invention;

[0019] Figure 8 A bottom view of a third dielectric substrate and a structure thereon of the ultra-wideband planar dielectric integrated phased array antenna unit of the present invention;

[0020] Fig. 9 This is a simulation diagram of the broadband performance of the ultra-wideband planar dielectric integrated phased array antenna unit of the present invention;

[0021] FIG10( a ) is a diagram showing the H-plane beam scanning characteristics of an ultra-wideband planar dielectric integrated phased array (12×10 array) formed by the ultra-wideband planar dielectric integrated phased array antenna unit of the present invention when the operating frequency is 9 GHz;

[0022] FIG10( b ) is a simulation diagram of the cross-polarization characteristics of an ultra-wideband planar dielectric integrated phased array (12×10 array) formed by the ultra-wideband planar dielectric integrated phased array antenna unit of the present invention when the operating frequency is 9 GHz during H-plane beam scanning;

[0023] FIG10( c ) is a graph showing the E-plane beam scanning characteristics of an ultra-wideband planar dielectric integrated phased array (12×10 array) formed by the ultra-wideband planar dielectric integrated phased array antenna unit of the present invention when the operating frequency is 9 GHz;

[0024] FIG10( d ) is a simulation diagram of the cross-polarization characteristics of an ultra-wideband planar dielectric integrated phased array (12×10 array) formed by the ultra-wideband planar dielectric integrated phased array antenna unit of the present invention when the operating frequency is 9 GHz during E-plane beam scanning;

[0025] FIG11( a ) is a diagram showing the H-plane beam scanning characteristics of an ultra-wideband planar dielectric integrated phased array (12×10 array) formed by the ultra-wideband planar dielectric integrated phased array antenna unit of the present invention when the operating frequency is 18 GHz;

[0026] FIG11( b ) is a simulation diagram of the cross-polarization characteristics of an ultra-wideband planar dielectric integrated phased array (12×10 array) formed by the ultra-wideband planar dielectric integrated phased array antenna unit of the present invention when the operating frequency is 18 GHz during H-plane beam scanning;

[0027] FIG11( c ) is a graph showing the E-plane beam scanning characteristics of an ultra-wideband planar dielectric integrated phased array (12×10 array) formed by the ultra-wideband planar dielectric integrated phased array antenna unit of the present invention when the operating frequency is 18 GHz;

[0028] FIG11( d ) is a simulation diagram of the cross-polarization characteristics of an ultra-wideband planar dielectric integrated phased array (12×10 array) composed of the ultra-wideband planar dielectric integrated phased array antenna unit of the present invention during E-plane beam scanning at an operating frequency of 18 GHz. DETAILED DESCRIPTION

[0029] The present invention is further described in detail below with reference to the accompanying drawings.

[0030] Embodiment 1: An ultra-wideband planar dielectric integrated phased array antenna unit includes a feeding part and a radiating part, wherein the feeding part is implemented based on a quasi-coaxial structure and a horizontal mode conversion structure, and the radiating part is implemented based on a stacked stepped slot structure. The quasi-coaxial structure is used to access an external input signal and transmit the external input signal to the horizontal mode conversion structure in a quasi-coaxial mode. The horizontal mode conversion structure is used to smoothly convert the signal transmitted to it by the quasi-coaxial structure from a quasi-coaxial mode to a quasi-parallel plate waveguide mode and then feed it into the radiating part. The radiating part is used to transmit the signal fed to it by the horizontal mode conversion structure to free space.

[0031] In this embodiment, the feeding part is realized based on a quasi-coaxial structure and a horizontal mode conversion structure. The horizontal mode conversion structure can smoothly convert the external input signal into a broadband quasi-parallel plate waveguide mode in a lower plane structure, which can greatly reduce the cross-sectional height of the antenna unit. The radiation part is realized based on a stacked step-type slot structure. When the electromagnetic wave signal propagating in the quasi-parallel plate waveguide mode is fed into the radiation part, it is transmitted to the free space through the stacked step-type slot structure. The stacked step-type slot structure can ensure that the electric field distribution in the main polarization direction is highly symmetrical, which can effectively reduce the cross-polarization component. Therefore, the present invention has low profile and low cross-polarization performance.

[0032] Embodiment 2: This embodiment is basically the same as Embodiment 1, except that: in this embodiment, Figure 1 and Figure 2 As shown, an ultra-wideband planar dielectric integrated phased array antenna unit also includes three dielectric substrates, and the feeding part and the radiation part are respectively arranged on the three dielectric substrates.

[0033] In this embodiment, the three dielectric substrates are all rectangular parallelepiped structures, and the three dielectric substrates are respectively referred to as the first dielectric substrate 1, the second dielectric substrate 2 and the third dielectric substrate 3; the length direction of the first dielectric substrate 1 is defined as the left-right direction, the width direction is defined as the front-back direction, and the height direction is defined as the up-down direction; the second dielectric substrate 2 is located below the first dielectric substrate 1, the front end surface of the second dielectric substrate 2 is located in the same plane as the front end surface of the first dielectric substrate 1, the rear end surface of the second dielectric substrate 2 is located in the same plane as the rear end surface of the first dielectric substrate 1, and the right end surface of the second dielectric substrate 2 is located at the first dielectric substrate 1. The right end surface of the substrate 1 is located between the plane where the left end surface of the first dielectric substrate 1 is located, the left end surface of the second dielectric substrate 2 is located on the left side of the plane where the left end surface of the first dielectric substrate 1 is located, the third dielectric substrate 3 is located below the second dielectric substrate 2, the front end surface of the third dielectric substrate 3 and the front end surface of the second dielectric substrate 2 are located in the same plane, the rear end surface of the third dielectric substrate 3 and the rear end surface of the second dielectric substrate 2 are located in the same plane, the left end surface of the third dielectric substrate 3 and the left end surface of the second dielectric substrate 2 are located in the same plane, and the right end surface of the third dielectric substrate 3 and the right end surface of the second dielectric substrate 2 are located in the same plane.

[0034] Embodiment 3: This embodiment is basically the same as Embodiment 2, except that: in this embodiment, Figures 3 to 6As shown in the figure, the plane that makes the first dielectric substrate 1 bilaterally symmetrical is called the first symmetrical plane L1, the plane that makes the second dielectric substrate 2 front-to-back symmetrical is called the second symmetrical plane L2, and the plane that makes the second dielectric substrate 2 bilaterally symmetrical is called the third symmetrical plane L3; the radiation part includes a first rectangular patch 4, a second rectangular patch 5, a third rectangular patch 6, a fourth rectangular patch 7, a fifth rectangular patch 8, a first air through hole group 9, a second air through hole group 10, a third air through hole group 11, a first metal via hole group 12, a second metal via hole group 13 and a third metal via hole group 14; the first rectangular patch 4 is attached to the upper surface of the first dielectric substrate 1, and the length of the first rectangular patch 4 is along In the front-to-back direction, the width is along the left-to-right direction, and the thickness is along the up-down direction. The first rectangular patch 4 is located on the left side of the first symmetry plane L1, and there is a distance between the two. The left end face of the first rectangular patch 4 and the left end face of the first dielectric substrate 1 are located in the same plane, the front end face of the first rectangular patch 4 and the front end face of the first dielectric substrate 1 are located in the same plane, and the rear end face of the first rectangular patch 4 and the rear end face of the first dielectric substrate 1 are located in the same plane; the second rectangular patch 5 is attached to the upper surface of the first dielectric substrate 1, the second rectangular patch 5 is located on the right side of the first symmetry plane L1, and the first rectangular patch 4 and the second rectangular patch 5 are left-right symmetrical about the first symmetry plane L1; the third rectangular patch 6 is attached to the lower surface of the first dielectric substrate 1, the third rectangular patch 6 is located on the left side of the first symmetry plane L1, and there is a distance between the two, the length of the third rectangular patch 6 is along the front-to-back direction, the width is along the left-to-right direction, and the thickness is along the up-down direction. The width of the third rectangular patch 6 is greater than the width of the first rectangular patch 4, the left end face of the third rectangular patch 6 and the left end face of the first dielectric substrate 1 are located in the same plane, the front end face of the third rectangular patch 6 and the front end face of the first dielectric substrate 1 are located in the same plane, and the rear end face of the third rectangular patch 6 and the rear end face of the first dielectric substrate 1 are located in the same plane; the fourth rectangular patch 7 is located on the right side of the first symmetry plane L1, and the fourth rectangular patch 7 The third rectangular patch 6 and the fourth rectangular patch 7 are attached to the lower surface of the first dielectric substrate 1, and are bilaterally symmetrical with respect to the first symmetry plane L1. The fifth rectangular patch 8 is attached to the lower surface of the second dielectric substrate 2, and the length of the fifth rectangular patch 8 is along the front-to-back direction, the width is along the left-to-right direction, and the thickness is along the up-down direction. The fifth rectangular patch 8 is located on the right side of the first symmetry plane L1, and there is a distance between the two. The right end face of the fifth rectangular patch 8 and the right end face of the second dielectric substrate 2 are located in the same plane, the front end face of the fifth rectangular patch 8 and the front end face of the second dielectric substrate 2 are located in the same plane, and the rear end face of the fifth rectangular patch 8 and the rear end face of the second dielectric substrate 2 are located in the same plane.The first air through hole group 9 is located on the left side of the first symmetry plane L1 and on the right side of the plane where the right end face of the first rectangular patch 4 is located. The first air through hole group 9 includes a plurality of first air through holes 91 evenly spaced from front to back. The plurality of first air through holes 91 are cylindrical holes with the same radius and axes perpendicular to the first dielectric substrate 1, and all penetrate the first dielectric substrate 1 from top to bottom. The central axes of the plurality of first air through holes 91 are located in the same plane, which is referred to as the first plane. The distance from the first plane to the first symmetry plane L1 and the distance from the first plane to the plane where the right end face of the first rectangular patch 4 is located are both greater than the radius of the first air through hole 91. Among the plurality of first air through holes 91, the distance from the central axis of the frontmost first air through hole 91 to the front end face of the first dielectric substrate 1 is greater than its radius, and the distance from the central axis of the rearmost first air through hole 91 to the rear end face of the first dielectric substrate 1 is greater than its radius. The second air through hole group 10 is located on the right side of the first symmetry plane L1, and the first air through hole group 9 and the second air through hole group 10 are bilaterally symmetrical about the first symmetry plane L1.

[0035] The third air hole group 11 is located on the right side of the third symmetry plane L3 and on the left side of the fifth rectangular patch 8. The third air hole group 11 includes two third air holes 111 spaced from front to back. The two third air holes 111 are cylindrical holes with the same radius and axes perpendicular to the second dielectric substrate 2. The two third air holes 111 penetrate the second dielectric substrate 2 and the third dielectric substrate 3 from top to bottom. The central axes of the two third air holes 111 are located in the same plane, which is called the second plane. The distance from the second plane to the plane where the left end face of the fifth rectangular patch 8 is located and the distance from the second plane to the third symmetry plane L3 are both greater than the radius of the third air holes 111. In the hole group 11, the distance from the central axis of the front third air through hole 111 to the front end surface of the second dielectric substrate 2 is greater than its radius, and the distance from the central axis of the rear third air through hole 111 to the rear end surface of the second dielectric substrate 2 is greater than its radius; the first metal via group 12 is located on the left side of the first symmetry plane L1, and the first metal via group 12 includes a semi-cylindrical metal via 121 and a plurality of cylindrical first metal vias 122, the axes of the semi-cylindrical metal via 121 and the plurality of first metal vias 122 are perpendicular to the first dielectric substrate 1, the radii of the semi-cylindrical metal via 121 and the plurality of first metal vias 122 are equal, and the semi-cylindrical metal via 121 is 1. The first metal vias 122 and the plurality of first metal vias 122 all penetrate the first rectangular patch 4, the first dielectric substrate 1 and the third rectangular patch 6 from top to bottom in sequence. The front end face of the semi-cylindrical metal via 121 is the plane where the central axis thereof is located. The front end face of the semi-cylindrical metal via 121 coincides with the front end face of the first dielectric substrate 1. The plurality of first metal vias 122 are evenly spaced from front to back on the rear side of the semi-cylindrical metal via 121. The central axis of the semi-cylindrical metal via 121 and the plurality of first metal vias 122 are located in the same plane, which is referred to as the third plane. There is a distance between the third plane and the plane where the left end face of the first rectangular patch 4 is located, and the distance is greater than the semi-cylindrical metal via 122. diameter; there is a distance between the third plane and the plane where the right end face of the first rectangular patch 4 is located, and the distance is greater than the radius of the first metal via 122; among the multiple first metal vias 122, the distance between the first metal via 122 located at the front and the semi-cylindrical metal via 121 is equal to the distance between any two adjacent first metal vias 122 among the multiple first metal vias 122, and the distance between the central axis of the first metal via 122 located at the rear and the rear end face of the first dielectric substrate 1 is greater than its radius; the second metal via group 13 is located on the right side of the first symmetry plane L1, and the first metal via group 12 and the second metal via group 13 are bilaterally symmetrical about the first symmetry plane L1;The third metal via group 14 is located on the right side of the third air via group 11. The third metal via group 14 includes a plurality of semi-cylindrical third metal vias 141. The axes of the plurality of third metal vias 141 are perpendicular to the second dielectric substrate 2. The radii of the plurality of third metal vias 141 are equal. The plurality of third metal vias 141 successively penetrate the second dielectric substrate 2, the fifth rectangular patch 8 and the third dielectric substrate 3 from top to bottom. The right end faces of the plurality of third metal vias 141 are the planes where the axes thereof are located. The plurality of third metal vias 141 are evenly spaced from front to back. The right end surface of the third metal via 141 is located in the same plane, and the plane coincides with the plane where the right end surface of the second dielectric substrate 2 is located. There is a distance between the plane where the right end surfaces of the plurality of third metal vias 141 are located and the left end surface of the fifth rectangular patch 8, and the distance is greater than the radius of the third metal via 141; among the plurality of third metal vias 141, the distance between the central axis of the frontmost third metal via 141 and the front end surface of the third dielectric substrate 3 is greater than its radius, and the distance between the central axis of the rearmost third metal via 141 and the rear end surface of the third dielectric substrate 3 is greater than its radius. ;

[0036] In this embodiment, Figures 7 and 8As shown, the horizontal mode conversion structure includes a sixth rectangular patch 15, a T-shaped stripline patch, a seventh rectangular patch 16, a fourth air through hole group 17, a short-circuit pin group 18 and a metal pin group 19; the sixth rectangular patch 15 is attached to the upper surface of the second dielectric substrate 2, the length of the sixth rectangular patch 15 is along the left-right direction, the width is along the front-back direction, and the thickness is along the up-down direction; the front end face of the sixth rectangular patch 15 is located in the same plane as the front end face of the second dielectric substrate 2, the rear end face of the sixth rectangular patch 15 is located in the same plane as the rear end face of the second dielectric substrate 2, the right end face of the sixth rectangular patch 15 is located between the third symmetry plane L3 and the third air through hole group 11, and the left end face of the sixth rectangular patch 15 is located at the same plane as the second dielectric substrate 2. The left end surface of the dielectric substrate 2 is located in the same plane; the T-shaped stripline patch is attached to the lower surface of the second dielectric substrate 2, and the T-shaped stripline patch includes a first branch 20, a second branch 21, a third branch 22 and a fourth branch 23. The first branch 20 and the second branch 21 are both rectangular metal patches. The lengths of the first branch 20 and the second branch 21 are both along the front-to-back direction, the widths are both along the left-to-right direction, and the thicknesses are both along the up-down direction. The first branch 20 and the second branch 21 are both front-to-back symmetrical about the second symmetry plane L2; the right end surface of the first branch 20 is located on the left side of the third air through hole group 11 and on the right side of the third symmetry plane L3, and the right end surface of the first branch 20 is symmetrical with the central axis of the third air through hole 111. There is a distance, and the distance is greater than the radius of the third air through hole 111, the right end face of the first branch 20 and the right end face of the sixth rectangular patch 15 are located in the same plane, the left end face of the first branch 20 is located on the left side of the third symmetry plane L3, and the length of the first branch 20 is less than the width of the second dielectric substrate 2; the second branch 21 is located on the left side of the first branch 20, the right end face of the second branch 21 is connected to the left end face of the first branch 20 and is in a fitted state, the width of the second branch 21 is less than the width of the first branch 20, and the length of the second branch 21 is less than the length of the first branch 20; the third branch 22 is located on the left side of the second branch 21, the third branch 22 is a semicircular metal patch, and the third branch 22 is about the second symmetry plane L2 is symmetrical in front and back, the end face where the central axis of the third branch 22 is located is its right end face, the right end face of the third branch 22 is connected to the left end face of the second branch 21, and is in a fitted state, and the diameter of the third branch 22 is equal to the length of the second branch 21; the fourth branch 23 is a circular metal patch, the fourth branch 23 is symmetrical in front and back about the second symmetry plane L2, the fourth branch 23 is located on the left side of the third branch 22, and the fourth branch 23 partially overlaps with the third branch 22, and the distance from the center of the fourth branch 23 to the center of the third branch 22 is less than the sum of the outer ring radius of the fourth branch 23 and the radius of the third branch 22, and is not less than nine tenths of the sum of the outer ring radius of the fourth branch 23 and the radius of the third branch 22;The outer ring diameter of the fourth branch 23 is smaller than the diameter of the third branch 22, the inner ring radius of the fourth branch 23 is smaller than half of the outer ring radius, and the distance between the center of the fourth branch 23 and the plane where the left end surface of the second dielectric substrate 2 is located is greater than the outer ring radius of the fourth branch 23; the seventh rectangular patch 16 is attached to the lower surface of the second dielectric substrate 2, the length of the seventh rectangular patch 16 is along the front-to-back direction, the width is along the left-to-right direction, and the thickness is along the up-down direction. The front end surface of the seventh rectangular patch 16 is in the same plane as the front end surface of the second dielectric substrate 2, and the rear end surface of the seventh rectangular patch 16 is in the same plane as the rear end surface of the second dielectric substrate 2; The left end face of the seventh rectangular patch 16 is in the same plane as the left end face of the second dielectric substrate 2, the right end face of the seventh rectangular patch 16 is located on the left side of the overlap of the fourth branch 23 and the third branch 22, and there is a distance between the two, the seventh rectangular patch 16 is provided with a groove 24 that is concave to the left starting from the middle of its right end face, the fourth branch 23 is embedded in the groove 24, and does not contact the side wall of the groove 24, the side of the groove 24 is a curved surface, and the groove 24 is symmetrical front and back about the second symmetry plane L2; the fourth air through hole group 17 is located on the left side of the third air through hole group 11, and the fourth air through hole group 17 includes a front and rear spacing The two fourth air holes 171 are distributed, the two fourth air holes 171 are cylindrical holes, and the radius is equal to the radius of the third air hole 111, the axes of the two fourth air holes 171 are perpendicular to the third dielectric substrate 3, the two fourth air holes 171 penetrate the third dielectric substrate 3 up and down, the central axes of the two fourth air holes 171 are located in the same plane, and the plane is called the fourth plane. The distance from the fourth plane to the second plane is greater than the diameter of the fourth air hole 171, and the seventh rectangular patch 16 is located on the left side of the fourth plane, and the distance from the fourth plane to the right end face of the seventh rectangular patch 16 is The distance is greater than the radius of the fourth air through hole 171, the distance from the central axis of a fourth air through hole 171 located in the front of the fourth air through hole group 17 to the front end surface of the third dielectric substrate 3 is equal to the distance from the central axis of a third air through hole 111 located in the front of the third air through hole group 11 to the front end surface of the third dielectric substrate 3, and the distance from the central axis of a fourth air through hole 171 located in the back of the fourth air through hole group 17 to the rear end surface of the third dielectric substrate 3 is equal to the distance from the central axis of a third air through hole 111 located in the back of the third air through hole group 11 to the rear end surface of the third dielectric substrate 3;The short-circuit pin group 18 includes two cylindrical short-circuit pins 181, which are arranged at intervals in front and back, and both pass through the sixth rectangular patch 15, the second dielectric substrate 2 and the first branch 20 in sequence from top to bottom. The central axes of the two short-circuit pins 181 are perpendicular to the second dielectric substrate 2, and the two short-circuit pins 181 are symmetrical in front and back about the second symmetry plane L2. The two short-circuit pins 181 are located between the left end face of the first branch 20 and the right end face of the first branch 20. Among the two short-circuit pins 181, the distance from the central axis of the short-circuit pin 181 located in the front to the front end face of the first branch 20 is greater than its radius, and the distance from the central axis of the short-circuit pin 181 located in the back to the rear end face of the first branch 20 is greater than its radius. The distance between the surfaces is greater than its radius; the metal pin group 19 includes two cylindrical metal pins 191 spaced apart from each other in the front and back, the two metal pins 191 have the same radius and their axes are perpendicular to the second dielectric substrate 2, the two metal pins 191 penetrate the sixth rectangular patch 15, the second dielectric substrate 2 and the third dielectric substrate 3 from top to bottom in sequence, the central axes of the two metal pins 191 are located in the same plane, which is called the fifth plane, and the fifth plane is located on the left side of the left end face of the second branch 21 and on the right side of the right end face of the seventh rectangular patch 16, the two metal pins 191 are symmetrical about the second symmetry plane L2, and the central axis of the front metal pin 191 of the two metal pins 191 is located on the left side of the left end face of the second branch 21 and on the right side of the right end face of the seventh rectangular patch 16. The distance from the front end surface of the third dielectric substrate 3 is greater than the radius of the metal pin 191; the quasi-coaxial structure includes an eighth rectangular patch 25, a feeding via 26, a fourth metal via group 27, a fifth metal via group 28, a sixth metal via group 29 and a seventh metal via group 30; the eighth rectangular patch 25 is attached to the lower surface of the third dielectric substrate 3, the length of the eighth rectangular patch 25 is along the left-right direction, the width is along the front-to-back direction, and the thickness is along the up-down direction; the front end surface of the eighth rectangular patch 25 is located in the same plane as the front end surface of the third dielectric substrate 3, the rear end surface of the eighth rectangular patch 25 is located in the same plane as the rear end surface of the third dielectric substrate 3, and the left end surface of the eighth rectangular patch 25 is located at the left end surface of the third dielectric substrate 3. The eighth rectangular patch 25 is in the same plane, and the right end face of the eighth rectangular patch 25 is in the same plane as the right end face of the third dielectric substrate 3; the feeding via 26 is a cylindrical hole, and the feeding via 26 passes through the fourth branch 23, the third dielectric substrate 3 and the eighth rectangular patch 25 from top to bottom in sequence, the radius of the feeding via 26 is equal to the radius of the inner ring of the fourth branch 23, the axis of the feeding via 26 is perpendicular to the third dielectric substrate 3, and the central axis of the feeding via 26 and the fourth branch 23 are in the same straight line, and an annular gap 31 is opened on the eighth rectangular patch 25, the annular gap 31 surrounds the feeding via 26 and is coaxial with the feeding via 26, and the annular gap 31 is used to separate the feeding via 26 from the eighth rectangular patch 25;The fourth metal via group 27 includes a plurality of semi-cylindrical fourth metal vias 271, the axes of the plurality of fourth metal vias 271 are perpendicular to the second dielectric substrate 2, the radii of the plurality of fourth metal vias 271 are equal, and are evenly spaced from front to back, and the plurality of fourth metal vias 271 successively penetrate the sixth rectangular patch 15, the second dielectric substrate 2, the seventh rectangular patch 16 and the third dielectric substrate 3 from top to bottom, and the left end face of each fourth metal via 271 is the plane where the axis thereof is located, and the left end faces of the plurality of fourth metal vias 271 are all adjacent to the second dielectric substrate 2 The left end surface of the seventh rectangular patch 16 is located in the same plane; the fifth metal via group 28 is located on the left side of the right end surface of the seventh rectangular patch 16, on the right side of the fourth metal via group 27 and on the front side of the groove 24, the fifth metal via group 28 includes a plurality of cylindrical fifth metal vias 281 spaced apart from each other, the axes of the plurality of fifth metal vias 281 are all perpendicular to the second dielectric substrate 2, the plurality of fifth metal vias 281 are all sequentially passed through the sixth rectangular patch 15, the second dielectric substrate 2, the seventh rectangular patch 16 and the third dielectric substrate 3 from top to bottom, and the plurality of fifth metal vias 281 The radii of the fifth metal vias 281 are equal, the central axes of the plurality of fifth metal vias 281 are in the same plane, which is referred to as the fifth plane, the distance from the fifth plane to the right end face of the seventh rectangular patch 16 is greater than the radius of the fifth metal via 281, and the distance from the fifth plane to the left end face of the second dielectric substrate 2 is greater than the sum of the radius of the fifth metal via 281 and the radius of the fourth metal via 271; in the fifth metal via group 28, the distance from the central axis of the fifth metal via 281 located at the front to the front end face of the second dielectric substrate 2 is greater than its radius; the sixth metal via The group 29 is located at the rear side of the second symmetry plane L2, and the fifth metal via group 28 and the sixth metal via group 29 are front-to-back symmetric about the second symmetry plane L2; the seventh metal via group 30 includes two seventh metal vias 301 arranged at a front-to-back interval, one of which is located at the front side of the groove 24, and the other is located at the rear side of the groove 24, and the central axes of the two seventh metal vias 301 are located in the same plane, which is called the sixth plane, and the sixth plane is located on the left side of the fifth plane, and the distance between the two is greater than the sum of the radius of the fifth metal via 281 and the radius of the sixth metal via. ;

[0037] In this embodiment, the external input signal is input to the fourth branch 23 through the channel supporting quasi-coaxial mode transmission formed by the feeding via 26 and the fourth metal via group 27, the fifth metal via group 28, the sixth metal via group 29 and the seventh metal via group 30. Since the quasi-coaxial mode cannot directly achieve the required excitation and radiation of the broadband signal in the waveguide structure, mode conversion is required; since the third branch 22 is semicircular and has an arc-shaped side, the third branch 22 establishes a smooth connection between the fourth branch 23 and the second branch 21, so the signal is constrained by the sixth rectangular patch 15, the seventh rectangular patch 16 and the perturbation of the metal pin group 19 from the fourth branch. 23 passes through the third branch node 22, the second branch node 21, the fourth air hole group 17, the first branch node 20 and the short-circuit pin group 18 in sequence to the right with almost no reflection. The two short-circuit pins 181 contained in the short-circuit pin group 18 are symmetrically arranged on the first branch node 20 and connected to the sixth rectangular patch 15, which can conveniently form a quasi-parallel plate waveguide mode in a compact horizontal structure. This mode supports broadband signal transmission and radiation. Therefore, through the smooth connection between the fourth branch node 23, the third branch node 22 and the second branch node 21 and the action of the short-circuit pin group 18, the signal can be converted from the quasi-coaxial mode to the required broadband quasi-parallel plate waveguide mode in the compact horizontal structure without Increase the profile of the ultra-wideband planar dielectric integrated phased array antenna unit; in addition, the metal pin group 19 with a smaller radius optimizes the impedance matching of the signal converted from the quasi-coaxial mode to the parallel planar waveguide mode; the converted signal continues to pass through the third air via group 11 to the right and is coupled upward through the gap between the parallel third rectangular patch 6 and the fourth rectangular patch 7 under the cutoff effect of the third metal via group 14, wherein the introduction of the evenly distributed fourth air via group 17 and the third air via group 11 effectively suppresses the occurrence of impedance mismatch during beam scanning, and then passes through the first air via group 9 and the second air via group 1 under the constraints of the first metal via group 12 and the second metal via group 13 0, these evenly distributed air through-hole groups effectively improve the impedance bandwidth of high frequencies, and finally the signal is transmitted to the free space via the gap between the parallel first rectangular patch 4 and the second rectangular patch 5; wherein the gap formed by the first rectangular patch 4 and the second rectangular patch 5 is stacked in a stepped manner on the gap formed by the third rectangular patch 6 and the fourth rectangular patch 7 through the first metal via group 12 and the second metal via group 13, and this stepped radiation gap further optimizes the impedance bandwidth; in addition, when the signal passes through the gap between the parallel first rectangular patch 4 and the second rectangular patch 5, it can ensure that the electric field distribution in the main polarization direction is highly symmetrical, thereby effectively reducing the cross-polarization component.

[0038] In order to verify the performance of the ultra-wideband planar dielectric integrated phased array antenna unit of the present invention, the ultra-wideband planar dielectric integrated phased array antenna unit of the present invention and the ultra-wideband planar dielectric integrated phased array (12×10 array) formed by the ultra-wideband planar dielectric integrated phased array antenna unit of the present invention are simulated and tested. The ultra-wideband planar dielectric integrated phased array (12×10 array) is formed by 120 ultra-wideband planar dielectric integrated phased array antenna units of the present invention uniformly distributed in 12 columns and 10 rows. Among them, the broadband performance simulation diagram of the ultra-wideband planar dielectric integrated phased array antenna unit of the present invention is shown in FIG. Fig. 9 As shown in the figure; the H-plane beam scanning characteristic diagram of the ultra-wideband planar dielectric integrated phased array (12×10 array) composed of the ultra-wideband planar dielectric integrated phased array antenna unit of the present invention when the operating frequency is 9GHz is shown in Figure 10(a); the cross-polarization characteristic simulation diagram of the ultra-wideband planar dielectric integrated phased array (12×10 array) composed of the ultra-wideband planar dielectric integrated phased array antenna unit of the present invention when the operating frequency is 9GHz during H-plane beam scanning is shown in Figure 10(b); the E-plane beam scanning characteristic diagram of the ultra-wideband planar dielectric integrated phased array (12×10 array) composed of the ultra-wideband planar dielectric integrated phased array antenna unit of the present invention when the operating frequency is 9GHz is shown in Figure 10(c); The cross-polarization characteristic simulation diagram of the ultra-wideband planar dielectric integrated phased array (12×10 array) composed of the ultra-wideband planar dielectric integrated phased array antenna units of the present invention during E-plane beam scanning when the operating frequency is 9 GHz is shown in FIG. 10( d ); the H-plane beam scanning characteristic diagram of the ultra-wideband planar dielectric integrated phased array (12×10 array) composed of the ultra-wideband planar dielectric integrated phased array antenna units of the present invention when the operating frequency is 18 GHz is shown in FIG. 11( a ); the cross-polarization characteristic simulation diagram of the ultra-wideband planar dielectric integrated phased array (12×10 array) composed of the ultra-wideband planar dielectric integrated phased array antenna units of the present invention when the operating frequency is 18 GHz is shown in FIG. 11( b ). The E-plane beam scanning characteristic diagram of the ultra-wideband planar dielectric integrated phased array (12×10 array) composed of the ultra-wideband planar dielectric integrated phased array antenna units of the present invention when the operating frequency is 18 GHz is shown in FIG. 11( c ); the cross-polarization characteristic simulation diagram of the ultra-wideband planar dielectric integrated phased array (12×10 array) composed of the ultra-wideband planar dielectric integrated phased array antenna units of the present invention when the E-plane beam is scanned when the operating frequency is 18 GHz is shown in FIG. 11( d ).

[0039] Fig. 9 In the figure, Active VSWR is the active standing wave ratio at the quasi-coaxial structure of the ultra-wideband planar dielectric integrated phased array antenna unit of the present invention, and Peak gain is the peak gain of the radiation pattern of the ultra-wideband planar dielectric integrated phased array antenna unit of the present invention. Fig. 9 It can be seen that the operating frequency band with Active VSWR less than 2 is 6.5GHz to 19.2GHz, and Peakgain increases with frequency within this frequency range, and there is no gain drop phenomenon.

[0040] In Figures 10(a), 10(b), 10(c), 11(a), 11(b), and 11(c), the actual line represents the test curve, and the dotted line represents the simulation curve. From the analysis of Figures 10(a), 10(b), 10(c), 10(d), 11(a), 11(b), 11(c), and 11(d), it can be seen that the test directional diagram is very consistent with the simulated directional diagram. When the beam is scanned to θ=60°, the gain reduction relative to the wide side direction is less than 5.2dB. In addition, the cross-polarization level during the beam scanning process is always lower than 30dB. It can be seen that the ultra-wideband planar dielectric integrated phased array antenna unit of the present invention and the ultra-wideband planar dielectric integrated phased array constructed using the same have good ultra-wideband characteristics.

[0041] In summary, the ultra-wideband planar dielectric integrated phased array antenna unit of the present invention improves the feeding part and the radiating part, implements the feeding part based on a quasi-coaxial structure and a horizontal mode conversion structure, and implements the radiating part based on a stacked stepped slot structure. The horizontal mode conversion structure can smoothly convert the external input signal into a broadband quasi-parallel flat plate waveguide mode in a lower planar structure, which can greatly reduce the cross-sectional height of the antenna unit. When the electromagnetic wave signal propagating in the quasi-parallel flat plate waveguide mode is fed into the radiating part, it is transmitted to the free space through the stacked stepped slot structure. The stacked stepped slot structure can ensure that the electric field distribution in the main polarization direction is highly symmetrical, which can effectively reduce the cross-polarization component.

Claims

1. An ultra-wideband planar dielectric integrated phased array antenna unit, comprising a feeding part and a radiating part, characterized in that The feeding part is implemented based on a quasi-coaxial structure and a horizontal mode conversion structure, and the radiating part is implemented based on a stacked stepped slot structure. The quasi-coaxial structure is used to access external input signals and transmit the external input signals to the horizontal mode conversion structure in a quasi-coaxial mode. The horizontal mode conversion structure is used to smoothly convert the signals transmitted to it by the quasi-coaxial structure from the quasi-coaxial mode to the quasi-parallel plate waveguide mode and then feed them into the radiating part. The radiating part is used to transmit the signals fed to it by the horizontal mode conversion structure to free space.

2. The ultra-wideband planar dielectric integrated phased array antenna unit according to claim 1, characterized in that It also includes three dielectric substrates, and the feeding part and the radiating part are respectively arranged on the three dielectric substrates.

3. The ultra-wideband planar dielectric integrated phased array antenna unit according to claim 2, characterized in that The three dielectric substrates are all rectangular parallelepiped structures, and the three dielectric substrates are respectively called the first dielectric substrate, the second dielectric substrate and the third dielectric substrate; the length direction of the first dielectric substrate is defined as the left-right direction, the width direction is defined as the front-back direction, and the height direction is defined as the up-down direction; the second dielectric substrate is located below the first dielectric substrate; the front end surface of the second dielectric substrate is located in the same plane as the front end surface of the first dielectric substrate; the rear end surface of the second dielectric substrate is located in the same plane as the rear end surface of the first dielectric substrate; the right end surface of the second dielectric substrate is located at the right end surface of the first dielectric substrate. Between the plane and the plane where the left end surface of the first dielectric substrate is located, the left end surface of the second dielectric substrate is located on the left side of the plane where the left end surface of the first dielectric substrate is located, the third dielectric substrate is located below the second dielectric substrate, the front end surface of the third dielectric substrate and the front end surface of the second dielectric substrate are located in the same plane, the rear end surface of the third dielectric substrate and the rear end surface of the second dielectric substrate are located in the same plane, the left end surface of the third dielectric substrate and the left end surface of the second dielectric substrate are located in the same plane, and the right end surface of the third dielectric substrate and the right end surface of the second dielectric substrate are located in the same plane.

4. The ultra-wideband planar dielectric integrated phased array antenna unit according to claim 3, characterized in that The plane that makes the first dielectric substrate bilaterally symmetrical is called a first symmetrical plane, the plane that makes the second dielectric substrate front-to-back symmetrical is called a second symmetrical plane, and the plane that makes the second dielectric substrate bilaterally symmetrical is called a third symmetrical plane; The radiation part includes a first rectangular patch, a second rectangular patch, a third rectangular patch, a fourth rectangular patch, a fifth rectangular patch, a first air through hole group, a second air through hole group, a third air through hole group, a first metal via group, a second metal via group and a third metal via group; the first rectangular patch is attached to the upper surface of the first dielectric substrate, the length of the first rectangular patch is along the front-to-back direction, the width is along the left-to-right direction, and the thickness is along the up-down direction. The first rectangular patch is located on the left side of the first symmetry plane, and there is a distance between the two. The left end surface of the first rectangular patch and the left end surface of the first dielectric substrate are located on the same plane. The front end face of the first rectangular patch and the front end face of the first dielectric substrate are located in the same plane, and the rear end face of the first rectangular patch and the rear end face of the first dielectric substrate are located in the same plane; the second rectangular patch is attached to the upper surface of the first dielectric substrate, the second rectangular patch is located on the right side of the first symmetry plane, and the first rectangular patch and the second rectangular patch are bilaterally symmetrical about the first symmetry plane; the third rectangular patch is attached to the lower surface of the first dielectric substrate, the third rectangular patch is located on the left side of the first symmetry plane, and there is a distance between the two, and the third The length of the rectangular patch is along the front-to-back direction, the width is along the left-to-right direction, and the thickness is along the up-down direction. The width of the third rectangular patch is greater than the width of the first rectangular patch. The left end face of the third rectangular patch and the left end face of the first dielectric substrate are located in the same plane. The front end face of the third rectangular patch and the front end face of the first dielectric substrate are located in the same plane. The rear end face of the third rectangular patch and the rear end face of the first dielectric substrate are located in the same plane. The fourth rectangular patch is located on the right side of the first symmetry plane. The fourth rectangular patch is attached to the lower surface of the first dielectric substrate. The third rectangular patch and the The fourth rectangular patch is bilaterally symmetrical about the first symmetry plane; the fifth rectangular patch is attached to the lower surface of the second dielectric substrate, the length of the fifth rectangular patch is along the front-to-back direction, the width is along the left-to-right direction, and the thickness is along the up-down direction. The fifth rectangular patch is located on the right side of the first symmetry plane, and there is a distance between the two. The right end face of the fifth rectangular patch and the right end face of the second dielectric substrate are located in the same plane, the front end face of the fifth rectangular patch and the front end face of the second dielectric substrate are located in the same plane, and the rear end face of the fifth rectangular patch and the rear end face of the second dielectric substrate are located in the same plane;The first air through hole group is located on the left side of the first symmetry plane and on the right side of the plane where the right end face of the first rectangular patch is located. The first air through hole group includes a plurality of first air through holes evenly spaced from front to back. The plurality of first air through holes are cylindrical holes with the same radius and axes perpendicular to the first dielectric substrate, and all penetrate the first dielectric substrate from top to bottom. The central axes of the plurality of first air through holes are located in the same plane, which is referred to as the first plane. The distance from the first plane to the first symmetry plane and the distance from the first plane to the plane where the right end face of the first rectangular patch is located are both greater than the radius of the first air through hole. Among the plurality of first air through holes, the distance from the central axis of the frontmost first air through hole to the front end face of the first dielectric substrate is greater than its radius, and the distance from the central axis of the rearmost first air through hole to the rear end face of the first dielectric substrate is greater than its radius. The second air through hole group is located on the right side of the first symmetry plane. The third air hole group is bilaterally symmetrical with the second air hole group about the first symmetry plane; the third air hole group is located on the right side of the third symmetry plane and on the left side of the fifth rectangular patch, the third air hole group includes two third air holes spaced from front to back, the two third air holes are cylindrical holes with the same radius and the axes are perpendicular to the second dielectric substrate, the two third air holes penetrate the second dielectric substrate and the third dielectric substrate from top to bottom, the central axes of the two third air holes are located in the same plane, which is called the second plane, the distance from the second plane to the plane where the left end face of the fifth rectangular patch is located and the distance from the second plane to the third symmetry plane are both greater than the radius of the third air hole; in the third air hole group, the distance from the central axis of the front third air hole to the front end face of the second dielectric substrate is greater than its radius, and the distance from the central axis of the rear third air hole to the rear end face of the second dielectric substrate is greater than its radius;The first metal via group is located on the left side of the first symmetry plane, and the first metal via group includes a semi-cylindrical metal via and multiple cylindrical first metal vias. The axes of the semi-cylindrical metal via and the multiple first metal vias are perpendicular to the first dielectric substrate. The radius of the semi-cylindrical metal via and the multiple first metal vias are equal. The semi-cylindrical metal via and the multiple first metal vias pass through the first rectangular patch, the first dielectric substrate and the third rectangular patch from top to bottom in sequence. The front end face of the semi-cylindrical metal via is the plane where the axis thereof is located. The front end surface of the semi-cylindrical metal via overlaps with the front end surface of the first dielectric substrate, and a plurality of first metal vias are evenly spaced from front to back on the rear side of the semi-cylindrical metal via. The central axes of the semi-cylindrical metal via and the plurality of first metal vias are located in the same plane, which is referred to as the third plane. There is a distance between the third plane and the plane where the left end surface of the first rectangular patch is located, and the distance is greater than the radius of the first metal via; there is a distance between the third plane and the plane where the right end surface of the first rectangular patch is located, and the distance is greater than the radius of the first metal via. Among the plurality of first metal vias, the distance between the first metal via located at the front and the semi-cylindrical metal via is equal to the distance between any two adjacent first metal vias among the plurality of first metal vias, and the distance between the central axis of the first metal via located at the rear and the rear end surface of the first dielectric substrate is greater than its radius; The second metal via group is located on the right side of the first symmetry plane, and the first metal via group and the second metal via group are bilaterally symmetrical about the first symmetry plane; the third metal via group is located on the right side of the third air via group, and the third metal via group includes a plurality of third metal vias in the shape of a semi-cylinder, the axes of the plurality of third metal vias are perpendicular to the second dielectric substrate, the radii of the plurality of third metal vias are equal, and the plurality of third metal vias penetrate the second dielectric substrate, the fifth rectangular patch and the third dielectric substrate from top to bottom in sequence, and the right end faces of the plurality of third metal vias are the planes where the axes thereof are located. The third metal vias are evenly spaced from front to back, the right end faces of the third metal vias are located in the same plane, and the plane coincides with the plane where the right end face of the second dielectric substrate is located, there is a distance between the plane where the right end faces of the third metal vias are located and the left end face of the fifth rectangular patch, and the distance is greater than the radius of the third metal vias; among the third metal vias, the distance between the central axis of the frontmost third metal via and the front end face of the third dielectric substrate is greater than the radius, and the distance between the central axis of the rearmost third metal via and the rear end face of the third dielectric substrate is greater than the radius.

5. The ultra-wideband planar dielectric integrated phased array antenna unit according to claim 4, characterized in that The horizontal mode conversion structure includes a sixth rectangular patch, a T-shaped stripline patch, a seventh rectangular patch, a fourth air through hole group, a short-circuit pin group and a metal pin group; the sixth rectangular patch is attached to the upper surface of the second dielectric substrate, the length of the sixth rectangular patch is along the left-right direction, the width is along the front-to-back direction, and the thickness is along the up-down direction; the front end face of the sixth rectangular patch is located in the same plane as the front end face of the second dielectric substrate, the rear end face of the sixth rectangular patch is located in the same plane as the rear end face of the second dielectric substrate, the right end face of the sixth rectangular patch is located between the third symmetry plane and the third air through hole group, and the left end face of the sixth rectangular patch is located at the left end face of the second dielectric substrate. The surfaces are located in the same plane; the T-shaped stripline patch is attached to the lower surface of the second dielectric substrate, the T-shaped stripline patch includes a first branch, a second branch, a third branch and a fourth branch, the first branch and the second branch are both rectangular metal patches, the lengths of the first branch and the second branch are both along the front-to-back direction, the widths are both along the left-to-right direction, the thicknesses are both along the up-down direction, and the first branch and the second branch are both front-to-back symmetrical about the second symmetry plane; the right end face of the first branch is located on the left side of the third air through hole group and on the right side of the third symmetry plane, the right end face of the first branch is at a distance from the central axis of the third air through hole, and the distance is greater than the The radius of the third air through hole, the right end face of the first branch and the right end face of the sixth rectangular patch are located in the same plane, the left end face of the first branch is located on the left side of the third symmetry plane, and the length of the first branch is less than the width of the second dielectric substrate; the second branch is located on the left side of the first branch, the right end face of the second branch is connected to the left end face of the first branch and is in a fitted state, the width of the second branch is less than the width of the first branch, and the length of the second branch is less than the length of the first branch; the third branch is located on the left side of the second branch, the third branch is a semicircular metal patch, and the third branch is front-to-back with respect to the second symmetry plane. Symmetrical, the end face where the central axis of the third branch is located is its right end face, the right end face of the third branch is connected to the left end face of the second branch and is in a fitted state, and the diameter of the third branch is equal to the length of the second branch; the fourth branch is a circular metal patch, the fourth branch is symmetrical front-to-back about the second symmetry plane, the fourth branch is located on the left side of the third branch, the fourth branch partially overlaps with the third branch, and the distance from the center of the fourth branch to the center of the third branch is less than the sum of the outer ring radius of the fourth branch and the radius of the third branch, and is not less than nine-tenths of the sum of the outer ring radius of the fourth branch and the radius of the third branch;The outer ring diameter of the fourth branch node is smaller than the diameter of the third branch node, the inner ring radius of the fourth branch node is smaller than half of its outer ring radius, and the distance between the center of the circle of the fourth branch node and the plane where the left end surface of the second dielectric substrate is located is greater than the outer ring radius of the fourth branch node; the seventh rectangular patch is attached to the lower surface of the second dielectric substrate, the length of the seventh rectangular patch is along the front-to-back direction, the width is along the left-to-right direction, and the thickness is along the up-down direction. The front end surface of the seventh rectangular patch is in the same plane as the front end surface of the second dielectric substrate, and the rear end surface of the seventh rectangular patch is in the same plane as the left end surface of the second dielectric substrate. The rear end surface is in the same plane; the left end surface of the seventh rectangular patch is in the same plane as the left end surface of the second dielectric substrate; the right end surface of the seventh rectangular patch is located on the left side of the overlap of the fourth branch and the third branch, and there is a distance between the two; the seventh rectangular patch is provided with a groove concave to the left starting from the middle of its right end surface; the fourth branch is embedded in the groove and does not contact the side wall of the groove; the side surface of the groove is a curved surface, and the groove is symmetrical front-to-back about the second symmetry plane; the fourth air through hole group is located on the left side of the third air through hole group, The fourth air through hole group includes two fourth air through holes spaced apart from each other in the front and back, the two fourth air through holes are cylindrical holes, and the radius is equal to the radius of the third air through hole, the axes of the two fourth air through holes are perpendicular to the third dielectric substrate, the two fourth air through holes penetrate the third dielectric substrate from top to bottom, the central axes of the two fourth air through holes are located in the same plane, which is called the fourth plane, the distance from the fourth plane to the second plane is greater than the diameter of the fourth air through hole, the seventh rectangular patch is located on the left side of the fourth plane, and the distance from the fourth plane to the seventh rectangular patch is greater than the distance from the fourth plane to the seventh rectangular patch. The distance from the right end face of the patch is greater than the radius of the fourth air through hole, the distance from the central axis of a fourth air through hole located in the front of the fourth air through hole group to the front end face of the third dielectric substrate is equal to the distance from the central axis of a third air through hole located in the front of the third air through hole group to the front end face of the third dielectric substrate, and the distance from the central axis of a fourth air through hole located in the back of the fourth air through hole group to the rear end face of the third dielectric substrate is equal to the distance from the central axis of a third air through hole located in the back of the third air through hole group to the rear end face of the third dielectric substrate;The short-circuit pin group includes two cylindrical short-circuit pins, the two short-circuit pins are arranged at intervals in front and back, and both pass through the sixth rectangular patch, the second dielectric substrate and the first branch in sequence from top to bottom, the central axes of the two short-circuit pins are perpendicular to the second dielectric substrate, the two short-circuit pins are symmetrical in front and back about the second symmetry plane, the two short-circuit pins are located between the left end face of the first branch and the right end face of the first branch, and of the two short-circuit pins, the distance from the central axis of the short-circuit pin located in the front to the front end face of the first branch is greater than its radius, and the distance from the central axis of the short-circuit pin located in the back to the rear end face of the first branch is greater than its radius; the The metal pin group includes two cylindrical metal pins arranged at intervals in front and back, the two metal pins have the same radius and the axes are perpendicular to the second dielectric substrate, the two metal pins pass through the sixth rectangular patch, the second dielectric substrate and the third dielectric substrate from top to bottom in sequence, the central axes of the two metal pins are located in the same plane, and the plane is called the fifth plane, the fifth plane is located on the left side of the left end face of the second branch and on the right side of the right end face of the seventh rectangular patch, the two metal pins are symmetrical about the second symmetry plane, and the distance between the central axis of the front metal pin and the front end face of the third dielectric substrate is greater than the distance between the central axis of the front metal pin and the front end face of the third dielectric substrate. The radius of the metal pin; the quasi-coaxial structure includes an eighth rectangular patch, a feeding via, a fourth metal via group, a fifth metal via group, a sixth metal via group and a seventh metal via group; the eighth rectangular patch is attached to the lower surface of the third dielectric substrate, the length of the eighth rectangular patch is along the left-right direction, the width is along the front-back direction, and the thickness is along the up-down direction; the front end face of the eighth rectangular patch is located in the same plane as the front end face of the third dielectric substrate, the rear end face of the eighth rectangular patch is located in the same plane as the rear end face of the third dielectric substrate, the left end face of the eighth rectangular patch is located in the same plane as the left end face of the third dielectric substrate, and the right end face of the eighth rectangular patch is located in the same plane as the left end face of the third dielectric substrate. The end face is located in the same plane as the right end face of the third dielectric substrate; the feed via is a cylindrical hole, and the feed via passes through the fourth branch, the third dielectric substrate and the eighth rectangular patch from top to bottom in sequence, the radius of the feed via is equal to the radius of the inner ring of the fourth branch, the axis of the feed via is perpendicular to the third dielectric substrate, the feed via is located in the same straight line as the central axis of the fourth branch, an annular gap is opened on the eighth rectangular patch, the annular gap surrounds the feed via and is coaxial with the feed via, and the annular gap is used to separate the feed via from the eighth rectangular patch; The fourth metal via group includes a plurality of semi-cylindrical fourth metal vias, the axes of the plurality of fourth metal vias are perpendicular to the second dielectric substrate, the radii of the plurality of fourth metal vias are equal, and are evenly spaced from front to back, and the plurality of fourth metal vias penetrate the sixth rectangular patch, the second dielectric substrate, the seventh rectangular patch, and the third dielectric substrate from top to bottom in sequence, the left end face of each fourth metal via is the plane where the axis thereof is located, and the left end faces of the plurality of fourth metal vias are located in the same plane as the left end face of the second dielectric substrate; the fifth metal via group is located on the left side of the right end face of the seventh rectangular patch, on the right side of the fourth metal via group, and on the front side of the groove, the fifth metal via group includes a plurality of cylindrical fifth metal vias spaced from front to back, the axes of the plurality of fifth metal vias are perpendicular to the second dielectric substrate, the plurality of fifth metal vias penetrate the sixth rectangular patch, the second dielectric substrate, the seventh rectangular patch, and the third dielectric substrate from top to bottom in sequence, the radii of the plurality of fifth metal vias are equal, and the plurality of fifth metal vias are spaced from front to back. The central axes of the fifth metal vias are in the same plane, which is called the fifth plane. The distance from the fifth plane to the right end face of the seventh rectangular patch is greater than the radius of the fifth metal via, and the distance from the fifth plane to the left end face of the second dielectric substrate is greater than the sum of the radius of the fifth metal via and the radius of the fourth metal via. In the fifth metal via group, the distance from the central axis of the fifth metal via located at the frontmost position to the front end face of the second dielectric substrate is greater than its radius. The sixth metal via group is located at the rear side of the second symmetry plane, and the fifth metal via group and the sixth metal via group are front-to-back symmetric with respect to the second symmetry plane. The seventh metal via group includes two seventh metal vias spaced apart from each other, one of which is located at the front side of the groove, and the other is located at the rear side of the groove. The central axes of the two seventh metal vias are in the same plane, which is called the sixth plane. The sixth plane is located on the left side of the fifth plane, and the distance between the two is greater than the sum of the radius of the fifth metal via and the radius of the sixth metal via.

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