Self-voltage-sharing four-level voltage source type conversion device and control method

By designing a self-equal voltage source type four-level conversion device, the combination of capacitors and diodes is used to solve the complex problem of capacitor control in the prior art, and the self-equalization of capacitor voltage and the simplification of the control method are achieved.

CN120110194APending Publication Date: 2025-06-06XUZHOU NORMAL UNIVERSITY
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Patent Information

Application Number
CN202510266177.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-03-07
Publication Date
2025-06-06

AI Technical Summary

Technical Problem

The existing multi-level converters have complex control methods for suspended capacitors or DC-side capacitors, making it difficult to achieve effective capacitance equalization.

Method used

A self-equalizing voltage source four-level conversion device is designed, using six capacitors and six diodes to achieve self-equalizing of capacitor voltage through specific topology and control signals.

Benefits of technology

It realizes self-equalization of capacitor voltage, simple control method, easy to expand to more levels, avoids direct series connection of switch tubes, and improves the stability and ease of use of the system.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to a self-voltage-sharing four-level voltage source type conversion device which is used in a power conversion system and belongs to the field of power electronic converters. The circuit comprises six capacitors, six diodes D1-D6, a first wiring terminal (1), a second wiring terminal (2), a third wiring terminal (3), a fourth wiring terminal (4), a fifth wiring terminal (5), a sixth wiring terminal (6), a seventh wiring terminal (7), an eighth wiring terminal (8), a ninth wiring terminal (9) and a tenth wiring terminal (10), wherein a capacitor C1, a capacitor C2 and a capacitor C3 are direct-current side capacitors, a capacitor C4, a capacitor C5 and a capacitor C6 are suspension capacitors, and the six diodes D1-D6 are connected in series. An eleventh terminal (11), a twelfth terminal (12) and a thirteenth terminal (13); and six insulated gate bipolar transistors (IGBT1-IGBT6). The four-level conversion device can be expanded to more levels, has the capacity of capacitor self-voltage-sharing, and is simple to control and easy to realize.
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Description

Technical Field

[0001] This article relates to a self-equalizing four-level voltage source type conversion device and a control method, belonging to the field of power electronic converters. Background Art

[0002] Multilevel conversion devices have the advantages of low device voltage stress, high power, low switching frequency, low total harmonic distortion of output waveform, and low system electromagnetic interference. Therefore, power electronic devices are also widely used in various industries. Generally speaking, typical multilevel converter topologies include flying capacitor converter (FC), neutral point clamped converter (NPC), cascaded H-bridge converter and modular multilevel converter (MMC).

[0003] However, the midpoint of the neutral point clamped converter (NPC) is unbalanced, and a control method is needed to balance the midpoint potential, such as the capacitor voltage balance control method based on space vector modulation and the capacitor voltage balance control method based on carrier modulation; although the flying capacitor converter (FC) has the ability to balance the midpoint, its flying capacitor voltage balance needs to be controlled; the cascaded H-bridge converter has a DC side capacitor, so its voltage control is relatively complex, which can generally be divided into average capacitor voltage control, intra-phase capacitor voltage balance control, and inter-phase capacitor voltage balance control. In short, although the typical multi-level converter or its variant has many advantages, their common disadvantage is that the control method for the floating capacitor or DC side capacitor is very complicated.

[0004] At present, although many optimized multi-level structures have been proposed, the problem of complex capacitor control has not been properly solved. Therefore, this patent proposes a self-balanced voltage source type four-level conversion device, in which the capacitor voltage can be self-balanced through diodes, and it is easy to expand to more levels, and the control method is simple. Summary of the invention

[0005] In response to the problems existing in the above-mentioned technologies, this patent provides a self-equalizing voltage source type four-level conversion device with a simple topology, a stable number of output levels, and a simple capacitance control method.

[0006] The device comprises six capacitors: capacitor C1, capacitor C2, capacitor C3, capacitor C4, capacitor C5, capacitor C6; six diodes: diode D1, diode D2, diode D3, diode D4, diode D5, diode D6; thirteen terminals: a first terminal (1), a second terminal (2), a third terminal (3), a fourth terminal (4), a fifth terminal (5), a sixth terminal (6), a seventh terminal (7), an eighth terminal (8), a ninth terminal (9), a tenth terminal (10), an eleventh terminal (11), a twelfth terminal (12), a thirteenth terminal (13); and six insulated gate bipolar transistors IGBT1, IGBT2, IGBT3, IGBT4, IGBT5, IGBT6;

[0007] The invention is characterized in that the capacitor C1 is connected between the first terminal (1) and the second terminal (2);

[0008] The capacitor C2 is connected between the second terminal (2) and the third terminal (3);

[0009] The capacitor C3 is connected between the third terminal (3) and the fourth terminal (4);

[0010] The capacitor C4 is connected between the fifth terminal (5) and the seventh terminal (7);

[0011] The capacitor C5 is connected between the seventh terminal (7) and the ninth terminal (9);

[0012] The capacitor C6 is connected between the tenth terminal (10) and the twelfth terminal (12);

[0013] The diode D1 is connected between the tenth terminal (10) and the eleventh terminal (11);

[0014] The diode D2 is connected between the eleventh terminal (11) and the twelfth terminal (12);

[0015] The diode D3 is connected between the fifth terminal (5) and the sixth terminal (6);

[0016] The diode D4 is connected between the sixth terminal (6) and the seventh terminal (7);

[0017] The diode D5 is connected between the seventh terminal (7) and the eighth terminal (8);

[0018] The diode D6 is connected between the eighth terminal (8) and the ninth terminal (9);

[0019] The collector of the insulated gate bipolar transistor IGBT1 is connected to the first terminal (1), and the emitter of the insulated gate bipolar transistor IGBT1 is connected to the fifth terminal (5);

[0020] The collector of the insulated gate bipolar transistor IGBT2 is connected to the fifth terminal (5), and the emitter of the insulated gate bipolar transistor IGBT2 is connected to the tenth terminal (10);

[0021] The collector of the insulated gate bipolar transistor IGBT3 is connected to the tenth terminal (10), and the emitter of the insulated gate bipolar transistor IGBT3 is connected to the thirteenth terminal (13);

[0022] The collector of the insulated gate bipolar transistor IGBT4 is connected to the thirteenth terminal (13), and the emitter of the insulated gate bipolar transistor IGBT4 is connected to the twelfth terminal (12);

[0023] The collector of the insulated gate bipolar transistor IGBT5 is connected to the twelfth terminal (12), and the emitter of the insulated gate bipolar transistor IGBT5 is connected to the ninth terminal (9);

[0024] The collector of the insulated gate bipolar transistor IGBT6 is connected to the ninth terminal (9), and the emitter of the insulated gate bipolar transistor IGBT6 is connected to the fourth terminal (4);

[0025] A self - equalizing four - level voltage source converter device according to claim 1 or 2, characterized in that the four - level topology unit can operate in eight operating modes:

[0026] The first operating mode: The insulated gate bipolar transistors IGBT1, IGBT2, and IGBT3 are turned off, and the circuit outputs - 1Vdc, where Vdc represents the supply voltage, Uc1 represents the voltage of capacitor C1, Uc2 represents the voltage of capacitor C2, Uc3 represents the voltage of capacitor C3, and so on. If Uc6 < Uc5 < Uc3, C3, C5, and C6 are evenly voltage - shared through diodes D1 and D5 in parallel;

[0027] The second operating mode: The insulated gate bipolar transistor IGBT3 is turned on, and IGBT1 and IGBT2 are turned off. The circuit outputs - 1Vdc / 3. When the current flows out from the thirteenth terminal (13), C6 discharges. If Uc6 < Uc5 < Uc3, C3, C5, and C6 are evenly voltage - shared through diodes D1 and D5 in parallel;

[0028] Third operating mode: When the insulated gate bipolar transistors IGBT1 and IGBT3 are turned off and IGBT2 is turned on, and the circuit outputs -1Vdc / 3, when the current flows out from the thirteenth terminal (13), C4 and C5 discharge, C6 charges, Uc4 + Uc5 < Uc2 + Uc3, and C2, C3, C4, and C5 are voltage-equalized in parallel through the diode D3; when the current flows into the thirteenth terminal (13), C4 and C5 charge, C6 discharges, Uc6 < Uc5, and C5 and C6 are voltage-equalized in parallel through the diode D1;

[0029] Fourth operating mode: When the insulated gate bipolar transistors IGBT2 and IGBT3 are turned off and IGBT1 is turned on, and the circuit outputs -1Vdc / 3, when the current flows out from the thirteenth terminal (13), C4 and C5 charge; when the current flows into the thirteenth terminal (13), C4 and C5 discharge, Uc4 + Uc5 < Uc1 + Uc2, and C1, C2, C4, and C5 are voltage-equalized in parallel through the diode D6;

[0030] Fifth operating mode: When the insulated gate bipolar transistors IGBT2 and IGBT3 are turned on and IGBT1 is turned off, and the circuit outputs 1Vdc / 3, when the current flows out from the thirteenth terminal (13), C4 and C5 discharge, Uc4 + Uc5 < Uc2 + Uc3, and C2, C3, C4, and C5 are voltage-equalized in parallel through the diode D3; when the current flows into the thirteenth terminal (13), C4 and C5 charge;

[0031] Sixth operating mode: When the insulated gate bipolar transistors IGBT1 and IGBT2 are turned on and IGBT3 is turned off, and the circuit outputs 1Vdc / 3, when the current flows out from the thirteenth terminal (13), C6 charges; when the current flows into the thirteenth terminal (13), C6 discharges, Uc6 < Uc4 < Uc1, and C1, C4, and C6 are voltage-equalized in parallel through the diodes D2 and D4;

[0032] Seventh operating mode: When the insulated gate bipolar transistors IGBT1 and IGBT3 are turned on and IGBT2 is turned off, and the circuit outputs 1Vdc / 3, when the current flows out from the thirteenth terminal (13), C4 and C5 charge, C1 discharges, Uc6 < Uc5, and C5 and C6 are voltage-equalized in parallel through the diode D1; when the current flows into the thirteenth terminal (13), C4 and C5 discharge, C6 charges, Uc4 + Uc5 < Uc1 + Uc2, and C1, C2, C4, and C5 are voltage-equalized in parallel through the diode D6;

[0033] Eighth operating mode: When the insulated gate bipolar transistors IGBT1, IGBT2, and IGBT3 are turned on, and the circuit outputs 1Vdc, if Uc6 < Uc4 < Uc1, C1, C4, and C6 are voltage-equalized in parallel through the diodes D2 and D4;

[0034] According to a self-equalizing four-level voltage source converter as described in claim 1, it is characterized in that each insulated gate bipolar transistor can also be replaced by an integrated gate-commutated thyristor, a gate turn-off thyristor, a power transistor and a power field effect transistor.

[0035] A self-equalizing method for a self-equalizing four-level voltage source type converter, comprising the following steps:

[0036] The control signal of the control unit includes a sinusoidal modulation wave and three sets of triangular carriers with the same frequency and amplitude, namely triangular carrier A, triangular carrier B, and triangular carrier C. The control unit uses the comparison result of the value of the sinusoidal modulation wave with the values ​​of the triangular carriers A, B, and C at the same time as the driving signal of IGBT1, IGBT2, and IGBT3;

[0037] The control unit outputs 1Vdc by making the values ​​of the sinusoidal modulation waves greater than the values ​​of the triangular carriers A, B, and C. The comparison results at the same time are used as driving signals for the insulated gate bipolar transistors IGBT1, IGBT2, and IGBT3.

[0038] The control unit outputs 0Vdc by making the values ​​of the sinusoidal modulation waves smaller than the values ​​of the triangular carriers A, B, and C. The comparison results at the same time are used as driving signals for the insulated gate bipolar transistors IGBT1, IGBT2, and IGBT3.

[0039] The control unit controls IGBT1, IGBT2, and IGBT3 by outputting 1Vdc / 3 by making the value of the sinusoidal modulation wave smaller than the value of the triangular carrier A but larger than the value of the triangular carrier B, and directly outputting the fifth working mode.

[0040] The control unit controls IGBT1, IGBT2, and IGBT3 by outputting -1Vdc / 3 by making the value of the sinusoidal modulation wave smaller than the value of the triangular carrier B but larger than the value of the triangular carrier C, and directly outputting the fourth working mode.

[0041] Compared with the midpoint clamped four-level conversion device, the flying capacitor four-level conversion device and the MMC four-level conversion device, the present invention has the characteristics of easy implementation of capacitor voltage balancing and simple control. At the same time, since the driving signals of the switching tubes are complementary, there is no direct series connection of the switching tubes in the circuit, which is easier to promote and use. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Figure 1 This is a topological structure diagram of a self-equalizing four-level voltage source type of the present invention;

[0043] Figure 2 is a topological diagram of the present invention in a first working mode;

[0044] Figure 3 It is a topological diagram of the present invention in the second, third and fourth working modes;

[0045] Figure 4 is a topological diagram of the present invention in the fifth, sixth and seventh working modes;

[0046] Figure 5 is a topological diagram of the present invention in the eighth working mode;

[0047] Figure 6 is a capacitor voltage simulation diagram of the present invention in a steady state;

[0048] Figure 7 is a topological structure diagram of the first embodiment of the present invention;

[0049] Figure 8 is a topological structure diagram of the second embodiment of the present invention;

[0050] Fig. 9 is a topological structure diagram of the third embodiment of the present invention;

[0051] Fig.10 is a topological structure diagram of the fourth embodiment of the present invention;

[0052] Fig.11 is a topological structure diagram of the fifth embodiment of the present invention;

[0053] Fig.12 is a topological structure diagram of Embodiment 6 of the present invention; DETAILED DESCRIPTION

[0054] The following is a complete and systematic description of the technical solution in this patent in conjunction with the drawings in the embodiments of this patent. Of course, the embodiments described herein are only part of the embodiments of this patent and do not mean to include all the embodiments. The embodiments that have not been creatively modified in this patent are all within the scope of protection of this patent.

[0055] See also Figure 1 As shown in the figure, the self-balanced four-level voltage source type conversion device includes capacitor C1, capacitor C2, capacitor C3, capacitor C4; diode D1, diode D2, diode D3, diode D4, diode D5, diode D6; a first terminal (1), a second terminal (2), a third terminal (3), a fourth terminal (4), a fifth terminal (5), a sixth terminal (6), a seventh terminal (7), an eighth terminal (8), a ninth terminal (9), a tenth terminal (10), an eleventh terminal (11), a twelfth terminal (12), and a thirteenth terminal (13); and six insulated gate bipolar transistors IGBT1, IGBT2, IGBT3, IGBT4, IGBT5, and IGBT6;

[0056] The invention is characterized in that the capacitor C1 is connected between the first terminal (1) and the second terminal (2);

[0057] The capacitor C2 is connected between the second terminal (2) and the third terminal (3);

[0058] The capacitor C3 is connected between the third terminal (3) and the fourth terminal (4);

[0059] The capacitor C4 is connected between the fifth terminal (5) and the seventh terminal (7);

[0060] The capacitor C5 is connected between the seventh terminal (7) and the ninth terminal (9);

[0061] The capacitor C6 is connected between the tenth terminal (10) and the twelfth terminal (12);

[0062] The diode D1 is connected between the tenth terminal (10) and the eleventh terminal (11);

[0063] The diode D2 is connected between the eleventh terminal (11) and the twelfth terminal (12);

[0064] The diode D3 is connected between the fifth terminal (5) and the sixth terminal (6);

[0065] The diode D4 is connected between the sixth terminal (6) and the seventh terminal (7);

[0066] The diode D5 is connected between the seventh terminal (7) and the eighth terminal (8);

[0067] The diode D6 is connected between the eighth terminal (8) and the ninth terminal (9);

[0068] The collector of the insulated gate bipolar transistor IGBT1 is connected to the first terminal (1), and the emitter of the insulated gate bipolar transistor IGBT1 is connected to the fifth terminal (5);

[0069] The collector of the insulated gate bipolar transistor IGBT2 is connected to the fifth terminal (5), and the emitter of the insulated gate bipolar transistor IGBT2 is connected to the tenth terminal (10);

[0070] The collector of the insulated gate bipolar transistor IGBT3 is connected to the tenth terminal (10), and the emitter of the insulated gate bipolar transistor IGBT3 is connected to the thirteenth terminal (13);

[0071] The collector of the insulated gate bipolar transistor IGBT4 is connected to the thirteenth terminal (13), and the emitter of the insulated gate bipolar transistor IGBT4 is connected to the twelfth terminal (12);

[0072] The collector of the insulated gate bipolar transistor IGBT5 is connected to the twelfth terminal (12), and the emitter of the insulated gate bipolar transistor IGBT5 is connected to the ninth terminal (9);

[0073] The collector of the insulated gate bipolar transistor IGBT6 is connected to the ninth terminal (9), and the emitter of the insulated gate bipolar transistor IGBT6 is connected to the fourth terminal (4);

[0074] Each insulated gate bipolar transistor can also be replaced by other transistors such as power transistors, power field effect transistors, gate turn-off thyristors, etc.

[0075] A control method for a self-equalizing four-level voltage source converter device includes the following steps:

[0076] The first operating mode: The insulated gate bipolar transistors IGBT1, IGBT2, and IGBT3 are turned off, and the circuit outputs -1Vdc, where Vdc represents the power supply voltage, Uc1 represents the voltage of the capacitor C1, Uc2 represents the voltage of the capacitor C2, Uc3 represents the voltage of the capacitor C3, and so on. If Uc6 < Uc5 < Uc3, C3, C5, and C6 are evenly voltage-shared through the parallel connection of the diodes D1 and D5;

[0077] The second operating mode: The insulated gate bipolar transistor IGBT3 is turned on, and IGBT1 and IGBT2 are turned off. The circuit outputs -1Vdc / 3. When the current flows out from the thirteenth terminal (13), C6 discharges. If Uc6 < Uc5 < Uc3, C3, C5, and C6 are evenly voltage-shared through the parallel connection of the diodes D1 and D5;

[0078] The third operating mode: The insulated gate bipolar transistors IGBT1 and IGBT3 are turned off, and IGBT2 is turned on. The circuit outputs -1Vdc / 3. When the current flows out from the thirteenth terminal (13), C4 and C5 discharge, and C6 charges. If Uc4 + Uc5 < Uc2 + Uc3, C2, C3, C4, and C5 are evenly voltage-shared through the parallel connection of the diode D3; when the current flows into the thirteenth terminal (13), C4 and C5 charge, and C6 discharges. If Uc6 < Uc5, C5 and C6 are evenly voltage-shared through the parallel connection of the diode D1;

[0079] The fourth operating mode: The insulated gate bipolar transistors IGBT2 and IGBT3 are turned off, and IGBT1 is turned on. The circuit outputs -1Vdc / 3. When the current flows out from the thirteenth terminal (13), C4 and C5 charge; when the current flows into the thirteenth terminal (13), C4 and C5 discharge. If Uc4 + Uc5 < Uc1 + Uc2, C1, C2, C4, and C5 are evenly voltage-shared through the parallel connection of the diode D6;

[0080] Fifth working mode: When IGBT2 and IGBT3 of the insulated gate bipolar transistor are turned on and IGBT1 is turned off, and the circuit outputs 1Vdc / 3, when the current flows out from the thirteenth terminal (13), C4 and C5 discharge, Uc4 + Uc5 < Uc2 + Uc3, and C2, C3, C4, and C5 are evenly voltage-shared through the parallel connection of diode D3; when the current flows into the thirteenth terminal (13), C4 and C5 are charged;

[0081] Sixth working mode: When IGBT1 and IGBT2 of the insulated gate bipolar transistor are turned on and IGBT3 is turned off, and the circuit outputs 1Vdc / 3, when the current flows out from the thirteenth terminal (13), C6 is charged; when the current flows into the thirteenth terminal (13), C6 discharges, Uc6 < Uc4 < Uc1, and C1, C4, and C6 are evenly voltage-shared through the parallel connection of diodes D2 and D4;

[0082] Seventh working mode: When IGBT1 and IGBT3 of the insulated gate bipolar transistor are turned on and IGBT2 is turned off, and the circuit outputs 1Vdc / 3, when the current flows out from the thirteenth terminal (13), C4 and C5 are charged and C1 discharges, Uc6 < Uc5, and C5 and C6 are evenly voltage-shared through the parallel connection of diode D1; when the current flows into the thirteenth terminal (13), C4 and C5 discharge and C6 is charged, Uc4 + Uc5 < Uc1 + Uc2, and C1, C2, C4, and C5 are evenly voltage-shared through the parallel connection of diode D6;

[0083] Eighth working mode: When IGBT1, IGBT2, and IGBT3 of the insulated gate bipolar transistor are turned on and the circuit outputs 1Vdc, if Uc6 < Uc4 < Uc1, C1, C4, and C6 are evenly voltage-shared through the parallel connection of diodes D2 and D4;

[0084] A method for realizing self-equalizing voltage of a self-equalizing four-level voltage source type conversion device includes the following steps:

[0085] The control signals of the control unit include a sine modulation wave and three triangular carrier waves with the same frequency and amplitude, namely triangular carrier wave A, triangular carrier wave B, and triangular carrier wave C. The control unit uses the comparison results of the value of the sine modulation wave and the values of the triangular carrier waves A, B, and C at the same moment as the drive signals of IGBT1, IGBT2, and IGBT3;

[0086] When the value of the sine modulation wave is greater than the values of the triangular carrier waves A, B, and C, the control unit outputs 1Vdc. The comparison results at the same moment are used as the drive signals of the insulated gate bipolar transistors IGBT1, IGBT2, and IGBT3.

[0087] The control unit outputs 0Vdc by making the values ​​of the sinusoidal modulation waves smaller than the values ​​of the triangular carriers A, B, and C. The comparison results at the same time are used as driving signals for the insulated gate bipolar transistors IGBT1, IGBT2, and IGBT3.

[0088] The control unit controls IGBT1, IGBT2, and IGBT3 by outputting 1Vdc / 3 by making the value of the sinusoidal modulation wave smaller than the value of the triangular carrier A but larger than the value of the triangular carrier B, and directly outputting the fifth working mode.

[0089] The control unit controls IGBT1, IGBT2, and IGBT3 by outputting -1Vdc / 3 by making the value of the sinusoidal modulation wave smaller than the value of the triangular carrier B but larger than the value of the triangular carrier C, and directly outputting the fourth working mode.

[0090] Figure 2 The topology diagram of the first working mode of the present invention is given, that is, the insulated gate bipolar transistors IGBT1, IGBT2, and IGBT3 are turned off, and the non-conducting path is represented by a gray line in the figure, and the conducting path is represented by a black line. Taking the current flowing out from the thirteenth terminal as an example, the current flow path is DC4-IGBT6-IGBT5-IGBT4-AC.

[0091] Figure 3 The topological diagrams of the second, third and fourth working modes of the present invention are given, in which the non-conducting paths are represented by gray lines and the conducting paths are represented by black lines. Figure 3 The leftmost figure is the second working mode diagram, that is, the insulated gate bipolar transistor IGBT3 is turned on, IGBT1 and IGBT2 are turned off, and taking the current flowing out from the thirteenth terminal as an example, the current flow path is DC1-IGBT1-C4-C5-IGBT5-IGBT4-AC; Figure 3 The middle figure is a third working mode diagram, that is, the insulated gate bipolar transistors IGBT1 and IGBT3 are turned off, and IGBT2 is turned on. Taking the current flowing out from the thirteenth terminal as an example, the current flow path is DC4-IGBT6-C5-C4-IGBT2-C6-IGBT4-AC; Figure 3 The rightmost figure is the fourth working mode diagram, that is, the insulated gate bipolar transistors IGBT2 and IGBT3 are turned off, and IGBT1 is turned on. Taking the current flowing out from the thirteenth terminal as an example, the current flow path is DC4-IGBT6-IGBT5-C6-IGBT3-AC.

[0092] Figure 4 A topological diagram of the fifth, sixth and seventh working modes of the present invention is given, in which the non-conducting path is represented by a gray line and the conducting path is represented by a black line. Figure 4The leftmost figure is the fifth working mode figure, that is, the insulated gate bipolar transistors IGBT2 and IGBT3 are turned off, and IGBT1 is turned on. Taking the current flowing out from the thirteenth terminal as an example, the current flow path is DC1-IGBT1-C4-C5-IGBT 5-C6-IGBT3-AC; Figure 4 The middle figure is a sixth working mode figure, that is, the insulated gate bipolar transistors IGBT2 and IGBT3 are turned on, and IGBT1 is turned off. Taking the current flowing out from the thirteenth terminal as an example, the current flow path is DC1-IGBT1-IGBT2-C6-IGBT4-AC; Figure 4 The rightmost figure is the seventh working mode diagram, that is, the insulated gate bipolar transistors IGBT1 and IGBT3 are turned on, and IGBT2 is turned off. Taking the current flowing out from the thirteenth terminal as an example, the current flow path is DC4-IGBT6-C5-C4-IGBT2-IGBT3-AC.

[0093] Figure 5 The topology diagram of the eighth working mode of the present invention is given, that is, the insulated gate bipolar transistors IGBT1, IGBT2, and IGBT3 are turned on. In the figure, the non-conducting path is represented by a gray line, and the conducting path is represented by a black line. Taking the current flowing out from the thirteenth terminal as an example, the current flow path is DC1-IGBT1-IGBT2-IGBT3-AC.

[0094] Figure 6 This is a simulation diagram of the topology of this patent in MATLAB in steady state about the voltage of the suspended capacitor and the DC side capacitor. Uc1 is the voltage of C1, Uc2 is the voltage of C2, Uc3 is the voltage of C3, Uc4 is the voltage of C4, Uc5 is the voltage of C5, Uc6 is the voltage of C6, and the initial value of the capacitor voltage is set to 200 V. It can be seen that the self-balanced voltage method proposed in this patent can achieve self-balancing of the capacitor voltage with small voltage fluctuation.

[0095] Figure 7 This is the first embodiment of the present patent, which is a three-phase inverter topology circuit composed of three embodiments of the present invention. Its main function is to invert DC power into three-phase AC power. The first terminal 1, the second terminal 2, the third terminal 3, and the fourth terminal 4 are DC input terminals, and the thirteenth terminal 13, the fourteenth terminal 14, and the fifteenth terminal 15 are three-phase AC output terminals. The main feature of this implementation case is that DC bus capacitors are installed in each phase bridge arm, which can achieve system stability and reduce harmonics.

[0096] Figure 8This is the second embodiment of the present patent, which is a three-phase inverter topology circuit composed of three of the present inventions. Its main function is to invert DC power into three-phase AC power. The first terminal 1, the second terminal 2, the third terminal 3, and the fourth terminal 4 are DC input terminals, and the thirteenth terminal 13, the fourteenth terminal 14, and the fifteenth terminal 15 are three-phase AC output terminals. The main feature of this implementation case is that each phase bridge arm shares the DC bus capacitor, which greatly reduces the number of capacitors, makes the system simpler, and reduces the volume.

[0097] Fig. 9 This is the third embodiment of the present patent. It is a three-phase rectifier topology circuit composed of three embodiments of the present invention. Its main function is to invert three-phase AC power into DC power. The first terminal 1, the second terminal 2, the third terminal 3, and the fourth terminal 4 are three-phase AC input terminals. The main feature of this implementation case is that DC bus capacitors are installed in each phase bridge arm. In order to stabilize the system and reduce the influence of harmonics, the capacitors need to be installed near the bridge arm of each phase.

[0098] Fig.10 This is the fourth embodiment of the present patent. It is a three-phase rectifier topology circuit composed of three embodiments of the present invention. Its main function is to invert three-phase AC power into DC power. The first terminal 1, the second terminal 2, the third terminal 3, and the fourth terminal 4 are three-phase AC input terminals. The main feature of this implementation case is that each bridge arm shares a DC bus capacitor, which greatly reduces the number of capacitors, making the system simpler and reducing the size.

[0099] Fig.11 This is the fifth embodiment of the present patent, which is a three-phase inverter topology circuit composed of three embodiments of the present invention. Its main function is to convert three-phase AC power into three-phase AC power. The first terminal 1, the second terminal 2, and the third terminal 3 are three-phase AC input terminals, and the fourth terminal 4, the fifth terminal 5, and the sixth terminal 6 are three-phase AC output terminals. The main feature of this implementation case is that DC bus capacitors are installed in each phase bridge arm. In order to stabilize the system and reduce the influence of harmonics, the capacitors need to be installed near the bridge arm of each phase.

[0100] Fig.12 This is the sixth embodiment of the present patent, which is a three-phase inverter topology circuit composed of three embodiments of the present invention. Its main function is to convert three-phase alternating current into three-phase alternating current. The first terminal 1, the second terminal 2, and the third terminal 3 are three-phase alternating current input terminals, and the fourth terminal 4, the fifth terminal 5, and the sixth terminal 6 are three-phase alternating current output terminals. The main feature of this implementation case is that each bridge arm shares a DC bus capacitor, which greatly reduces the number of capacitors, makes the system simpler, and reduces the volume.

Claims

1. A self-equalizing four-level voltage source type conversion device, comprising a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, a capacitor C5, and a capacitor C6; a first terminal (1), a second terminal (2), a third terminal (3), a fourth terminal (4), a fifth terminal (5), a sixth terminal (6), a seventh terminal (7), an eighth terminal (8), a ninth terminal (9), a tenth terminal (10), an eleventh terminal (11), a twelfth terminal (12), and a thirteenth terminal (13); a diode D1, a diode D2, a diode D3, a diode D4, a diode D5, and a diode D6, and six insulated gate bipolar transistors IGBT1, IGBT2, IGBT3, IGBT4, IGBT5, and IGBT6; The invention is characterized in that the capacitor C1 is connected between the first terminal (1) and the second terminal (2); The capacitor C2 is connected between the second terminal (2) and the third terminal (3); The capacitor C3 is connected between the third terminal (3) and the fourth terminal (4); The capacitor C4 is connected between the fifth terminal (5) and the seventh terminal (7); The capacitor C5 is connected between the seventh terminal (7) and the ninth terminal (9); The capacitor C6 is connected between the tenth terminal (10) and the twelfth terminal (12); The diode D1 is connected between the tenth terminal (10) and the eleventh terminal (11); The diode D2 is connected between the eleventh terminal (11) and the twelfth terminal (12); The diode D3 is connected between the fifth terminal (5) and the sixth terminal (6); The diode D4 is connected between the sixth terminal (6) and the seventh terminal (7); The diode D5 is connected between the seventh terminal (7) and the eighth terminal (8); The diode D6 is connected between the eighth terminal (8) and the ninth terminal (9); The collector of the insulated gate bipolar transistor IGBT1 is connected to the first terminal (1), and the emitter of the insulated gate bipolar transistor IGBT1 is connected to the fifth terminal (5); The collector of the insulated gate bipolar transistor IGBT2 is connected to the fifth terminal (5), and the emitter of the insulated gate bipolar transistor IGBT2 is connected to the tenth terminal (10); The collector of the insulated gate bipolar transistor IGBT3 is connected to the tenth terminal (10), and the emitter of the insulated gate bipolar transistor IGBT3 is connected to the thirteenth terminal (13); The collector of the insulated gate bipolar transistor IGBT4 is connected to the thirteenth terminal (13), and the emitter of the insulated gate bipolar transistor IGBT4 is connected to the twelfth terminal (12); The collector of the insulated gate bipolar transistor IGBT5 is connected to the twelfth terminal (12), and the emitter of the insulated gate bipolar transistor IGBT5 is connected to the ninth terminal (9); The collector of the insulated gate bipolar transistor IGBT6 is connected to the ninth terminal (9), and the emitter of the insulated gate bipolar transistor IGBT6 is connected to the fourth terminal (4).

2. A self-equalizing four-level voltage source converter according to claim 1, characterized in that ,Each insulated gate bipolar transistor can also be replaced by an integrated gate-commutated thyristor, a gate turn-off thyristor, a power transistor and a power field effect transistor.

3. According to the self-balanced four-level voltage source type converter according to claim 1 or 2, the present invention provides a control method for the self-balanced four-level voltage source type converter. It is characterized in that: The switching states of the insulated gate bipolar transistors IGBT1, IGBT2, IGBT3 and IGBT4, IGBT5, IGBT6 are complementary and are used to control the self-equalizing four-level conversion device to operate in the following eight operating modes. First operating mode: The insulated gate bipolar transistors IGBT1, IGBT2, IGBT3 are turned off, and the circuit outputs -1Vdc. Here, Vdc represents the power supply voltage, Uc1 represents the voltage of capacitor C1, Uc2 represents the voltage of capacitor C2, Uc3 represents the voltage of capacitor C3, and so on. If Uc6 < Uc5 < Uc3, C3, C5, C6 are voltage-equalized in parallel through diodes D1, D5. Second operating mode: The insulated gate bipolar transistor IGBT3 is turned on, and IGBT1, IGBT2 are turned off. The circuit outputs -1Vdc / 3. When the current flows out from the thirteenth terminal (13), C6 discharges. If Uc6 < Uc5 < Uc3, C3, C5, C6 are voltage-equalized in parallel through diodes D1, D5. Third operating mode: The insulated gate bipolar transistors IGBT1, IGBT3 are turned off, and IGBT2 is turned on. The circuit outputs -1Vdc / 3. When the current flows out from the thirteenth terminal (13), C4, C5 discharge, and C6 charges. If Uc4 + Uc5 < Uc2 + Uc3, C2, C3, C4, C5 are voltage-equalized in parallel through diode D3. When the current flows into the thirteenth terminal (13), C4, C5 charge, and C6 discharges. If Uc6 < Uc5, C5, C6 are voltage-equalized in parallel through diode D1. Fourth operating mode: The insulated gate bipolar transistors IGBT2, IGBT3 are turned off, and IGBT1 is turned on. The circuit outputs -1Vdc / 3. When the current flows out from the thirteenth terminal (13), C4, C5 charge. When the current flows into the thirteenth terminal (13), C4, C5 discharge. If Uc4 + Uc5 < Uc1 + Uc2, C1, C2, C4, C5 are voltage-equalized in parallel through diode D6. Fifth operating mode: The insulated gate bipolar transistors IGBT2, IGBT3 are turned on, and IGBT1 is turned off. The circuit outputs 1Vdc / 3. When the current flows out from the thirteenth terminal (13), C4, C5 discharge. If Uc4 + Uc5 < Uc2 + Uc3, C2, C3, C4, C5 are voltage-equalized in parallel through diode D3. When the current flows into the thirteenth terminal (13), C4, C5 charge. Sixth operating mode: The insulated gate bipolar transistors IGBT1, IGBT2 are turned on, and IGBT3 is turned off. The circuit outputs 1Vdc / 3. When the current flows out from the thirteenth terminal (13), C6 charges. When the current flows into the thirteenth terminal (13), C6 discharges. If Uc6 < Uc4 < Uc1, C1, C4, C6 are voltage-equalized in parallel through diodes D2, D4. The seventh working mode: When IGBT1 and IGBT3 of the insulated gate bipolar transistor are turned on and IGBT2 is turned off, and the circuit outputs 1Vdc / 3, when the current flows out from the thirteenth terminal (13), C4 and C5 are charged and C1 is discharged. When Uc6 < Uc5, C5 and C6 are voltage-equalized in parallel through the diode D1; when the current flows into the thirteenth terminal (13), C4 and C5 are discharged and C6 is charged. When Uc4 + Uc5 < Uc1 + Uc2, C1, C2, C4, and C5 are voltage-equalized in parallel through the diode D6; The eighth working mode: When IGBT1, IGBT2, and IGBT3 of the insulated gate bipolar transistor are turned on and the circuit outputs 1Vdc, if Uc6 < Uc4 < Uc1, C1, C4, and C6 are voltage-equalized in parallel through the diodes D2 and D4.

4. According to the control method of the self-equalizing four-level voltage source converter device of claim 3, a self-equalizing method is proposed. It is characterized in that: The control signals of the control unit include a sinusoidal modulation wave and three triangular carrier waves with the same frequency and amplitude, namely triangular carrier wave A, triangular carrier wave B, and triangular carrier wave C. The control unit uses the comparison results of the values of the sinusoidal modulation wave and the values of the triangular carrier waves A, B, and C at the same moment as the drive signals of IGBT1, IGBT2, and IGBT3. When the values of the sinusoidal modulation wave are all greater than the values of the triangular carrier waves A, B, and C, it outputs 1Vdc; the comparison results at the same moment are used as the drive signals of the insulated gate bipolar transistors IGBT1, IGBT2, and IGBT3; When the values of the sinusoidal modulation wave are all less than the values of the triangular carrier waves A, B, and C, the control unit outputs 0Vdc; the comparison results at the same moment are used as the drive signals of the insulated gate bipolar transistors IGBT1, IGBT2, and IGBT3; When the value of the sinusoidal modulation wave is less than the value of the triangular carrier wave A but greater than the value of the triangular carrier wave B, the control unit outputs 1Vdc / 3 and directly outputs the fifth working mode to control IGBT1, IGBT2, and IGBT3; When the value of the sinusoidal modulation wave is less than the value of the triangular carrier wave B but greater than the value of the triangular carrier wave C, the control unit outputs -1Vdc / 3 and directly outputs the fourth working mode to control IGBT1, IGBT2, and IGBT3.