Method and apparatus for protecting receiver circuits from large sudden interference signals

Abstract

A method and apparatus for protecting a receiver circuit from damage from an interfering signal. The apparatus comprises: a digital step attenuator (DSA) configured to: attenuate a received signal; an overvoltage detector configured to detect a peak value of a received signal at an input of the receiver circuit and activate an overvoltage detection signal if the peak value of the received signal exceeds a detection threshold; and a digital control block configured to transmit a control code to the DSA to control an attenuation step size of the DSA. The digital control block, in response to the overvoltage detector asserting the overvoltage detection signal, sends a control code to set an attenuation step size of the DSA at a pre-configured attenuation step size. The pre-configured attenuation step size is set to a level capable of protecting the receiver circuit from interference signals.

Description

Background Art

[0001] Modern base station receivers include front-end radio frequency (RF) components and back-end transceiver integrated circuits (ICs), which are typically designed in advanced complementary metal oxide semiconductor (CMOS) process nodes. The very small devices used in these advanced process nodes are vulnerable to damage caused by signals with large voltage swings. The large voltage swings on these small devices can cause physical damage to the integrated circuits. Base station receivers may be subject to sudden high-power blocking or interference signals. These blocking or interference signals may cause damage to unprotected receiver (RX) circuits in the transceiver. These large sudden signals may cause damage faster than traditional automatic gain control (AGC) systems can respond (typically a few microseconds). Therefore, traditional AGC systems cannot be relied upon to protect sensitive transceivers from these large, rapidly occurring interference signals. Although RF sensors and clamping mechanisms can be used to protect sensitive transceiver RX paths from damage, good solutions are still needed to release the clamping mechanism to restore normal receiver operation once the strong blocking condition disappears.

[0002] Historically, diode clamps have been used to protect against sudden high-power signals. Back-to-back diodes can be used to prevent voltage swings beyond the signal level set by the diode junction voltage. Higher voltages can be achieved by stacking diodes in series. The disadvantage of this solution is that forward-biased diodes are quite nonlinear. Modern base station receivers require very high linearity and may not tolerate the nonlinearity of a diode clamp. Diodes also add capacitance to the signal path, which can limit the frequency range of the receiver circuit.

[0003] Alternatively, signal detectors have been used with RF clamps and timers. Peak voltage detectors can be used to detect large signals that exceed the safe operating area of ​​the device. When the signal level is detected to exceed a predetermined threshold, the clamping mechanism is driven to limit the signal applied to the transceiver RX signal path. However, after clamping, either due to changes in node impedance or due to clamping (especially if the peak detector is after the clamping mechanism), the peak detector can no longer accurately detect the signal level. Therefore, under the assumption that the strong interfering signal will have a limited duration, a timer is used to release the clamping mechanism. However, since the interfering signal dynamics are unknown, releasing the clamping mechanism based on a timer may result in cyclic clamp-release behavior, which can disrupt signal reception and unnecessarily expose the receiver to multiple short bursts of strong blocking signals.

[0004] Alternatively, the transceiver circuits can be designed at less aggressive process nodes that are more robust to large signal swings without causing damage to the circuits. However, these process nodes are not conducive to meeting the requirements of very large-scale integration of complex analog and digital circuits for competitive transceiver ICs. The transistor speeds in these process nodes do not allow the use of high-speed circuits required for modern cellular base station transceivers. A possible workaround for this problem may be to co-package RF circuits manufactured on a more robust process node with digital content manufactured with higher density, leading-edge process technology. However, this increases the logistical overhead for manufacturing, testing, and packaging of the devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0005] Some examples of apparatus and / or methods will be described below, by way of example only, and with reference to the accompanying drawings, in which:

[0006] Figure 1 An example conventional receiver including an automatic gain control (AGC) system is shown;

[0007] Figure 2 is a block diagram of an example receiver including fast attenuation for protecting receiver circuitry from large sudden interfering signals;

[0008] Figure 3 is an example sampling timing diagram of a control system transition;

[0009] Figure 4 is a block diagram of an example receiver including fast attenuation for protecting receiver circuitry from large sudden interfering signals;

[0010] Figure 5 is a flow chart of a method for fast attenuation for protecting a receiver circuit from interference signals;

[0011] Figure 6 An example apparatus for protecting a receiver circuit from an interfering signal is shown;

[0012] Figure 7 illustrates a user device in which the examples disclosed herein may be implemented; and

[0013] Figure 8 A base station or infrastructure equipment radio head is shown in which the examples disclosed herein may be implemented. DETAILED DESCRIPTION

[0014] Various examples will now be described more fully with reference to the accompanying drawings, which show some examples. In the drawings, the thickness of lines, layers and / or regions may be exaggerated for clarity.

[0015] Therefore, although other examples can have various modifications and alternative forms, some specific examples thereof are shown in the figures and will be described in detail later. However, this detailed description does not limit other examples to the specific forms described. Other examples may cover all modifications, equivalents and substitutions that fall within the scope of the present disclosure. Throughout the description of the accompanying drawings, the same numbers refer to the same or similar elements, which can be implemented in the same manner or in modified form (when compared to each other) while providing the same or similar functions.

[0016] It should be understood that when an element is referred to as being "connected" or "coupled" to another element, the element may be directly connected or coupled, or connected or coupled via one or more intervening elements. If two elements A and B are combined using "or", this should be understood to disclose all possible combinations (i.e., only A, only B, and A and B). An alternative wording for the same combination is "at least one of A and B". The same applies to combinations of more than two elements.

[0017] The terms used herein to describe specific examples are not intended to limit other examples. Whenever the singular is used (e.g., "a", "an", and "the"), and only using a single element is neither explicitly nor implicitly defined as mandatory, other examples may also use plural elements to implement the same function. Similarly, when a function is subsequently described as being implemented using multiple elements, other examples may use a single element or processing entity to implement the same function. It will also be understood that the terms "comprise", "comprising", "include", and / or "including" indicate the presence of the claimed features, integers, steps, operations, processes, actions, elements, and / or components when used, but do not exclude the presence or addition of one or more other features, integers, steps, operations, processes, actions, elements, components, and / or any groups thereof.

[0018] Unless otherwise defined, all terms (including technical and scientific terms) are used herein according to the ordinary meaning of the art to which their examples belong.

[0019] This article will disclose an example of the following operation: in response to a sudden strong interference signal (blocking signal), temporarily take over (override) the AGC system to protect the receiver (RX) circuit from damage. Then, the system allows a smooth transition back to the system AGC loop. The example mechanism disclosed herein allows the protection of sensitive RX circuits to be quickly activated and smoothly exits the protection state to minimize the performance impact on the receiver system. The example scheme disclosed herein utilizes a fast-reacting overvoltage signal detector (amplitude / power detector), a small logic control module, and a step-length attenuation module to rapidly respond to exposure to a fast large signal at the transceiver RX input by autonomously and asynchronously combining a large attenuation step, and then after the AGC system has enough time to adjust the requested attenuation to match the interference signal level, the control of the step-length attenuation is handed over to the AGC system, thereby seamlessly recovering from the large step length.

[0020] The scheme provides a robust and autonomous solution to ensure the reliability of the transceiver circuit even in the presence of sudden strong blocking signals. The solution allows the transceiver circuit to be designed monolithically on more aggressive process nodes that are more conducive to high integration levels but less robust to strong analog / RF signals, thereby achieving a potentially more cost-effective and power-efficient solution.

[0021] Figure 1 An example conventional receiver 100 including an automatic gain control (AGC) system is shown. As an example, the receiver 100 may be included in a base station transceiver IC. The receiver 100 may include a digital step attenuator (DSA) 110 (i.e., a digitally controlled analog step attenuator), a low noise amplifier (LNA) 120, an analog-to-digital converter (ADC) 130, and an AGC controller 140. The receiver 100 may also include a buffer amplifier (not shown) before and / or after the LNA 120.

[0022] The received signal 102 may be attenuated by a DSA 110. A DSA is a device for applying a controlled amount of attenuation to a received signal. The attenuation is typically digitally controlled in binary steps. Unlike a continuously variable attenuator, a DSA switches between discrete, finite attenuation states to achieve different attenuation states.

[0023] After being attenuated by the DSA 110 or passing through the DSA 110 without attenuation, the received signal is amplified by the LNA 120 and then converted into digital data by the ADC 130. The signal level of the received signal is controlled by the AGC control loop. The signal detector 135 detects the signal level of the received signal based on the output of the ADC 130 in the digital domain, and the AGC controller 140 sends a DSA control code 142 to the DSA 110 based on the detected signal level to adjust the level of the received signal at an appropriate level in the analog domain.

[0024] In normal AGC operation, the DSA 110 is used to appropriately adjust the signal levels presented to the LNA 120 and the ADC 130 so that the ADC 130 can operate within its allowable signal range. The ADC has an available dynamic range defined by its noise floor and maximum or full-scale (FS) input. The ADC will have a linear operating region in which the distortion products caused by circuit nonlinearity are low enough so as not to hinder the specified ADC performance. The AGC system is designed to ensure that the ADC input signal resides within the linear operating range of the ADC. The AGC system typically involves a signal level threshold (AGC threshold) above which attenuation will be combined to reduce the signal swing at the input of the ADC 130. If AGC attenuation is applied in the system, there is also a signal threshold for detecting when to remove the attenuation from the system to allow the desired signal to be presented to the ADC 130 at a more optimized signal level. The AGC system works to keep the signal level at the ADC input within a predefined upper and lower thresholds.

[0025] The control loop for an RX AGC system (e.g., in a base station) has reaction and settling time requirements set by system parameters. However, when the AGC system is presented with a sudden large blocking signal, it is usually too slow to prevent damage to sensitive ICs. The DSA 110 is typically designed using passive structures that can be designed to be robust to very large signal swings. In contrast, active circuits (e.g., LNAs or buffer amplifiers) are typically more susceptible to damage from large signal swings and need to be protected from large signal swings to avoid physical damage to the circuits.

[0026] Base station receivers may be exposed to sudden, extremely strong signals that may have sufficient signal power to potentially damage sensitive receiver circuitry (e.g., LNA) if the receiver is configured to operate at or near full gain conditions. These strong interfering signals (e.g., blocking signals) may manifest rapidly and may cause damage to the circuitry before the normal AGC loop has the ability to respond and adjust the DSA based on the strong signal.

[0027] The example scheme disclosed herein introduces a mechanism that responds quickly to sudden interfering signals (eg, blocking signals) by autonomously adding attenuation in the signal path without fighting with the AGC control loop, thereby preventing circuit damage.

[0028] Figure 6 An example apparatus 600 for protecting a receiver circuit from interference signals is shown. The apparatus 600 may be included in a receiver (e.g., a base station receiver). The apparatus 600 includes a DSA 610, an overvoltage detector 620, and a digital control block 630. The apparatus 600 receives a signal 602. The received signal 602 may be an RF signal. The DSA 610 is configured to attenuate the received signal 602. The attenuation of the DSA 610 is controlled by a DSA code set by the digital control block 630. The DSA 610 is included in a receiving chain to attenuate the received signal 602 to an appropriate level so as not to overload the receiver circuit on the receiving chain. The received signal 602 is forwarded to a downstream receiver circuit (e.g., an LNA, an ADC, etc.) after being attenuated by the DSA 610 or passing through the DSA 610 without attenuation.

[0029] An overvoltage detector 620 is placed at the input of the receiver circuit. The overvoltage detector 620 is configured to detect an overvoltage condition on a received signal at the input of the receiver circuit. The overvoltage detector 620 can detect the amplitude of the power of the received signal at the input of the receiver circuit and activate an overvoltage detection signal 622 if the peak value (e.g., amplitude or power) of the received signal at the input of the receiver circuit exceeds a detection threshold. The detection threshold can be set several dB lower than the maximum allowable signal power that may cause damage to the receiver circuit.

[0030] The digital control block 630 is configured to send a control code 632 to the DSA 610 to control the attenuation step size of the DSA 610. In response to the overvoltage detector 620 making the overvoltage detection signal 622 valid, the digital control block 630 immediately sends a control code 632 to the DSA 610 to set the attenuation step size of the DSA 610 to a preconfigured attenuation step size. The preconfigured attenuation step size can be selected / configured to ensure that the receiver circuit operates without damage for any signal level up to the maximum specified level for the receiver circuit. The preconfigured attenuation step size of the DSA 610 can be set to a level that can protect the receiver circuit from interference signals (blocking signals). By setting the attenuation of the DSA 610 to a preconfigured step size, the received signal exceeding the detection threshold is immediately attenuated to below the preconfigured level for protecting the receiver circuit.

[0031] The receiver may implement automatic gain control for controlling the gain of a received signal. An AGC controller in the receiver may be configured to send a DSA step size setting to a digital control block 630 to control the attenuation step size of the DSA 610 based on the level of the received signal detected at the output of the receiver circuit. The digital control block 630 may be configured to maintain a preconfigured attenuation step size until a DSA step size setting requested by the AGC controller exceeds the preconfigured attenuation step size.

[0032] The digital control block 630 can be configured to: if the overvoltage detector 620 activates the overvoltage detection signal, activate the overthreshold signal 622 to the AGC controller, and maintain the overthreshold signal until the DSA step size setting requested by the AGC controller exceeds the preconfigured attenuation step size. Then, the AGC controller can use the preconfigured step size for AGC control during the period when the overthreshold signal is valid. After the AGC controller requests an attenuation that exceeds the preconfigured attenuation step size, the digital control block 630 deactivates the overthreshold signal, and the AGC controller reclaims control.

[0033] An overvoltage signal detector is placed at a vulnerable node in the signal path. When the peak signal exceeds a predetermined threshold at a vulnerable node in the signal path, the AGC control system is temporarily bypassed and a fixed attenuation step (with sufficient attenuation to prevent circuit damage) is quickly added to the signal path. In other words, the overvoltage control temporarily takes over the AGC system by adding a fixed attenuation step to the signal path. The AGC system is then informed of the overthreshold condition by a signal, which will request additional AGC attenuation. The digital control block monitors the amount of attenuation requested by the AGC control loop and maintains a fixed attenuation step until the attenuation requested by the AGC control loop exceeds the fixed attenuation step, at which point the overthreshold signal is cleared and the system AGC resumes full control of the requested system gain.

[0034] In some modern process nodes, the LNA input node can tolerate signal swings comparable to the specified maximum circuit supply rail without suffering damage. For example, in some modern process nodes, signal levels of approximately 1.4 Vpk (approximately +10 dBm in a 100 ohm system) can be allowed without suffering damage. The peak detection threshold can be set several dB below the maximum allowable signal power to ensure margin for levels that may cause damage. For example, a detection threshold of +5 dBm at the LNA input can be used. Regarding the step size of the DSA, if the system requirements specify that input signals up to +15 dBm are supported without damage with the receiver operating at full gain, a minimum of 5 dB of DSA attenuation will be required to protect the LNA, and some safety margin will preferably be desired. For example, a step size of 10 dB can be used.

[0035] The typical AGC threshold of the system will be well below the LNA circuit damage threshold. Signal levels exceeding the AGC threshold will overload the ADC, thereby blocking correct signal reception. Consider a receiver system in which the gain between the receiver input and the ADC input is 10dB and the ADC has a defined full-scale input of 0dBm. In the example of using an LNA protection threshold of +5dBm at the LNA input, this will correspond to a signal level that is 15dB greater than the allowable full-scale input of the ADC, so a sudden strong blocker will completely overload the ADC and destroy the signal integrity until the AGC loop can be properly adjusted to account for the signal level. The example scheme disclosed herein will respond quickly and autonomously to a sudden strong signal to protect the circuit from damage, and then allow a smooth transition back to the system AGC loop.

[0036] Figure 2 2 is a block diagram of an example receiver 200 including an overload protection gain control for protecting a receiver circuit from a large sudden interference signal. The receiver 200 may be integrated in a receiver chain of a transceiver IC (e.g., a base station transceiver). The receiver 200 may include a DSA 210 (i.e., a digitally controlled analog step attenuator), an LNA 220, an ADC 230, an AGC controller 240, an overvoltage detector 250, and a digital control block 260. The receiver 200 may also include a buffer amplifier (not shown) before and / or after the LNA 220, etc.

[0037] The received signal 202 may be attenuated by the DSA 210. The DSA 210 is a device for applying a controlled amount of attenuation to the received signal 202. The amount of attenuation is digitally controlled, for example, in binary steps. The received signal, after being attenuated by the DSA 210 or passing through the DSA 210 without attenuation, is amplified by the LNA 220 and then converted to digital by the ADC 230. The signal detector 235 detects the signal level of the received signal in the digital domain based on the output of the ADC 230, and the AGC controller 240 may send a DSA step size setting 242 to the digital control block 260 to adjust the level of the received signal based on the signal level at the output of the ADC 230. The AGC controller 240 may be a firmware routine running on a processor. Figure 2 The AGC loop shown is merely an example and may be implemented in different ways (eg, the AGC loop may be implemented based on a signal level detected at the input of the ADC, etc.).

[0038] For ease of explanation, Figure 2 Example signal levels and circuit parameters are included in . However, it should be noted that Figure 2The signal levels and circuit parameters shown are examples only, and different values / parameters may be used. In this example, a signal level of 0 dBm at the input of ADC 230 represents a full-scale input to ADC 230. LNA 220 may have a gain of 11 dB, and DSA 210 may have an insertion loss of 1 dB. Thus, a signal level of -10 dBm at the DSA input corresponds to a full-scale signal at the ADC input. The AGC threshold is set lower than the full-scale input at the ADC input to ensure that signal peaks due to modulation and signal fading, etc., do not exceed the ADC full-scale.

[0039] Base station manufacturers require that the receiver circuitry in the transceiver IC tolerate blocking signal levels up to a certain signal level (e.g., +15dBm or higher) at the transceiver IC receiver (RX) input pin. The DSA is designed to withstand high signal levels without damage and can provide enough attenuation to ensure that the LNA and ADC can still operate at or below the defined full scale. However, if a blocking signal suddenly appears when the DSA has little or no attenuation, the LNA or other delicate circuitry in the receive chain is exposed to dangerously high signal levels that could damage the circuitry.

[0040] In order to protect the RX circuit from sudden strong interference signals, in an example, a fast overvoltage detector 250 (e.g., a power or voltage detector) is placed at the input of the circuit to be protected (e.g., an input node of an LNA, a buffer, etc.). The overvoltage detector 250 detects the amplitude or power of the received signal at the input of the circuit to be protected. For example, the overvoltage detector 250 can convert the RF input signal into an output DC voltage proportional to the RF input power or amplitude. The overvoltage detector 250 is configured with a preconfigured threshold (detection threshold). The overvoltage detector 250 detects the peak level of the received signal at the input of the LNA 220 (or buffer, etc.), and if the peak value of the received signal exceeds the detection threshold, an overvoltage detection signal 252 to the digital control block 250 is enabled. For example, if the amplitude or square of the instantaneous RF input voltage exceeds the detection threshold, the overvoltage detector 250 can activate the overvoltage detection signal 252. The detection threshold can be set to be several dB lower than the signal level that may cause damage to the circuit (e.g., LNA circuit, etc.). When a signal level greater than this detection threshold is detected, the system will asynchronously and immediately force the DSA 210 to a preconfigured amount of attenuation (regardless of the DSA step size setting provided by the system AGC 240) to ensure that circuits (eg, LNA, etc.) are protected from damage.

[0041] The digital control block 260 controls the DSA based on the overvoltage detection signal 252 from the overvoltage detector 250 and the DSA step size setting 242 from the AGC controller 240. The inputs into the digital control block 260 include the output from the overvoltage detector 250 (i.e., the overvoltage detection signal 252), the DSA step size setting 242 from the AGC controller 240, and the preconfigured DSA step size setting (e.g., LNA_safe_DSA_step) to set the amount of the DSA step size in the event that a potentially harmful signal level is detected (i.e., when the overvoltage detection signal 252 is activated). The outputs from the digital control block 260 include: an overthreshold indication signal 262 for communicating that an overthreshold condition has occurred; and a DSA control code 264 (DSA_code) to the DSA 210 for setting the DSA attenuation level. The DSA control code 264 ranges from 0 to the maximum code, which maps to DSA values ​​from the maximum attenuation value to 0 dB with a specific step size. The threshold crossing indication signal 262 indicates to the AGC controller 240 a requirement for additional AGC attenuation.

[0042] When the amplitude or power of the received signal exceeds the overvoltage detection threshold, the overvoltage detector 250 activates an overvoltage detection signal 252 to the digital control block 260. The digital control block 260 then immediately sets the DSA attenuation to a preconfigured DSA step value (LNA_safe_DSA_step) and activates an overthreshold indication signal 262 (Overthreshold_signal) to the AGC controller 240. The preconfigured DSA step value (LNA_safe_DSA_step value) is selected to ensure that the LNA (or any other sensitive receiver circuit) will operate at that amount of DSA attenuation without damage for any signal level up to a maximum specified level (e.g., +15dBm).

[0043] The digital control block 260 may include simple combinational logic and latches configured to perform the functions of generating Overthreshold_signal and forcing DSA_code to LNA_safe_DSA_step when the overvoltage detector 250 signals an overvoltage condition, and returning the DSA step size value to the DSA step size setting from the AGC controller 240 once the conditions that the overvoltage condition no longer exists and the requested DSA step size is greater than LNA_safe_DSA_step are met. The digital control block 260 may be implemented as hardware logic to respond quickly enough to protect sensitive circuits. The AGC controller 240 may be implemented as a software control system or a hardware state machine. In either case, due to delays in the AGC controller 240, the AGC controller 240 will not be able to respond quickly enough to perform the functions of the digital control block 260.

[0044] The AGC controller 240 detects the overthreshold indication signal 262 and may send a request (i.e., DSA step setting 242) to the digital control block 260 to increment the DSA attenuation. The digital control block 260 will maintain the DSA attenuation set by the preconfigured DSA step value (LNA_safe_DSA_step) and will continue to hold the Overthreshold_signal high until the AGC controller 240 requests a DSA step setting greater than the preconfigured DSA step value (LNA_safe_DSA_step) and the overvoltage detector output has cleared (indicating that no potentially damaging signals are still present). At this point, the AGC controller 240 fully re-controls the DSA attenuator value and may adjust the system gain as needed for the given signal conditions. Although the overvoltage protection DSA step is not properly timed to the signal symbol interval, the DSA step will only occur when a potentially damaging signal level is applied to the receiver (in this case, the desired signal will be blocked anyway due to the blocker overloading the receiver path). The example scheme disclosed herein takes over system AGC control and quickly applies attenuation to prevent damage to the receiver circuitry, then provides a method for naturally transitioning gain control back to the system AGC control loop.

[0045] Figure 3 is an example sampling timing diagram for control system transitions. Figure 3The DSA control is shown transitioning from the system AGC loop to overvoltage protection operation and back to the system AGC loop. In this example, a +10dBm RF input signal 302 is suddenly applied to the receiver, and the system AGC control loop does not incorporate AGC attenuation in a period 310. The overvoltage detector 250 detects that the received signal level exceeds the detection threshold 304 (in this example, +4dBm) and activates the overvoltage detection signal 306. In response to the overvoltage detection signal 306, the digital control block 260 sets the attenuation step size of the DSA 210 to a preconfigured level (in this example, 15dB). As a result, the received signal level at the LNA input is immediately reduced. The digital control block 210 also activates the overthreshold indication signal 308 to the AGC controller 240. During this period 320 (overvoltage protection region), the digital control block 210 maintains the DSA attenuation level at a preconfigured level (in this example, 15 dB) until the DSA setting requested by the AGC control loop becomes greater than the preconfigured level. In this example, during this overvoltage protection region 320, when an overload condition is signaled to have occurred, the system AGC control loop uses a 6 dB step size. When the DSA setting requested by the AGC controller 240 becomes greater than the preconfigured attenuation level (in this example, when the DSA setting requested by the AGC controller becomes 18 dB based on the desired AGC threshold 305 (in this example, -13 dBm)), the digital control block 260 sets the DSA setting requested by the system AGC control loop and deactivates the overthreshold signal 308. In period 330 , the system is then again controlled by the AGC control loop and, in this example, with the desired AGC threshold set at −13 dBm at the RXLNA input, the system AGC continues to make gain adjustments until the desired threshold 305 is reached.

[0046] Figure 2 A scheme for protecting the LNA and ADC from sudden large jammers is shown. However, the scheme disclosed herein is not limited to protecting the LNA and ADC, but can be extended to protecting any sensitive circuit in a receiver. Figure 4 is a block diagram of an example receiver 400 including an overvoltage gain control for protecting receiver circuitry from large sudden interfering signals (blocking signals). Receiver 400 may be integrated in a receiver chain of a transceiver IC (eg, a base station transceiver).

[0047] Receiver 400 may include DSA 410, receiver circuit 420, AGC controller 440, overvoltage detector 450, and digital control block 460. Received signal 402 may be attenuated by DSA 410. The received signal is processed by receiver circuit 420 after being attenuated by DSA 410 or passing through DSA 410 without attenuation. Receiver 400 implements automatic gain control (AGC) of the received signal so that the level of the received signal is maintained at an appropriate level. Based on the signal level of the received signal detected by signal detector 435 in the digital domain, AGC controller 440 may send DSA step size setting 442 to digital control block 460 to adjust the level of the received signal via DSA 410.

[0048] An overvoltage detector 450 (e.g., a power or amplitude detector) is placed at the input of the receiver circuit 420. The overvoltage detector 450 detects the amplitude or power of the received signal at the input of the receiver circuit 420. The overvoltage detector 450 is configured with a preconfigured threshold (detection threshold). If the peak level of the received signal at the input of the receiver circuit 420 exceeds the detection threshold, the overvoltage detector 450 asserts an overvoltage detection signal 452 to the digital control block 450. The detection threshold can be set several dB lower than the signal level that may cause damage to the receiver circuit 420.

[0049] In response to the overvoltage detection signal 452, the digital control block 460 then immediately sets the DSA attenuation to the preconfigured DSA step value (RX_safe_DSA_step) and activates the overthreshold indication signal 462 (Overthreshold_signal) to the AGC controller 440. The preconfigured DSA step value (RX_safe_DSA_step value) is selected to ensure that the receiver circuit 420 will operate with that amount of DSA attenuation without damage for any signal level up to the maximum specified level.

[0050] The AGC controller 440 detects the overthreshold indication signal 462 and can send a request (i.e., DSA step setting 442) to the digital control block 460 to increment the DSA attenuation. The digital control block 460 will maintain the DSA attenuation set by the preconfigured DSA step value (RX_safe_DSA_step) and will continue to keep the Overthreshold_signal 462 high until the AGC controller 440 requests a DSA step value greater than the preconfigured DSA step value (RX_safe_DSA_step). At this point, the Overthreshold_signal 462 is released and the AGC controller 440 fully re-controls the DSA attenuator value and can adjust the system gain as required for given signal conditions. Although the overvoltage protection DSA step is not properly timed to the signal symbol interval, the DSA step will only occur when a potentially damaging signal level is applied to the receiver (in this case, the desired signal will be blocked anyway due to the blocking overloading the receiver path). The example scheme disclosed herein takes over system AGC control and quickly applies enough attenuation in the signal path to prevent damage to the receiver circuitry, and then provides a method for naturally transitioning gain control back to the system AGC control loop.

[0051] Figure 5 Flowchart of a method for automatic gain control for protecting a receiver circuit from interference signals. A receiver receives a signal (502). The receiver may be included in a base transceiver station. The received signal may be an RF signal. A peak value of the received signal is detected at an input of the receiver circuit (504). If the peak value of the received signal at the input of the receiver circuit exceeds a detection threshold, an overvoltage detection signal is asserted (506). In response to the overvoltage detection signal, a control code is sent to a DSA configured to attenuate the received signal, wherein the control code is set to a preconfigured attenuation step size for the DSA (508).

[0052] Automatic gain control (AGC) may be performed to control the attenuation step size of the DSA based on the level of the received signal at the output of the receiver circuit. A preconfigured attenuation step size may be maintained until the DSA step size setting requested by the AGC exceeds the preconfigured attenuation step size. Under the condition that the overvoltage detection signal is activated, an overthreshold signal may be activated, and the overthreshold signal is sent to the AGC. The overthreshold signal may be maintained until the DSA step size setting requested by the AGC exceeds the preconfigured attenuation step size. During the period when the overthreshold signal is valid, the AGC may use the preconfigured DSA step size.

[0053] The preconfigured attenuation step size can be set to a level that can protect the receiver circuit from the interference signal. The detection threshold can be set several dB below the maximum allowable signal power that may cause damage to the receiver circuit. The preconfigured attenuation step size can be selected to ensure that the receiver circuit operates without damage for any signal level up to the maximum specified level for the receiver circuit.

[0054] For more information about the device, please refer to Figure 1-Figure 5 Additional aspects of the method are described.

[0055] Figure 7 A user device 700 is shown in which examples disclosed herein may be implemented. For example, examples disclosed herein may be implemented in a radio front end module 715, a baseband module 710, etc. The user device 700 may be a mobile device in some aspects and include an application processor 705, a baseband processor 710 (also referred to as a baseband module), a radio front end module (RFEM) 715, a memory 720, a connection module 725, a near field communication (NFC) controller 730, an audio driver 735, a camera driver 740, a touch screen 745, a display driver 750, a sensor 755, a removable memory 760, a power management integrated circuit (PMIC) 765, and a smart battery 770.

[0056] In some aspects, the application processor 705 may include, for example, one or more CPU cores and one or more of the following: cache memory, a low dropout regulator (LDO), an interrupt controller, a serial interface (e.g., a serial peripheral interface (SPI), an integrated circuit bus (I2C), or a general programmable serial interface module), a real-time clock (RTC), a timer-counter (including an interval timer and a watchdog timer), a general input-output (IO), a memory card controller (e.g., a secure digital (SD) / multimedia card (MMC)), etc.), a universal serial bus (USB) interface, a mobile industry processor interface alliance (MIPI) interface, and a joint test access group (JTAG) test access port.

[0057] In some aspects, baseband module 710 may be implemented, for example, as a solder-in substrate including one or more integrated circuits, a single packaged integrated circuit soldered to a main circuit board, and / or a multi-chip module containing two or more integrated circuits.

[0058] Figure 8A base station or infrastructure equipment radio head 800 is shown in which examples disclosed herein may be implemented. For example, examples disclosed herein may be implemented in a radio front end module 815, a baseband module 810, etc. The base station radio head 800 may include one or more of the following: an application processor 805, a baseband module 810, one or more radio front end modules 815, a memory 820, a power management circuit 825, a power tee circuit 830, a network controller 835, a network interface connector 840, a satellite navigation receiver module 845, and a user interface 850.

[0059] In some aspects, the application processor 805 may include one or more CPU cores and one or more of the following: cache memory, a low dropout regulator (LDO), an interrupt controller, a serial interface (e.g., SPI, I2C, or a general programmable serial interface module), a real-time clock (RTC), a timer-counter (including an interval timer and a watchdog timer), general IO, a memory card controller (e.g., SD / MMC, etc.), a USB interface, a MIPI interface, and a Joint Test Access Group (JTAG) test access port.

[0060] In some aspects, baseband processor 810 may be implemented, for example, as a solder-in substrate including one or more integrated circuits, a single packaged integrated circuit soldered to a main circuit board, or a multi-chip module containing two or more integrated circuits.

[0061] In some aspects, the memory 820 may include one or more of the following: volatile memory (including dynamic random access memory (DRAM) and / or synchronous dynamic random access memory (SDRAM)) and non-volatile memory (NVM) (including high-speed electrically erasable memory (commonly referred to as flash memory), phase change random access memory (PRAM), magnetoresistive random access memory (MRAM) and / or three-dimensional cross-point memory). The memory 820 may be implemented as one or more of a solder-in packaged integrated circuit, a socketed memory module, and a plug-in memory card.

[0062] In some aspects, the power management integrated circuit 825 may include one or more of the following: a voltage regulator, a surge protector, a power alarm detection circuit, and one or more backup power supplies (e.g., a battery or capacitor). The power alarm detection circuit may detect one or more of a brownout (undervoltage) and a surge (overvoltage) condition.

[0063] In some aspects, the power tee circuit 830 can provide power drawn from the network cable to provide both power and a data connection to the base station radio head 800 using a single cable.

[0064] In some aspects, the network controller 835 can provide a connection to the network using a standard network interface protocol (e.g., Ethernet). The network connection can be provided using a physical connection (which is one of electrical (commonly referred to as a copper interconnect), optical, or wireless).

[0065] In some aspects, the satellite navigation receiver module 845 may include circuitry for receiving and decoding signals transmitted by one or more navigation satellite constellations (e.g., Global Positioning System (GPS), Globalnaya Navigatsionnaya Sputnikovaya Sistema (GLONASS), Galileo, and / or BeiDou). The receiver 845 may provide data to the application processor 805, which may include one or more of position data or time data. The application processor 805 may use the time data to synchronize operations with other radio base stations.

[0066] In some aspects, user interface 850 may include one or more of a physical or virtual button (eg, a reset button), one or more indicators (eg, a light emitting diode (LED)), and a display screen.

[0067] Another example is a computer program having a program code for performing at least one method described herein when the computer program is executed on a computer, a processor, or a programmable hardware component. Another example is a machine-readable storage including machine-readable instructions that, when executed, implement the method described herein or implement the apparatus described herein. Another example is a machine-readable medium including code that, when executed, causes a machine to perform any method described herein.

[0068] The examples described in this article can be summarized as follows:

[0069] An example (e.g., Example 1) relates to an apparatus for protecting a receiver circuit from an interference signal. The apparatus may include: a DSA configured to attenuate a received signal; an overvoltage detector configured to detect a peak value of the received signal at an input of a receiver circuit and activate an overvoltage detection signal if the peak value of the received signal exceeds a detection threshold; and a digital control block configured to send a control code to the DSA to control an attenuation step size of the DSA. The digital control block is configured to send a control code to set the attenuation step size of the DSA to a preconfigured attenuation step size in response to the overvoltage detector validating the overvoltage detection signal.

[0070] Another example (e.g., Example 2) relates to the previously described example (e.g., Example 1), wherein the device may also include: an AGC controller configured to: send a DSA step size setting to the digital control block to control the attenuation step size of the DSA based on the level of the received signal at the output of the receiver circuit.

[0071] Another example (eg, Example 3) relates to the previously described example (eg, Example 2), wherein the digital control block is configured to maintain the preconfigured attenuation step size until the DSA step size setting requested by the AGC controller exceeds the preconfigured attenuation step size.

[0072] Another example (e.g., Example 4) relates to the previously described example (e.g., Example 3), wherein the digital control block is configured to: if the overvoltage detection signal is activated, activate an over-threshold signal to the AGC controller, and maintain the over-threshold signal until the DSA step size setting requested by the AGC controller exceeds the preconfigured attenuation step size.

[0073] Another example (eg, Example 5) relates to the previously described example (eg, Example 4), wherein the AGC controller is configured to perform AGC control using a preconfigured step size during a period in which the over-threshold signal is valid.

[0074] Another example (e.g., Example 6) relates to the previously described examples (e.g., any of Examples 1-5), wherein the receiver circuit includes a low noise amplifier (LNA) and the overvoltage detector is configured to: detect a peak value of the received signal at the input of the LNA.

[0075] Another example (eg, Example 7) relates to a previously described example (eg, any one of Examples 1-6), wherein a preconfigured attenuation step size of the DSA is set to a level capable of protecting the receiver circuit from the interference signal.

[0076] Another example (eg, Example 8) relates to the previously described example (eg, any one of Examples 1-7), wherein the detection threshold is set several dB lower than a maximum allowable signal power that would cause damage to the receiver circuit.

[0077] Another example (e.g., Example 9) relates to the previously described examples (e.g., any of Examples 1-8), wherein the preconfigured attenuation step size is selected to ensure that the receiver circuit operates without damage for any signal level up to a maximum specified level for the receiver circuit.

[0078] Another example (eg, Example 10) relates to the previously described example (eg, any one of Examples 1-9), wherein the received signal is an RF signal.

[0079] Another example (eg, Example 11) relates to a base station transceiver chip comprising the apparatus of claim 1.

[0080] Another example (e.g., Example 12) relates to a method for automatic gain control for protecting a receiver circuit from interference signals. The method may include: receiving a signal; detecting a peak value of the received signal at an input of a receiver circuit; activating an overvoltage detection signal if the peak value of the received signal at the input of the receiver circuit exceeds a detection threshold; and sending a control code to a DSA configured to attenuate the received signal. The control code is a preconfigured attenuation step size set for the DSA in response to the overvoltage detection signal.

[0081] Another example (eg, Example 13) relates to the previously described example (eg, Example 12), the method may further include performing AGC to control an attenuation step size of the DSA based on a level of the received signal at the output of the receiver circuit.

[0082] Another example (eg, Example 14) relates to the previously described example (eg, Example 13), wherein the preconfigured attenuation step size is maintained until the AGC-requested DSA step size setting exceeds the preconfigured attenuation step size.

[0083] Another example (e.g., Example 15) relates to the previously described example (e.g., Example 14), and further includes: activating an over-threshold signal, which is sent to the AGC conditional on the overvoltage detection signal being activated, wherein the over-threshold signal is maintained until the DSA step size setting requested by the AGC exceeds the preconfigured attenuation step size.

[0084] Another example (eg, Example 16) relates to the previously described example (eg, Example 15), wherein the AGC uses a preconfigured step size during the period when the over-threshold signal is valid.

[0085] Another example (eg, Example 17) relates to the previously described examples (eg, any of Examples 12-16), wherein the preconfigured attenuation step size is set to a level capable of protecting the receiver circuit from the interference signal.

[0086] Another example (eg, Example 18) relates to the previously described examples (eg, any of Examples 12-17), wherein the detection threshold is set several dB lower than a maximum allowable signal power that would cause damage to the receiver circuit.

[0087] Another example (e.g., Example 19) relates to a previously described example (e.g., any of Examples 12-18), wherein the preconfigured attenuation step size is selected to ensure that the receiver circuit operates without damage for any signal level up to a maximum specified level for the receiver circuit.

[0088] Another example (eg, Example 20) relates to the previously described examples (eg, any one of Examples 12-19), wherein the received signal is an RF signal.

[0089] Aspects and features mentioned and described in conjunction with one or more of the previously detailed examples and figures may also be combined with one or more of the other examples, to replace similar features of the other examples, or to additionally introduce features into the other examples.

[0090] The example may further be or relate to a computer program having a program code for executing one or more of the above methods when the computer program is executed on a computer or processor. The steps, operations or processes of various above methods may be performed by a programmed computer or processor. The example may also include a program storage device (e.g., a digital data storage medium) that is readable by a machine, a processor or a computer and encodes a machine executable, processor executable or computer executable program of instructions. The instructions perform or cause some or all of the actions of the above methods to be performed. The program storage device may include or may be, for example, a digital memory, a magnetic storage medium (e.g., a disk and a tape), a hard drive or an optically readable digital data storage medium. Other examples may also include: a computer, a processor or a control unit that is programmed to perform the actions of the above methods; or a (field) programmable logic array ((F)PLA) or a (field) programmable gate array ((F)PGA) that is programmed to perform the actions of the above methods.

[0091] The description and drawings illustrate only the principles of the present disclosure. In addition, all examples described herein are in principle explicitly intended to be used for teaching purposes only, to help the reader understand the principles of the present disclosure and the concepts contributed by the inventors to further advance the art. All statements describing the principles, aspects and examples of the present disclosure, as well as their specific examples, are intended to cover their equivalents.

[0092] A functional block represented as "means for..." that performs a specific function may refer to a circuit configured to perform the specific function. Therefore, "means for something" may be implemented as "means configured or suitable for something" (e.g., a device or circuit configured or suitable for a corresponding task).

[0093] The functions of the various elements shown in the figure (including any functional blocks marked as "components", "components for providing sensor signals", "components for generating transmission signals", etc.) can be implemented in the form of dedicated hardware (e.g., "signal providers", "signal processing units", "processors", "controllers", etc.) and hardware capable of executing software in association with appropriate software. When provided by a processor, the functions can be provided by a single dedicated processor, a single shared processor, or multiple individual processors (some or all of which can be shared). However, the term "processor" or "controller" is far from being limited to hardware that is specifically capable of executing software, but can include digital signal processor (DSP) hardware, network processors, application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), read-only memories (ROMs), random access memories (RAMs), and non-volatile storage for storing software. Other hardware (traditional and / or customized) may also be included.

[0094] A block diagram may, for example, show a high-level circuit diagram that implements the principles of the present disclosure. Similarly, a flow chart, a flow diagram, a state transition diagram, a pseudocode, etc. may represent various processes, operations, or steps, which may, for example, be substantially represented in a computer-readable medium and thus executed by a computer or processor, whether or not such a computer or processor is explicitly shown. The methods disclosed in the specification or in the claims may be implemented by a device having components for performing each of the corresponding actions of these methods.

[0095] It should be understood that the disclosure of multiple actions, processes, operations, steps or functions disclosed in the specification or in the claims cannot be interpreted as being in a specific order unless otherwise explicitly or implicitly stated (e.g., for technical reasons). Therefore, unless these actions or functions are not interchangeable for technical reasons, the disclosure of multiple actions or functions does not limit them to a specific order. In addition, in some examples, a single action, function, process, operation or step may include or may be decomposed into multiple sub-actions, sub-functions, sub-processes, sub-operations or sub-steps, respectively. Unless explicitly excluded, such sub-actions may be included and are part of the disclosure of the single action.

[0096] In addition, the appended claims are hereby incorporated into the Detailed Description, wherein each claim may stand alone as a separate example. Although each claim may stand alone as a separate example, it should be noted that although a dependent claim may mention a specific combination with one or more other claims in the claims, other examples may also include a combination of a dependent claim with the subject matter of each other dependent or independent claim. Unless a statement is made that a specific combination is not intended, such a combination is explicitly proposed herein. In addition, it is intended that features of a claim also be included in any other independent claim, even if the claim is not directly dependent on the independent claim.

Claims

1. A device for protecting a receiver circuit from interference signals, comprising: A digital step attenuator (DSA) is configured to: attenuate a received signal; an overvoltage detector configured to: detect a peak value of the received signal at an input of a receiver circuit and activate an overvoltage detection signal if the peak value of the received signal exceeds a detection threshold; and a digital control block configured to: send a control code to the DSA to control the attenuation step size of the DSA, The digital control block is configured to: in response to the overvoltage detector validating the overvoltage detection signal, send a control code to set the attenuation step size of the DSA to a preconfigured attenuation step size.

2. The apparatus of claim 1, further comprising: An automatic gain control (AGC) controller is configured to send a DSA step size setting to the digital control block to control an attenuation step size of the DSA based on a level of the received signal at the output of the receiver circuit.

3. The device as claimed in claim 2, wherein: The digital control block is configured as: The preconfigured attenuation step size is maintained until the AGC controller requests a DSA step size setting that exceeds the preconfigured attenuation step size.

4. The device as claimed in claim 3, wherein: The digital control block is configured as: If the overvoltage detection signal is activated, an overthreshold signal to the AGC controller is activated and maintained until the DSA step size setting requested by the AGC controller exceeds the preconfigured attenuation step size.

5. The device according to claim 4, wherein: The AGC controller is configured to: During the period when the threshold-crossing signal is valid, AGC control is performed using a preconfigured step size.

6. The device according to any one of claims 1 to 5, wherein: The receiver circuit includes a low noise amplifier (LNA), and The overvoltage detector is configured to detect a peak value of the received signal at an input of the LNA.

7. The device according to any one of claims 1 to 6, wherein: The preconfigured attenuation step size of the DSA is set to a level capable of protecting the receiver circuit from the interference signal.

8. The device according to any one of claims 1 to 7, wherein: The detection threshold is set several dB below the maximum allowable signal power that would cause damage to the receiver circuitry.

9. The device according to any one of claims 1 to 8, wherein: The preconfigured attenuation step size is selected to ensure that the receiver circuit operates without impairment for any signal level up to a maximum specified level for the receiver circuit.

10. The device according to any one of claims 1 to 9, wherein: The received signal is a radio frequency (RF) signal.

11. A base station transceiver chip, comprising the device according to any one of claims 1 to 10.

12. A method for automatic gain control for protecting a receiver circuit from interference signals, comprising: receiving the signal; detecting a peak value of a received signal at an input of a receiver circuit; activating an overvoltage detection signal if a peak value of the received signal at the input of the receiver circuit exceeds a detection threshold; as well as A control code is sent to a digital step attenuator (DSA) configured to attenuate the received signal, wherein the control code is set for a preconfigured attenuation step size of the DSA in response to the overvoltage detection signal.

13. The method of claim 12, further comprising: Automatic gain control (AGC) is performed to control an attenuation step size of the DSA based on the level of the received signal at the output of the receiver circuit.

14. The method of claim 13, wherein: The preconfigured attenuation step size is maintained until the DSA step size setting requested by the AGC exceeds the preconfigured attenuation step size.

15. The method of claim 14, further comprising: An over-threshold signal is activated, the over-threshold signal being sent to the AGC conditional on the over-voltage detection signal being activated, wherein the over-threshold signal is maintained until the DSA step size setting requested by the AGC exceeds the preconfigured attenuation step size.

16. The method of claim 15, wherein: During the period when the over-threshold signal is valid, the AGC uses a preconfigured step size.

17. The method according to any one of claims 12 to 16, wherein: The preconfigured attenuation step size is set to a level capable of protecting the receiver circuit from the interference signal.

18. The method according to any one of claims 12 to 17, wherein: The detection threshold is set several dB below the maximum allowable signal power that would cause damage to the receiver circuitry.

19. The method according to any one of claims 12 to 18, wherein: The preconfigured attenuation step size is selected to ensure that the receiver circuit operates without impairment for any signal level up to a maximum specified level for the receiver circuit.

20. The method of any one of claims 12 to 19, wherein: The received signal is a radio frequency (RF) signal.

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