Operation method of storage controller, storage controller and storage system

Abstract

The invention provides an operation method of a storage controller, the storage controller and a storage system, relates to the technical field of storage, and aims to solve the problems that the time for searching and adjusting control parameters related to the signal quality of a bus of an NAND flash memory is long and the like. The method comprises the steps that in response to a training instruction received by a processor, multiple control parameter sets are generated randomly, the control parameter sets are used for adjusting the size of an eye pattern of signal transmission between a storage controller and a memory, the fitness of the control parameter sets is determined, the multiple control parameter sets are iteratively updated through a genetic algorithm till an iteration stopping condition is met, and the iteration stopping condition is executed. And after iteration is stopped, determining the control parameter group with the maximum fitness in the plurality of control parameter groups obtained by the last iteration update as a target control parameter group.

Description

Storage controller operation method, storage controller and storage system Technical Field

[0001] The present disclosure relates to the field of storage technology, and in particular to an operating method of a storage controller, a storage controller, and a storage system. Background Art

[0002] When external conditions change, such as ambient temperature, the reliability of data transmission on the NAND flash memory bus decreases, and the number of error bits may increase, affecting the read and write performance of the NAND flash memory.

[0003] Summary of the Invention

[0004] Embodiments of the present disclosure provide an operating method for a storage controller, which is used to improve problems such as a long time required to adjust control parameters related to signal quality of a NAND flash memory bus.

[0005] To achieve the above objectives, the embodiments of the present disclosure adopt the following technical solutions:

[0006] On the one hand, a method for operating a storage controller is provided, wherein the storage controller is coupled to a memory, and the storage controller includes a processor. The method includes: in response to the processor receiving a training instruction, randomly generating multiple control parameter groups, the control parameter groups including multiple control parameters, and the control parameter groups are used to adjust signal transmission between the storage controller and the memory; determining the fitness of the multiple control parameter groups, and iteratively updating the multiple control parameter groups using a genetic algorithm until an iteration stop condition is met, and after the iteration stops, determining the control parameter group with the largest fitness among the multiple control parameter groups obtained in the most recent iterative update as the target control parameter group.

[0007] The operating method provided by the embodiment of the present disclosure randomly generates multiple control parameter groups when the processor receives a training instruction. The control parameter groups include multiple control parameters. The control parameter groups are used to adjust the signal transmission between the storage controller and the memory, that is, to adjust the quality of the bus transmission signal. After generating multiple control parameter groups, the fitness of the multiple control parameter groups is evaluated, and the multiple control parameter groups are iteratively updated using a genetic algorithm. The fitness can characterize the ability of the control parameter group to solve problems. For example, in the embodiment of the present disclosure, the fitness can characterize the degree of quality of the control parameter group in adjusting the bus signal quality. When the iteration stop condition is not met, the multiple control parameter groups are repeatedly iteratively updated based on the genetic algorithm (such as selection, crossover and mutation) to generate new control parameter groups until the iteration stop condition is met. After the iteration stops, the control parameter group with the largest fitness among the multiple control parameter groups obtained in the most recent iterative update is determined as the target control parameter group, and the storage controller and the memory can be configured based on the control parameters in the target control parameter group to ensure the signal quality of the bus.

[0008] In some embodiments, determining the fitness of the control parameter group includes: configuring a storage controller and a memory based on the control parameter group; sending a read instruction to the memory, obtaining an eye diagram area when valid data is read from the memory, and determining the eye diagram area as the fitness of the control parameter group.

[0009] Eye diagrams can be used to evaluate the quality of transmission signals in digital communication systems. Fitness can characterize the degree of adaptability of the control parameter group to the environment. For the solution provided in the embodiment of the present disclosure, that is, the degree of quality of the signal quality of the adjusted bus, so the size of the eye diagram area can be used as the fitness of the control parameter group. When determining the fitness of the control parameter group, the method provided in the embodiment of the present disclosure uses the control parameter group to configure the storage controller and the memory. After the configuration is completed, a read instruction is sent to the memory to obtain the eye diagram area when valid data is read from the memory. The larger the eye diagram area, the higher the signal quality. Therefore, in the embodiment of the present disclosure, the eye diagram area is determined as the fitness of the control parameter group, which can better evaluate the effect of the control parameter group in adjusting the quality of the bus transmission signal.

[0010] In some embodiments, sending a read instruction to a memory, obtaining an eye diagram area when valid data is read from the memory, and determining the eye diagram area as the fitness of the control parameter group includes: repeatedly adjusting the phases of the rising edge and falling edge of the data selection signal DQs, and then sending a read instruction to the memory to determine the value range of the rising edge phase and the falling edge phase of DQs when the valid data is read; determining the eye diagram area enclosed by the value range of the rising edge phase and the falling edge phase of DQs when the valid data is read in the coordinate system as the fitness of the control parameter group, wherein the horizontal axis of the coordinate system is the phase of the rising edge of DQs, and the vertical axis of the coordinate system is the phase of the falling edge of DQs.

[0011] The data signal is sampled on the rising edge and falling edge of the data selection signal, and the phase of the rising edge and falling edge of the data selection signal is adjusted to find the phase range of the rising edge and falling edge of the data selection signal when valid data can be read. The area of ​​the eye diagram enclosed by the phase value range of the rising edge and falling edge of the data selection signal in the coordinate system is determined as the fitness of the control parameter group. Here, the size of the eye diagram area can be approximately considered as the product of the phase value range of the rising edge of the data selection signal that can effectively sample the data signal and the phase value range of the falling edge that can effectively sample the data signal. The larger the phase value range of the rising edge of the data selection signal that can effectively sample the data signal and the phase value range of the falling edge that can effectively sample the data signal, the larger the range of valid data can be read, the larger the eye diagram area, and the better the signal quality of the bus transmission.

[0012] In some embodiments, before determining the fitness of the control parameter group, the method further includes: removing the control parameter group that does not meet the preset requirements from the multiple control parameter groups.

[0013] The control parameter groups that do not meet the preset requirements include repeated control parameter groups or control parameter groups with conflicts or contradictions between multiple control parameters, etc. Since the above-mentioned multiple control parameter groups are randomly generated, the same control parameters may exist between different control parameter groups, so it is necessary to remove repeated control parameter groups; on the other hand, since the control parameter groups are randomly generated, different control parameter groups within the control parameter group may conflict or contradict each other. In one possible implementation, conflicting or contradictory control parameter groups can be pre-stored. After randomly generating multiple control parameter groups, the randomly generated control parameter groups can be matched with the pre-stored conflicting or contradictory control parameter groups. If the match is consistent, it indicates that the control parameter group does not meet the requirements and is removed.

[0014] In some embodiments, iteratively updating multiple control parameter groups using a genetic algorithm includes: selecting multiple control parameter groups to be crossed according to the fitness of the control parameter groups; and performing genetic crossover on any two control parameter groups among the multiple control parameter groups to be crossed using a genetic algorithm.

[0015] Selection and crossover are common operations in genetic algorithms. The selection operation selects the control parameter group with the highest fitness among multiple control parameter groups. The higher the fitness of a control parameter group, the greater the probability of selection. The selection operation can be implemented in various ways, such as roulette wheel selection. The multiple control parameter groups selected are also called control parameter groups to be crossed. A genetic algorithm is used to perform a genetic crossover on any two control parameter groups from the multiple control parameter groups to be crossed. The selection operation is used to select the best control parameter group from multiple control parameter groups, while the crossover operation is used to exchange some control parameters from multiple good control parameter groups to generate a new control parameter group.

[0016] In some embodiments, iteratively updating the multiple control parameter groups using a genetic algorithm further includes: performing genetic mutation on the crossover control parameter groups using a genetic algorithm.

[0017] In addition to selection and crossover, mutation is also a commonly used operation in genetic algorithms. Mutation can be combined with selection and crossover to improve the effectiveness of genetic algorithms, improve the search ability of genetic algorithms, and maintain the diversity of the population.

[0018] In some embodiments, selecting multiple control parameter groups to be crossed based on the fitness of the control parameter groups includes: determining the probability of each control parameter group being selected, the probability of being selected being the ratio of the fitness of the control parameter group to the sum of the fitness of all control parameter groups; setting a random number between 0 and 100%, and selecting the control parameter group whose probability of being selected is greater than the random number as the control parameter group to be crossed.

[0019] In some embodiments, using a genetic algorithm to perform genetic crossover on any two control parameter groups among multiple control parameter groups to be crossed includes: for any two control parameter groups to be crossed, randomly selecting a starting position and an exchange length, exchanging some control parameters of the two control parameter groups to be crossed, and generating a crossover control parameter group.

[0020] In some embodiments, using a genetic algorithm to genetically mutate the control parameter group after crossover includes: for any control parameter group after crossover, replacing a random control parameter in the control parameter group with any other value from the set of values ​​of the control parameter according to a set mutation probability. For example, the control parameter group includes a main control drive capability, and in this control parameter group, the main control drive capability is 75 Ω. The set of values ​​for the main control drive capability also includes possible values ​​such as 50 Ω, 30 Ω, 25 Ω, and 19 Ω. Mutation refers to replacing the value of 75 Ω with another value.

[0021] In some embodiments, the iteration stopping condition includes: the fitness of the control parameter group reaches a set value, or the total number of the screened control parameter groups reaches a first preset number, wherein the first preset number satisfies:

[0022] Where n is the first preset number, t is the calibration time length specified in the specification, l is the length of the transmission byte, v is the bus rate, k is the average number of times the phase of the rising edge and the phase of the falling edge of DQs are adjusted, and m is the number of channels of the memory.

[0023] In some embodiments, before randomly generating multiple control parameter groups, the method further includes: obtaining control parameters and a set of control parameter values, wherein the control parameter value set includes multiple values ​​of the control parameters; and encoding the control parameter value set.

[0024] Encoding is a prerequisite for genetic algorithms. It involves encoding sets of control parameter values, using various encoding methods, such as binary or real number encoding. For storage systems, these control parameters are immutable, so these sets of control parameter values ​​can be pre-encoded. When the processor receives training instructions, it randomly generates multiple control parameter groups based on the encoded sets of control parameter values.

[0025] In a second aspect, a storage controller is provided, which includes a processor and a flash memory interface circuit, the processor is connected to the flash memory interface circuit, and the flash memory interface circuit is used to couple with the memory; the processor is configured to randomly generate multiple control parameter groups in response to receiving a training instruction, and the control parameters are used to adjust the eye diagram size of the signal transmission between the storage controller and the memory; the processor is also configured to determine the fitness of the control parameter group; the processor is also configured to use a genetic algorithm to iteratively update the multiple control parameter groups until the iteration stop condition is met; the processor is also configured to determine the control parameter group with the largest fitness among the multiple control parameter groups obtained in the most recent iterative update as the target control parameter group after the iteration stops.

[0026] In some embodiments, the processor is further configured to configure the storage controller and memory based on the control parameter group; the processor is further configured to send a read instruction to the memory through the flash memory interface circuit, obtain the eye diagram area when valid data is read from the memory, and determine the eye diagram area as the fitness of the control parameter group.

[0027] In some embodiments, the processor is specifically configured to: repeatedly adjust the phase of the rising edge and the falling edge of the data selection signal DQs, and then send a read instruction to determine the value range of the phase of the rising edge and the phase of the falling edge of DQs that reads valid data; determine the eye diagram area enclosed by the value range of the phase of the rising edge and the phase of the falling edge of DQs that reads valid data in the coordinate system as the fitness of the control parameter group, where the horizontal axis of the coordinate system is the phase of the rising edge of DQs, and the vertical axis of the coordinate system is the phase of the falling edge of DQs.

[0028] In some embodiments, the processor is further configured to: before determining the fitness of the control parameter group, remove the control parameter group that does not meet the preset requirements from the multiple control parameter groups.

[0029] In some embodiments, the processor is specifically configured to: select multiple control parameter groups to be crossed according to the fitness of the control parameter groups; and perform genetic crossover on any two control parameter groups among the multiple control parameter groups to be crossed using a genetic algorithm.

[0030] In some embodiments, the processor is further specifically configured to: perform genetic mutation on the control parameter group after crossover using a genetic algorithm.

[0031] In some embodiments, the processor is specifically configured to: determine the probability of each control parameter group being selected, where the probability of selection is the ratio of the fitness of the control parameter group to the sum of the fitness of all control parameter groups; set a random number between 0 and 100%, and select the control parameter group whose probability of selection is greater than the random number as the control parameter group to be crossed.

[0032] In some embodiments, the processor is further specifically configured to: for any two control parameter groups to be crossed, randomly select a starting position and an interchange length, interchange some control parameters of the two control parameter groups to be crossed, and generate a crossed control parameter group.

[0033] In some embodiments, the processor is further specifically configured to: for any control parameter group after crossover, replace a random control parameter in the control parameter group with any other value in the value set of the control parameter according to a set mutation probability.

[0034] In some embodiments, the iteration stopping condition includes: the fitness of the control parameter group reaches a set value, or the total number of the screened control parameter groups reaches a first preset number, wherein the first preset number satisfies:

[0035] Where n is the first preset number, t is the calibration time length specified in the specification, l is the length of the transmission byte, v is the bus rate, k is the average number of times the phase of the rising edge and the phase of the falling edge of DQs are adjusted, and m is the number of channels of the memory.

[0036] In a third aspect, a storage system is provided, comprising: a memory, and a storage controller, wherein the storage controller is connected to the memory via a flash memory interface circuit; the storage controller is the storage controller provided by any embodiment of the second aspect.

[0037] In a fourth aspect, an electronic device is provided, comprising a host such as the storage system provided in the third aspect, wherein the host is connected to the storage system to write data to the storage system or read data stored in the storage system.

[0038] It can be understood that the beneficial effects that can be achieved by the storage controller, storage system and electronic device provided by the above embodiments of the present disclosure can refer to the beneficial effects of the operating method of the storage controller above, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] FIG1 is a schematic diagram of an electronic device provided in an embodiment of the present disclosure;

[0040] FIG2 is a schematic diagram of a storage system provided by an embodiment of the present disclosure;

[0041] FIG3 is a schematic diagram of another storage system provided by an embodiment of the present disclosure;

[0042] FIG4 is a schematic diagram of a storage controller provided in an embodiment of the present disclosure;

[0043] FIG5 is a schematic diagram of a connection between a storage controller and a memory according to an embodiment of the present disclosure;

[0044] FIG6 is a schematic flow chart of a method provided in an embodiment of the present disclosure;

[0045] FIG7 is a flow chart of another method provided by an embodiment of the present disclosure;

[0046] FIG8 is a schematic diagram of encoding control parameters according to an embodiment of the present disclosure;

[0047] FIG9 is a schematic diagram of a randomly generated control parameter group provided by an embodiment of the present disclosure;

[0048] FIG10 is a flow chart of another method provided by an embodiment of the present disclosure;

[0049] FIG11 is a flow chart of another method provided by an embodiment of the present disclosure;

[0050] FIG12 is a schematic diagram of determining an eye diagram area according to an embodiment of the present disclosure;

[0051] FIG13 is a flow chart of another method provided by an embodiment of the present disclosure;

[0052] FIG14 is a schematic diagram of a cross provided by an embodiment of the present disclosure;

[0053] FIG15 is a schematic diagram of a variation provided by an embodiment of the present disclosure. DETAILED DESCRIPTION

[0054] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in some embodiments of the present disclosure. Obviously, the embodiments described are only some embodiments of the present disclosure, not all embodiments. Based on the embodiments provided by the present disclosure, all other embodiments obtained by ordinary technicians in this field are within the scope of protection of the present disclosure.

[0055] An embodiment of the present disclosure provides an electronic device, which may be any one of a mobile phone, a desktop computer, a tablet computer, a laptop computer, a server, a vehicle-mounted device, a wearable device (such as a smart watch, a smart bracelet, smart glasses, etc.), a mobile power supply, a game console, a digital multimedia player, etc.

[0056] Referring to FIG. 1 , FIG. 1 shows a schematic diagram of an electronic device provided by an embodiment of the present disclosure, including a host 10 and a storage system 11. The host 10 is coupled to the storage system 11 to write data to the storage system 11 or read data stored in the storage system 11. The host is also referred to as a master device, and the storage system is also referred to as a slave device.

[0057] An electronic device may include one or more hosts 10 and one or more storage systems 11. The storage system can be accessed by different hosts. For example, in a mobile phone, the central processing unit (CPU), graphics processing unit (GPU), and digital signal processing (DSP) of the mobile phone can all serve as hosts to access the storage system.

[0058] The storage system 11 can be integrated into various types of storage devices, for example, it can be included in the same package (e.g., a universal flash storage (UFS) package or an embedded multi-media card (eMMC) package). Based on this, the storage system 11 can be applied to and packaged into different types of electronic products, such as mobile phones (e.g., cell phones), desktop computers, tablet computers, laptop computers, servers, in-vehicle devices, game consoles, printers, positioning devices, wearable devices, smart sensors, mobile power supplies, virtual reality (VR) devices, augmented reality (AR) devices, or any other suitable electronic devices having storage therein.

[0059] For example, referring to FIG2 , FIG2 shows a schematic diagram of a storage system 11 provided in an embodiment of the present disclosure. The storage system 11 includes a storage controller 110 and a memory 120. The storage controller 110 is also called a master controller. The storage controller 110 is coupled to the memory 120 to control the memory 120 to store data. The memory 120 can be a two-dimensional (2D) memory or a three-dimensional (3D) memory.

[0060] In some embodiments, the storage system 11 includes a storage controller 110 and one or more memories 120 , and the storage system 11 may be integrated into a memory card.

[0061] Memory cards include any one of a personal computer memory card international association (PCMCIA) card (abbreviated as PC card), a compact flash (CF) card, a smart media (SM) card, a memory stick, a multimedia card (MMC), a secure digital memory card (SD), and a UFS.

[0062] In other embodiments, referring to FIG. 3 , the storage system 11 includes a storage controller 110 and a plurality of memories 120 . The storage system 11 may be integrated into solid state drives (SSDs).

[0063] In some embodiments, the storage controller 110 is configured to operate in a low duty cycle environment, such as an SD card, a CF card, a universal serial bus (USB) flash drive, or other media used in electronic devices such as personal computers, digital cameras, and mobile phones.

[0064] In other embodiments, the storage controller 110 is configured to operate in a high duty cycle environment, such as SSDs or eMMCs, which are used for data storage in mobile devices such as smartphones, tablets, and laptops, as well as enterprise storage arrays.

[0065] In some embodiments, the storage controller 110 may be configured to manage data stored in the memory 120 and communicate with an external device (e.g., the host 10). In some embodiments, the storage controller 110 may also be configured to control operations of the memory 120, such as read, erase, and program operations. In some embodiments, the storage controller 110 may also be configured to manage various functions regarding data stored or to be stored in the memory 120, including at least one of bad block management, garbage collection (GC), logical to physical address translation, and wear leveling. In some embodiments, the storage controller 110 may also be configured to process error correction codes for data read from or written to the memory 120.

[0066] Of course, the storage controller 110 may also perform any other suitable functions, such as training the quality of bus transmission signals between the storage controller 110 and the memory 120 as provided in the embodiments of the present disclosure.

[0067] Illustratively, the memory 120 is configured to store data in a non-volatile manner, and a plurality of memories 120 can operate or work independently of each other.

[0068] 4 shows a schematic diagram of a storage controller 110 according to an embodiment of the present disclosure. The storage controller 110 may include a processor 111 , a cache 112 , an error correction code (ECC) circuit 113 , a host interface circuit 114 , and a flash memory interface circuit 115 .

[0069] The processor 111 can communicate with the host 10 through the host interface circuit 114 and perform logical operations to control the operation of the storage controller 110. For example, the processor 111 can load programming commands, data files or data structures in response to a request received from the host 10 or an external device, perform various operations or generate commands and addresses. For example, the processor 111 can generate various commands for performing programming operations, read operations, erase operations and parameter setting operations. In some possible examples, the processor 111 can generate commands without a request from the host 10. For example, the processor 111 can generate commands for background operations such as garbage collection for the memory 120, or the processor 111 can also generate commands for training the quality of bus transmission signals between the storage controller 110 and the memory 120.

[0070] The ECC circuit 113 may perform error detection and correction functions on read data read from the memory 120. For example, the ECC circuit 113 may generate parity bits for write data to be written to the memory 120, and the generated parity bits may be stored in the memory 120 together with the write data. When data is read from the memory 120, the ECC circuit 113 may correct errors in the read data using the parity bits read from the memory 120 together with the read data, and may output the error-corrected read data.

[0071] The host interface circuit 114 may transmit data or commands to the host 10, or receive data or commands from the host 10. For example, commands sent from the host 10 to the host interface circuit 114, data to be written to the memory 120, etc., and responses to commands sent from the host interface circuit 114 to the host 10, data to be read from the memory 120, etc. The host interface circuit 114 may also include a protocol for exchanging data between the host 10 and the memory controller 110. For example, the host interface circuit 114 can communicate with the host 10 through at least one of the following various interface protocols: universal serial bus (USB) protocol, Microsoft Management Console (MMC) protocol, peripheral component interconnect (PCI) protocol, PCI high-speed (PCI-E) protocol, advanced technology attachment (ATA) protocol, serial ATA protocol, parallel ATA protocol, small computer system interface (SCSI) protocol, enhanced minidisk interface (ESDI) protocol, integrated drive electronic (IDE) protocol, Firewire protocol, etc.

[0072] The flash memory interface circuit 115 can communicate with the memory 120 using a communication protocol under the control of the processor 111, including communication of commands, addresses, and data. The flash memory interface circuit 115 can send data to be written to the memory 120 or receive data to be read from the memory 120. The flash memory interface circuit 115 can be implemented to comply with standard protocols such as Toggle or Open NAND Flash Interface (ONFI). For example, using the ONFI protocol as an example, the storage controller 110 and the memory 120 can be connected via an ONFI bus.

[0073] Typically, an 8-bit bus is called a channel (CH). The memory system 11 may support multiple channels, and multiple memories 120 may be connected to the memory controller 110 via multiple channels CH1 to CHp.

[0074] 5 , NAND1_1 to NAND1_q may be connected to the memory controller 110 via channel CH1 , NAND2_1 to NAND2_q may be connected to the memory controller 110 via channel CH2 , . . . NANDp_1 to NANDp_q may be connected to the memory controller 110 via channel CHp, and so on.

[0075] For example, the memory controller 110 may be connected to at least one memory 120 via a plurality of control pins for transmitting control signals (e.g., a command latch enable (CLE) signal, an address latch enable (ALE) signal, a chip enable (CE) signal, a write enable (WE) signal, and a read enable (RE) signal). Furthermore, the memory controller 110 may be implemented to control the memory 120 using control signals. For example, the memory 120 may latch a command CMD or an address ADD at an edge of a WE signal based on a CLE signal and an ALE signal to perform a program operation, a read operation, or an erase operation. For example, the CE signal may be activated during a read operation, the CLE signal may be activated during a command transmission period, the ALE signal may be activated during an address transmission period, and the RE signal may be triggered during a period in which data is transmitted via a data signal DQ pin. The data strobe signal DQs may be triggered at a frequency corresponding to the data input / output speed, and read data may be sequentially transmitted in synchronization with the data strobe signal DQs.

[0076] However, the quality of signals transmitted on the bus may be affected by environmental factors. For example, temperature fluctuations may cause the quality of signals transmitted on the bus to degrade. For example, reading and writing across temperatures can result in a higher bit error rate (i.e., writing at high temperatures and reading at low temperatures, or writing at low temperatures and reading at high temperatures). This increased bit error rate may require rereading for error correction, affecting the read and write performance of the storage system. Temperature fluctuations can affect the performance of the storage system, for example, causing an increase in error bits in bus data transmission between the storage controller and the memory, which may even exceed the error correction limit of the ECC circuit 113 of the storage controller 110. When the hardware design is fixed, it is necessary to adjust relevant control parameters to improve signal quality. For example, the master drive capability, the particle drive capability, the voltage provided by the master, and the on-die termination (ODT) resistance of the particle are adjusted. For example, by adjusting these parameters and then testing the quality of signal transmission on the bus, the values ​​of each control parameter that produce the best signal quality during the multiple adjustments are found. In this way, the optimal values ​​of the control parameters can be determined, ensuring that the quality of the bus signal transmission between the storage controller and the memory is guaranteed when external conditions change.

[0077] However, there are many relevant control parameters that can adjust the signal quality, and each of these control parameters has a large range of values. If a global traversal method is used, it will take a long time to continuously train the signal quality when external conditions change to ensure the reliability of data transmission. Although this method can match the appropriate control parameters, the time cost required is relatively high.

[0078] To improve the above problems, an embodiment of the present disclosure provides an operating method of a storage controller, which determines the values ​​of relevant control parameters based on a genetic algorithm to adjust the quality of signals transmitted on a bus between the storage controller and the memory.

[0079] Drawing on biological evolution theory, genetic algorithms are stochastic global search and optimization methods developed by mimicking the evolutionary mechanisms of nature. According to this theory, in a constantly changing natural environment, individuals with strong adaptability are more likely to survive, while those that cannot adapt are gradually eliminated. Adaptable individuals pass on their genetic traits to their offspring through genetic mechanisms, and in the process of adapting to the environment, they mutate, evolving in ways that are beneficial to their environment. Genetic algorithms mimic this evolutionary mechanism, drawing on biological evolution to simulate the biological evolutionary process to find the optimal solution for the problem. They encode feasible solutions to the problem into chromosomes through a coding mechanism. New populations are generated through filtering using a fitness function and through operations similar to selection, crossover, and mutation in nature. This repeated evolutionary cycle gradually improves the fitness of individuals in the population until certain conditions are met and the optimal solution is achieved.

[0080] Before introducing the solutions provided by the embodiments of the present disclosure in detail, let us first briefly explain the terms related to genetic algorithms:

[0081] Chromosomes: Chromosomes can also be called individuals. A certain number of individuals form a group, which is also called a population. The number of individuals in a group is called the group size.

[0082] Gene: A gene is an element in a chromosome or individual that represents the characteristics of that individual. For example, if the individual S = (1, 0, 1, 1), then the four elements 1, 0, 1, and 1 are called genes.

[0083] Fitness: The degree to which each individual adapts to the environment is called fitness. In order to reflect the adaptability of the individual, a function that can measure each chromosome in the problem is introduced, called the fitness function. This function is usually used to calculate the probability of an individual being used in a group.

[0084] Illustratively, an embodiment of the present disclosure provides an operating method of a storage controller, wherein the storage controller is coupled to a memory. Referring to FIG6 , the method includes:

[0085] S210: In response to the processor receiving the training instruction, randomly generate multiple control parameter groups, where the control parameter groups include multiple control parameters, and the control parameter groups are used to adjust signal transmission between the storage controller and the memory.

[0086] After receiving the training instruction, the processor randomly generates multiple control parameter groups, which include multiple control parameters. These control parameter groups are used to adjust the signal transmission between the storage controller and the memory, that is, to adjust the quality of the signal transmission between the storage controller and the memory.

[0087] The training instructions here can be sent by the host or generated by the processor itself when the ECC circuit cannot perform error correction normally.

[0088] S230: Determine the fitness of the control parameter group.

[0089] Genetic algorithms use fitness to evaluate the degree of adaptation of individuals to the environment. In the embodiments of the present disclosure, fitness is used to evaluate the effect of the control parameter group on adjusting the quality of signal transmission between the storage controller and the memory. Exemplarily, the embodiments of the present disclosure can use the control parameters in the control parameter group to configure the storage controller and the memory, and obtain the eye diagram area size of the signal transmission between the storage controller and the memory after the configuration is completed. Since the eye diagram area size can be used to measure the quality of signal transmission, the embodiments of the present disclosure can use the eye diagram area size of the signal transmission signal between the storage controller and the memory configured with the control parameters in the control parameter group as the fitness of the control parameter group.

[0090] S250: Iteratively updating the multiple control parameter groups using a genetic algorithm until an iteration stop condition is met.

[0091] The genetic algorithm is used to iteratively update multiple randomly generated control parameter groups. The control parameter groups are screened using fitness, and the next generation of control parameter groups is obtained through genetic operations such as selection, crossover, and mutation. The control parameter groups obtained by genetic iteration are then screened using fitness, and the next generation of control parameter groups is obtained through genetic operations such as selection, crossover, and mutation. In this way, the control parameter groups are iteratively updated based on the genetic algorithm until the iteration stop condition is met.

[0092] S270: After the iteration stops, the control parameter group with the greatest fitness among the multiple control parameter groups obtained in the most recent iterative update is determined as the target control parameter group.

[0093] After the iteration stops, the control parameter group with the largest fitness among the multiple control parameter groups obtained in the most recent iterative update is determined as the target control parameter group. The largest fitness means that this control parameter group is the optimal solution to the problem. Configuring the storage controller and memory based on the control parameters in this target control parameter group can avoid the degradation of the signal quality transmitted between the storage controller and the memory.

[0094] The solution provided by the embodiments of the present disclosure utilizes a genetic algorithm to search for control parameters that can adjust the quality of bus transmission signals between a storage controller and a memory. The quality of bus transmission signals between a storage controller and a memory can be trained when environmental conditions change or when a training instruction is received, and the control parameters that can adjust the quality of bus transmission signals between the storage controller and the memory to the best are determined, thereby ensuring that the quality of bus transmission signals between the storage controller and the memory has good adaptability and can guarantee the quality of bus transmission signals between the storage controller and the memory under various environmental conditions.

[0095] Exemplarily, there are many parameters that can adjust the quality of bus transmission signals between the storage controller and the memory. With reference to FIG7 , before step S210, the method provided in the embodiment of the present disclosure further includes:

[0096] S201: Acquire control parameters and a set of control parameter values.

[0097] S202: Encode the value set of the control parameter.

[0098] Exemplarily, the control parameters are used to adjust the eye diagram size of signal transmission between the storage controller and the memory. The eye diagram size can be used to characterize the quality of the signal transmission between the storage controller and the memory. Exemplarily, the control parameters and their value sets can be obtained from the read-only memory or other storage space of the storage controller. In some other possible implementations, the relevant control parameters and their value sets can also be obtained from the host via a host interface circuit.

[0099] By way of example, the control parameters including the master drive capability, the particle drive capability, the voltage provided by the master, and the on-chip terminal resistance of the particle are taken as examples. These control parameters and their value sets are introduced below.

[0100] Exemplarily, each control parameter value set includes multiple values. For example, taking the main control driving capability as an example, the main control driving capability is a resistance value. Adjusting this control parameter is to adjust the main control driving voltage value. The larger the resistance value, the larger the voltage value. The main control driving capability includes the following possible values, as shown in Table 1:

[0101] Table 1

[0102] In conjunction with Table 1, for the control parameter of the main control driving capability, Table 1 shows a value set of this control parameter, such as 150Ω, 75Ω, etc. The elements in the value set of the control parameter are actual values ​​of the control parameter.

[0103] Particle drive capability. Adjusting this control parameter adjusts the main control drive voltage. The larger the resistance, the greater the voltage. Particle drive capability can take the following values: 18Ω, 25Ω, 37.5Ω, 50Ω, etc.

[0104] The voltage provided by the master, for example, see Table 2:

[0105] Table 2

[0106] The on-chip terminal resistance of the particle, for example, see Table 3:

[0107] Table 3

[0108] The above examples only illustrate possible values ​​of control parameters such as the master drive capability, particle drive capability, the voltage provided by the master, and the on-chip terminal resistance of the particle. These values ​​are not intended to limit these control parameters. In different application scenarios, the above control parameters may also include other values, or may also include other control parameters that can adjust signal transmission.

[0109] In one possible implementation, the value set of the control parameters can also be encoded for ease of processing and calculation. The encoding mechanism is a prerequisite for the genetic algorithm. The genetic algorithm does not directly search for the research object (such as the actual value of the control parameter mentioned in the above example), but first converts the research object into a gene string composed of corresponding symbols arranged in a certain order according to a certain encoding mechanism, that is, a chromosome individual. These encoded strings constitute a feasible solution to the problem. This conversion process is chromosome encoding and is the key to the genetic algorithm. The encoding mechanisms commonly used at present are binary encoding and real number encoding. The embodiments of the present disclosure are illustrated by real number encoding.

[0110] For example, in conjunction with Figure 8, for simplicity of explanation, the set of values ​​for the master drive capability is abbreviated as (a1, a2, a3, a4, a5, a6, a7, a8, a9), which correspond to the actual values ​​of the control parameters shown in Table 1. These values ​​are the actual values ​​of the master drive capability. The set of values ​​for the particle drive capability is represented as (b1, b2, b3, b4), which correspond to the actual values ​​of the particle drive capability shown in Table 2. Similarly, the set of values ​​for the voltage provided by the master is represented as (c1, c2, c3, c4); and the set of values ​​for the on-chip terminal resistance of the particle is represented as (d1, d2, d3, d4). The so-called real number coding means using real numbers to replace these possible control parameter values. For example, a1, a2, a3, a4, a5, a6, a7, a8, a9 are encoded as 1, 2, 3, 4, 5, 6, 7, 8, 9 respectively; b1, b2, b3, b4 are encoded as 10, 11, 12, 13 respectively; c1, c2, c3, c4 are encoded as 14, 15, 16, 17 respectively; d1, d2, d3, d4 are encoded as 18, 19, 20, 21 respectively.

[0111] After encoding, among the multiple real numbers 1 to 21, each number from 1 to 9 represents a possible value of the main control driving capability. These real numbers can be called the encoded value of the main control driving capability, which corresponds to the actual value of the main control driving capability. For example, the encoded value "3" of the main control driving capability corresponds to the actual value of the main control driving capability "75Ω"; each real number from 10 to 13 corresponds to the actual value of the control parameter of the particle driving capability; 14 to 17 correspond to the actual value of the control parameter of the voltage provided by the master control, and 18 to 21 correspond to the actual value of the control parameter of the on-chip terminal resistance of the particle.

[0112] The encoding method used in the above example is only one of multiple encoding methods. The operating method provided in the embodiment of the present disclosure may also adopt other encoding methods, such as two-dimensional array encoding.

[0113] Here, the values ​​of the control parameters can be referred to as the solution space of the problem. For example, the master drive capability is 150Ω. Encoding is the conversion from the solution space to the search space (or genetic space), or from the actual value to the encoded value. For example, in the embodiment of the present disclosure, the master drive capability is encoded as 2. Because genetic algorithms cannot directly process the parameters of the solution space, encoding is required to represent the problem to be solved as chromosomes or individuals in the search space, so that the optimal solution can be found in the search space.

[0114] For example, in the embodiments of the present disclosure, unless otherwise specified, the genetic algorithm processes the encoded values ​​of the control parameters. In response to receiving a training instruction, the processor randomly selects values ​​from the value set of the encoded control parameters to generate multiple control parameter groups. These control parameters are used to adjust the quality of signal transmission between the storage controller and the memory. Generally speaking, the quality of the bus transmission signal can be measured by the area size of the eye diagram. As mentioned in the above example, there are multiple parameters that affect the signal quality, such as the main control driving capability, the driving capability of the particle, the voltage provided by the main control, the on-chip terminal resistance of the particle, etc.

[0115] In response to receiving the training instruction, the processor randomly generates multiple control parameter groups. In conjunction with the multiple control parameters mentioned in the aforementioned example, referring to FIG9 , the master drive capability, the particle drive capability, the master voltage, and the particle on-chip terminal resistance are each selected from their possible value ranges to obtain a control parameter group. For example, if the master drive capability is 5, the particle drive capability is 12, the master voltage is 15, and the particle on-chip terminal resistance is 18, the resulting (5, 12, 15, 18) is recorded as a control parameter group.

[0116] Multiple control parameter groups are generated by randomly taking values ​​multiple times. For example, z control parameter groups can be obtained by randomly taking values, where z is a positive integer greater than 10, as shown in Table 4:

[0117] Table 4

[0118] Since the embodiments of the present disclosure are illustrated using the four control parameters of the master driving capability, the particle driving capability, the voltage provided by the master, and the on-chip terminal resistance of the particle as examples, the control parameter group (i.e., individual or chromosome) provided by the embodiments of the present disclosure includes four genes, wherein the first gene represents the master driving capability, with a value range of 1 to 9, the second gene represents the particle driving capability, with a value range of 10 to 13, the third gene represents the voltage provided by the master, with a value range of 14 to 17, and the fourth gene represents the on-chip terminal resistance of the particle, with a value range of 18 to 21.

[0119] Since each control parameter group is obtained by randomly selecting values, after determining multiple control parameter groups, there may be duplicate control parameter groups, which need to be removed. There may also be some control parameter groups that do not comply with the specification or protocol. Referring to FIG. 10 , after S210 and before S230, the method provided in this embodiment further includes:

[0120] S220: Remove the control parameter groups that do not meet the preset requirements from the multiple control parameter groups.

[0121] The control parameter groups that do not meet the preset requirements include repeated or redundant control parameter groups and control parameter groups in which multiple control parameters in the control parameter groups conflict. For example, in one possible implementation, multiple control parameter groups are randomly generated, but there may be control parameter groups that do not meet the requirements. For example, because multiple control parameter groups are randomly generated, repeated control parameter groups may appear. Alternatively, in some other possible implementations, the control parameter values ​​in some control parameter groups conflict or contradict each other. For example, taking the voltage provided by the main control (NVDDR3, 10%) and the on-chip terminal resistance of the particle (60Ω) as an example, if the NVDDR3 mode is selected to adjust the 10% reference voltage and the 60Ω resistance value, there is a conflict, which is a control parameter group that does not meet the requirements.

[0122] Exemplarily, in one possible implementation, multiple checklists may be pre-set, each of which includes a control parameter group that does not meet the requirements. After randomly generating multiple control parameter groups, the generated control parameter groups are compared with the control parameter groups that do not meet the requirements in the checklist. If they are consistent, the control parameter group is removed.

[0123] For example, after removing the control parameter groups that do not meet the requirements, the remaining control parameter groups serve as the initial population, and genetic iteration is performed based on the initial population. In one possible implementation, assuming that after removing the control parameter groups that do not meet the preset requirements, 20 control parameter groups remain, then these 20 control parameter groups can be used as the initial population, and the population size is 20. When the population size is small, the running speed of the genetic algorithm can be improved, but the diversity of individuals in the population is reduced, which may cause premature convergence of the genetic algorithm; when the population size is large, it is conducive to maintaining the diversity of individuals in the population, but it will affect individual competition and increase the amount of computation. Therefore, different population sizes should be determined for different practical problems, and the population size is usually 20 to 100.

[0124] The genetic algorithm uses fitness to evaluate individuals in a group. For example, after randomly generating multiple control parameter groups, it is necessary to calculate and determine the fitness of each control parameter group.

[0125] In an embodiment of the present disclosure, a control parameter group is used to regulate signal transmission between a storage controller and a memory, and an eye diagram is typically used to evaluate signal integrity and signal transmission quality in a digital communication system. Therefore, in an embodiment of the present application, the area of ​​the eye diagram can be used as the fitness of the control parameter group. An eye diagram is a visualization tool for measuring the signal quality of a digital communication system. In an embodiment of the present disclosure, to determine the fitness of a control parameter group, the storage controller and memory can be configured based on the control parameter group, and then the size of the eye diagram of the signal transmission between the configured storage controller and the memory can be obtained, and the size of the eye diagram area can be used as the fitness of the control parameter group.

[0126] For example, referring to FIG11 , in a possible implementation, when determining the fitness of the control parameter group, S230 includes the following sub-steps:

[0127] S230-1: Configure the storage controller and the memory based on the control parameter group.

[0128] S230-2: Send a read instruction to the memory, obtain the eye diagram area when valid data is read from the memory, and determine the eye diagram area as the fitness of the control parameter group.

[0129] As shown in Figure 4, the storage controller is connected to the memory through the flash memory interface circuit. The processor can configure the storage controller based on the control parameters in the control parameter group, such as configuring the master control driving capability, configuring the voltage provided by the master control, etc. It can also send instructions to the memory through the flash memory interface circuit to configure the memory, for example, configure the particle driving capability, configure the on-chip terminal resistance of the particle, etc.

[0130] However, the genetic algorithm operates on encoded data. For example, the master drive capability: 150Ω is encoded as 2 and cannot be used to configure the storage controller or memory. Therefore, before configuration, the encoded value of the control parameter group needs to be decoded to obtain the actual value of the control parameter group.

[0131] The decoding method of the coded value of the control parameter group corresponds to the encoding method. Usually, after the actual value of the control parameter is encoded, the correspondence between the actual value of the control parameter and the coded value can be saved. When decoding the coded value of the control parameter, based on the coded value of the control parameter and the correspondence between the actual value of the control parameter and the coded value, the actual value of the control parameter can be decoded. For example, decoding "2" in the control parameter group obtains "master drive capability: 150Ω".

[0132] Based on the actual values ​​of the control parameters obtained by decoding, the storage controller and the memory are configured, for example, the flash memory interface circuit of the storage controller is configured; and instructions including the control parameters are sent to the memory through the flash memory interface circuit to configure the memory.

[0133] After the storage controller and memory are configured, the storage controller sends a write instruction to the memory to write data into the memory.

[0134] After writing the data into the memory, the memory controller sends a read instruction to the memory, reads the data stored in the memory, and obtains the eye diagram area when valid data is read from the memory, and determines the eye diagram area as the fitness of the control parameter group.

[0135] For example, in one possible implementation, S230-2 includes:

[0136] S230-2-1: Repeat the process of adjusting the rising and falling phases of the data selection signal DQs, and then send a read instruction to the memory to determine the value range of the rising and falling phases of DQs for reading valid data.

[0137] After the configuration of the storage controller and memory is completed according to the actual values ​​of the control parameters in the control parameter group, the processor will send write commands and read commands. The write command is transmitted to the memory through the data signal (DQ) of the bus, and then the stored data in the memory is returned to the cache of the storage controller through the data signal (DQ) of the bus through the read command. The content of the written data and the content of the read data are then compared. If they are completely consistent, it means that valid data can be read and the control parameter group is valid. If the comparison is inconsistent, it means that valid data cannot be read and the control parameter group is invalid.

[0138] Since data is read at the rising and falling edges of the data strobe signal (DQs), the phase values ​​(0 to 180 degrees) of the rising and falling sampling edges of the data strobe signal (DQs) are adjusted to align them with the center position of the DQ, and the phase range of the rising and falling edges of the data strobe signal when valid data can be read is found, and the value range of the rising and falling edge phases of the data strobe signal DQs is recorded.

[0139] S230-2-2: The eye diagram area enclosed by the value range of the phase of the rising edge and the phase of the falling edge of DQs that read valid data in the coordinate system is determined as the fitness of the control parameter group, wherein the horizontal axis of the coordinate system is the phase of the rising edge of DQs, and the vertical axis of the coordinate system is the phase of the falling edge of DQs.

[0140] Referring to FIG. 12 , for example, the phase ranges of the rising and falling edges of the data strobe signal DQs can be plotted in a coordinate system, where the horizontal axis of the coordinate system can be the phase of the rising edge of DQs, and the vertical axis is the phase of the falling edge of DQs. By finding the valid phase intervals of the rising and falling edges of DQs, the sampling range for reading valid data can be obtained. The area of ​​the eye diagram formed by the phase ranges of the rising and falling edges of the data strobe signal in the coordinate system is determined as the fitness of the control parameter group. The size of the eye diagram area can be roughly considered to be the product of the phase ranges of the rising and falling edges of the data strobe signal that can effectively sample the data signal, and the phase ranges of the falling edges that can effectively sample the data signal. The larger the phase ranges of the rising and falling edges of the data strobe signal, the wider the range of valid data can be read, the larger the eye diagram area, and the better the signal quality of the bus transmission.

[0141] Imitating the process of reproduction, mating, and gene mutation of species in nature, genetic algorithms have three basic genetic operations: selection, crossover, and mutation. These genetic operations are usually performed under random conditions. Genetic operations are regarded as the core of genetic algorithms, which directly affect the optimization capabilities of genetic algorithms.

[0142] Exemplarily, based on FIG6 , referring to FIG13 , in S250 , the step of iteratively updating the multiple control parameter groups using a genetic algorithm includes:

[0143] S250-1: Determine whether an iteration termination condition is satisfied.

[0144] If the iteration termination condition is not satisfied, S250 - 2 is executed to iteratively update the multiple parameter groups based on the genetic algorithm. If the iteration termination condition is satisfied, S270 is executed.

[0145] S250-2: Select multiple control parameter groups to be crossed according to the fitness of the control parameter groups.

[0146] S250-3: Perform genetic crossover on any two control parameter groups among the multiple control parameter groups to be crossed using a genetic algorithm.

[0147] S250-4: Use genetic algorithm to perform genetic mutation on the control parameter group after crossover.

[0148] The selection operation is the process of selecting individuals with strong vitality from a group to produce a new group. The genetic algorithm uses the selection operator to perform the survival of the fittest operation on the individuals in the group, and makes selections based on the fitness of each individual. Individuals with high fitness have a greater probability of being inherited to the next generation group, and individuals with low fitness have a lower probability of being inherited to the next generation group. In this way, multiple genetic iterations can make the fitness of individuals in the group continuously approach the optimal solution.

[0149] The selection operation is based on the evaluation of individual fitness, which can improve global convergence and computational efficiency. The selection operation of the genetic algorithm is similar to the selection mechanism in nature, reflecting the evolutionary mechanism of "survival of the fittest and elimination of the unfit". The implementation method is: individuals with excellent "traits" have more chances of being selected to produce offspring, while individuals with poor "traits" have less chances of being selected. The "traits" here can be numerically quantified through fitness evaluation operations. Common selection methods include: roulette selection, sorting selection, etc. The embodiment of the present disclosure is illustrated by the roulette selection method. The roulette selection method is also called the fitness ratio method. All selections are made from the current population according to the individual's fitness value and according to the set rules to select the next generation of population.

[0150] For example, in a possible implementation, S250-2 includes:

[0151] S250-2-1: Determine the probability of each control parameter group being selected, where the probability of being selected is the ratio of the fitness of the control parameter group to the sum of the fitness of all control parameter groups.

[0152] For example, the roulette wheel selection method can be expressed as follows:

[0153] Among them, P i represents the probability of the i-th individual (referring to the control parameter group in the embodiment of the present disclosure) being selected, f i Represents the fitness value of the i-th individual, M is the size of the population. Obviously, the probability of being selected only reflects the proportion of the individual's fitness in the total fitness of the individuals in the entire group. The greater the individual's fitness, the higher the probability of being selected.

[0154] S250-2-2: Set a random number between 0 and 100%, and select the control parameter group with a probability of being selected greater than the random number as the control parameter group to be crossed.

[0155] For example, taking 10 control parameter groups as an example, assuming that the probabilities of control parameter groups 1 to 10 being selected are as shown in Table 5:

[0156] Table 5

[0157] If the selected random number is 60%, then the control parameter group with a selection probability greater than 60% will be selected. For example, combined with Table 6, control parameter group 1, control parameter group 3, control parameter group 6, and control parameter group 9 will be selected. The selected control parameter group will undergo the next genetic operation as the control parameter group to be crossed.

[0158] In the above example, the examples of the number of control parameter groups and the values ​​of the above random numbers are only for illustrative purposes of this solution, and are not limitations on this solution. The number of control parameter groups can also be other numbers, and the set random numbers can also be other random numbers.

[0159] The selected control parameter groups have higher fitness, indicating better adaptability to the environment. For this solution, this means that the bus signal quality between the memory controller and the memory corresponding to these control parameter groups is higher. The selected control parameter groups can then be used for the next genetic operation, such as a crossover operation.

[0160] Genetic algorithms use crossover to generate new individuals. Crossover, also known as recombination, involves exchanging some of the genes of two paired chromosomes in a certain way, thereby forming two new individuals. Crossover represents the exchange of information between individuals in the same population and is a key feature that distinguishes genetic algorithms from other evolutionary algorithms. It plays a key role in genetic algorithms and is the primary method for generating new individuals.

[0161] For example, in a possible implementation, S250-3 includes:

[0162] S250-3-1: For any two control parameter groups to be crossed, randomly select a starting position and an exchange length, and exchange some control parameters of the two control parameter groups to be crossed to generate a crossover control parameter group.

[0163] Crossover refers to the process of exchanging some of the genes of two paired chromosomes in some way, thereby forming two new individuals. Taking the control parameter groups provided in the embodiments of this disclosure as an example, each control parameter group includes four genes, or four encoding values, each corresponding to a control parameter. For example, if the second gene is randomly selected as the starting position and the exchange length is two genes, the control parameters of the two control parameter groups to be crossed are exchanged to obtain the crossover control parameter group.

[0164] For example, in conjunction with Figure 14, taking the intersection of control parameter group 1 and control parameter group 2 as an example, for example, control parameter group 1 is (5, 12, 15, 18), and control parameter group 2 is (2, 10, 17, 19), the starting position is randomly selected as the second gene, the exchange length is 2 genes, and some control parameters of control parameter group 1 and control parameter group 2 are exchanged, that is, the second gene of control parameter group 1 is replaced with the second gene of control parameter group 2, and the third gene of control parameter group 1 is replaced with the third gene of control parameter group 2 to obtain control parameter group 1'; at the same time, the gene of control parameter group 2 is also replaced with the second gene of control parameter group 1, and the third gene of control parameter group 2 is replaced with the third gene of control parameter group 1 to obtain control parameter group 2'. In this way, control parameter group 1 (5, 12, 15, 18) and control parameter group 2 (2, 10, 17, 19) are crossed to obtain: control parameter group 1' (5, 10, 17, 18) and control parameter group 2' (2, 12, 15, 19).

[0165] Exemplarily, any two of the control parameter groups to be crossed are paired, with each two serving as a group, and a crossover operation is performed on two control parameter groups to be crossed in a group of control parameter groups to obtain multiple new control parameter groups.

[0166] Crossover swaps some of the control parameters of two control parameter sets, forming two new control parameter sets. After the crossover or swapped control parameter sets, random mutation can also be performed. Mutation in a genetic algorithm involves replacing the gene value at a certain locus in an individual with a different allele at that locus, thereby creating a new individual. Combining mutation with selection and crossover can improve the effectiveness of genetic algorithms, enhance their search capabilities, and maintain population diversity.

[0167] For example, in a possible implementation, the above S250-4 includes:

[0168] S250-4-1: For any control parameter group after crossover, according to the set mutation probability, replace a random control parameter in the control parameter group with any other value in the value set of the control parameter.

[0169] A mutation operation refers to replacing the gene value at a certain locus of an individual with other alleles of the locus, thereby forming a new individual. For example, in the embodiments of the present disclosure, the control parameter group as an individual includes multiple genes, and each gene is actually a value of a control parameter. For example, in conjunction with Table 1, taking the control parameter of the main control driving ability as an example, the value set of the main control driving ability includes 9 possible values, and the corresponding real number encoding values ​​are 1 to 9. Assuming that in a certain control parameter group, the main control driving ability has a value of 1, then mutation refers to replacing 1 with any one of 2 to 9. If the encoding value of the main control driving ability is still 1 after the mutation, then it can be considered that no mutation has occurred.

[0170] For example, combining Table 4 and Figure 15, taking control parameter group 1 as an example, control parameter group 1 is (5, 12, 15, 18), then assuming that the first gene of the control parameter group mutates, the first gene represents the main control drive capability, and its encoding value range is 1 to 9, then the first gene 5 of control parameter group 1 can mutate to any value from 1 to 9 except 5. For example, control parameter group 1 (5, 12, 15, 18) can mutate to: (1, 12, 15, 18) or (3, 12, 15, 18) or (7, 12, 15, 18) and so on.

[0171] In addition, it should be noted that the mutation operation occurs randomly, the location of the mutation may be any gene in the control parameter group, and the probability of the gene mutation is also random. In other words, the mutation may or may not occur.

[0172] In one possible implementation, the probability of mutation can be given in advance. For example, the probability of mutation of the control parameter group after crossover can be set. When the probability of mutation is large, the possibility of mutation is large; when the probability of mutation is small, the possibility of mutation is small.

[0173] Selection, crossover, and mutation can generate a new generation of populations, that is, multiple new control parameter sets. Once a new population is generated, an update, or iteration, is completed. After generating a new generation of control parameter sets, the fitness of each of the multiple control parameter sets in the new generation is determined to determine whether they meet the iteration stopping criteria. If the conditions are not met, the iterative update continues, generating a new control parameter set and determining whether the new control parameter set meets the iteration stopping criteria. If so, the iteration stops.

[0174] Exemplarily, in a possible implementation, the iteration stopping condition may include: the fitness of the control parameter group reaches a set value.

[0175] As mentioned in the above example, fitness is the degree of adaptation of an individual to the environment. In the solution provided in the embodiment of the present disclosure, the fitness of the control parameter group is the eye diagram area of ​​the bus transmission signal between the storage controller and the memory corresponding to the control parameter group. The higher the fitness, the larger the eye diagram area of ​​the bus transmission signal, and the better the quality of the bus transmission signal. Therefore, when the fitness of that control parameter group reaches the set value, it means that the signal quality of the bus transmission corresponding to the control parameter group has reached a good level, and the iteration can be stopped.

[0176] In another possible implementation, the stopping condition of the iteration may further include: the total number of the screened control parameter groups reaches a first preset number, where the first preset number satisfies:

[0177] Where n is a first preset number, t is the calibration time length specified in the specification, l is the length of the transmission byte, v is the bus rate, k is the average number of times the phase of the rising edge and the phase of the falling edge of DQs are adjusted, and m is the number of channels of the memory (for example, in the embodiment of the present disclosure, the number of channels is 16).

[0178] For example, assuming that the bus transmission rate is 1600M / s and the bus transmits 4K bytes of instructions at a time, then the time required to transmit 4K bytes is: 4096 / 1600=2.56us (microseconds). The verification of a test data requires completing a write data operation and a read data operation, that is, the OFNI write and read commands need to be performed, so the verification time for a control parameter group is 2.56*2=5.12us. If the time length for calibrating the control parameters is specified to be 100 milliseconds (ms), that is, a maximum of 100 milliseconds can be consumed to search for the optimal control parameters for adjusting the quality of the bus transmission signal, and the average number of times the phase values ​​of the rising edge and the falling edge of DQs are searched is 256, then the total number of optimal control parameter groups screened at one time is: (100000 / (5.12*256))*16=76.3*16=1220, that is, using the 16 channels of the memory, a maximum of 1220 control parameter groups can be updated, iterated, or screened within 100 milliseconds, and the iteration is terminated when the total number of screened control parameter groups reaches 1220.

[0179] For example, in one possible implementation, the processor of the storage controller may include multiple cores. To speed up the entire search process, different steps may be assigned to different cores for processing. For example, randomly generating multiple control parameter groups, removing control parameter groups that do not meet preset requirements, determining the fitness of control parameter groups, genetic operations such as control parameter group selection, crossover, and mutation can all be assigned to different cores for execution, and different cores can communicate through queues. Taking a storage system supporting 16 channels as an example, the 16 channels can write and read data under the control of multiple cores. Therefore, in the above example, when calculating the first preset number, the number of control parameter groups that a single channel can complete screening within a specified time is multiplied by the number of channels, 16. Multiple channels are controlled in parallel under the control of different cores to determine the fitness of control parameter groups. This allows screening of as many control parameter groups as possible in a shorter time, improving search efficiency and reducing search time. In some other possible implementations, the processor of the storage controller may be a single core. In this way, the number of channels that can be run in parallel is smaller, and therefore the total number of control parameter groups that can be searched within a specified time is also smaller.

[0180] The higher the fitness, the larger the eye diagram area of ​​the bus transmission signal and the better the quality of the bus transmission signal. Therefore, after the iteration stops, the control parameter group with the largest fitness among the multiple control parameter groups obtained in the most recent iterative update is determined as the target control parameter group.

[0181] Because the genetic algorithm operates on encoded data, the examples provided in the embodiments of this disclosure use real number encoding as an example. This means that the target control parameter set obtained is essentially a set of numbers, such as (3, 12, 17, 18). This data cannot be directly used to configure the storage controller and memory. Therefore, the target control parameters need to be decoded. The principle of decoding has been introduced in the previous example and will not be explained in detail here.

[0182] After decoding the target control parameter group to obtain the actual value of the target control parameter group, the storage controller and the memory can be configured based on the actual value of the target control parameter group, thereby ensuring the quality of the signal transmitted between the storage controller and the memory.

[0183] The operating method of the storage controller provided by the embodiment of the present disclosure may cause the quality of the bus transmission signal between the storage controller and the memory to decrease when the working environment of the storage system changes, such as the temperature changes, thereby affecting the read and write performance of the storage system. The operating method provided by the embodiment of the present disclosure determines the target control parameter group based on the genetic algorithm, that is, determines the optimal control parameter for adjusting the eye diagram area size of the bus transmission signal between the storage controller and the memory, or determines the optimal control parameter for adjusting the quality of the bus transmission signal between the storage controller and the memory. Configuring the storage controller and the memory based on the control parameters in the target control parameter group can ensure the quality of the bus transmission signal between the storage controller and the memory. Compared with the global traversal or search method mentioned in the aforementioned example, using the genetic algorithm to determine the optimal control parameter is faster and more efficient, and can quickly find the optimal control parameter to ensure the bus transmission signal between the storage controller and the memory, thereby improving the read and write performance of the storage system.

[0184] In addition, the operating method provided by the embodiments of the present disclosure can be triggered and executed automatically when the environment changes, or can be executed in response to training instructions sent by the user through the host, thereby improving the adaptability of the storage system or electronic device to different environments.

[0185] An embodiment of the present disclosure further provides a storage controller, which may be, for example, the storage controller 110 shown in FIG4 . The storage controller 110 includes a processor 111, a buffer 112, an error correction code (ECC) circuit 113, a host interface circuit 114, and a flash memory interface circuit 115. The storage controller 110 is coupled to a memory 120. Exemplarily, the processor 111 is connected to the host 10 via the host interface circuit 114 and is connected to the memory 120 via the flash memory interface circuit 115.

[0186] In response to receiving the training instruction, the processor 111 randomly generates multiple control parameter groups, which are used to adjust the eye diagram size of the signal transmission between the storage controller 110 and the memory 120, that is, to adjust the quality of the bus transmission signal between the storage controller 110 and the memory 120. The processor 111 is also configured to determine the fitness of the control parameter group. After determining the fitness of the control parameter group, the processor 111 is also configured to iteratively update the multiple control parameter groups using a genetic algorithm until the iteration stop condition is met. The processor 111 is also configured to determine the control parameter group with the largest fitness among the multiple control parameter groups obtained in the most recent iterative update as the target control parameter group after the iteration stops, and configure the storage controller 110 and the memory 120 based on the control parameters in the target control parameter group, so as to ensure the quality of the bus transmission signal between the storage controller 110 and the memory 120.

[0187] In a possible embodiment of the present disclosure, the processor 111 is configured to configure the storage controller 110 and the memory 120 according to the control parameters in the control parameter group. After the configuration is completed, the processor 111 is also configured to send a read instruction to the memory 120, obtain the eye diagram area when valid data is read from the memory 120, and determine the eye diagram area as the fitness of the control parameter group.

[0188] In a possible embodiment of the present disclosure, the processor 111 is specifically configured to repeatedly adjust the phase of the rising edge and the falling edge of the data selection signal DQs, and then send a read instruction to determine the value range of the phase of the rising edge and the phase of the falling edge of DQs that reads valid data; the eye diagram area enclosed by the value range of the phase of the rising edge and the phase of the falling edge of DQs that reads valid data in the coordinate system is determined as the fitness of the control parameter group, wherein the horizontal axis of the coordinate system is the phase of the rising edge of DQs, and the vertical axis of the coordinate system is the phase of the falling edge of DQs.

[0189] In one possible embodiment of the present disclosure, the processor 111 is further configured to, before determining the fitness of the control parameter group, remove control parameter groups that do not meet preset requirements from the multiple control parameter groups. Since the control parameter groups are randomly generated, there may be control parameter groups that do not meet preset requirements among the multiple randomly generated control parameter groups. For example, there may be duplicate or redundant control parameter groups, or there may be control parameters in some of the randomly generated control parameter groups that conflict with each other or do not meet the requirements of the protocol or regulations. Therefore, before determining the fitness of the control parameter group, it is necessary to remove the control parameter groups that do not meet the preset requirements from the multiple control parameter groups to reduce the amount of calculation.

[0190] Selection, crossover, and mutation are relatively common genetic operations of genetic algorithms. In one possible embodiment of the present disclosure, when a genetic algorithm is used to iteratively update multiple control parameter groups, the processor 111 is specifically configured to: select multiple control parameter groups to be crossed according to the fitness of the control parameter groups; use the genetic algorithm to perform genetic crossover on any two control parameter groups among the multiple control parameter groups to be crossed, and use the genetic algorithm to perform genetic mutation on the control parameter groups after crossing.

[0191] In one possible embodiment of the present disclosure, the processor 111 is specifically configured to determine the probability of each control parameter group being selected, where the probability of selection is the ratio of the fitness of the control parameter group to the sum of the fitnesses of all control parameter groups, set a random number between 0 and 100%, and select the control parameter group with a selection probability greater than the random number as the control parameter group to be crossed. The greater the fitness, the greater the probability of the control parameter group being selected.

[0192] In a possible embodiment of the present disclosure, after the selection operation, the processor 111 is further specifically configured to: for any two control parameter groups to be crossed, randomly select a starting position and an interchange length, interchange some control parameters of the two control parameter groups to be crossed, and generate a crossed control parameter group.

[0193] In a possible embodiment of the present disclosure, the processor 111 is further specifically configured to: for any control parameter group after crossover, replace a random control parameter in the control parameter group with any other value in the value set of the control parameter according to a set mutation probability.

[0194] It should be noted that selection, crossover and mutation are all random. Taking mutation as an example, according to the set mutation probability, the value of a random control parameter in the control parameter group is replaced with the random value of the control parameter, indicating that mutation may or may not occur.

[0195] After selection, crossover and mutation, a new generation of control parameter groups is obtained. The fitness of the new generation of control parameter groups is calculated again to determine whether the iteration stopping conditions are met. If the iteration stopping conditions are not met, the next generation of control parameter groups is obtained by iteratively updating based on genetic operations such as selection, crossover and mutation until the iteration termination conditions are met.

[0196] In a possible implementation, the iteration stopping condition includes: the fitness of the control parameter group reaches a set value, or the total number of the screened control parameter groups reaches a first preset number, where the first preset number satisfies:

[0197] Wherein n is a first preset number, t is the calibration time length specified in the specification, l is the length of the transmission byte, v is the bus rate, k is the average number of times the phase of the rising edge and the phase of the falling edge of DQs are adjusted, and m is the number of channels of the memory 120.

[0198] An embodiment of the present disclosure also provides a storage system, which may be, for example, the storage system shown in FIG2 or FIG3 in the aforementioned example. The storage system includes a memory 120 and a storage controller 110 provided in the aforementioned example. The storage controller 110 is coupled to the memory 120 via a flash memory interface circuit 115 to control the memory 120 to store data.

[0199] In the above examples, in order to introduce the technical solutions provided by the present disclosure, NAND flash memory is used as an example to introduce the features and functions of the inventive concept of the present disclosure. In some other possible implementations, the above memory can also be other memories, such as dynamic random access memory (DRAM), etc.

[0200] An embodiment of the present disclosure also provides an electronic device, such as the electronic device shown in Figure 1 in the aforementioned example, the electronic device includes a host 10 and a storage system 11 provided in the aforementioned embodiments, and the host 10 is connected to the storage system 11 to write data to the storage system 11 or read data stored in the storage system 11.

[0201] In one possible implementation, the host 10 is configured to send training instructions to the storage system 11 in response to user operations. The storage system 11 receives the training instructions, determines optimal control parameters for adjusting the quality of the bus transmission signal between the storage controller 110 and the memory 120, and can configure the storage controller 110 and the memory 120 based on the determined optimal control parameters to improve the quality of the bus transmission signal between the storage controller 110 and the memory 120.

[0202] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in the present invention are intended to be covered by the scope of protection of the present invention. Therefore, the scope of protection of the present invention shall be based on the scope of protection of the claims.

Claims

1. A method for operating a storage controller, wherein the storage controller is coupled to a memory, the storage controller includes a processor, and the method includes: In response to the processor receiving a training instruction, randomly generating a plurality of control parameter groups, the control parameter groups being used to adjust signal transmission between the storage controller and the memory; determining fitness of the plurality of control parameter groups; Iteratively updating the multiple control parameter groups using a genetic algorithm until an iteration stop condition is met; After the iteration stops, the control parameter group with the largest fitness among the multiple control parameter groups obtained in the most recent iterative update is determined as the target control parameter group.

2. The method according to claim 1, characterized in that Determining the fitness of the control parameter group includes: configuring the storage controller and the memory based on the control parameter group; A read instruction is sent to the memory to obtain an eye diagram area when valid data is read from the memory, and the eye diagram area is determined as the fitness of the control parameter group.

3. The method according to claim 2, characterized in that The sending of a read instruction to the memory, obtaining an eye diagram area when valid data is read from the memory, and determining the eye diagram area as the fitness of the control parameter group comprises: Repeating the process of adjusting the phases of the rising edge and the falling edge of the data selection signal DQs, and then sending a read instruction to the memory to determine the value range of the rising edge phase and the falling edge phase of the DQs that reads valid data; The eye diagram area enclosed by the value range of the phase of the rising edge and the phase of the falling edge of the DQs that read valid data in the coordinate system is determined as the fitness of the control parameter group, wherein the horizontal axis of the coordinate system is the phase of the rising edge of the DQs, and the vertical axis of the coordinate system is the phase of the falling edge of the DQs.

4. The method according to any one of claims 1 to 3, characterized in that: Before determining the fitness of the control parameter group, the method further includes: The control parameter groups that do not meet the preset requirements are removed from the multiple control parameter groups.

5. The method according to any one of claims 1 to 4, characterized in that: The iterative updating of the multiple control parameter groups by using a genetic algorithm comprises: Selecting a plurality of control parameter groups to be crossed according to the fitness of the control parameter groups; A genetic algorithm is used to perform genetic crossover on any two control parameter groups among the multiple control parameter groups to be crossed.

6. The method according to claim 5, characterized in that The iterative updating of the multiple control parameter groups by using a genetic algorithm further comprises: Genetic algorithm is used to perform genetic mutation on the control parameter group after crossover.

7. The method according to claim 5, characterized in that Selecting a plurality of control parameter groups to be crossed according to the fitness of the control parameter groups comprises: Determine the probability of each of the control parameter groups being selected, where the probability of being selected is the ratio of the fitness of the control parameter group to the sum of the fitness of all the control parameter groups; A random number between 0 and 100% is set, and the control parameter group whose probability of being selected is greater than the random number is selected as the control parameter group to be crossed.

8. The method according to claim 5, characterized in that The control parameter group includes a plurality of control parameters, and performing genetic crossover on any two control parameter groups among the plurality of control parameter groups to be crossed using a genetic algorithm includes: For any two control parameter groups to be crossed, a starting position and an exchange length are randomly selected, and some control parameters of the two control parameter groups to be crossed are exchanged to generate a control parameter group after crossing.

9. The method according to claim 6, characterized in that The control parameter group includes a plurality of control parameters, and performing genetic variation on the crossover control parameter group using a genetic algorithm includes: For any of the control parameter groups after the crossover, a random control parameter in the control parameter group is replaced with any other value in the value set of the control parameter according to the set mutation probability.

10. The method according to any one of claims 1 to 9, characterized in that: The iteration stop condition includes: The fitness of the control parameter group reaches the set value, or, The total number of the screened control parameter groups reaches a first preset number, wherein the first preset number satisfies: Wherein n is the first preset number, t is the calibration time length specified in the specification, l is the length of the transmission byte, v is the bus rate, k is the average number of times the phase of the rising edge and the phase of the falling edge of DQs are adjusted, and m is the number of channels of the memory.

11. The method according to claim 1, characterized in that: The control parameter group includes a plurality of control parameters. Before randomly generating a plurality of control parameter groups, the method further includes: Acquire the control parameter and a value set of the control parameter, wherein the value set of the control parameter includes multiple values ​​of the control parameter; The value set of the control parameter is encoded.

12. A storage controller, characterized in that: The storage controller includes a processor and a flash memory interface circuit, the processor is coupled to the flash memory interface circuit, and the flash memory interface circuit is used to couple to a memory; The processor is configured to randomly generate a plurality of control parameter groups in response to receiving a training instruction, wherein the control parameter groups are used to adjust signal transmission between the storage controller and the memory; determining the fitness of the control parameter set; Iteratively updating the multiple control parameter groups using a genetic algorithm until an iteration stop condition is met; After the iteration stops, the control parameter group with the largest fitness among the multiple control parameter groups obtained in the most recent iterative update is determined as the target control parameter group.

13. The storage controller according to claim 12, characterized in that: The processor is further configured to configure the storage controller and the memory based on the control parameter group; A read instruction is sent to the memory through the flash memory interface circuit to obtain an eye diagram area when valid data is read from the memory, and the eye diagram area is determined as the fitness of the control parameter group.

14. The storage controller according to claim 13, characterized in that: The processor is specifically configured to: Repeat the process of adjusting the phases of the rising edge and the falling edge of the data selection signal DQs, and then send a read instruction to determine the value range of the phase of the rising edge and the phase of the falling edge of DQs that reads valid data; The eye diagram area enclosed by the value range of the rising edge phase and the falling edge phase of the DQs that read the valid data in the coordinate system is determined as the fitness of the control parameter group, wherein the horizontal axis of the coordinate system is the The vertical axis of the coordinate system is the phase of the rising edge of the DQs, and the vertical axis of the coordinate system is the phase of the falling edge of the DQs.

15. The storage controller according to any one of claims 12 to 14, characterized in that: The processor is further configured to: Before determining the fitness of the control parameter group, the control parameter groups that do not meet the preset requirements are removed from the multiple control parameter groups.

16. The storage controller according to any one of claims 12 to 15, characterized in that: The processor is specifically configured to: Selecting a plurality of control parameter groups to be crossed according to the fitness of the control parameter groups; A genetic algorithm is used to perform genetic crossover on any two control parameter groups among the multiple control parameter groups to be crossed.

17. The storage controller according to claim 16, characterized in that: The processor is further specifically configured to: Genetic algorithm is used to perform genetic mutation on the control parameter group after crossover.

18. The storage controller according to claim 16, characterized in that: The processor is specifically configured to: Determine the probability of each of the control parameter groups being selected, where the probability of being selected is the ratio of the fitness of the control parameter group to the sum of the fitness of all the control parameter groups; A random number between 0 and 100% is set, and the control parameter group whose probability of being selected is greater than the random number is selected as the control parameter group to be crossed.

19. The storage controller according to claim 16, wherein: The control parameter group includes a plurality of control parameters, and the processor is further specifically configured to: For any two control parameter groups to be crossed, a starting position and an exchange length are randomly selected, and some control parameters of the two control parameter groups to be crossed are exchanged to generate a control parameter group after crossing.

20. The storage controller according to claim 16, wherein: The control parameter group includes a plurality of control parameters, and the processor is further specifically configured to: For any control parameter group after the crossover, a random control parameter in the control parameter group is replaced with any other value in the value set of the control parameter according to the set mutation probability.

21. The storage controller according to any one of claims 12 to 20, characterized in that: The iteration stop condition includes: The fitness of the control parameter group reaches the set value, or, The total number of the screened control parameter groups reaches a first preset number, wherein the first preset number satisfies: Wherein n is the first preset number, t is the calibration time length specified in the specification, l is the length of the transmission byte, v is the bus rate, k is the average number of times the phase of the rising edge and the phase of the falling edge of DQs are adjusted, and m is the number of channels of the memory.

22. A storage system, characterized in that: include: A memory, and a memory controller, wherein the memory controller is connected to the memory via a flash memory interface circuit; The storage controller is the storage controller according to any one of claims 12 to 21.

23. An electronic device, characterized in that: It comprises a host and the storage system as claimed in claim 22, wherein the host is connected to the storage system to write data to the storage system or read data stored in the storage system.

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