Packaging system based on aperture compensation and compensation method and system thereof

Abstract

The invention relates to the field of semiconductors, in particular to a packaging system based on aperture compensation and a compensation method and system thereof. The first stacking part comprises a plurality of first crystal grain layers, each first crystal grain layer comprises a first edge area arranged along the edge of the master slice and a first central area arranged along the central area of the master slice, the first edge area is provided with at least one column of first edge crystal grains, the first central area is provided with first central crystal grains, and the first central crystal grains are arranged on the first edge area; a plurality of columns of first interval crystal grains are arranged in the first edge region and the first central region at intervals; the through hole sizes D1, D2 and D3 of the first edge crystal grains, the interval crystal grains and the central crystal grains meet the rule that D1 is greater than or equal to D2, and D1 is greater than D3; the invention provides an aperture differentiation setting scheme realized based on limited classification of three classifications of edges, interval areas and central areas. According to the restrictive difference setting scheme, the overall yield of the semiconductor device is improved through local strength adjustment.

Description

[0001] Divisional Application This application is a divisional application of the patent application with the application number CN202411939809.0, titled "An Encapsulation System Based on Aperture Compensation and Its Compensation Method and System", filed on December 26, 2024. Technical Field

[0002] The present invention relates to the field of semiconductor packaging technology, and particularly to an encapsulation system based on aperture compensation and its compensation method and system. Background Art

[0003] Integrated circuits in semiconductor devices are generally fabricated on a wafer and then diced into individual small chips. Due to the need for mass production to reduce costs, the size of wafers has gradually developed from the early 4-inch and 6-inch to 8-inch, 12-inch, and even 16-inch. Also, after the integrated circuit is completed, back grinding of the wafer is often required and then diced into chips, and the thickness of the chips can be reduced to meet the specifications of high-density or thin packaging requirements. The yield of wafers is crucial for the working performance of semiconductor devices. However, the wafer is prone to form edge bending problems during the production stacking process, which will lead to an increase in defects on the wafer.

[0004] Referring to the patent application "Method for Optimizing Wafer Bending Degree" with the application publication number CN108110043A, it discloses a method for optimizing wafer bending degree. The method is as follows: providing a wafer, with a crystal plane SiN formed on the front surface of the wafer and a back crystal SiN formed on the back surface of the wafer, and the crystal plane SiN and the back crystal SiN are formed in the same furnace tube process; processing the front surface of the wafer to form a protective layer resistant to acid solution corrosion on the front surface; under the protection of the protective layer, using acid solution to remove at least a part of the back crystal SiN. This method adjusts the bending degree of the wafer, and then hopes to improve the quality of subsequent bonding and other process steps by reducing the adjusted wafer bending degree.

[0005] However, the applicant noticed that although the traditional solution has optimized the wafer processing technology, with the continuous development of semiconductor technology, especially when the number of wafer layers of semiconductor devices reaches a certain level and the circuit structure on the wafer becomes more and more complex, it is still very easy to generate bending on the edge and thus cause defects.

[0006] Therefore, there is a continuing need for a method that can reduce bending defects during the stacking process. Summary of the Invention

[0007] The purpose of the present invention is to provide an encapsulation system based on aperture compensation and its compensation method and system, which can partially solve or alleviate the above deficiencies in the prior art, and can perform differential setting of apertures through finite region classification.

[0008] To solve the above-mentioned technical problems, the present invention specifically adopts the following technical solutions: In a first aspect of the present invention, there is provided a packaging system based on aperture compensation, comprising: A master wafer, on which a plurality of transmission interfaces are provided at intervals, the transmission interfaces being used for electrically connecting to the through holes of the dies stacked thereon, and adjacent two layers of the dies being electrically connected through the through holes; A first stacking portion provided on the master wafer, wherein the first stacking portion includes: multiple layers of first die layers, one die layer including: a plurality of spaced-apart dies; and the first die layer includes: a first edge region arranged along the edge of the master wafer, and a first central region arranged along the central region of the master wafer, wherein at least one column of first edge dies is provided in the first edge region, at least one column of first central dies is provided in the first central region, and multiple columns of first spaced dies are arranged at intervals between the first edge region and the first central region; The first through-hole sizes D1, D2, and D3 of the first edge dies, the first spaced dies, and the first central dies satisfy a first compensation rule, and the first compensation rule includes: D1≥D2, D1>D3; A second stacking portion provided on the first stacking portion, wherein the second stacking portion includes: multiple layers of second die layers, the second die layer including: a second edge region arranged along the edge of the master wafer, and a second central region arranged along the central region, wherein at least one column of second edge dies is provided in the second edge region, at least one column of second central dies is provided in the second central region, and multiple columns of second spaced dies are arranged at intervals between the second edge region and the second central region; The fourth through-hole sizes D4, D5, and D6 of the second edge dies, the second spaced dies, and the second central dies satisfy a second compensation rule, and the second compensation rule includes: D4≥D5, D4>D6.

[0009] In some embodiments, the first through-hole sizes D1, D2, and D3 further satisfy the following third compensation rule: (D1-D3) / D3<10%; (D2-D3) / D3<5%.

[0010] In some embodiments, the fourth through-hole sizes D4, D5, and D6 further satisfy the following fourth compensation rule: (D4-D6) / D6<10%; (D5-D6) / D6<5%.

[0011] In some embodiments, the radius R of the central region satisfies R ≤ 75 mm.

[0012] In some embodiments, D2 > D3, and / or D5 > D6.

[0013] In some embodiments, the first stacking portion and the second stacking portion satisfy a fifth compensation rule, which includes: D1 ≤ D4.

[0014] On the other hand, the present invention also provides a compensation method based on aperture compensation. The compensation method is applied to a packaging system based on aperture compensation as described in any one of the embodiments. Correspondingly, the method includes: S301, obtaining packaging parameters of a target packaging system to be packaged, where the packaging parameters include: die size; S302, according to the packaging parameters, using a first search rule to find a corresponding first historical aperture data group in a historical aperture database; where the historical aperture database includes: multiple historical aperture data groups, and one historical aperture data group includes: a first search label, the first search label includes: the historical size of the die; and the via size of the edge die, the via size of the corresponding spaced die, and the via size of the central die corresponding to the first search label; correspondingly, the first search rule requires that the difference between the die size of the found first historical aperture data group and the historical size satisfies the following model: |R1 - R2| / f ≤ H; where R1 is the die size, R2 is the historical size, f is a reference size, the reference size is R1 or R2, and H is a preset search difference threshold; S303, when the first historical aperture data group is found, outputting the first historical aperture data group as a first recommended compensation scheme.

[0015] In some embodiments, the historical aperture data group further includes: a second search label, the second search label includes one or more of the following types: the historical size of the master wafer, the historical thickness of the die; correspondingly, the packaging parameters further include one or more of the following: the actual size of the master wafer, the actual thickness of the die; correspondingly, before S303, it further includes the step: S304, according to the packaging parameters, using a second search rule to find a corresponding second historical aperture data group in the historical aperture database; where the second search rule requires that the found second historical aperture data group further satisfies the following requirements on the basis of satisfying the first search rule: |historical size of the master wafer - actual size of the master wafer| / reference size of the master wafer ≤ master wafer difference threshold, where the reference size of the master wafer is the historical size of the master wafer or the actual size of the master wafer; and / or, |historical thickness of the die - actual thickness of the die| / reference thickness of the die ≤ thickness difference threshold, where the reference thickness of the die is the historical thickness of the die or the actual thickness of the die; S305, when the second historical aperture data set is found, output the second historical aperture data set as the second recommended compensation scheme.

[0016] In some embodiments, the second historical aperture data set is further searched for in the first historical aperture data set only when the first historical aperture data set is retrieved.

[0017] The present invention also provides another compensation system based on aperture compensation. The compensation system is applied to a packaging system based on aperture compensation as described in any one of the embodiments. Correspondingly, the compensation system includes: A packaging parameter acquisition module, configured to acquire packaging parameters of a target packaging system to be packaged, where the packaging parameters include: die size; A search module, configured to search for a corresponding first historical aperture data set in a historical aperture database according to the packaging parameters by using a first search rule; where the historical aperture database includes: a plurality of historical aperture data sets, and one historical aperture data set includes: a first search label, the first search label includes: the historical size of the die; and the via size of the edge die, the via size of the corresponding spaced die, and the via size of the central die corresponding to the first search label; correspondingly, the first search rule requires that the difference between the die size of the found first historical aperture data set and the historical size satisfies the following model: |R1 - R2| / f ≤ H; where R1 is the die size, R2 is the historical size, f is the reference size, the reference size is R1 or R2, and H is a preset search difference threshold; A recommendation module, configured to output the first historical aperture data set as the first recommended compensation scheme when the first historical aperture data set is found.

[0018] Beneficial technical effects: The present invention provides a limited classification based on three classifications of the edge, spaced area, and central area, and an aperture differentiation setting scheme is realized. This differential setting can enhance the rigid strength of the edge interval, so as to improve the overall yield of semiconductor devices by locally adjusting the strength (that is, by locally adjusting the edge, reducing the overall deformation degree of semiconductor devices), thereby reducing the adjustment pressure on the basis of controlling bending deformation.

[0019] In other words, for large-size and large-thickness semiconductor devices, the present invention classifies regions finitely for the edge regions with relatively high stress and the intermediate regions stretched by the edge regions, and sets a gradient difference adjustment for the apertures in these finite regions.

[0020] Furthermore, for this gradient difference adjustment, the present invention also provides a multiple query mechanism for quickly setting the difference scheme. Specifically, by establishing a standardized database and setting different query priorities for key factors such as grain size, grain thickness, and semiconductor size (i.e., the size of the mother wafer), the present invention can quickly query a reference aperture setting scheme using the standardized database.

[0021] It should be noted that for the setting of apertures, the present invention restricts from two dimensions: region classification and the specific setting values of apertures. By constructing a general standardized database through a restrictive region classification mode (in other words, controlling variables through a regional restrictive scheme to make the database more general and the query results more reliable). Furthermore, during the long-term semiconductor stacking process, the repeatability of different gradient aperture setting values is relatively high (or rather, the generality is high). Therefore, this general finite gradient adjustment scheme exerts relatively less pressure on the aperture processing technology. For example, in the actual application stage of a factory, only a small number of aperture processing lines need to be set, and the increment of aperture size is also relatively limited. This also makes the aperture processing easier to implement and will not overly increase the defects of the grains or affect the rigid strength of the grains due to the increase in aperture.

[0022] Therefore, this finite gradient adjustment setting scheme, in coordination with the establishment of a standard database, can achieve a good balance between increasing the aperture size of the grains and controlling the possible increase in defects during the processing of large apertures.

[0023] Moreover, for these aperture differential setting schemes, the present invention also provides a model prediction method that can consider aperture difference factors to predict the corrected grinding thickness. Thus, by coordinately processing the finite gradient setting of the aperture of the grains on a single layer and the finite gradient setting of the grinding thickness between different layers, the numerical difference degree can be further reduced. That is to say, the coordination of the two means can ensure that the edge aperture does not need to be too large and the grinding thickness of the upper-layer grains does not need to be too small, thereby avoiding the gradient adjustment from bringing new pressure to the grain processing technology and introducing too many defects during the adjustment process. Description of the Drawings

[0024] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. In all the drawings, similar elements or parts are generally identified by similar reference numerals. In the drawings, the elements or parts are not necessarily drawn to actual scale. Obviously, the drawings described below are some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0025] Figure 1 Schematic structural diagram of a wafer layer in an exemplary embodiment of the present invention; Figure 2 Schematic exploded view of the structure of a packaging system in an exemplary embodiment of the present invention; Figure 3 Top view structural diagram of a packaging system in an exemplary embodiment of the present invention; Figure 4 Schematic diagram of bending data of a packaging system in an exemplary embodiment; Figure 5 Schematic flowchart of a method in an exemplary embodiment of the present invention; Figure 6 Schematic flowchart of a method in another exemplary embodiment of the present invention; Figure 7 Schematic flowchart of a method in yet another exemplary embodiment of the present invention.

[0026] Reference numerals: first target area 10, intermediate area 20, second target area 30, die 40; first measurement point 11, second measurement point 31; mother wafer 01, first stacking portion 02, first edge die 021, first central die 023, first spacer die 022; second stacking portion 03, second edge die 031, second central die 033, second spacer die 032, center point O. Detailed implementation manners

[0027] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts belong to the scope of protection of the present invention.

[0028] In this article, suffixes such as "module", "component", or "unit" used to represent elements are only for the convenience of the description of the present invention, and they have no specific meaning themselves. Therefore, "module", "component", or "unit" can be used interchangeably.

[0029] In this text, the orientation or positional relationship indicated by terms such as "upper", "lower", "inner", "outer", "front", "rear", "one end", "the other end", etc. is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation on the present invention. In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance.

[0030] In this text, unless otherwise clearly specified and defined, terms such as "installed", "provided with", "connected", etc. should be understood in a broad sense. For example, "connected" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, a direct connection, or an indirect connection through an intermediate medium, and it can be the communication inside two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0031] As used in this text, "and / or" includes any and all combinations of one or more of the listed related items.

[0032] As used in this text, "a plurality of" means two or more, that is, it includes two, three, four, five, etc.

[0033] As used in this specification, the term "about" typically represents + / - 5% of the value, more typically + / - 4% of the value, more typically + / - 3% of the value, more typically + / - 2% of the value, even more typically + / - 1% of the value, and even more typically + / - 0.5% of the value.

[0034] In this specification, certain embodiments may be disclosed in a format that is within a certain range. It should be understood that this description of "within a certain range" is only for convenience and brevity and should not be construed as a rigid limitation on the disclosed range. Therefore, the description of the range should be considered to have specifically disclosed all possible sub-ranges and the individual numerical values within this range. For example, the description of the range 1 - 6 should be considered to have specifically disclosed sub-ranges such as from 1 to 3, from 1 to 4, from 1 to 5, from 2 to 4, from 2 to 6, from 3 to 6, etc., and the individual numbers within this range, such as 1, 2, 3, 4, 5, and 6. The above rules apply regardless of the breadth of the range.

[0035] In this text, the "via size" of a certain region or a certain type of crystal grains may refer to the average size of the crystal grains (or that certain type of crystal grains) under that region. For example, the first via size D1 of the first edge crystal grains 021 refers to the average size of multiple edge crystal grains. In this text, "via size" and "aperture diameter" may be used interchangeably.

[0036] In this text, a wafer refers to a silicon wafer used to fabricate silicon semiconductor circuits. A "crystal grain" can be a small piece cut from a wafer, and is also referred to as a "Die". A "crystal grain" with a circuit structure processed thereon can also be called a "chip".

[0037] Generally, multiple crystal grains need to be stacked to form a complete semiconductor device. For example, on a mother wafer (for example, it can be a packaging substrate, i.e., Substrate (abbreviated as SUB)), or it can be a packaging substrate with multiple wafer layers stacked in sequence. Among them, one wafer layer includes multiple crystal grains). Among them, when the number of stacked layers gradually increases, the packaging structure may curl due to the accumulation of tension, and then defects may occur, resulting in a reduction in the yield, as Figure 4 shown. The first curve S2 and the second curve S3 respectively show schematic diagrams of the bending values of different layers in an exemplary semiconductor device.

[0038] In response to this, it may be necessary to reduce the grinding thickness on the back side of the crystal grain (i.e., perform a back grinding operation on the crystal grain). For example, the thickness of the crystal grain after production and processing is approximately 700 - 800 μm, and it may be necessary to perform back grinding on it during the stacking process to reduce its thickness to approximately 70 - 80 μm.

[0039] Currently, a standardized back grinding treatment method is usually adopted, that is, a standardized grinding thickness is used to uniformly process multiple layers of crystal grains. However, the applicant has noticed that when the number of layers of the semiconductor device is too large and the area of the wafer layer is relatively large, there are still relatively large problems in overall reliability and yield with this standardized treatment method.

[0040] In response to this, contrary to the traditional standardized process, the present application proposes a rolling differential grinding compensation scheme for a multi-layer packaging structure. This rolling grinding compensation scheme can perform compensation processing on the grinding thickness of crystal grains in different layer regions, and this differential compensation processing can avoid the grinding thickness becoming too small, increasing the difficulty of the grinding process (it should be noted that the smaller the thickness of the crystal grain, the more defects are likely to occur during the preparation process, and the higher the technical requirements for the grinding process).

[0041] In this text, different terms are used for the curling situation of the stacked structure, such as "bending degree" and "degree of bending". This is mainly to facilitate the distinction of different compensation systems in different embodiments. In the embodiments of the present invention, the degree of bending or the bending degree is mainly a characterization index used to describe the curling deformation degree of the stacked structure. For example, it can be the upward deformation degree or the downward deformation degree at different diameter positions, or it can be the bending angle at different positions, as long as it can characterize the bending deformation degree, it can be applied to the present invention and should also be within the protection scope of the present invention.

[0042] Embodiment 1 See Figure 5 As shown, the present invention provides a compensation method for wafer back grinding, including: S101, stacking at least one first wafer layer on the layer to be stacked to form a first stacked layer; wherein, the wafer layer includes: multiple columns of grains arranged at intervals; In some embodiments, the layer to be stacked includes: a mother wafer, and multiple wafer layers provided on the mother wafer.

[0043] Particularly, in some embodiments, at the initial moment of stacking, the layer to be stacked refers to the mother wafer.

[0044] In some embodiments, the wafer layer includes: at least one layer of grains. Particularly, the wafer layer includes: one layer of grains, that is, when stacking each new layer of grains, data such as its current bending value can be collected. S102, monitoring at least one first bending value and at least one second bending value of the first stacked layer in at least one of a first target area and a second target area; wherein, the first target area is located in the peripheral area of the wafer layer, the second target area is located in the central area of the wafer layer, and there is an intermediate area between the first target area and the second target area, and multiple columns of grains are arranged around the intermediate area; See Figure 3 , multiple grains are sequentially stacked on the mother wafer 01, and in the direction from the edge of the mother wafer to the center point O, a first target area 10, an intermediate area 20, and a second target area 30 are sequentially arranged, and multiple columns of grains 40 are respectively arranged in each area.

[0045] In some embodiments, one column of grains refers to a circle of grains arranged around the center point O. Or, in some embodiments, one column of grains refers to the radial direction of the mother wafer, or refers to a row of grains arranged in a direction parallel to the radial direction.

[0046] Preferably, the measurement scheme of the bending value is as Figure 1As shown in the figure, a plurality of first measurement points 11 are selected on the first target area 10, and a plurality of second measurement points 31 are selected on the second target area 30. Among them, the bending value of the measurement point is the distance between the point and the reference line S, such as the first bending value Z2 and the second bending value Z1. Among them, the reference line S can be a straight line where the ideal positions corresponding to a plurality of measurement points are located in the ideal state where the crystal grains do not curl during the stacking process, or the reference line can be set by the user himself, as long as it can be used to measure the relative bending degree of measurement points at different positions.

[0047] For example, the degree of bending can be the difference between the ordinate of the measurement point and the standard line. Taking any straight line (or a straight line parallel or approximate thereto) in the plane where the master wafer is located at the initial moment as the abscissa, and taking any straight line in the direction perpendicular thereto as the ordinate.

[0048] S103, calculating a polishing compensation index according to the first bending value and the second bending value by using a first discrimination model; wherein, the first discrimination model includes: L1 = aX 1 + bY 1 ; wherein, L1 is the polishing compensation index, a is the first weight, b is the second weight, X 1 is the first degree of bending, Y 1 is the second degree of bending; wherein, the first degree of bending is an eigenvalue of the at least one first bending value, the second degree of bending is an eigenvalue of the at least one second bending value, and the eigenvalue includes one or more of the following types: average value, median, mode or maximum value; Preferably, the average value of the bending values corresponding to the plurality of first measurement points 11 can be calculated. Preferably, the bending value can be taken as an absolute value.

[0049] Particularly, when there is only one bending value, the degree of bending can be directly characterized by the bending value.

[0050] S104, when the polishing compensation index is greater than a set first compensation threshold, the polishing thickness of the next layer of the wafer layer is reduced.

[0051] That is to say, in this embodiment, when the polishing compensation index measured by combining the first target area and the second target area is relatively large, preferably, the polishing thickness of the next layer of the wafer layer is reduced to control the overall degree of bending deformation.

[0052] In some embodiments, it further includes the steps of: S105, stacking at least one second wafer layer on the first stacked layer to obtain a second stacked layer; similarly, the second wafer layer includes a plurality of crystal grains. S106. Monitor at least one third bending value and / or at least one fourth bending value of the second stacked layer in the first target area and / or the second target area respectively; S107. Use a second discrimination model to calculate the bending trend based on at least one set of bending values; wherein, the second discrimination model includes: L2 = α(X 2 - X 1 ) / t + β(Y 2 - Y 1 ); where L2 is the bending trend, α is the third weight, β is the fourth weight, X 1 , X 2 are the first bending degrees of the first wafer layer and the second wafer layer respectively, Y 1、 , Y 2 are the second bending degrees of the first wafer layer and the second wafer layer respectively; t is the time interval between two monitors; S108. When the bending trend is greater than the set bending threshold, reduce the grinding thickness of the next wafer layer.

[0053] Preferably, in some embodiments, synchronously use the bending values of the first target area and the second target area at multiple moments to calculate their change trends over a period of time.

[0054] For example, in some embodiments, for the convenience of unified comparison, the bending degree is taken as a positive value. When the wafer layer includes: one layer of grains, then calculate the first bending degree X 1 , and the first bending degree X 2 of the second wafer layer, and correspondingly calculate the second bending degrees Y 1、 , Y 2 of the first wafer layer and the second wafer layer. Among them, the third weight and the fourth weight can be set independently by the user, and t is the difference between the corresponding measurement moments of the first wafer layer and the second wafer layer. In this embodiment, when the bending difference between two measurements is large, a new compensation correction will continue to be performed on the next wafer layer, that is, continue to reduce the grinding thickness of the next wafer layer.

[0055] That is to say, in this embodiment, the second discrimination model can actually be used to calculate the first bending degree of the first wafer layer at the first moment and the first bending degree of the second wafer layer at the second moment to compare the change of the bending degree.

[0056] In some embodiments, at least one set of bending values includes: the first bending degrees of the first wafer layer and the second wafer layer; and / or, the second bending degrees of the first wafer layer and the second wafer layer.

[0057] For example, in some embodiments, the degree of bending is also taken as a positive number. When the wafer layer includes multiple layers of grains, correspondingly, when measuring the first wafer layer, the bending values of multiple layers of grains will be obtained correspondingly, and the degree of bending can be the characteristic value of the degree of bending at multiple moments.

[0058] Preferably, the characteristic value of the degree of bending can be the average value, median, average value or maximum value of multiple bending values; alternatively, the characteristic value of the degree of bending can also be the difference between the initial measurement moment and the end measurement moment during a measurement process. That is to say, the time factor is further introduced into the degree of bending, which can describe the bending change trend of the wafer layer over a period of time. Correspondingly, when the difference in the bending change trends of the first and second wafer layers is small, the corrected grinding thickness is considered to be reliable; on the contrary, when the difference between the two is large, a new compensation correction will continue for the next wafer layer, that is, the grinding thickness of the next wafer layer will continue to be reduced. For example, in some embodiments, the first wafer layer and the second wafer layer can be two adjacent wafer layers. Or, at least one third wafer layer can be provided therebetween at intervals.

[0059] For example, in some embodiments, the first discrimination model or the second discrimination model can be used independently to determine whether to start the correction step of the grinding thickness.

[0060] In some embodiments, it further includes the steps: S109, obtaining the exceeding index that the bending trend exceeds the bending threshold within the first time period, and the exceeding index can be the exceeding frequency or the exceeding duration; for example, a corresponding exceeding signal can be sent to prompt the user to pay attention to whether the current compensation process is reliable.

[0061] S110, when the exceeding index is greater than a preset first exceeding threshold, the first discrimination model is corrected.

[0062] In some embodiments, the step of correcting the first discrimination model includes: Increasing the value of the first weight, and / or decreasing the value of the second weight.

[0063] Preferably, the first weight and the second weight can have an initial value set by the user or set by default, and with the gradual change of the stacking process, they can be feedback-adjusted in combination with the correction effect.

[0064] Preferably, when the exceeding signal indicating that the bending trend exceeds the bending threshold is frequently detected for a long time, such as the number of exceeding signals is greater than the set number, or the duration of the exceeding signal exceeds the set duration, the weight relationship of the first discrimination model will be adjusted.

[0065] In this embodiment, by evaluating the bending trend, it is also possible to adjust the applicability of the first discrimination model before compensation correction. For example, when the bending degree increases rapidly and the first discrimination model has not yet given feedback, its weight setting will be adjusted to improve the sensitivity of the first discrimination model. Thus, through the preliminary sensitivity adjustment, it is possible to avoid excessive delay in compensation adjustment.

[0066] In some embodiments, the grinding thickness of the second wafer layer is less than or equal to the grinding thickness of the first wafer layer.

[0067] In some embodiments, the calculation model of the grinding thickness of the current wafer layer includes: Th n =Th n-1 +λ; where Th n is the grinding thickness of the current wafer layer, Th n-1 is the grinding thickness of the upper wafer layer, and λ is a preset compensation thickness.

[0068] For example, if Th n-1 is the grinding thickness of the first wafer layer, then Th n is the grinding thickness of the second wafer layer.

[0069] For example, in some embodiments, the compensation thickness may have a preset default reference value. For example, for semiconductor devices of different thicknesses and sizes, the corresponding default compensation thickness can be set in combination with the user's engineering experience or historical stacking data. Or, the compensation thickness can also be obtained by AI calculation based on a compensation model.

[0070] In some embodiments, after the step of reducing the grinding thickness of the next wafer layer, it further includes: S111, using the second discrimination model to calculate the first bending trend in the first time period and the second bending trend in the second time period respectively; S112, determining whether the difference between the second bending trend and the first bending trend belongs to a set threshold interval, and if not, sending a corresponding prompt signal.

[0071] Preferably, in this embodiment, when correcting the model in combination with the discrimination result of the first discrimination model, the correction reliability can also be verified by the continuous change of the bending trend.

[0072] To address the possible edge curling problem during the stacking process, the present invention provides a solution for rolling adjustment of the grinding thickness of grains based on partition detection (i.e., a gradient adjustment solution based on partition detection). Specifically, the present invention comprehensively analyzes the bending values (i.e., the degree of deformation) of the edge regions with relatively high stress and the central regions affected by the stress at the edges and the wafer layer size, so as to comprehensively evaluate the degree of bending deformation through distributed point measurements, and timely determine whether it is necessary to initiate correction of the grinding thickness of the grains.

[0073] Furthermore, to avoid excessive delay in the gradient adjustment solution, co-evaluation will also be carried out through the bending change trend to correct the grinding thickness as early as possible in the early stage when the bending deformation rapidly expands. Moreover, the evaluation of this bending deformation trend is also beneficial for evaluating the timeliness of the first discrimination model. For example, if it is detected that the bending deformation trend is too large, the first discrimination model can also be adjusted in reverse.

[0074] Furthermore, after correcting the grinding thickness based on the evaluation results of the first or second discrimination model, it is also possible to detect the change in the bending trend after correction to determine whether the correction result is reliable based on the change in the bending trend.

[0075] Correspondingly, the present invention also provides a compensation system for back grinding of crystals, including: A first stacking module for stacking at least one first wafer layer on the layer to be stacked to form a first stacked layer; wherein, the wafer layer includes: multiple columns of grains arranged at intervals; A first monitoring module for monitoring at least one first bending value and at least one second bending value of the first stacked layer in at least one of a first target area and a second target area; wherein, the first target area is located in the peripheral area of the wafer layer, the second target area is located in the central area of the wafer layer, and there is an intermediate area between the first target area and the second target area, and multiple columns of grains are arranged around the intermediate area; A first discrimination module for calculating a grinding compensation index according to the first bending value and the second bending value by using a first discrimination model; wherein, the first discrimination model includes: L1=aX 1 +bY 1 ; wherein, L1 is the grinding compensation index, a is the first weight, b is the second weight, X 1 is the first bending degree, Y 1 is the second bending degree; wherein, the first bending degree is the eigenvalue of the at least one first bending value, the second bending degree is the eigenvalue of the at least one second bending value, and the eigenvalue includes one or more of the following types: average value, median, mode or maximum value; A compensation module, configured to reduce the grinding thickness of the next layer of the wafer layer when the grinding compensation index is greater than a set first compensation threshold.

[0076] In some embodiments, it further includes: A second stacking module, configured to stack at least one layer of a second wafer layer on the first stacking layer to obtain a second stacking layer; A second monitoring module, configured to monitor at least one third bending value and / or at least one fourth bending value of the second stacking layer in at least one of a first target area and / or a second target area; A second discrimination module, configured to calculate a bending trend according to at least one set of bending values by using a second discrimination model; wherein, the second discrimination model includes: L2 = α(X 2 - X 1 ) / t + β(Y 2 - Y 1 ); where L2 is the bending trend, α is a third weight, β is a fourth weight, X 1 and X 2 are respectively the first bending degrees of the first wafer layer and the second wafer layer, Y 1、 and Y 2 are respectively the second bending degrees of the first wafer layer and the second wafer layer; t is the time interval between two monitors; A bending trend determination module, configured to reduce the grinding thickness of the next layer of the wafer layer when the bending trend is greater than a set bending threshold.

[0077] In some embodiments, it further includes: An over - index determination module, configured to obtain an over - index that the bending trend exceeds the bending threshold within a first time period, and the over - index can be the frequency of exceeding or the duration of exceeding; A model correction module, configured to correct the first discrimination model when the over - index is greater than a preset first over - threshold.

[0078] Embodiment 2 Furthermore, for this gradient - type adjustment scheme based on partition detection, the present invention further provides a back - side compensation model for wafers. This back - side compensation model comprehensively analyzes the corrected grinding thickness by combining key factors such as the thickness of the stacking layer, the grinding thickness of the grains in the previous layer, and the degree of bending (i.e., the overall current thickness of the semiconductor, the grinding thickness in the previous gradient interval, and the main dimensions such as the degree of deformation), as well as the type of semiconductor device (such as the grain size, the size of the stacking layer) to predict the grinding thickness of the next gradient.

[0079] In other words, the present invention collaboratively processes the stacking type of semiconductor devices and the current stacking state of semiconductor devices to address the bending of semiconductors, thereby precisely and gradiently adjusting the grinding thickness for a specific semiconductor type. By utilizing the gradient-based finite grinding thickness adjustment, the overall yield of semiconductor devices is improved. This finite grinding thickness adjustment can, on the one hand, reduce the difficulty of the grinding process (i.e., making the grinding process as uniform as possible), and on the other hand, avoid an overly small overall grinding thickness to prevent an increase in defects in individual grains due to changes in the grinding process.

[0080] Preferably, in the present invention, the backside compensation model is only activated to correct the grinding thickness when it is monitored that gradient adjustment is required. This staged correction can also reduce the frequency of grinding correction to simplify the correction process. The specific implementation of the backside compensation model is as follows: See Figure 6 As shown, the present invention also provides a compensation method based on the backside compensation model, including: S201, obtaining a stacking parameter combination of a first stacking layer, where the first stacking layer includes: a mother wafer, and at least one wafer layer disposed on the mother wafer, and the wafer layer has a plurality of grains. Correspondingly, the stacking parameter combination includes: A first data type, which includes: the thickness of the first stacking layer (for example, the thickness of the first stacking layer is the overall thickness of the mother wafer and the wafer layer thereon), the size of the first stacking layer (such as dimensions like the radius or diameter of the mother wafer), the size of the grains (such as dimensions like the radius or diameter of the grains); A second data type, which includes: the first grinding thickness of the uppermost wafer layer of the first stacking layer (such as the thickness of the grains), the first curvature of the first stacking layer; S202, inputting the stacking parameter combination into a pre-constructed backside compensation model, and correspondingly obtaining the second grinding thickness of the next wafer layer; wherein the steps for constructing the backside compensation model include: S21, obtaining a training sample set, where the training sample set includes: a plurality of sample points, and the sample points are associated with a first historical stacking parameter combination and a second historical stacking parameter combination collected according to historical stacking layers. Among them, the historical stacking layers include: a first historical stacking layer; a second historical stacking layer obtained by stacking at least one historical wafer layer on the first historical stacking layer. Correspondingly, the first historical stacking parameter combination includes: A first historical data type, which includes: the thickness of the first historical stacking layer, the size of the historical stacking layer, the size of the grains; A second historical data type, which includes: the first historical grinding thickness of the wafer layer of the uppermost layer of the first historical stacked layer, and the first historical curvature of the first historical stacked layer; The second historical stack parameter combination includes: The second grinding thickness of the current at least one historical wafer layer, and the second historical curvature of the second historical stacked layer; In this embodiment, the difference between the first historical curvature and the second historical curvature can be used to evaluate the influence of the second historical stacked layer on the subsequent process.

[0081] That is to say, one sample point in this embodiment corresponds to a semiconductor device at a packaging moment.

[0082] S22: Input the training sample set into a neural network model to correspondingly obtain the backside compensation model; wherein, the input layer of the neural network model includes: the first historical stack parameter combination and the second historical curvature, and the output layer includes: the second grinding thickness.

[0083] In some embodiments, according to different types of semiconductor devices (for example, semiconductor devices with different functional types or different size scales), different neural network models can be used for model training. For example, the selectable neural network models include: BP neural network, fully connected neural network (FCN), deep feedforward neural network (DNN), etc.

[0084] In some embodiments, the backside compensation model can output the second grinding thickness under a specific bending adjustment degree. Wherein, the bending adjustment degree (which is also equivalent to the bending adjustment speed) is the difference between the first curvature at the current moment and the predicted curvature (or the target curvature) at the next moment. Wherein, at least one corrected wafer layer with the second grinding thickness is stacked on the first stacked layer to obtain a second stacked layer, and the predicted curvature of the second stacked layer is the second curvature.

[0085] It can be understood that the specific bending adjustment degree set in the model can be set by the user himself, and it can be used as the initial speed of the backside compensation model.

[0086] For another example, in some embodiments, the backside compensation model can also output multiple second grinding thicknesses corresponding to multiple bending adjustment degree conditions, and the user can freely select according to the multiple second grinding thicknesses.

[0087] In some embodiments, the curvature can be the first bending degree measured in the first target area.

[0088] Or, the curvature can also be the second bending degree measured in the second target area.

[0089] Alternatively, the curvature can be a polishing compensation index obtained by integrating the first target area and the second target area.

[0090] Alternatively, the curvature can also be the curvature values of multiple measurement points in the first target area and the second target area. That is, the input combination of the crystal back compensation model further includes: the curvature values of multiple measurement points.

[0091] In some embodiments, it includes: Modify the polishing thickness of the next layer of the wafer layer to the second polishing thickness (i.e., this wafer layer is also called the modified wafer layer); Stack the next layer of the wafer layer on the first stacked layer to obtain a second stacked layer correspondingly; Monitor the (one or more) second curvatures of the second stacked layer; Calculate the curvature change trend based on the first curvature and the second curvature; When the curvature change trend is less than the set curvature trend, it is considered that the current second polishing thickness meets the compensation requirements.

[0092] For example, in some embodiments, for the convenience of unified calculation, the absolute value of the curvature is taken. During the actual stacking and correction process, due to the relatively limited compensation amount, there may also be a certain delay in adjusting the curvature. That is, after reducing the polishing thickness of the next layer of the wafer layer, its curvature may still continue to increase. In this regard, calculate the difference in curvature before and after stacking (equivalent to the curvature change trend). When the difference between the curvature after stacking and the curvature at the previous moment is relatively small, it is considered that the curvature change trend decreases and the correction feedback is more effective. Otherwise, it is considered that the correction speed is too slow, or the correction is ineffective, and a prompt signal can be sent to the user for manual verification and checking.

[0093] Preferably, in some embodiments, the curvature trend can be the actual change trend of the curvature before correction.

[0094] Or, in some other embodiments, the curvature trend can be set by the user himself / herself.

[0095] In some embodiments, the curvature change trend can be calculated by the curvature of the edge area between two moments.

[0096] In some embodiments, a central die, spacer dies, and edge dies are sequentially arranged in a region from the center to the edge of the wafer layer. The first historical stacking parameter combination further includes: a third historical data type, and the third historical data type includes: the historical aperture of the edge die, the historical aperture of the spacer die, and the historical aperture of the edge die. That is, this historical aperture can also be used as data for the input layer of model training. Correspondingly, the stacking parameter combination may further include: the historical aperture of the edge die, the historical aperture of the spacer die, and the historical aperture of the edge die. That is to say, the backside compensation model in this embodiment can comprehensively estimate the optimized grinding thickness of the next layer of dies by combining the grinding thickness of the stacked dies and the via sizes of dies in different regions.

[0097] In some embodiments, the first historical stacking parameter combination further includes: the historical number of columns of the edge die, the historical number of columns of the spacer die, and the historical number of columns of the edge die. That is to say, in some embodiments, the above number of columns can also be used as data for the input layer of model training.

[0098] The present invention correspondingly provides a compensation system based on a backside compensation model, including: A stacking parameter acquisition module, configured to acquire a stacking parameter combination of a first stacking layer, where the first stacking layer includes: a master wafer, and at least one wafer layer disposed on the master wafer, and the wafer layer has a plurality of dies. Correspondingly, the stacking parameter combination includes: A first data type, and the first data type includes: the thickness of the first stacking layer, the size of the first stacking layer, and the size of the die; A second data type, and the second data type includes: the first grinding thickness of the uppermost wafer layer of the first stacking layer, and the first curvature of the first stacking layer; An input module, configured to input the stacking parameter combination into a pre-constructed backside compensation model, and correspondingly obtain the second grinding thickness of the next wafer layer; where the backside compensation model is trained by using a model training module; where the model training module includes: A sample set acquisition unit, configured to acquire a training sample set, where the training sample set includes: a plurality of sample points, and the sample points are associated with a first historical stacking parameter combination and a second historical stacking parameter combination collected according to historical stacking layers, where the historical stacking layers include: a first historical stacking layer; a second historical stacking layer obtained by stacking at least one historical wafer layer on the first historical stacking layer; correspondingly, The first historical stack parameter combination includes: a first historical data type, which includes: the thickness of the first historical stack layer, the size of the historical stack layer, and the size of the crystal grains; a second historical data type, which includes: the first historical grinding thickness of the wafer layer on the uppermost layer of the first historical stack layer, and the first historical curvature of the first historical stack layer. The second historical stack parameter combination includes: the second grinding thickness of the current at least one historical wafer layer, and the second historical curvature of the second historical stack layer. A training unit for inputting the training sample set into a neural network model for training, and correspondingly obtaining the backside compensation model; wherein, the input layer of the neural network model includes: the first historical stack parameter combination, the second historical curvature, and the output layer includes: the second grinding thickness.

[0099] In some embodiments, it further includes: a monitoring module, and the monitoring module includes: A correction unit for correcting the grinding thickness of the next layer of the wafer layer to the second grinding thickness; A stacking unit for stacking the next layer of the wafer layer onto the first stack layer to correspondingly obtain a second stack layer; A monitoring unit for monitoring the (one or more) second curvatures of the second stack layer; A trend calculation unit for calculating the bending change trend according to the (one or more) first curvatures and the (one or more) second curvatures; An evaluation unit for determining that the current second grinding thickness meets the compensation requirement when the bending change trend is less than a set bending trend.

[0100] In some embodiments, a central crystal grain, spaced crystal grains, and edge crystal grains are sequentially arranged in a region from the center to the edge of the wafer layer, and the first historical stack parameter combination further includes: a third historical data type, and the third historical data type includes: the historical aperture of the edge crystal grains, the historical aperture of the spaced crystal grains, and the historical aperture of the edge crystal grains.

[0101] In some embodiments, the first historical stack parameter combination further includes: the historical number of columns of the edge crystal grains, the historical number of columns of the spaced crystal grains, and the historical number of columns of the edge crystal grains.

[0102] Embodiment III For a complex semiconductor device structure with a large mother wafer area or a large stacking thickness, the present invention further provides a packaging system based on aperture compensation, as shown in Figure 2 shown, including: Master wafer 01, on which a plurality of transmission interfaces (such as I / O interfaces) are arranged at intervals, and the transmission interfaces are used for electrically connecting to the through holes (such as TSVs, i.e., through-silicon vias) of the dies stacked thereon, and adjacent layers of dies are electrically connected through the through holes; The first stacking part 02 arranged on the master wafer, wherein the first stacking part 02 includes: multiple layers of first die layers, and one die layer includes: a plurality of dies distributed at intervals; the first die layer includes: a first edge area arranged along the edge of the master wafer, and a first central area arranged along the central area of the master wafer, wherein at least one column of first edge dies 021 is arranged in the first edge area, at least one column of first central dies 023 is arranged in the first central area, and multiple columns of first spaced dies 022 are arranged at intervals between the first edge area and the first central area; The first through-hole sizes D1, D2, and D3 of the first edge dies 021, the first spaced dies 022, and the first central dies 023 satisfy a first compensation rule, and the first compensation rule includes: D1≥D2, D1>D3; The second stacking part 03 arranged on the first stacking part, wherein the second stacking part includes: multiple layers of second die layers, the second die layer includes: a second edge area arranged along the edge of the master wafer, and a second central area arranged along the central area, wherein at least one column of second edge dies 031 is arranged in the second edge area, at least one column of second central dies 033 is arranged in the second central area, and multiple columns of second spaced dies 032 are arranged at intervals between the second edge area and the second central area; The fourth through-hole size D4, the fifth through-hole size D5, and the sixth through-hole size D6 of the second edge dies, the second spaced dies, and the second central dies satisfy a second compensation rule, and the second compensation rule includes: D4≥D5, D4>D6.

[0103] In this embodiment, the "through-hole size" is also referred to as the "aperture", and the two may be used interchangeably.

[0104] In this article, different nouns are used for the structural layers formed by one layer of dies, such as "die layer" and "wafer layer", mainly to facilitate the distinction of different stacking structures or semiconductor devices in different embodiments.

[0105] In this embodiment, by increasing the aperture size of the edge dies, the strength (or rigidity) of the die layer in the edge area can be enhanced, and thus the tendency of bending deformation can be resisted to a certain extent.

[0106] Preferably, in some embodiments, D2>D3; preferably, in some embodiments, D5>D6.

[0107] In some embodiments, the first through-hole size D1, the second through-hole size D2, and the third through-hole size D3 further satisfy the following third compensation rule: (D1 - D3) / D3 < 10%; and / or, (D2 - D3) / D3 < 5%.

[0108] In some embodiments, the fourth through-hole size D4, the fifth through-hole size D5, and the sixth through-hole size D6 further satisfy the following fourth compensation rule: (D4 - D6) / D6 < 10%; and / or, (D5 - D6) / D6 < 5%.

[0109] In some embodiments, the radius R of the central region ≤ 75 mm.

[0110] In some embodiments, the first stacking portion and the second stacking portion satisfy a fifth compensation rule, and the fifth compensation rule includes: D1 ≤ D4. For example, in some embodiments, D1 < D4.

[0111] In this embodiment, a limited hierarchical aperture differentiation setting scheme is proposed through the three classifications of the edge, the spacer region, and the central region, which can minimize the additional pressure generated by the differential aperture setting for the through-hole processing on the basis of locally enhancing the strength of the grain layer.

[0112] It should be noted that the larger the aperture of the grain, the higher the requirements for grain processing, that is, the increase in aperture is likely to cause more defects in the grain. In this regard, the aperture differentiation setting scheme proposed by the present invention can control the apertures of most grains (such as the central region) within a relatively small range to avoid an increase in grain defects on the basis of adjusting the overall strength of the grain layer.

[0113] Embodiment 4 Corresponding to the above packaging system, the present invention further provides a compensation method based on aperture compensation. The compensation method is applied to a packaging system based on aperture compensation as shown in Embodiment 3. Correspondingly, referring to Figure 7 as shown, the method includes: S301, obtaining the packaging parameters of the target packaging system to be packaged, where the packaging parameters include: the grain size (such as the diameter or radius of the grain); S302. According to the encapsulation parameters, use the first search rule to find the corresponding first historical aperture data set in the historical aperture database. Among them, the historical aperture database includes: multiple historical aperture data sets, and one historical aperture data set includes: a first search label, and the first search label includes: the historical size of the crystal grains, and the aperture of the edge crystal grains, the aperture of the corresponding spaced crystal grains, and the aperture of the central crystal grains corresponding to the first search label. Correspondingly, the first search rule requires that the difference between the crystal grain size of the found historical aperture data set and the historical size satisfies the following model: |R1 - R2| / f ≤ H; where R1 is the crystal grain size, R2 is the historical size, f is the reference size, the reference size is R1 or R2, and H is the preset search difference threshold. S303. When the first historical aperture data set is found, output the first historical aperture data set as the first recommended compensation scheme.

[0114] In some embodiments, the historical aperture data set further includes: a second search label, and the second search label includes one or more of the following types: the historical size of the mother wafer, the historical thickness of the crystal grains. Correspondingly, the encapsulation parameters further include one or more of the following: the actual size of the mother wafer, the actual thickness of the crystal grains. Correspondingly, before S303, it further includes the step: S304. According to the encapsulation parameters, use the second search rule to find the corresponding second historical aperture data set in the historical aperture database. Among them, the second search rule requires that the found historical aperture data set further satisfies the following requirements on the basis of satisfying the first search rule: |historical size of the mother wafer - actual size of the mother wafer| / reference size of the mother wafer ≤ mother wafer difference threshold, where the reference size of the mother wafer is the historical size of the mother wafer or the actual size of the mother wafer; and / or, |historical thickness of the crystal grains - actual thickness of the crystal grains| / reference thickness of the crystal grains ≤ thickness difference threshold, where the reference thickness of the crystal grains is the historical thickness of the crystal grains or the actual thickness of the crystal grains; S305. When the second historical aperture data set is found, output the second historical aperture data set as the second recommended compensation scheme.

[0115] In some embodiments, to simplify the processing technology, the crystal grains of different layers adopt the same or similar aperture sizes.

[0116] Furthermore, in this embodiment, in combination with the crystal back grinding model in Embodiment 2, the present invention can also comprehensively predict the corrected grinding thickness of the next crystal grain by combining the via hole size and the grinding thickness of the stacked crystal grains.

[0117] For example, in some embodiments, for the method in this embodiment, the obtained stack parameter combination further includes: the pore size of the edge grains, the pore size of the corresponding spaced grains, and the pore size of the central grains. Correspondingly, the input layer of the neural network model includes: the first historical stack parameter combination and the second historical curvature, and the output layer includes: the second grinding thickness.

[0118] In this embodiment, by combining the pore size difference design and the grinding thickness for two-dimensional comprehensive training, it is possible to perform a rolling correction (or gradient correction) on the grinding thickness of the stacked grains based on the size design of the grains, so as to avoid the grinding thickness of the grains becoming too thin on the basis of resisting the bending deformation degree as much as possible, thereby reducing the number of defects that may be caused by the grinding thickness.

[0119] In some embodiments, only when the first historical pore size data group is retrieved, the second historical pore size data group is further searched for in the first historical pore size data group.

[0120] In some embodiments, the historical pore size database further includes one or more of the following data: the number of columns of the edge grains corresponding to the first search label, the number of columns of the spaced grains corresponding to the first search label, and the number of columns of the central grains corresponding to the first search label.

[0121] It should be noted that on the one hand, in the present invention, a limited hierarchical pore size differentiation setting scheme is proposed through the three classifications of the edge, the spaced area, and the central area, which can enhance the strength of the grain layer locally while minimizing the additional pressure generated by the differential pore size setting for the through-hole processing. On the other hand, by constructing a standardized query database, the setting of the pore size can be standardized and unified to a certain extent, further reducing the burden on the pore size processing technology caused by the differential pore size setting.

[0122] The present invention also provides a compensation system based on pore size compensation. The compensation system is applied to a packaging system based on pore size compensation. Correspondingly, the compensation system includes: A packaging parameter acquisition module, configured to acquire the packaging parameters of a target packaging system to be packaged, where the packaging parameters include: the grain size; A search module, configured to search for a corresponding first historical aperture data set in a historical aperture database according to packaging parameters by using a first search rule; wherein, the historical aperture database includes: a plurality of historical aperture data sets, and one historical aperture data set includes: a first search label, the first search label includes: the historical size of the crystal grains, and the apertures of the edge crystal grains, the corresponding spaced crystal grains, and the central crystal grains corresponding to the first search label; correspondingly, the first search rule requires that the difference between the crystal grain size of the found historical aperture data set and the historical size satisfies the following model: |R1 - R2| / f ≤ H; where R1 is the crystal grain size, R2 is the historical size, f is a reference size, the reference size is R1 or R2, and H is a preset search difference threshold; A recommendation module, configured to output the first historical aperture data set as a first recommended compensation solution when the first historical aperture data set is found.

[0123] The present invention also provides a computer-readable storage medium, in which a program or instruction is stored, and when the program or instruction is run, the method in any one of the embodiments is implemented.

[0124] The present invention also provides a computer program product, in which a program or instruction is stored, and when the program or instruction is run, the method in any one of the embodiments is implemented.

[0125] It should be noted that in this article, the terms "include", "comprise" or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "including a..." does not exclude the existence of additional identical elements in the process, method, article or device including the element.

[0126] Through the description of the above embodiments, those skilled in the art can clearly understand that the above embodiment methods can be implemented by means of software plus a necessary general hardware platform, and of course also by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. The computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disc), and includes several instructions for causing a computer terminal (which may be a mobile phone, a computer, a server, or a network device, etc.) to execute the methods described in the various embodiments of the present invention.

[0127] The embodiments of the present invention have been described above in conjunction with the accompanying drawings. However, the present invention is not limited to the above specific embodiments. The above specific embodiments are merely illustrative and not restrictive. Under the inspiration of the present invention, those of ordinary skill in the art can also make many forms without departing from the spirit of the present invention and the scope protected by the claims. All of these are within the protection scope of the present invention.

Claims

1. A packaging system based on aperture compensation, characterized in that: include: A mother sheet (01), wherein a plurality of transmission interfaces are arranged at intervals on the mother sheet, the transmission interfaces being used to be electrically connected to through holes of the crystal grains stacked thereon, and the crystal grains of two adjacent layers are electrically connected via the through holes; A first stacking portion is arranged on the mother sheet, wherein the first stacking portion comprises: a plurality of first crystal grain layers, one crystal grain layer comprises: a plurality of crystal grains distributed at intervals; and the first crystal grain layer comprises: a first edge region arranged along the edge of the mother sheet, and a first central region arranged along the central region of the mother sheet, wherein the first edge region is provided with at least one column of first edge crystal grains (021), the first central region is provided with at least one column of first central crystal grains (023), and a plurality of columns of first spacer crystal grains (022) are arranged at intervals between the first edge region and the first central region; The first through hole size D1, the second through hole size D2, and the third through hole size D3 of the first edge grain (021), the first spacer grain (022), and the first center grain (023) satisfy a first compensation rule, and the first compensation rule includes: D1≥D2, D1>D3; A second stacking portion arranged on the first stacking portion, wherein the second stacking portion comprises: a plurality of second crystal grain layers, the second crystal grain layers comprising: a second edge region arranged along the edge of the mother sheet, and a second central region arranged along the central region, wherein the second edge region is provided with at least one column of second edge crystal grains (031), the second central region is provided with at least one column of second central crystal grains (033), and a plurality of columns of second spacer crystal grains (032) are arranged at intervals between the second edge region and the second central region; The fourth through hole size D4, the fifth through hole size D5, and the sixth through hole size D6 of the second edge grain, the second spacer grain, and the second center grain satisfy a second compensation rule, and the second compensation rule includes: D4≥D5, D4>D6.

2. A packaging system based on aperture compensation according to claim 1, characterized in that: The first through hole size D1, the second through hole size D2, and the third through hole size D3 also satisfy the following third compensation rule: (D1-D3) / D3<10%; (D2-D3) / D3<5%.

3. A packaging system based on aperture compensation according to claim 1, characterized in that: The fourth through hole size D4, the fifth through hole size D5, and the sixth through hole size D6 also satisfy the following fourth compensation rule: (D4-D6) / D6<10%; (D5-D6) / D6<5%.

4. The packaging system based on aperture compensation according to claim 1, characterized in that: The radius R of the central area is ≤75 mm.

5. The packaging system based on aperture compensation according to claim 1, characterized in that: D2>D3, and / or, D5>D6.

6. A packaging system based on aperture compensation according to any one of claims 1 to 5, characterized in that: The first stacking portion and the second stacking portion satisfy a fifth compensation rule, and the fifth compensation rule includes: D1≤D4.

7. A compensation method based on aperture compensation, characterized in that: The compensation method is applied to a packaging system based on aperture compensation as described in any one of claims 1 to 6. Correspondingly, the method includes: S301, obtaining packaging parameters of a target packaging system to be packaged, wherein the packaging parameters include: grain size; S302, according to the packaging parameters, a first search rule is used to find a corresponding first historical aperture data group in a historical aperture database; wherein the historical aperture database includes: a plurality of historical aperture data groups, and one historical aperture data group includes: a first search tag, the first search tag includes: a historical size of a grain; and a through-hole size of an edge grain corresponding to the first search tag, a through-hole size of a corresponding interval grain, and a through-hole size of a center grain; correspondingly, the first search rule requires that the difference between the grain size of the first historical aperture data group found and the historical size satisfies the following model: |R1-R2| / f≤H; wherein R1 is the grain size, R2 is the historical size, f is a reference size, the reference size is R1 or R2, and H is a preset search difference threshold; S303: When the first historical aperture data group is found, the first historical aperture data group is output as a first recommended compensation solution.

8. The compensation method based on aperture compensation according to claim 7, characterized in that: The historical aperture data set further includes: a second search tag, the second search tag includes one or more of the following types: the historical size of the master sheet, the historical thickness of the die; correspondingly, the packaging parameters also include one or more of the following: the actual size of the master sheet, the actual thickness of the die; correspondingly, before S303, the step of: S304, searching a corresponding second historical aperture data group in a historical aperture database using a second search rule according to the packaging parameter; wherein the second search rule requires that the second historical aperture data group found further meets the following requirements on the basis of meeting the first search rule: |historical size of the master sheet-actual size of the master sheet| / reference size of the master sheet≤master sheet difference threshold, wherein the reference size of the master sheet is the historical size of the master sheet or the actual size of the master sheet; and / or, |historical thickness of the grain-actual thickness of the grain| / reference thickness of the grain≤thickness difference threshold, wherein the reference thickness of the grain is the historical thickness of the grain or the actual thickness of the grain; S305: When the second historical aperture data group is found, the second historical aperture data group is output as a second recommended compensation solution.

9. The compensation method based on aperture compensation according to claim 8, characterized in that: Only when the first historical aperture data set is retrieved, the second historical aperture data set will be further searched in the first historical aperture data set.

10. A compensation system based on aperture compensation, characterized in that: The compensation system is applied to a packaging system based on aperture compensation as claimed in any one of claims 1 to 6. Correspondingly, the compensation system includes: A packaging parameter acquisition module is used to acquire packaging parameters of a target packaging system to be packaged, wherein the packaging parameters include: grain size; A search module, used for searching a corresponding first historical aperture data group in a historical aperture database using a first search rule according to the packaging parameters; wherein the historical aperture database includes: a plurality of historical aperture data groups, and one historical aperture data group includes: a first search tag, the first search tag includes: a historical size of a grain; and a through-hole size of an edge grain corresponding to the first search tag, a through-hole size of a corresponding interval grain, and a through-hole size of a center grain; correspondingly, the first search rule requires that the difference between the grain size of the first historical aperture data group found and the historical size satisfies the following model: |R1-R2| / f≤H; wherein R1 is the grain size, R2 is the historical size, f is a reference size, the reference size is R1 or R2, and H is a preset search difference threshold; The recommendation module is used for outputting the first historical aperture data group as a first recommended compensation solution when the first historical aperture data group is found.

Images