Multi-noise source equivalent circuit topological structure of GaN HEMT device

Abstract

The invention discloses a multi-noise-source circuit topological structure of a GaN HEMT device, which is characterized in that noise sources of the GaN HEMT device cannot be represented by a simple lumped noise source due to the influence of a distribution effect of device elements under a high-frequency working condition, so that a plurality of grids, a plurality of drains and a plurality of internal noise sources of the GaN HEMT device are provided. Wherein the parasitic inductor and the capacitor are noiseless elements, a noise source of a parasitic part is mainly heat source noise # imgabs0 # imgabs1 # of a parasitic resistor, and equivalent noise sources # imgabs2 # and # imgabs3 # of a noiseless two-port network at a grid node and a source node are not simply abstracted into a single noise source, but are replaced by a plurality of noise sources. The multi-noise equivalent circuit model can represent the noise of the GaN HEMT device under the high-frequency working condition, and the model represents the distribution effect of the device, so that the parameters of the model are more accurate, meanwhile, the model has certain physical significance, and the device process design and the circuit design can be better guided.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor device modeling, and particularly to an equivalent circuit topology structure of multiple noise sources for a GaN HEMT device. Background Art

[0002] With the development of semiconductor technology, more semiconductor materials have been applied to integrated circuits, which has played a huge role in promoting the development of the electronic information industry. The third-generation semiconductor materials represented by gallium nitride (GaN) and silicon carbide (SiC), which have characteristics such as a wider bandgap width and a higher breakdown electric field, have been applied in fields such as microwave power devices, communication radars, and new energy vehicles. For the noise modeling of GaN HEMT devices, the empirical-based noise model constructed by deriving empirical equations and the physical-based noise model constructed by deriving the physical working mechanism of the device are both the mainstream methods of current noise modeling. For the empirical-based noise model, the key to accurate modeling is the extraction of small-signal model parameters and noise source coefficients. The empirical-based model generally simulates the actual performance of the device through an equivalent circuit, and the accuracy of the model significantly affects the accuracy of integrated circuit design. However, as the operating frequency of GaN HEMT enters the millimeter-wave band, the non-ideal effects of the device become more obvious, so the accuracy of the traditional lumped noise model is insufficient. And the accuracy of the model significantly affects the accuracy of integrated circuit design. Summary of the Invention

[0003] The problem to be solved by the present invention is to propose an equivalent circuit topology structure of multiple noise sources for a GaN HEMT device in order to overcome the problem of insufficient accuracy of the traditional lumped topology equivalent circuit model under high-frequency working conditions. This structure considers that the non-ideal effects of the device become more obvious under high-frequency working conditions, so the parameters of a single noise source will make the model parameters unable to accurately characterize the device noise. The multi-noise equivalent topology circuit model can characterize the noise inside the device under high-frequency working conditions, and the parameters of the model are more accurate and have certain physical meanings, which can better guide the device process design and circuit design.

[0004] In order to achieve the above object, the technical solution adopted by the present invention is:

[0005] An equivalent circuit topology structure of multiple noise sources for a GaN HEMT device includes a unit five and n units of unit one, unit two, unit three, and unit four respectively; the unit one is composed of a resistor Rg and an inductor Lg connected in series, the unit two is composed of a resistor Rd and an inductor Ld connected in series, the unit three is composed of a capacitor Cgs and a resistor Rgs connected in series, the unit four is composed of a capacitor Cds and a resistor Rds connected in parallel; the unit five is composed of an inductor Ls and a resistor Rs connected in series;

[0006] Each Unit 1 forms a series structure 1, and each Unit 2 forms a series structure 2. One end of the series structure 1 is connected to the gate G of the GaN HEMT device, one end of the series structure 2 is connected to the drain D of the GaN HEMT device, and the source S of the GaN HEMT device is connected to one end of Unit 5;

[0007] The other ends of Unit 1 far from the gate G are respectively connected to the other end of Unit 5 through a Unit 3, and the other ends of Unit 2 far from the drain D are respectively connected to the other end of Unit 5 through a Unit 4;

[0008] The other ends of Unit 1 far from the gate G and the other end of the series structure 2 are both connected to one end of the current source Ids, and the other end of the current source Ids is connected to the other end of Unit 5;

[0009] In each Unit 1, each resistor Rg is respectively connected in parallel with a gate parasitic resistance thermal noise source. In each Unit 2, each resistor Rd is respectively connected in parallel with a drain parasitic resistance thermal noise source. Each Unit 3 is respectively connected in parallel with an intrinsic gate node equivalent noise source. In each Unit 4, each resistor Rds is respectively connected in parallel with an intrinsic drain node equivalent noise source. In Unit 5, the resistor Rs is connected in parallel with a source parasitic resistance thermal noise source.

[0010] In one embodiment, the multi-noise source equivalent circuit topology of the GaN HEMT device further includes:

[0011] n Unit 6s;

[0012] Unit 6 is composed of a capacitor Cgd and a resistor Rgd connected in series. The other ends of Unit 1 far from the gate G are respectively connected to one end of the current source Ids through a Unit 6.

[0013] In one embodiment, the other ends of Unit 1 far from the gate G are respectively connected to one end of the current source Ids through a Unit 6, specifically:

[0014] One end of the capacitor Cgdm of the m-th Unit 6 is connected to the other end of the m-th Unit 1 far from the gate G. The other end of the capacitor Cgdm is connected to one end of the resistor Rgdm, and the other end of the resistor Rgdm is connected to one end of the current source Ids, where 1 ≤ m ≤ n.

[0015] In one embodiment, one end of the series structure 1 is connected to the gate G of the GaN HEMT device, specifically:

[0016] One end of the inductor Lg1 of the first Unit 1 is used as one end of the series structure 1 and is connected to the gate G. The other end of the inductor Lg1 is connected to the resistor Rg1 of the first Unit 1, and the other end of the resistor Rgn of the n-th Unit 1 is used as the other end of the series structure 1.

[0017] In one embodiment, one end of the second series structure is connected to the drain D of the GaN HEMT device, specifically:

[0018] One end of the inductor Ld1 of the first unit two serves as one end of the second series structure and is connected to the drain D. The other end of the inductor Ld1 is connected to the resistor Rd1 of the first unit two. The other end of the resistor Rdn of the nth unit two serves as the other end of the second series structure.

[0019] In one embodiment, the source S of the GaN HEMT device is connected to one end of the fifth unit, specifically:

[0020] One end of the inductor Ls serves as one end of the fifth unit and is connected to the source S. The other end of the inductor Ls is connected to one end of the resistor Rs. The other end of the resistor Rs serves as the other end of the fifth unit.

[0021] In one embodiment, the ends of each first unit away from the gate G are respectively connected to the other end of the fifth unit through a third unit, specifically:

[0022] In each first unit, the end close to the gate G is the inductor end, and the end away from the gate G is the resistor end; in the mth first unit, one end of the resistor Rgm is connected to the inductor Lgm, and the other end is connected to one end of the mth third unit. The other end of the mth third unit is connected to the other end of the fifth unit.

[0023] In one embodiment, the ends of each first unit away from the gate G are respectively connected to the other end of the fifth unit through a third unit, specifically:

[0024] The end of the mth first unit away from the gate G is connected to one end of the capacitor Cgsm of the mth third unit. The other end of the capacitor Cgsm is connected to one end of the resistor Rgsm. The other end of the resistor Rgsm is connected to the other end of the fifth unit.

[0025] In one embodiment, the ends of each second unit away from the drain D are respectively connected to the other end of the fifth unit through a fourth unit, specifically:

[0026] In each second unit, the end close to the drain D is the inductor end, and the end away from the drain D is the resistor end; in the mth second unit, one end of the resistor Rdm is connected to the inductor Ldm, and the other end is connected to one end of the mth fourth unit. The other end of the mth fourth unit is connected to the other end of the fifth unit.

[0027] In one embodiment, the ends of each second unit away from the drain D are respectively connected to the other end of the fifth unit through a fourth unit, specifically:

[0028] One end of the m-th unit two away from the drain D is connected to one end of the m-th unit four, and the other end of the m-th unit four is connected to the unit five.

[0029] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0030] (1) In the high-frequency state, the non-ideal effects inside the device are significant, and the traditional lumped single-noise-source circuit model is no longer applicable. The multi-noise-source model can characterize more accurately, so the model can better guide the device process design and circuit design.

[0031] (2) With an accurate multi-noise-source model, the design scheme can be quickly verified and improved through simulation and optimization tools, reducing data optimization iterations, reducing the number of data tests, and improving design efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] By carefully reading the detailed description of the invention content and specific implementation manners, professionals in the field will be able to clearly recognize numerous additional advantages and benefits of the present invention. The provided drawings are only for showing specific implementation manners and should not be regarded as any limitation to the present invention. In addition, in all the drawings, the same components are represented by consistent reference numerals to maintain the consistency and clarity of the description.

[0033] Figure 1 It is the distributed equivalent circuit topology of the GaN HEMT device of the present invention.

[0034] Figure 2 It is the first embodiment of the distributed equivalent circuit of the GaN HEMT device based on the present invention.

[0035] Figure 3 It is the second embodiment of the distributed equivalent circuit of the GaN HEMT device based on the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0036] To make the technical means implemented by the present invention easier to understand, the present application will be further described in detail below with reference to the drawings and embodiments. It can be understood that the specific embodiments described herein are only used to explain the relevant application and are not a limitation to the application. Additionally, it should be noted that for the convenience of description, only parts related to the present application are shown in the drawings. It should be noted that, without conflict, the embodiments in the present application and the features in the embodiments can be combined with each other.

[0037] The present invention will be further described in detail below with reference to the drawings and specific embodiments. For the step numbers in the following embodiments, they are only set for the convenience of elaboration and explanation, and no limitation is placed on the order between the steps. The execution order of each step in the embodiments can be adaptively adjusted according to the understanding of those skilled in the art.

[0038] Aiming at the problem of insufficient accuracy of traditional lumped models in high-frequency cases, the present invention proposes an equivalent circuit topology of multiple noise sources for GaN HEMT devices. In traditional noise models, the noise sources are mainly the thermal noise of parasitic resistors in the parasitic part and the equivalent noise sources of the intrinsic noiseless two-port network at the gate node and the source node and In the present invention, the noise source is no longer a lumped model, but is characterized by multiple noise sources, that is, the topology adopts a distributed design. For details, please refer to Figure 1 The topology of the present invention has three electrodes: gate G, drain D, and source S. Several units such as unit one, unit two, unit three, unit four, unit five are designed, and further unit six is designed

[0039] Among them, the number of unit one is n. Each unit one is composed of a resistor Rg and an inductor Lg in series. Each unit one is connected in series to form a series structure one. In series structure one, from one end to the other end, the first unit one, the second unit one,..., the nth unit one are arranged in sequence. Among them, the first unit one is composed of a resistor Rg1 and an inductor Lg1 in series, the second unit one is composed of a resistor Rg2 and an inductor Lg2 in series,..., and so on. The nth unit one is composed of a resistor Rgn and an inductor Lgn in series

[0040] Correspondingly, the number of unit two is n. Each unit two is composed of a resistor Rd and an inductor Ld in series. Each unit two is connected in series to form a series structure two. In series structure two, from one end to the other end, the first unit two, the second unit two,..., the nth unit two are arranged in sequence. Among them, the first unit two is composed of a resistor Rd1 and an inductor Ld1 in series, the second unit two is composed of a resistor Rd2 and an inductor Ld2 in series,..., and so on. The nth unit two is composed of a resistor Rdn and an inductor Ldn in series

[0041] Correspondingly, the number of unit three is n. Each unit three is composed of a capacitor Cgs and a resistor Rgs in series. For the convenience of description, it can be defined as the first unit three, the second unit three,..., the nth unit three. Among them, the first unit three is composed of a capacitor Cgs1 and a resistor Rgs1 in series, the second unit three is composed of a capacitor Cgs2 and a resistor Rgs2 in series,..., and so on. The nth unit three is composed of a capacitor Cgsn and a resistor Rgsn in series

[0042] Correspondingly, the number of Unit Four is n, and each Unit Four is composed of a parallel combination of a capacitor Cds and a resistor Rds. For ease of description, they can be defined as the first Unit Four, the second Unit Four, …, the nth Unit Four. Among them, the first Unit Four is composed of a series combination of a capacitor Cds1 and a resistor Rds1, the second Unit Four is composed of a series combination of a capacitor Cds2 and a resistor Rds2, …, and so on. The nth Unit Four is composed of a series combination of a capacitor Cdsn and a resistor Rdsn.

[0043] Only one Unit Five is needed, which is composed of a series combination of an inductor Ls and a resistor Rs.

[0044] When needed, Unit Six can be added, and the number of Unit Six is also n.

[0045] Based on the above structural basis, the connection relationship of the topological structure of the present invention can be expressed as:

[0046] The gate G is connected to one end of the inductor Lg1, the other end of the inductor Lg1 is connected to one end of the resistor Rg1, and the other end of the resistor Rg1 is connected to one end of the inductor Lg2, the capacitor Cgs1, and the capacitor Cgd1 (if needed) respectively; the other end of the capacitor Cgs1 is connected to one end of the resistor Rgs1, the other end of the capacitor Cgd1 is connected to one end of the resistor Rgd1, the other end of the resistor Rgs1 is connected to the other end of the resistor Rs, and the other end of the resistor Rgd1 is connected to one end of the current source Ids, one end of the capacitor Cdsn, one end of the resistor Rdsn, and the other end of the resistor Rdn. The other end of the inductor Lg2 is connected to one end of the resistor Rg2, and the other end of the resistor Rg2 is connected to one end of the inductor Lg3, the capacitor Cgd2, and the capacitor Cgs2 (if needed) respectively. The other end of the capacitor Cgd2 is connected to one end of the resistor Rgd2, and the other end of the resistor Rgd2 is respectively connected to one end of the current source Ids, one end of the capacitor Cdsn, one end of the resistor Rdsn, and the other end of the resistor Rdn. The other end of the capacitor Cgs2 is connected to one end of the resistor Rgs2, and the other end of the resistor Rgs2 is connected to the other end of the resistor Rs.

[0047] The drain D is connected to one end of the inductor Ld1, the other end of the inductor Ld1 is connected to one end of Rd1, and the other end of the resistor Rd1 is connected to one end of the resistor Rds1, the capacitor Cds1, and the inductor Ld2 respectively. The other ends of the resistor Rds1 and the capacitor Cds1 are connected to the other end of the resistor Rs. The other end of the inductor Ld2 is connected to Rd2; the other end of the resistor Rd2 is connected to one end of the resistor Rds2, the capacitor Cds2, and the inductor Ld3 respectively. The other ends of the resistor Rds2 and the capacitor Cds2 are connected to the other end of the resistor Rs.

[0048] The source S is connected to one end of the inductor Ls, and the other end of the inductor Ls is connected to one end of the resistor Rs.

[0049] Similar descriptions apply to Lgn:

[0050] The other end of the inductor Lgn is connected to one end of the resistor Rgn; the other end of the resistor Rgn is connected to one end of each of the inductor Lgn, the capacitor Cgdn, and the capacitor Cgsn; the other end of the capacitor Cgdn is connected to one end of the resistor Rgdn; the other end of the capacitor Cgsn is connected to one end of the resistor Rgsn; the other end of the resistor Rgsn is connected to the other end of the resistor Rs; the other end of the resistor Rgdn is connected to the current source Ids, the capacitor Cdsn, the resistor Rdsn, and the resistor Rdn; the other end of the resistor Rdn is connected to the capacitor Cdsn and the resistor Rdsn; the other end of the capacitor Cdsn and the resistor Rdsn is connected to the resistor Rs.

[0051] In each unit one of the present invention, a gate parasitic resistance thermal noise source is connected in parallel to each resistor Rg, that is, the gate parasitic resistance thermal noise source is respectively connected in parallel to Rg1, Rg2,..., Rgn to characterize the thermal noise of the gate resistance parasitics

[0052] In each unit two of the present invention, a drain parasitic resistance thermal noise source is connected in parallel to each resistor Rd, that is, the drain parasitic resistance thermal noise source is respectively connected in parallel to Rd1, Rd2,..., Rdn to characterize the thermal noise source of the drain resistance parasitics

[0053] In each unit three of the present invention, an intrinsic gate node equivalent noise source is connected in parallel, that is, the intrinsic gate node equivalent noise source is respectively connected in parallel to the series of Cgs1 and Rgs1, the series of Cgs2 and Rgs2,..., the series of Cgsn and Rgsn; to characterize the equivalent noise source at the intrinsic gate node

[0054] In each unit four of the present invention, an intrinsic drain node equivalent noise source is connected in parallel to each resistor Rds, that is, the intrinsic drain node equivalent noise source is respectively connected in parallel to Rds1, Rds2,..., Rdsn to characterize the equivalent noise source at the intrinsic drain node

[0055] In unit five of the present invention, a source parasitic resistance thermal noise source is connected in parallel to the resistor Rs

[0056] In the present invention, n≥2, and different values of n are selected according to the gate electrode structure and operating frequency of the GaN HEMT device.

[0057] Further, referring to Figure 2, in another embodiment of the present invention, the parasitic capacitance Cpgo of the gate pad, the parasitic capacitance Cpdo of the drain pad, and the coupling capacitance Cpgdo between the gate pad and the drain pad are added;

[0058] One end of the gate G is connected to one end of each of the capacitance Cpgo and the capacitance Cpgdo; one end of the source S is connected to one end of each of the capacitance Cpgo and the capacitance Cpdo; one end of the drain D is connected to one end of each of the capacitance Cpgdo and the capacitance Cpdo.

[0059] Furthermore, referring to Figure 3 , in another embodiment of the present invention, the coupling capacitance between the gate and the drain metal and the coupling capacitance between the gate and the source metal are added, the gate-drain metal coupling capacitance Cpgdi, the gate-source metal coupling capacitance Cpgi, and the drain-source metal coupling capacitance Cpdi;

[0060] The gate-drain metal coupling capacitance Cpgdi is characterized by Cpgdi1, Cpgdi2... Cpgdin;

[0061] The gate-source metal coupling capacitance Cpgi is characterized by Cpgi1, Cpgi2... Cpgin;

[0062] The drain-source metal coupling capacitance Cpdi is characterized by Cpdi1, Cpdi2... Cpdin;

[0063] a) One end of the inductor Lg1 is connected to one end of each of the capacitance Cpgi1 and the capacitance Cpgdi1;

[0064] One end of the inductor Lg2 is connected to one end of each of the capacitance Cpgi2 and the capacitance Cpgdi2;

[0065] One end of the inductor Ld1 is connected to one end of the capacitance Cpdi1 and the other end of the Cpgdi1;

[0066] One end of the inductor Ld2 is connected to one end of the capacitance Cpdi2 and the other end of the Cpgdi2;

[0067] Similar to step a), it is described up to Lgn;

[0068] Wherein one end of the inductor Lgn is connected to one end of each of the capacitance Cpgin and the capacitance Cpgdin;

[0069] One end of the inductor Ldn is connected to one end of the capacitance Cpdin and the other end of the capacitance Cpgdin;

[0070] The other ends of the capacitances Cpgi1, Cpgi2... Cpgin are connected to the other end of the inductor Ls;

[0071] The other ends of the capacitances Cpdi1, Cpdi2... Cpdin are connected to the other end of the inductor Ls;

[0072] Where n≥2, different values of n are selected according to the gate electrode structure and operating frequency of the GaN HEMT device.

[0073] It should be noted that the various structural schematic diagrams shown in the drawings are drawn according to the embodiments of the present invention, not made according to the actual ratio. Some details are enlarged for clearer expression, and at the same time, some details may be omitted to simplify the display. The thermal noise of the parasitic resistance of the noise source of the parasitic part and and the equivalent noise sources of the intrinsic noiseless two-port network at the gate node and the source node and are no longer a lumped model, but are characterized by multiple noise sources.

[0074] The above description is only a specific example of the present invention and does not constitute any limitation to the present invention. Obviously, for professionals in the field, after understanding the content and principle of the present invention, various modifications and changes in form and details may be made without departing from the principle and structure of the present invention, as long as the scope of the technical solution in the specification is satisfied. However, these modifications and changes based on the idea of the present invention are still within the protection scope of the present invention.

Claims

1. A GaN HEMT device multi-noise source equivalent circuit topology structure, characterized in that: It includes a unit 5 and n units 1, 2, 3 and 4; the unit 1 is composed of a resistor Rg and an inductor Lg connected in series, the unit 2 is composed of a resistor Rd and an inductor Ld connected in series, the unit 3 is composed of a capacitor Cgs and a resistor Rgs connected in series, the unit 4 is composed of a capacitor Cds and a resistor Rds connected in parallel; the unit 5 is composed of an inductor Ls and a resistor Rs connected in series; Each unit 1 forms a series structure 1, each unit 2 forms a series structure 2, one end of the series structure 1 is connected to the gate G of the GaN HEMT device, one end of the series structure 2 is connected to the drain D of the GaN HEMT device, and the source S of the GaN HEMT device is connected to one end of the unit 5; One end of each unit 1 away from the gate G passes through one unit 3, and one end of each unit 2 away from the drain D passes through one unit 4, and both are connected to the other end of the unit 5; One end of each unit 1 away from the gate G and the other end of the series structure 2 are both connected to one end of the current source Ids, and the other end of the current source Ids is connected to the other end of the unit 5; In each unit one, each resistor Rg is connected in parallel with a gate parasitic resistance thermal noise source, in each unit two, each resistor Rd is connected in parallel with a drain parasitic resistance thermal noise source, in each unit three, each resistor Rds is connected in parallel with an intrinsic gate node equivalent noise source, in each unit four, each resistor Rds is connected in parallel with an intrinsic drain node equivalent noise source, and in the unit five, the resistor Rs is connected in parallel with the source parasitic resistance thermal noise source.

2. The GaN HEMT device multi-noise source equivalent circuit topology structure according to claim 1, characterized in that: Also includes: n units six; The unit six is ​​composed of a capacitor Cgd and a resistor Rgd connected in series, and one end of each unit one away from the gate G passes through a unit six and is connected to one end of the current source Ids.

3. The GaN HEMT device multi-noise source equivalent circuit topology structure according to claim 2, characterized in that: One end of each unit 1 away from the gate G is connected to one end of the current source Ids through a unit 6, specifically: One end of the mth unit one away from the gate G is connected to one end of the capacitor Cgdm of the mth unit six, the other end of the capacitor Cgdm is connected to one end of the resistor Rgdm, the other end of the resistor Rgdm is connected to one end of the current source Ids, 1≤m≤n.

4. The GaN HEMT device multi-noise source equivalent circuit topology structure according to claim 1, 2 or 3, characterized in that: One end of the series structure 1 is connected to the gate G of the GaN HEMT device, specifically: One end of the inductor Lg1 of the first unit 1 serves as one end of the series structure 1 and is connected to the gate G. The other end of the inductor Lg1 is connected to the resistor Rg1 of the first unit 1. The other end of the resistor Rgn of the nth unit 1 serves as the other end of the series structure 1.

5. The GaN HEMT device multi-noise source equivalent circuit topology structure according to claim 1, 2 or 3, characterized in that: One end of the series structure 2 is connected to the drain D of the GaN HEMT device, specifically: One end of the inductor Ld1 of the first unit 2 is used as one end of the series structure 2 and connected to the drain D, the other end of the inductor Ld1 is connected to the resistor Rd1 of the first unit 2, and the other end of the resistor Rdn of the nth unit 2 is used as the other end of the series structure 2.

6. The GaN HEMT device multi-noise source equivalent circuit topology structure according to claim 1, 2 or 3, characterized in that: The source S of the GaN HEMT device is connected to one end of the unit 5, specifically: One end of the inductor Ls serves as one end of the unit five and is connected to the source S. The other end of the inductor Ls is connected to one end of the resistor Rs. The other end of the resistor Rs serves as the other end of the unit five.

7. The GaN HEMT device multi-noise source equivalent circuit topology structure according to claim 1, 2 or 3, characterized in that: One end of each unit 1 away from the gate G is connected to the other end of the unit 5 through a unit 3, specifically: In each unit one, the end close to the gate G is the inductor end, and the end far away from the gate G is the resistor end; in the mth unit one, one end of the resistor Rgm is connected to the inductor Lgm, and the other end is connected to one end of the mth unit three, and the other end of the mth unit three is connected to the other end of the unit five.

8. The GaN HEMT device multi-noise source equivalent circuit topology structure according to claim 1, 2 or 3, characterized in that: One end of each unit 1 away from the gate G is connected to the other end of the unit 5 through a unit 3, specifically: One end of the mth unit 1 away from the gate G is connected to one end of the capacitor Cgsm of the mth unit 3, the other end of the capacitor Cgsm is connected to one end of the resistor Rgsm, and the other end of the resistor Rgsm is connected to the other end of the unit 5.

9. The GaN HEMT device multi-noise source equivalent circuit topology structure according to claim 1, 2 or 3, characterized in that: One end of each unit 2 away from the drain D is connected to the other end of the unit 5 through a unit 4, specifically: In each unit two, the end close to the drain D is the inductor end, and the end away from the drain D is the resistor end; in the mth unit two, one end of the resistor Rdm is connected to the inductor Ldm, and the other end is connected to one end of the mth unit four, and the other end of the mth unit four is connected to the other end of the unit five.

10. The GaN HEMT device multi-noise source equivalent circuit topology structure according to claim 1, 2 or 3, characterized in that: One end of each unit 2 away from the drain D is connected to the other end of the unit 5 through a unit 4, specifically: One end of the m-th unit 2 away from the drain D is connected to one end of the m-th unit 4, and the other end of the m-th unit 4 is connected to the unit 5.

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