Local layout wiring method based on sequence value correction and historical guidance search

Abstract

The invention relates to the technical field of electronic design automation, in particular to a local layout wiring method based on sequence value correction and historical guidance search, which comprises the following steps: calling a multi-source dynamic sequence value wave diffusion path search sub-algorithm, generating initial paths for all wire nets, and initializing a historical solution set and a current solution sequence; random disturbance is carried out based on the current solution sequence, and candidate solutions are generated; judging whether the candidate solutions meet design rule constraints or not; checking whether the maximum iteration frequency is reached or no improvement frequency limit exists, if yes, entering the step of outputting the optimal solution, and otherwise, returning to the step of generating the candidate solution; selecting a wiring path which has an optimal target function value and meets all constraints from the historical solution set, and outputting a final result; according to the local layout wiring method based on sequence value correction and historical guidance search, the problems of high-density region wiring feasibility, complex design rule satisfaction, multi-objective optimization, calculation efficiency and the like can be solved.

Description

Technical Field

[0001] The present invention relates to the field of electronic design automation technology, and in particular, to a local layout wiring method based on sequential value correction and historical guidance search. Background Art

[0002] With the continuous development of integrated circuit manufacturing technology, the integration and complexity of chips have increased exponentially, making chip wiring one of the most challenging key issues in the field of modern electronic design automation (EDA). Wiring is not only the core step in the physical design process but also directly determines the functionality, performance, power consumption, and manufacturability of the chip. However, current wiring technologies still face many technical problems when dealing with chip designs with high integration, high complexity, and strict design rules.

[0003] The chip wiring process needs to meet the interconnection requirements of a large number of nets, and this requirement increases sharply with the scaling of process nodes and the expansion of chip size. The rapid increase in the number of nets poses a huge challenge to the allocation and optimization of wiring resources. Specifically, in the core area of the chip, the net density continues to rise, resulting in a decrease in wiring feasibility and an increasingly prominent problem of resource congestion. Existing wiring algorithms are difficult to effectively avoid conflicts between nets and resource waste in high-density areas, and are prone to open circuits where interconnections are not completed or short circuits caused by congestion, thus affecting the feasibility of the design and circuit performance. In addition, the complexity of design rules brought about by advanced manufacturing processes further increases the difficulty of wiring. Modern chip manufacturing processes require that wiring must strictly comply with a series of design rules, including constraints such as minimum line width, minimum spacing, and minimum area, to ensure high yield and high reliability during chip manufacturing. However, existing wiring tools usually have difficulty achieving a balance between the solution efficiency and the satisfaction of rule constraints when faced with complex design rules. Especially in high-density areas, the wiring tool may experience a significant increase in wiring time due to the increase in computational complexity, further slowing down the design cycle.

[0004] In addition, with the increasing application requirements of EDA tools in actual chip design, the computational efficiency of wiring algorithms has become one of the key factors affecting the practicality of the tools. On the premise of meeting design rules and optimization goals, the wiring tool needs to complete the layout and interconnection of a large number of nets within a limited time. Especially in modern chip design, the operating efficiency of the wiring tool needs to keep pace with the increasing complexity of the chip. However, many current wiring tools have problems with insufficient operating efficiency in actual designs, especially in high-density and high-complexity scenarios, where the wiring time often exceeds the acceptable range, greatly limiting the practical application value of EDA tools.

[0005] In summary, the technical problems faced in the current chip wiring field can be summarized as follows:

[0006] 1. Routing feasibility issues in high - density areas: How to effectively solve wire - net congestion, ensure the interconnection requirements of wire - nets are met in high - density areas, and avoid open - circuit and short - circuit problems.

[0007] 2. Meeting complex design rules: How to reduce the computational complexity of routing while meeting a large number of design - rule constraints (such as minimum wire width, minimum spacing, etc.), and improve the efficiency of routing solution.

[0008] 3. Multi - objective optimization: How to find a reasonable balance among multiple optimization objectives such as total wire length, signal delay, etc., to meet the requirements of high - performance chip design.

[0009] 4. Computational efficiency: How to improve the running efficiency of routing tools in chip design, enabling them to complete the routing task within a limited time and adapt to the rapid iteration requirements of modern chip design.

[0010] In summary, the problems faced by chip routing are essentially multiple contradictions among high - density interconnection requirements, complex design rules, and optimization objectives. These problems are intertwined, making it difficult for existing local routing algorithms to balance accuracy, efficiency, and adaptability. Especially in high - density local routing scenarios, the algorithm needs to complete the comprehensive optimization of dynamic resource allocation, multi - objective trade - off, and strict rule constraints within limited computing time, while traditional methods show obvious limitations in dealing with high - complexity scenarios. Therefore, there is an urgent need for an innovative algorithm and system that can efficiently solve the above - mentioned technical problems and provide strong technical support for modern integrated - circuit design. Summary of the Invention

[0011] The object of the present invention is to propose a local layout routing method based on sequential - value correction and history - guided search, which can solve problems such as routing feasibility in high - density areas, meeting complex design rules, multi - objective optimization, and computational efficiency.

[0012] To achieve this object, the present invention adopts the following technical solutions:

[0013] A local layout routing method based on sequential - value correction and history - guided search includes the following steps:

[0014] Initial - solution generation: Invoke the multi - source dynamic sequential - value wave - diffusion path - search sub - algorithm to generate initial paths for all wire - nets, and initialize the historical - solution set and the current - solution sequence.

[0015] Candidate - solution generation: Based on the current - solution sequence, perform random perturbations to generate a perturbed - solution sequence, and then invoke the multi - source dynamic sequential - value wave - diffusion path - search sub - algorithm to re - plan the paths to generate candidate solutions.

[0016] Candidate solution evaluation and historical solution update: Determine whether the candidate solution meets the design rule constraints. If it is legal, calculate its objective function value and compare it with the solutions in the historical solution set. Update the historical solution set and the current solution sequence according to the preset acceptance rule;

[0017] Termination condition judgment: Check whether the maximum number of iterations or the limit of the number of non-improving iterations is reached. If satisfied, enter the step of outputting the optimal solution; otherwise, return to the step of generating candidate solutions;

[0018] Output the optimal solution: Select the routing path with the optimal objective function value and meeting all constraints from the historical solution set, and output the final result.

[0019] Preferably, the step of generating the initial solution specifically includes:

[0020] Through the multi-source dynamic sequential value wave diffusion path search sub-algorithm, initialize the path for each net in turn to ensure that the path meets the design rule constraints;

[0021] Initialize the historical solution set based on the objective function value of the initial solution. The historical solution set is a historical window with a fixed length, used to record the candidate solution objective values during the iteration process.

[0022] Preferably, in the step of generating candidate solutions, the random perturbation strategies include:

[0023] Adjust the routing order priority of the nets;

[0024] Randomly exchange the connection order of the source point or the target point;

[0025] Perform local heuristic optimization adjustment on the current path to generate diverse candidate solutions.

[0026] Preferably, in the step of candidate solution evaluation and historical solution update, the candidate solution acceptance rule is:

[0027] If the objective function value of the candidate solution is better than the current solution, accept and update the current solution;

[0028] If the objective function value of the candidate solution is worse than the current solution but better than the worst value in the historical solution set, accept and replace the oldest value in the historical solution set;

[0029] In other cases, reject the candidate solution and retain the current solution.

[0030] Preferably, the multi-source dynamic sequential value wave diffusion path search sub-algorithm includes the following sub-steps:

[0031] Initialize the sequential value matrix: Dynamically adjust the sequential value according to the occupancy status of the grid points, the path diffusion influence, and the layout diffusion influence;

[0032] Simulate the wave diffusion process through a priority queue, search for the optimal path starting from multiple source points, and dynamically update the path backtracking information;

[0033] If the path reaches the target point, backtrack to generate the complete path and update the net connection requirement set.

[0034] Preferably, the update rule of the sequence value matrix includes:

[0035] The occupied grid points are marked with the Occupied sequence value;

[0036] The area affected by path diffusion is marked with the Path Influence sequence value;

[0037] The area affected by layout diffusion is marked with the Layout Influence sequence value.

[0038] Preferably, the design rule constraints include:

[0039] Minimum spacing and minimum line width constraints between paths;

[0040] Path continuity and no cross - short - circuit constraints;

[0041] Resource occupancy uniqueness constraint.

[0042] Preferably, the objective function value is the weighted sum of the total path length and the routing congestion, which is used to quantify the global optimization effect of path planning.

[0043] Preferably, accelerate the wave diffusion path search process through parallel computing and implement dynamic resource allocation to avoid local congestion in real - time.

[0044] Preferably, the optimal solution needs to pass the design rule check and electrical rule check to ensure the manufacturing feasibility and electrical performance of the routing result.

[0045] The technical solution provided by the present invention may include the following beneficial effects:

[0046] Through dynamic sequence value correction, historical guidance search framework and multi - objective optimization mechanism, the present invention systematically solves the problems of congestion, rule conflicts and efficiency in high - density routing, improves the quality of the global solution, can cover multiple dimensions such as routing quality, computing efficiency, manufacturing feasibility and electrical performance, shortens the routing time, and meets the rapid iteration requirements of modern chip design. Quickly generate an initial path that meets the design rules through multi - source wave diffusion search, reducing the computational burden of subsequent iterations. The historical guidance search framework avoids falling into local optima by perturbing and evaluating candidate solutions, improving the quality of the global solution. Through the termination condition judgment mechanism, such as the maximum number of iterations, ensure that the algorithm outputs a feasible solution within a reasonable time to adapt to the rapid iteration requirements. Description of the Drawings

[0047] Figure 1 It is a schematic diagram of the overall algorithm flow of an embodiment of the present invention;

[0048] Figure 2 It is a schematic diagram of the sub - algorithm flow for searching the multi - source dynamic sequential value wave diffusion path of an embodiment of the present invention;

[0049] Figure 3 It is a schematic diagram showing the layout placement information and its ports with 5 layout diagrams in an embodiment of the present invention;

[0050] Figure 4 It is a schematic diagram showing part of the operation results of the connect_5 case in an embodiment of the present invention;

[0051] Figure 5 It is a schematic diagram showing part of the operation results of the connect_10 case in an embodiment of the present invention. Detailed implementation manners

[0052] The embodiments of the present invention will be described in detail below. The examples of the embodiments are shown in the accompanying drawings. The embodiments described below by referring to the accompanying drawings are exemplary and are only used to explain the present invention and should not be construed as limiting the present invention. In this specification, a net refers to a circuit network to be connected, and a path refers to a specific routing trajectory.

[0053] Next, in combination with Figures 1 to 5 , a local layout routing method based on sequential value correction and historical guidance search according to an embodiment of the present invention will be described.

[0054] A local layout routing method based on sequential value correction and historical guidance search includes the following steps:

[0055] Initial solution generation: Invoke the multi - source dynamic sequential value wave diffusion path search sub - algorithm to generate initial paths for all nets, and initialize the historical solution set and the current solution sequence;

[0056] Candidate solution generation: Based on the current solution sequence, perform random perturbation to generate a perturbed solution sequence, and then invoke the multi - source dynamic sequential value wave diffusion path search sub - algorithm to re - plan the paths to generate candidate solutions;

[0057] Candidate solution evaluation and historical solution update: Determine whether the candidate solution meets the design rule constraints. If it is legal, calculate its objective function value, compare it with the solutions in the historical solution set, and update the historical solution set and the current solution sequence according to the preset acceptance rule;

[0058] Termination condition judgment: Check whether the maximum number of iterations or the limit of the number of non - improvements is reached. If so, enter the step of outputting the optimal solution; otherwise, return to the step of candidate solution generation;

[0059] Output the optimal solution: Select the routing path with the optimal objective function value from the set of historical solutions and that satisfies all constraints, and output the final result.

[0060] Through core steps such as initial solution generation, candidate solution generation, candidate solution evaluation and historical solution update, termination condition judgment, and optimal solution output, the present invention realizes a dynamic sequential value correction, a historical guidance search framework, and a multi-objective optimization mechanism, systematically solving the problems of congestion, rule conflicts, and efficiency in high-density routing, improving the quality of the global solution, covering multiple dimensions such as routing quality, computational efficiency, manufacturing feasibility, and electrical performance, shortening the routing time, and meeting the rapid iteration requirements of modern chip design.

[0061] Efficient initial solution generation: Quickly generate an initial path that satisfies the design rules through multi-source wave diffusion search, reducing the computational burden of subsequent iterations.

[0062] Dynamic optimization ability: The historical guidance search framework avoids getting stuck in local optima and improves the quality of the global solution by perturbing and evaluating candidate solutions.

[0063] High convergence efficiency: The termination condition judgment mechanism, such as the maximum number of iterations, ensures that the algorithm outputs a feasible solution within a reasonable time, meeting the rapid iteration requirements.

[0064] The present invention realizes efficient routing in a constrained environment through a number of key technologies, and the beneficial effects include:

[0065] Dynamic sequential value update and resource utilization optimization: The algorithm of the present invention realizes a dynamic sequential value update mechanism. By adjusting the sequential value matrix of the grid in real time, it effectively avoids resource conflicts and local congestion problems in path planning. Whenever a path occupies certain grids, the algorithm can dynamically expand its influence range and update the sequential value, thus providing reasonable guidance for subsequent path planning. This dynamic adjustment strategy based on sequential value correction significantly improves the resource utilization efficiency.

[0066] Multi-source - multi-objective path planning ability: The algorithm of the present invention adopts a multi-source - multi-objective path search strategy, which can quickly find the optimal path that satisfies the constraints in the local grid. By introducing various strategies (such as dynamically adjusting the path order, wave exploration, etc.), the algorithm can efficiently explore the global solution space and avoid getting stuck in local optima. Especially in high-complexity connection scenarios, the present invention shows superior path planning ability.

[0067] Combination of local perturbation and heuristic optimization: The algorithm realizes an optimization strategy based on local perturbation. Through randomized perturbation operations and heuristic adjustments, it can continuously improve the routing quality on the basis of the initial solution.

[0068] Design Rule - Oriented Comprehensive Optimization: In the process of path planning, the present invention comprehensively considers various design rules such as wire length and minimum spacing, and balances the conflicts between different objectives through an adaptive optimization method.

[0069] Efficient Implementation and Running Efficiency: Through an optimization framework based on Historical Guidance Search (HGS), the present invention combines search efficiency with path planning ability, and can quickly generate high - quality routing results within limited running time. Experimental results show that the algorithm is superior to traditional methods in terms of solving speed and solution quality.

[0070] In summary, through an innovative local detailed routing algorithm, the present invention effectively improves the efficiency and quality of routing. It can meet strict design rules while significantly reducing the occupation of routing resources and computational costs. This not only helps to optimize the chip design process, shorten the R & D cycle, but also reduces the failure rate and resource waste in the chip manufacturing process, providing strong support for the sustainable development of EDA tools. The technical solution of the present invention has good generality and flexibility.

[0071] Specifically, the step of generating the initial solution specifically includes:

[0072] Through the multi - source dynamic sequential value wave diffusion path search sub - algorithm, initial paths are planned for each net in turn to ensure that the paths meet the design rule constraints;

[0073] Initialize the historical solution set based on the objective function value of the initial solution. The historical solution set is a historical window with a fixed length, which is used to record the objective values of candidate solutions during the iteration process.

[0074] By calling the sub - algorithm to plan the initial path and initialize the historical solution set, the specific implementation method of generating the initial solution is limited. The historical solution set with a fixed length can retain the recent optimization trend, avoid interference from outdated solutions, make the initial solution legal and reliable, reduce the ineffective search in subsequent iterations, and at the same time improve the historical window to enhance the algorithm stability and avoid violent fluctuations in the optimization process.

[0075] This step first calls the multi - source dynamic sequential value wave diffusion path search sub - algorithm to provide an initial solution for the historical guidance search algorithm, and at the same time prepares an initial historical solution set and the current solution sequence for the historical guidance search algorithm.

[0076] Use the path search sub - algorithm to generate a set of initial paths for each net to be connected; create a historical window with a fixed length to record the previous objective function values, initially fill this window, and fill all positions with the objective function value of the initial solution; take the generated initial solution as the current solution and record the current objective function value.

[0077] Preferably, in the step of generating candidate solutions, the random perturbation strategy includes:

[0078] Adjust the wiring order priority of the wire network;

[0079] Randomly exchange the connection order of the source point or the target point;

[0080] Perform local heuristic optimization adjustment on the current path to generate diverse candidate solutions.

[0081] Based on the current solution, optimize the random perturbation strategy in the generation of restricted candidate solutions by adjusting the wiring order, changing the starting point set and the ending point of each connection, exchanging the connection order, etc. For the solution sequence after perturbation, use the path search sub-algorithm to re-plan the path. The path search sub-algorithm will dynamically adjust the order values, such as the path diffusion order value, the layout diffusion order value, etc., to ensure that the new path avoids the high-order value area as much as possible. The perturbation strategy generates diverse candidate solutions by changing the wire network priority or local path adjustment, which can take into account the diversity of solutions and the local optimization potential, break the local optimum, expand the solution space, and improve the robustness of the algorithm in high-complexity scenarios. When evaluating candidate solutions, first judge whether they are legal solutions, such as whether there are missing paths and whether they meet the various constraints in the mathematical model. If they are not legal solutions, they will be discarded in the next step. If they are legal solutions, calculate the objective function value of the candidate solutions, such as the total path length, and consider whether to update the historical solution set in the next step.

[0082] Specifically, in the steps of candidate solution evaluation and historical solution update, the candidate solution acceptance rule is:

[0083] If the objective function value of the candidate solution is better than the current solution, accept and update the current solution;

[0084] If the objective function value of the candidate solution is worse than the current solution but better than the worst value in the historical solution set, accept and replace the oldest value in the historical solution set;

[0085] In other cases, reject the candidate solution and retain the current solution.

[0086] According to the candidate solution acceptance rule of the history-guided search algorithm, decide whether to accept the candidate solution and update the historical solution set and the current solution sequence. Update the current solution based on the comparison result of the objective function value and the historical solution set, determine the candidate solution acceptance rule, be able to dynamically accept the threshold, allow some inferior solutions to enter the historical set, retain the potential optimization direction, achieve accelerated convergence, avoid stagnation, and improve the adaptability of the algorithm to complex constraints.

[0087] The pseudo-code of the history-guided search algorithm is:

[0088] Generate the initial solution s;

[0089] Calculate the objective function value C(s) of the initial solution;

[0090] Specify the historical length \(L_h\);

[0091] Initialize the historical array \(f_k\), and set the values of all \(k\in\{0,\cdots,L_h - 1\}\) to \(C(s)\);

[0092] Set the iteration counter to \(I = 0\);

[0093] When the termination condition is not met, repeat the following steps:

[0094] Construct a candidate solution \(s^*\);

[0095] Calculate the objective function value \(C(s^*)\) of the candidate solution;

[0096] If \(C(s^*)<f[I\bmod L_h]\) or \(C(s^*)<C(s)\): Accept the candidate solution: \(s = s^*\);

[0097] Otherwise: 12. Reject the candidate solution: \(s = s\);

[0098] Update the historical array: \(f[I\bmod L_h]:=C(s)\);

[0099] Increment the iteration counter by 1: \(I = I + 1\);

[0100] Return the optimal solution found.

[0101] Preferably, the multi-source dynamic sequential value wave diffusion path search sub-algorithm includes the following sub-steps:

[0102] Initialize the sequential value matrix: Dynamically adjust the sequential value according to the occupancy status of grid points, path diffusion influence, and layout diffusion influence;

[0103] Simulate the wave diffusion process through a priority queue, search for the optimal path starting from multiple source points, and dynamically update the path backtracking information;

[0104] If the path reaches the target point, backtrack to generate the complete path and update the net connection requirement set.

[0105] Implement the multi-source dynamic sequential value wave diffusion path search sub-algorithm through sequential value initialization, wave diffusion search, and path backtracking. Achieve efficient path exploration through a priority queue, simulate the wavefront propagation process, quickly generate feasible paths, reduce the computational overhead, and the dynamic sequential value can guide the path to avoid conflict areas and reduce the congestion risk.

[0106] In the loop, the queue continuously pops the head element and processes adjacent network points. This step is the wave diffusion process. The adjacent neighbor nodes after diffusion are pushed into the tail of the queue. By repeating this process continuously, the entire path search process will be like wave diffusion, simulating the process of waves spreading outward from the starting point, and accompanied by dynamically adjusting the order values of grid points, gradually exploring and finding the optimal path from multiple starting points to the target point. The specific implementation process is as follows:

[0107] Initialize the set of wire connection requirements: Initialize all pairs of wires to be connected, that is, the source point set and the end point set, and store these wire requirements as a set for subsequent processing one by one.

[0108] Update the source point set and the end point set: If it is the first time to update the source point and the end point set, then initialize the source point set and the end point set. According to the wiring requirements and the current solution sequence after perturbation, take the corresponding ports of the corresponding layout as the source point set and the end point set; If it is a subsequent loop iteration process, then add the set of path points searched each time to the end point set, so that other source points can achieve multi-source connection wiring in this loop search process, rather than each source point can only connect to the initial end point. If a source point connects to an existing path during the wave diffusion process, multi-source wiring connection can be achieved.

[0109] Judge whether the set is empty: If the set of wire connection requirements is empty, it means that all wires have been successfully connected, the algorithm ends, and the final path set is output. If the set is not empty, then enter the subsequent process to continue processing the current uncompleted wire connection requirements.

[0110] Initialize the order value matrix and the priority queue:

[0111] Initialize the point weight graph: Set the order value of each point in the grid, including: the occupied grid points are marked with the Occupied order value, the influence area of path diffusion is set to the Path Influence order value, and the influence area of layout diffusion is set to the Layout Influence order value. Ensure that the state of each point in the grid is correct for the search algorithm to process.

[0112] Initialize the priority queue: Add all source points in the current wire connection requirements to the priority queue. The initial element of the priority queue is (total cost of the source point, source point coordinates).

[0113] Judge whether the queue is empty: If the priority queue is empty and there are still unmet wire requirements, it means that no feasible path can be found for the current wire requirements. At this time, an error message is output to indicate that no legal connection path has been searched for the current path, and the sub-algorithm ends with an error status and is handed over to the evaluation of candidate solutions in the main algorithm process for processing.

[0114] If the priority queue is not empty, then pop the head element of the queue and enter the next step.

[0115] Determine whether the target point is the end point: Check whether the current point (x, y) belongs to the set of target points. If it is the end point, perform path backtracking, construct a complete path from the source point to the end point, add the path to the final path set, update the wire network connection requirement set, delete the currently completed wire network, return to the main loop, and process the next wire network requirement; if it is not the end point, proceed to the next step and process the adjacent grid points of the current point, that is, explore adjacent network points.

[0116] Process adjacent network points: Traverse all adjacent grid points (nx, ny) of the current point (x, y). The point (nx, ny) is the point obtained by exploring one grid in each of the up, down, left, and right directions from the point (x, y). If (nx, ny) is a valid point (not out of bounds, not an obstacle, not occupied), calculate the new total cost: new_dist = dist[x][y] * order_values[nx][ny]. If new_dist is better than the currently recorded optimal total cost, update dist[nx][ny] = new_dist, and record the current point (x, y) as the parent node of the adjacent point (nx, ny): parent[nx][ny] = (x, y). The parent node represents the path direction from the current point (x, y) to the adjacent point (nx, ny). Recording the parent node is to facilitate finding the parent node step by step during subsequent path backtracking until a complete path is found, and add (new_dist, nx, ny) to the priority queue for subsequent processing.

[0117] Store at the end of the queue: Store the processed adjacent points at the end of the priority queue according to the calculated cost, so as to continue searching other grid points, return to the priority queue loop, and continuously repeat processing the next grid point until the corresponding conditions are met.

[0118] Path backtracking: When the target point is successfully found, according to the parent matrix, backtrack from the end point to the starting point to construct the path, and store each point of the path in the final path set.

[0119] Specifically, the update rules of the order value matrix include:

[0120] The occupied grid points are marked with the Occupied order value;

[0121] The area affected by path diffusion is marked with the Path Influence order value;

[0122] The area affected by layout diffusion is marked with the Layout Influence order value.

[0123] Stratify the dynamic sequential values by differentiating direct occupation, path diffusion influence, and layout diffusion influence, precisely control path selection, strictly meet the minimum pitch and line width constraints, and perceive the resource occupation status in real time to avoid short - circuit and open - circuit problems.

[0124] The update rule of the sequential value matrix includes three types of sequential values. The setting of these three types of sequential values will make the path search direction different in different situations. Obviously, the grid points that have been occupied should be avoided during path search. Setting a very large value for the sequential value will play a role similar to punishment. If the path passes through an occupied grid point, the total cost will become extremely large, and the searched path will tend to avoid the occupied grid points. Similarly, the setting of the Path Influence sequential value and the Layout Influence sequential value is similar. If the path passes through this point, the total sequential value is relatively far behind compared to passing through other points, and this path point will not be given priority. Then, it will make the path avoid the influence areas of other path diffusions and layout diffusions as much as possible to meet the minimum pitch requirements between paths and between paths and layout obstacles.

[0125] Preferably, the design rule constraints include:

[0126] The minimum pitch between paths and the minimum line width constraint;

[0127] Path continuity and non - cross - short - circuit constraint;

[0128] Resource occupation uniqueness constraint.

[0129] Implement process constraints through the pitch and line width between paths, avoid short - circuits between wires or devices with different potentials, and avoid the overlap of the wiring path with the layout or other parts of the layout (such as devices, wells, isolation regions, etc.). Incorporate them into the optimization objective uniformly, integrate multi - dimensional rules, ensure that the wiring result meets the manufacturing process requirements, and can also reduce signal delay and power consumption, improving chip performance.

[0130] Specifically, the objective function value is the weighted sum of the total path length and wiring congestion, which is used to quantify the global optimization effect of path planning.

[0131] Optimize the minimization of the total path length and wiring congestion in a weighted - sum multi - objective manner. The wiring algorithm realizes the optimization objectives of minimizing the total path length and wiring congestion on the premise of meeting the design rule constraints, wiring resource constraints, and path feasibility constraints, balances the conflicting requirements of wire length and congestion rate, avoids the resource allocation imbalance caused by single - optimization, provides a clear evaluation standard, and enhances the controllability of the algorithm.

[0132] Preferably, accelerate the wave - diffusion path search process through parallel computing and implement dynamic resource allocation to avoid local congestion in real time.

[0133] Parallel optimization is adopted to improve the search efficiency. Multithreaded processing is used to explore grid points, shortening the path planning time, which can significantly improve the computational efficiency of large-scale routing scenarios. Dynamic resource allocation can relieve local congestion in real time.

[0134] Specifically, to output the optimal solution, design rule checking (DRC) and electrical rule checking (ERC) are required to ensure the manufacturability and electrical performance of the routing results.

[0135] Embedding the rule checking into the algorithm output step to ensure the practical feasibility of the solution can reduce the risk of chip manufacturing failure and improve the electrical reliability and signal integrity of the routing results.

[0136] Input case description of connection information (Connect):

[0137] The connection information describes multiple source points and target points that need to be interconnected in the routing task. To comprehensively demonstrate the performance of the algorithm under different connection scales, multiple representative connection information cases are selected, including the cases with the number of connections being 5, 10, 20, 30, 40, and 50.

[0138] (1) Overview of connection files: For easy understanding and demonstration, the basic structures and characteristics of all connection files (connect_5 to connect_50) are summarized and shown in the following table.

[0139]

[0140] Table 1 Overview of overall information of connection files

[0141] (2) Specific example of connection file: To more intuitively display the connection information, the following shows the specific connection information with the number of connections being 5 (connect_5).

[0142]

[0143] Table 2 Specific connection information of connect_5

[0144] Input case description of layout placement information (Placement_Info): The layout placement information details the overall scope of the routing area, design rules, and the specific positions and structures of each module. The cases include the placement information with the number of layout diagrams ranging from 5 to 45. The following shows the placement information with the number of layout diagrams being 5.

[0145]

[0146] Table 3 Placement information with the number of layout diagrams being 5

[0147] In the description of this specification, the descriptions referring to terms such as "embodiment", "example", etc. mean that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in a suitable manner in any one or more embodiments or examples.

[0148] Although the embodiments of the present invention have been shown and described, those of ordinary skill in the art can understand that various changes, modifications, substitutions and variations can be made to these embodiments without departing from the principles and spirit of the present invention, and the scope of the present invention is defined by the claims and their equivalents.

Claims

1. A local layout routing method based on sequence value correction and history guidance search, characterized in that: The steps include: Initial solution generation: call the multi-source dynamic sequential value wave diffusion path search sub-algorithm to generate initial paths for all line networks and initialize the historical solution set and the current solution sequence; Candidate solution generation: Randomly perturb the current solution sequence to generate a perturbed solution sequence, and call the multi-source dynamic sequential value wave diffusion path search sub-algorithm to re-plan the path and generate candidate solutions; Candidate solution evaluation and historical solution update: Determine whether the candidate solution meets the design rule constraints. If it is legal, calculate its objective function value and compare it with the solutions in the historical solution set. Update the historical solution set and the current solution sequence according to the preset acceptance rules. Termination condition judgment: Check whether the maximum number of iterations has been reached or there is no limit on the number of improvements. If so, proceed to the step of outputting the optimal solution; otherwise, return to the step of generating candidate solutions. Output the optimal solution: Select the routing path with the optimal objective function value and that satisfies all constraints from the historical solution set, and output the final result.

2. A local layout routing method based on sequence value correction and history guidance search according to claim 1, characterized in that: The steps of generating the initial solution specifically include: Through the multi-source dynamic sequential value wave diffusion path search sub-algorithm, the initial path is planned for each line network in turn to ensure that the path meets the design rule constraints; The historical solution set is initialized based on the objective function value of the initial solution. The historical solution set is a historical window of fixed length, which is used to record the target values ​​of candidate solutions in the iteration process.

3. A local layout routing method based on sequence value correction and history guidance search according to claim 1, characterized in that: In the candidate solution generation step, the random perturbation strategy includes: Adjust the wiring order priority of the wire net; Randomly swap the connection order of source or target points; Perform local heuristic optimization and adjustment on the current path to generate diversified candidate solutions.

4. A local layout routing method based on sequence value correction and history guidance search according to claim 1, characterized in that: In the steps of candidate solution evaluation and historical solution update, the candidate solution acceptance rule is: If the objective function value of the candidate solution is better than the current solution, the current solution is accepted and updated; If the objective function value of the candidate solution is worse than the current solution but better than the worst value in the historical solution set, then the oldest value in the historical solution set is accepted and replaced; In other cases, the candidate solution is rejected and the current solution is retained.

5. A local layout routing method based on sequence value correction and history guidance search according to claim 1, characterized in that: The multi-source dynamic sequential value wave diffusion path search sub-algorithm includes the following sub-steps: Initialize the order value matrix: dynamically adjust the order value according to the occupancy status of the grid points, the path diffusion effect, and the layout diffusion effect; By simulating the wave diffusion process through priority queues, the optimal path is searched from multiple source points, and the path backtracking information is dynamically updated; If the path reaches the target point, it will backtrack to generate the complete path and update the network connection requirement set.

6. A local layout routing method based on sequence value correction and history guidance search according to claim 5, characterized in that: The updating rules of the order value matrix include: The occupied grid points are marked with the Occupied sequence value; The area affected by path diffusion is marked as Path Influence order value; The areas affected by layout diffusion are marked with Layout Influence order values.

7. A local layout routing method based on sequence value correction and history guidance search according to claim 1, characterized in that: The design rule constraints include: Minimum spacing and minimum line width constraints between paths; Path continuity and no cross short circuit constraints; Resource occupancy uniqueness constraint.

8. A local layout routing method based on sequence value correction and history guidance search according to claim 1, characterized in that: The objective function value is a weighted sum of the total path length and the routing congestion, and is used to quantify the global optimization effect of path planning.

9. A local layout routing method based on sequence value correction and history guidance search according to claim 1, characterized in that: The wave diffusion path search process is accelerated through parallel computing, and dynamic resource allocation is achieved to avoid local congestion in real time.

10. A local layout routing method based on sequence value correction and history guidance search according to claim 1, characterized in that: The output of the optimal solution must pass the design rule check and electrical rule check to ensure the manufacturing feasibility and electrical performance of the wiring results.

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