Intelligent optical computing chip cluster architecture and system

Abstract

The present disclosure relates to the technical field of optical computing, and particularly relates to an intelligent optical computing chip cluster architecture and system. The architecture comprises: a plurality of optical computing chips, and optical path channels are established between the plurality of optical computing chips by using spatial phase adjustment to modulate light beams; and high-speed optical communication and optical diffraction network computing are performed between the plurality of optical computing chips by performing time-domain intensity modulation on the optical path channels. The present disclosure adopting the above scheme can realize the interconnection computing of optical computing chips in the spatial dimension, and does not rely on electricity for information transmission.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the field of optical computing, and in particular to an intelligent optical computing chip cluster architecture and system. BACKGROUND

[0002] With the rapid development of artificial intelligence and scientific computing, the complexity and scale of computing demand are also increasing. However, the existing electronic computing technology is limited by Moore's Law, and its performance is gradually approaching saturation, making it difficult to effectively cope with the increasingly stringent demand for computing power and power consumption of large-scale complex algorithms. Light has natural advantages such as high throughput and low delay in the process of propagation, and optical computing technology using photons instead of electrons as computing carriers is considered as a key to breaking the existing computing bottleneck. SUMMARY

[0003] The present disclosure aims to at least partially solve one of the technical problems in the related art.

[0004] To this end, the first object of the present disclosure is to propose an intelligent optical computing chip cluster architecture to realize the interconnection computing of optical computing chips in the spatial dimension without relying on electricity for information transmission.

[0005] The second object of the present disclosure is to propose an intelligent optical computing chip cluster system.

[0006] To achieve the above-mentioned objects, the first aspect of the present disclosure proposes an intelligent optical computing chip cluster architecture, comprising:

[0007] A plurality of optical computing chips, wherein the optical computing chips utilize spatial phase adjustment to modulate light beams to establish optical path channels between the optical computing chips;

[0008] By time-domain intensity modulation on the optical path channels, high-speed optical communication and optical diffraction network computing are performed between the plurality of optical computing chips.

[0009] Optionally, the optical computing chip comprises an on-chip grating transmitting module and an on-chip grating receiving module, and the plurality of optical computing chips utilize the on-chip grating transmitting module and the on-chip grating receiving module to modulate light beams by spatial phase adjustment to establish optical path channels between the optical computing chips.

[0010] Optionally, when the plurality of optical computing chips perform optical diffraction network computing, the method is specifically used for:

[0011] Obtaining a to-be-computed task;

[0012] Optimizing the initial emission phase of each optical computing chip in the plurality of optical computing chips according to the to-be-computed task until a target emission phase meeting the optimization requirement is obtained;

[0013] Based on the target emission phase, the plurality of optical computing chips constitute an optical diffraction network corresponding to the to-be-computed task, and perform the to-be-computed task based on the optical diffraction network to obtain a computation result.

[0014] Optionally, the optimization of the initial emission phase of each optical computing chip in the plurality of optical computing chips according to the to-be-computed task comprises:

[0015] Fresnel phase modulation is performed on the initial emission phase of each optical computing chip in the plurality of optical computing chips according to the to-be-computed task.

[0016] Optionally, the optimization of the initial emission phase of each optical computing chip in the plurality of optical computing chips according to the to-be-computed task comprises:

[0017] The initial emission phase of each optical computing chip in the plurality of optical computing chips is modeled as a trainable parameter.

[0018] The trainable parameter is trained by using a neural network, so as to achieve an optimization target of maximum signal-to-noise ratio.

[0019] To achieve the above object, a second aspect of the present disclosure provides an intelligent optical computing chip cluster system, comprising:

[0020] A plurality of optical computing chips, and optical paths are established between the plurality of optical computing chips by using spatial phase adjustment to modulate light beams.

[0021] High-speed optical communication and optical diffraction network computation are performed between the plurality of optical computing chips by performing time-domain intensity modulation on the optical paths.

[0022] Optionally, the optical computing chip comprises an on-chip grating emission module and an on-chip grating receiving module, and the optical paths are established between the plurality of optical computing chips by using the spatial phase adjustment to modulate light beams through the on-chip grating emission module and the on-chip grating receiving module.

[0023] Optionally, when the optical diffraction network computation is performed between the plurality of optical computing chips, the system is specifically used for:

[0024] Obtaining a to-be-computed task;

[0025] Optimizing the initial emission phase of each optical computing chip in the plurality of optical computing chips according to the to-be-computed task until a target emission phase meeting an optimization requirement is obtained;

[0026] Based on the target emission phase, the plurality of optical computing chips constitute an optical diffraction network corresponding to the to-be-computed task, and perform the to-be-computed task based on the optical diffraction network to obtain a computation result.

[0027] Optionally, the optimizing the initial emission phase of each optical computing chip in the plurality of optical computing chips according to the to-be-computed task comprises:

[0028] Fresnel phase modulating the initial emission phase of each optical computing chip in the plurality of optical computing chips according to the to-be-computed task.

[0029] Optionally, the optimizing the initial emission phase of each optical computing chip in the plurality of optical computing chips according to the to-be-computed task comprises:

[0030] modeling the initial emission phase of each optical computing chip in the plurality of optical computing chips as a trainable parameter;

[0031] training the trainable parameter by using a neural network, so as to achieve an optimization target of maximum signal-to-noise ratio.

[0032] In summary, the intelligent optical computing chip cluster architecture and system provided by the present disclosure establishes optical path channels between chips by using spatial phase adjustment to modulate light beams, performs high-speed optical communication between clusters through time-domain intensity modulation after the optical path channels are established, and the optical path channels can support optical diffraction network for computation. The three-dimensional spatial chip stacking manner can support the interconnection computation of optical computing chips in the spatial dimension, and does not rely on electricity for information transmission.

[0033] Additional aspects and advantages of the present disclosure will be made apparent from the following description, which, taken together with the accompanying drawings, describes and illustrates some embodiments of the present disclosure. BRIEF DESCRIPTION OF DRAWINGS

[0034] The above and / or additional aspects and advantages of the present disclosure will become apparent and be readily understood from the following description, taken together with the accompanying drawings, in which:

[0035] Figure 1 a structural schematic diagram of an intelligent optical computing chip cluster architecture provided by an embodiment of the present disclosure;

[0036] Figure 2 an application schematic diagram of an intelligent optical computing chip cluster architecture provided by an embodiment of the present disclosure;

[0037] Figure 3 a display schematic diagram of an optical computing cluster interconnection computing addressing space field range provided by an embodiment of the present disclosure;

[0038] Figure 4 a display schematic diagram of an optical computing cluster interconnection computing addressing distance effective range provided by an embodiment of the present disclosure. DETAILED DESCRIPTION

[0039] Embodiments of the present disclosure are described below in detail, examples of which are shown in the drawings, wherein the same or similar notations represent the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by reference to the drawings are exemplary and are intended to explain the present disclosure, and cannot be understood as a limitation of the present disclosure.

[0040] With the rapid development of science and technology, the computing resources required in tasks such as deep learning, big data processing and scientific simulation have increased dramatically. This trend has led to an increasing demand for computing servers, especially in cloud computing, data centers and supercomputers. However, relying solely on traditional central processing units (CPUs) and graphics processing units (GPUs) for computing expansion has brought a series of problems. For example, while these hardware gradually improves in performance, their power consumption also increases. In order to meet higher computing demands, more computing chips are often stacked, leading to a sharp increase in data center energy consumption, which not only increases operating costs but also has a huge impact on the environment. At the same time, traditional computing architectures also face significant bottlenecks when processing large-scale computations. The reason for this is that the bottleneck of traditional architectures is mainly in the data transmission between storage and computing resources, as well as the limitation of computing density. Even though hardware performance is constantly optimized, the energy efficiency of computing tasks grows at a much slower rate than the growth of computing demand, making it increasingly difficult to solve current large-scale computing problems through traditional computing modes.

[0041] To address these challenges, more and more researchers and enterprises are beginning to explore new computing paradigms, such as edge computing, quantum computing, photonic computing and heterogeneous computing architectures. Light has natural physical properties such as high throughput, high speed and high energy efficiency during propagation. Photonic computing technology, which uses photons instead of electrons as computing carriers, is considered a key to breaking existing computing bottlenecks. The ability to achieve high-channel parallel data transmission using spatial light propagation, and the use of chip optical computing to make computing more compact, however, due to the inability to balance high computing throughput, computing density and reconfigurability, so far there is no optical computing system that can complete supercomputing scale computing tasks (commonly known as astronomical computing, weather forecasting, particle collision data processing, etc.).

[0042] The present disclosure will be described in detail below with specific embodiments.

[0043] Figure 1 A structural schematic diagram of an intelligent optical computing chip cluster architecture provided by an embodiment of the present disclosure is shown in FIG. 1. As shown in the figure, the intelligent optical computing chip cluster architecture includes: Figure 1

[0044] ​a plurality of optical computing chips, and the optical path channels between the plurality of optical computing chips are established by using spatial phase adjustment to modulate light beams;

[0045] By time-domain intensity modulation on the optical path channels, high-speed optical communication and optical diffraction network computing are performed between the plurality of optical computing chips.

[0046] It should be noted that the computing chips constantly communicate with each other and perform local computing to execute large-scale tasks, and the traditional computing architecture faces a significant bottleneck of lower and lower energy efficiency as the scale increases due to data transmission between storage and computing resources and the limitation of computing density. To solve this challenge, the present disclosure establishes optical path channels between chips by using spatial phase adjustment to modulate light beams, and after establishing the optical path channels, high-speed optical communication is performed between clusters by time-domain intensity modulation, and the optical path channels can simultaneously support optical diffraction network computing. This three-dimensional spatial chip stacking method can support the interconnection computing of optical computing chips in the spatial dimension without relying on electricity for information transmission.

[0047] Secondly, the optical computing chips are stacked in space to achieve high-density computing flux. The computing of the cluster is modeled as a diffraction computing network, and communication and computing can be achieved through spatial light transmission computing principle, i.e., information propagation of light. The architecture itself can complete the integrity of the information link and the computing link, and therefore has the condition of a server cluster.

[0048] For example, in a scenario, Figure 2 An application schematic diagram of the intelligent optical computing chip cluster architecture provided by the embodiment of the present disclosure is shown in FIG. 1. Figure 2 As shown in FIG. 1, the intelligent optical computing chip cluster architecture provided by the embodiment of the present disclosure has a single-chip super-high computing energy efficiency of 11.8 Peta OPS / W and a linearly maintained multi-chip cluster energy efficiency of ten thousand cards, which can break through the existing supercomputer server energy efficiency bottleneck, reduce the deployment cost of the computing cluster, has a high application value for scientific computing, and is expected to bring new opportunities for high-performance artificial intelligence large model computing and large-scale scientific computing in the post-Moore era.

[0049] Optionally, the optical computing chip comprises an on-chip grating transmitting module and an on-chip grating receiving module, and the optical path channels between the plurality of optical computing chips are established by using spatial phase adjustment to modulate light beams through the on-chip grating transmitting module and the on-chip grating receiving module.

[0050] According to some embodiments, in the on-chip grating transmitting module, the on-chip light is modulated and then coupled out from the waveguide to become spatial light through the grating, and the spatial light is modulated by using spatial phase adjustment to establish the optical path channels.

[0051] It should be noted that the multiple optical computing chips are connected through the on-chip grating emission and reception mode, and all the calculations are completed in the spatial physical propagation of light. Since no additional electricity is introduced for communication and calculation, the energy consumption increases linearly with the calculation scale, breaking the inherent bottleneck that the larger the calculation scale, the lower the energy efficiency.

[0052] Optionally, when the multiple optical computing chips perform optical diffraction network calculation, the method is specifically used for:

[0053] Obtaining a to-be-calculated task;

[0054] Optimizing the initial emission phase of each optical computing chip in the multiple optical computing chips according to the to-be-calculated task, until a target emission phase meeting an optimization requirement is obtained;

[0055] Based on the target emission phase, the multiple optical computing chips form an optical diffraction network corresponding to the to-be-calculated task, and perform the to-be-calculated task based on the optical diffraction network to obtain a calculation result.

[0056] According to some embodiments, diffraction patterns of different distances can be corrected by adding a specific Fresnel phase, so that the diffraction receiving patterns of short and long distances only change in scale and do not change in relative pattern. The following proves that the diffraction phase wave front meeting the Fresnel diffraction condition is In the case of a propagation distance of , the diffraction pattern can be written as:

[0057]

[0058] wherein, represents the pattern after diffraction. represents the spatial position. represents the diffraction coefficient. k represents the wave vector.

[0059] Similarly, a same diffraction phase wave front is In the case of a propagation distance of , only the Fresnel phase modulation needs to be introduced to achieve correction, which can be mathematically described as:

[0060]

[0061] Then, the two formulas are expanded respectively to obtain:

[0062]

[0063]

[0064]

[0065]

[0066] where the Fresnel phase The modulation satisfies That is, in the case of different distance propagation, the same computing power can be achieved, that is:

[0067]

[0068] Therefore, when optimizing the initial emission phase of each optical computing chip in the plurality of optical computing chips according to the to-be-computed task, the initial emission phase of each optical computing chip in the plurality of optical computing chips can be modulated according to the Fresnel phase. Thus, the cluster chip is enlarged in the integrated space, and the number of optical chip clusters can be further increased, while the computing capability is not weakened. The physical properties of the intelligent optical computing chip cluster prove the possibility of more than ten thousand optical computing chip clusters.

[0069] According to some embodiments, when optimizing the initial emission phase of each optical computing chip in the plurality of optical computing chips according to the to-be-computed task, the initial emission phase of each optical computing chip in the plurality of optical computing chips can also be modeled as a trainable parameter; and a neural network is used to train the trainable parameter with the maximum signal-to-noise ratio as the optimization target.

[0070] In some embodiments, the initial emission phase of each optical computing chip in the plurality of optical computing chips can be modeled as a trainable parameter according to the following formula :

[0071]

[0072] In some embodiments, when training the trainable parameter with the maximum signal-to-noise ratio as the optimization target, a loss function can be established as the energy of the target point, as shown in the following formula:

[0073]

[0074] wherein, is the distance of propagation, is the transverse position of the receiving plane.

[0075] According to some embodiments, the initial emission phases of all optical computing chips in the plurality of optical computing chips can constitute an optical phased array, and the on-chip grating emission modules of the optical computing chips can complete elevation angle traversal through wavelength scanning, and the yaw angle can be achieved by modulating the optical phased array. The present disclosure can improve the energy intensity of each optical computing chip by optimizing the energy of the phased array with a neural network to achieve the maximum signal-to-noise ratio.

[0076] In some embodiments, Figure 3 A display schematic diagram of a field of view range of a light computing cluster interconnection computing addressing space provided by an embodiment of the present disclosure. Figure 3 The left graph in FIG. 1 represents the received energy distribution of the optical computing chip without optimization by the neural network, Figure 3 The right graph in FIG. 1 represents the received energy distribution of the optical computing chip after training and optimization. It can be seen that the energy intensity is improved by more than 3-5 dB after optimization by the neural network. Finally, the elevation and yaw angle range can be 30 degrees, which relative to the physical size of the chip itself makes it possible to cluster more than 50 chips in a two-chip array plane at a distance of 1 m, demonstrating the possibility of high-density and large-scale clustering of optical computing chips in space.

[0077] Taking a scenario as an example, Figure 4 A display schematic diagram of an effective range of a light computing cluster interconnection computing addressing distance provided by an embodiment of the present disclosure. As Figure 4 shown, by optimizing the initial emission phase of the optical computing chip through the architecture, the transmission and computation distance between the optical computing chips can be adapted to a range of 0.1 m to 1000 m or even larger.

[0078] In summary, the architecture provided by the present embodiment can achieve ultra-large-scale computing tasks with extremely high energy efficiency, which is crucial for processing complex AI models and large-scale data sets. This efficient computing capability can accelerate research in fields such as new material discovery, genome analysis, and climate modeling, promoting scientific progress. At the same time, the flexibility of the optical computing architecture makes it possible to seamlessly integrate with existing computing systems, promoting interdisciplinary cooperation and driving the application and innovation of artificial intelligence technology in various fields. Ultimately, this will enable researchers to gain insights more quickly, driving further technological development.

[0079] To achieve the above-mentioned embodiments, the present disclosure further provides an intelligent optical computing chip cluster system, comprising:

[0080] A plurality of optical computing chips, and the plurality of optical computing chips establish optical path channels by modulating light beams using spatial phase adjustment;

[0081] The light path channel is modulated in time domain, high-speed optical communication is performed between the plurality of optical computing chips, and optical diffraction network computing is performed.

[0082] Optionally, the optical computing chip comprises an on-chip grating transmitting module and an on-chip grating receiving module, and the optical path channel is established by using the spatial phase adjustment to modulate the light beam between the plurality of optical computing chips through the on-chip grating transmitting module and the on-chip grating receiving module.

[0083] Optionally, when the optical diffraction network computing is performed between the plurality of optical computing chips, the method is specifically used for:

[0084] Obtaining a to-be-computed task;

[0085] Optimizing the initial transmitting phase of each optical computing chip in the plurality of optical computing chips according to the to-be-computed task until a target transmitting phase meeting an optimization requirement is obtained;

[0086] Based on the target transmitting phase, the plurality of optical computing chips form an optical diffraction network corresponding to the to-be-computed task, and the to-be-computed task is executed based on the optical diffraction network to obtain a computing result.

[0087] Optionally, the optimization of the initial transmitting phase of each optical computing chip in the plurality of optical computing chips according to the to-be-computed task comprises:

[0088] Fresnel phase modulation is performed on the initial transmitting phase of each optical computing chip in the plurality of optical computing chips according to the to-be-computed task.

[0089] Optionally, the optimization of the initial transmitting phase of each optical computing chip in the plurality of optical computing chips according to the to-be-computed task comprises:

[0090] Modeling the initial transmitting phase of each optical computing chip in the plurality of optical computing chips as a trainable parameter;

[0091] The trainable parameter is trained by using a neural network to achieve an optimization target of maximum signal-to-noise ratio.

[0092] It should be noted that the foregoing explanation and description of the intelligent optical computing chip cluster architecture also apply to the intelligent optical computing chip cluster system of this embodiment, which will not be described here.

[0093] The collection, storage, use, processing, transmission, provision and disclosure of user personal information involved in the present disclosure comply with relevant laws and regulations and do not violate public order and good customs.

[0094] It is important to note that user's personal information should be collected for legitimate and reasonable uses of the data subject and not shared or sold outside of those legitimate uses. Further, such collection / sharing should occur after the users are notified of the purpose of the data collection and can provide consent, including but not limited to consenting in the user agreement / user notification and signing an agreement / authorization that includes authorization of relevant user information. Additionally, any necessary steps should be taken to secure and safeguard access to such personal information data and ensure that other individuals with access to the personal information data adhere to their privacy policies and procedures.

[0095] The present disclosure contemplates that user selectively opting in to the use or disclosure of personal information data can be provided. That is, the present disclosure contemplates providing hardware and / or software to prevent or detect and restrict access to such personal information data. Minimizing the risk of such data being lost, accessed improperly, or accessed without user consent can be performed by limiting collection of such data, storing such data securely, and deleting such data when it is no longer needed. Further, such personal information data can be de-identified, when appropriate, to protect the privacy of users.

[0096] The acquisition, transmission, storage, use, processing, etc. of data in the technical solutions of the present disclosure comply with the relevant provisions of national laws and regulations.

[0097] It should be noted that in the embodiments of the present disclosure, some industry existing solutions, components, models, etc. can be mentioned, which should be considered as exemplary, and the purpose is only to illustrate the feasibility in the implementation of the technical solutions of the present disclosure, but it does not mean that the applicant has or will necessarily use the solutions.

[0098] In the foregoing embodiment description, the description of the terms "one embodiment", "some embodiments", "an example", "a specific example", or "some examples" means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present disclosure. In the present specification, the illustrative description of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any appropriate manner in any one or more embodiments or examples. In addition, the person skilled in the art can combine and combine the different embodiments or examples described in the specification and the features of the different embodiments or examples without contradiction.

[0099] In addition, the terms "first", "second" are only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined with "first", "second" can explicitly or implicitly include at least one of the features. In the description of the present disclosure, the meaning of "a plurality of" is at least two, for example, two, three, etc., unless otherwise explicitly specified.

[0100] Any processes or methods described in the flowcharts or otherwise described herein can be understood as representing a module, segment, or portion of code that includes one or more executable instructions for implementing the specified logical function or process, and the various embodiments of the present disclosure can include additional implementations in which the order of steps is different, in which additional steps are included, in which other steps are removed, in which additional steps are added, in which steps are performed concurrently, in which steps are performed in reverse order, in which sub-steps of steps are performed, in which multiple sub-steps of a step are performed, in which multiple steps are performed concurrently, and in which other steps are performed, as will be understood by those skilled in the art.

[0101] The logic and / or steps represented in the flowcharts or otherwise described herein, for example, can be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor- containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions, or a combination thereof. For purposes of this specification, a "computer-readable medium" can be any apparatus that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device. The computer-readable medium can be a computer- readable storage medium or a computer-readable communication medium. The computer- readable storage medium can be, for example, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or a propagation medium. The computer-readable communication medium can be, for example, but is not limited to, a carrier wave or a computer readable medium including any component that can carry, communicate, propagate, or transport programming for use by or in connection with an instruction execution system, apparatus, or device. The computer-readable medium can also be, for example, but is not limited to, a computer memory, such as a random access memory (RAM), a floppy disk, a compact disk (CD), an optical disk, an electrical carrier wave, a magnetic tape, or any other medium that can be used to carry or store desired program code in a manner that causes one or more processors to perform processes described herein. The computer-readable medium can be a distributed network, such as the Internet or World Wide Web, and comprises computer-readable media of computer systems that are coupled via network.

[0102] It should be understood that aspects of the present disclosure can be implemented in hardware, software, firmware, or combinations thereof. In the above embodiments, various steps or methods can be implemented in software or firmware that is stored in memory and executed by a suitable instruction execution system. As such, in hardware implementations, any of the following technologies, or combinations thereof, can be used: a discrete logic circuit having logic gates for implementing logic functions upon an application of data signals, an application specific integrated circuit having appropriate combinational logic gates, a programmable gate array (PGA), a field programmable gate array (FPGA), and / or the like.

[0103] Those skilled in the art of the present technology can understand that all or part of the steps carried out by the above-mentioned embodiment method can be completed by programs instructing related hardware, and the programs can be stored in a computer readable storage medium. When the program is executed, it includes one of the steps of the method embodiment or a combination thereof.

[0104] In addition, each functional unit in each embodiment of the present disclosure can be integrated into one processing module, or each unit can exist physically alone, or two or more units can be integrated into one module. The integrated module can be realized in the form of hardware or in the form of a software functional module. The integrated module, if realized in the form of a software functional module and sold or used as an independent product, can also be stored in a computer readable storage medium.

[0105] The storage medium mentioned above can be a read-only memory, a magnetic disk or an optical disk, etc. Although the embodiments of the present disclosure have been shown and described above, it should be understood that the above-mentioned embodiments are exemplary and cannot be understood as limiting the present disclosure, and those skilled in the art can make changes, modifications, replacements and variations to the above-mentioned embodiments within the scope of the present disclosure.

Claims

1. A smart optical computing chip cluster architecture, characterized in that, include: Multiple optical computing chips, wherein optical path channels are established between the multiple optical computing chips by using spatial phase adjustment to modulate the beam; By performing time-domain intensity modulation on the optical path channel, the multiple optical computing chips perform high-speed optical communication and optical diffraction network calculations. When the multiple optical computing chips perform optical diffraction network calculations, they acquire the task to be calculated. The initial emission phase of each of the plurality of optical computing chips is optimized according to the task to be computed until a target emission phase that meets the optimization requirements is obtained. The initial emission phase of each of the plurality of optical computing chips is modeled as a trainable parameter to achieve the maximum signal-to-noise ratio as the optimization objective. The trainable parameter is trained using a neural network. Based on the target emission phase, the plurality of optical computing chips constitute an optical diffraction network corresponding to the task to be computed, and execute the task to be computed based on the optical diffraction network to obtain the computation result.

2. The architecture according to claim 1, characterized in that, The optical computing chip includes an on-chip grating emitting module and an on-chip grating receiving module. The multiple optical computing chips establish an optical path channel by using the on-chip grating emitting module and the on-chip grating receiving module to modulate the light beam using spatial phase adjustment.

3. The architecture according to claim 1, characterized in that, The optimization of the initial emission phase of each of the plurality of optical computing chips according to the task to be computed includes: According to the task to be computed, Fresnel phase modulation is performed on the initial emission phase of each of the plurality of optical computing chips.

4. An intelligent optical computing chip cluster system, characterized in that, include: Multiple optical computing chips, wherein optical path channels are established between the multiple optical computing chips by using spatial phase adjustment to modulate the beam; By performing time-domain intensity modulation on the optical path channel, the multiple optical computing chips perform high-speed optical communication and optical diffraction network calculations. When the multiple optical computing chips perform optical diffraction network calculations, they acquire the task to be calculated. The initial emission phase of each of the plurality of optical computing chips is optimized according to the task to be computed until a target emission phase that meets the optimization requirements is obtained. The initial emission phase of each of the plurality of optical computing chips is modeled as a trainable parameter to achieve the maximum signal-to-noise ratio as the optimization objective. The trainable parameter is trained using a neural network. Based on the target emission phase, the plurality of optical computing chips constitute an optical diffraction network corresponding to the task to be computed, and execute the task to be computed based on the optical diffraction network to obtain the computation result.

5. The system according to claim 4, characterized in that, The optical computing chip includes an on-chip grating emitting module and an on-chip grating receiving module. The multiple optical computing chips establish an optical path channel by using the on-chip grating emitting module and the on-chip grating receiving module to modulate the light beam using spatial phase adjustment.

6. The system according to claim 4, characterized in that, The optimization of the initial emission phase of each of the plurality of optical computing chips according to the task to be computed includes: According to the task to be computed, Fresnel phase modulation is performed on the initial emission phase of each of the plurality of optical computing chips.

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