Matching-based semiconductor sample defect inspection

Abstract

A system and method for defect detection of semiconductor samples based on template matching or machine learning (ML) is provided. Template matching is performed between the set of template patches and the set of runtime images by selectively performing at least two of matching a defect template patch in the inspection image, matching a reference template patch in the reference image, or matching a difference template patch in the difference image, in order to provide a likelihood of checking the presence of a target of interest (TOI) in an image. The ML-based method includes feeding a test patch and a reference patch together to a trained ML model to generate a feature vector representing a given TOI candidate, and evaluating the feature vector of the given TOI candidate to provide a likelihood that the given TOI candidate is TOI or non-TOI.

Description

Technical Field

[0001] The presently disclosed subject matter generally relates to the field of inspecting semiconductor samples, and more particularly to defect detection and classification of samples. Background Art

[0002] Current demands for high density and performance associated with the very large scale integration of manufactured devices require sub-micron features, increased transistor and circuit speeds, and improved reliability. As semiconductor processes advance, pattern dimensions such as line widths and other types of critical dimensions continue to shrink. These demands require the formation of device features with high precision and uniformity, which in turn requires careful monitoring of the manufacturing process, including automated inspection of devices while they are still in the form of semiconductor wafers.

[0003] Runtime inspection can typically employ a two-stage process, e.g., inspecting a sample and then reviewing sampling locations of potential defects. Inspection generally involves generating certain outputs (e.g., images, signals, etc.) of the sample by directing light or electrons onto the wafer and detecting the light or electrons from the wafer. During the first stage, the surface of the sample is inspected at high speed and relatively low resolution. Defect detection is typically performed by applying a defect detection algorithm to the inspection output. A defect map is generated to show the locations on the sample that are suspected to be defects with a high probability. During the second stage, at least some of the suspected locations are analyzed more thoroughly at a relatively high resolution to determine different parameters of the defects, such as category, thickness, roughness, size, etc.

[0004] Non-destructive inspection tools can be used to provide inspection during or after the manufacture of the sample to be inspected. As non-limiting examples, various non-destructive inspection tools include scanning electron microscopes, atomic force microscopes, optical inspection tools, etc.

[0005] The inspection process can include multiple inspection steps. The manufacturing process of semiconductor devices can include various processes, such as etching, deposition, planarization, growth (such as epitaxial growth), implantation, etc. The inspection steps can be performed multiple times, e.g., after certain process steps and / or after manufacturing certain layers, etc. Additionally or alternatively, each inspection step can be repeated multiple times, e.g., for different wafer locations or for the same wafer location with different inspection settings.

[0006] Inspection processing is used at various steps during semiconductor manufacturing to detect and classify defects on the sample and to perform metrology-related operations. The effectiveness of inspection can be improved through the automation of processes such as, for example, defect detection, automatic defect classification (ADC), automatic defect review (ADR), image segmentation, automated metrology-related operations, etc.

[0007] An automated inspection system ensures that the manufactured parts meet the expected quality standards and provides useful information on possible adjustments to the manufacturing tools, equipment, and / or ingredients based on the identified types of defects.

[0008] In some cases, machine learning techniques can be used to assist the automated inspection process to promote a higher yield. For example, supervised machine learning can be used to implement accurate and efficient solutions based on fully annotated training images to automate specific inspection applications. SUMMARY OF THE INVENTION

[0009] According to certain aspects of the presently disclosed subject matter, a system for defect detection of a semiconductor sample is provided, the system including a processor circuitry configured to: obtain a set of template patches including: a target template patch that captures a target of interest (TOI), a reference template patch corresponding to the target template patch, and a difference template patch representing a difference between the target template patch and the reference template patch; acquire a set of runtime images of the semiconductor sample to be inspected at runtime, the set of runtime images including an inspection image, a reference image corresponding to the inspection image, and a difference image representing a difference between the inspection image and the reference image; perform template matching between the set of template patches and the set of runtime images, including selectively performing at least two of the following: matching a defect template patch in the inspection image, matching a reference template patch in the reference image, or matching a difference template patch in the difference image; and provide a likelihood of the presence of the TOI in the inspection image based on a result of the template matching.

[0010] In addition to the above features, the system according to this aspect of the presently disclosed subject matter can include one or more of the features (i) through (xiii) listed below in any desired combination or arrangement that is technically possible:

[0011] (i). The TOI can be a defect of interest (DOI) or a noise of interest (NOI).

[0012] (ii). Template matching can be performed based on a similarity metric between a corresponding template patch and a runtime image, resulting in at least two match score maps, and wherein the likelihood is provided by combining the at least two match score maps into a composite score map and identifying one or more relatively high scores in the composite score map corresponding to one or more locations in the inspection image representing the presence of the TOI.

[0013] (iii). Template matching can be performed by matching a defect template patch in the inspection image and a reference template patch in the reference image.

[0014] (iv). Template matching can be performed by matching a defect template patch in an inspection image and a difference template patch in a difference image.

[0015] (v). Template matching can be performed by matching a reference template patch in a reference image and a difference template patch in a difference image.

[0016] (vi). Template matching can be performed by matching a defect template patch in an inspection image, a reference template patch in a reference image, and a difference template patch in a difference image.

[0017] (vii). The inspection image can include one or more TOI candidates generated by an inspection process of a semiconductor sample and provide the likelihood regarding verifying the presence of a TOI among the one or more TOI candidates.

[0018] (viii). The processing circuitry can be configured to obtain a first set of template patches in which a target template patch captures a DOI and a second set of template patches in which a target template patch captures an NOI, perform template matching between the first set of template patches and a runtime image set to provide the likelihood of the presence of a DOI among one or more TOI candidates, and perform template matching between the second set of template patches and the runtime image set to provide the likelihood of the presence of an NOI among one or more TOI candidates.

[0019] (ix). The processing circuitry can further be configured to augment the set of template patches based on an image transformation, thereby generating at least one augmented set of template patches, and include the at least one augmented set in the set of template patches.

[0020] (x). The set of template patches captures context information surrounding a TOI.

[0021] (xi). The set of template patches can be prepared during a setup phase based on previously captured images or synthetic images, or during runtime based on runtime images associated with the presence of a TOI.

[0022] (xii). The set of template patches can be obtained based on images captured in a sensitive scan having a relatively high signal-to-noise ratio (SNR), while the runtime image set can be acquired in a throughput scan having a relatively low SNR.

[0023] (xiii). The processing circuitry can further be configured to include the likelihood of the presence of a TOI for a given TOI in an inspection image as an attribute in a set of attributes characterizing the given TOI, and use the set of attributes for one or more defect inspection applications.

[0024] According to other aspects of the presently disclosed subject matter, there is provided a computerized method for defect detection of a semiconductor sample, the method comprising: obtaining a set of template patches, the set of template patches including: a target template patch capturing a target of interest (TOI), a reference template patch corresponding to the target template patch, and a difference template patch representing a difference between the target template patch and the reference template patch; acquiring, at runtime, a set of runtime images of the semiconductor sample to be inspected, the set of runtime images including an inspection image, a reference image corresponding to the inspection image, and a difference image representing a difference between the inspection image and the reference image; performing template matching between the set of template patches and the set of runtime images, including selectively performing at least two of the following: matching a defect template patch in the inspection image, matching a reference template patch in the reference image, or matching a difference template patch in the difference image; and providing a likelihood of the presence of the TOI in the inspection image based on the result of the template matching.

[0025] These aspects of the presently disclosed subject matter may be modified as necessary to include, in any desired combination or permutation technically possible, one or more of the features (i) to (xii) listed above with respect to the system.

[0026] According to other aspects of the presently disclosed subject matter, there is provided a computerized system for defect detection of a semiconductor sample, the system comprising a processing circuitry configured to acquire, at runtime, a set of runtime images of a sample to be inspected, the set of runtime images including an inspection image including one or more TOI candidates and a reference image corresponding to the inspection image; for each given TOI candidate, extracting an image patch including the TOI candidate and a surrounding area from the inspection image, and extracting a reference patch at a corresponding location from the reference image; feeding the inspection patch and the reference patch together to a trained machine learning (ML) model to generate a feature vector representing the given TOI candidate, wherein the ML model was previously trained to map a target of interest (TOI) and a non-TOI to corresponding feature vectors in an attribute space such that the feature vectors of the TOIs are relatively close to each other with respect to the feature vectors of the non-TOIs; and evaluating the feature vector of the given TOI candidate to provide a likelihood that the given TOI candidate is a TOI or a non-TOI.

[0027] In addition to the above features, these aspects of the presently disclosed subject matter may also include, in any desired combination or permutation technically possible, one or more of the features (xiv) to (xxi) listed below:

[0028] (xiv). The TOI may be a defect of interest (DOI) or a nuisance of interest (NOI).

[0029] (xv). The trained ML model can generate a feature vector by processing both the test patch and the reference patch, such that the feature vector is more representative of the given TOI candidate itself and less affected by irrelevant features.

[0030] (xvi). The runtime image set can further include a difference image representing the difference between the test image and the reference image. The processing circuitry is further configured to, for each given TOI candidate, in addition to extracting the test patch and the reference patch, extract a difference patch at the corresponding location from the difference image, and feed the test patch, the reference patch, and the difference patch together to the trained ML model to generate a feature vector representing the given TOI candidate.

[0031] (xvii). The ML model can be pre-trained using a training set that includes a first subset of training samples and a second subset of training samples. Each training sample in the first subset includes a TOI template patch and a corresponding reference template patch of the TOI template patch. Each training sample in the second subset includes a non-TOI template patch and a corresponding reference template patch of the non-TOI template patch.

[0032] (xviii). The ML model can be trained using a loss function that is configured to maximize the similarity between the feature vectors derived from the first subset while minimizing the similarity between the feature vectors derived from the first subset and the feature vectors derived from the second subset.

[0033] (xix). The processing circuitry can be configured to evaluate the feature vector of a given TOI candidate by comparing the feature vector of the given TOI candidate with a set of feature vectors representing TOIs and a set of feature vectors representing non-TOIs, and provide the likelihood that the given TOI candidate is a TOI or a non-TOI based on the similarity between the feature vector of the given TOI candidate and the set of feature vectors representing TOIs and the set of feature vectors representing non-TOIs. The set of feature vectors representing TOIs and the set of feature vectors representing non-TOIs are pre-generated using the trained ML model and stored in a database.

[0034] (xx). The processing circuitry can be configured to evaluate the feature vector of a given candidate using a classification model operably connected to the ML model. The classification model is configured to classify the given TOI candidate based on the feature vector of the given TOI candidate to provide a probability score indicating the likelihood that the given TOI candidate is a TOI or a non-TOI.

[0035] (xxi). The classification model can be trained together with the ML model using a second loss function that is configured to minimize the difference between the predicted class of the ML model and the ground truth class of the given TOI candidate.

[0036] According to other aspects of the presently disclosed subject matter, there is provided a computerized method for defect detection of a semiconductor sample, the method comprising: acquiring, at runtime, a set of runtime images of a sample to be inspected, the set of runtime images including inspection images each including one or more TOI candidates and reference images corresponding to the inspection images; for each given TOI candidate, extracting from the inspection image an image patch including the TOI candidate and a surrounding region, and extracting from the reference image a reference patch at a corresponding location; feeding the inspection patch and the reference patch together to a trained machine learning (ML) model to generate a feature vector representing the given TOI candidate, wherein the ML model is pre-trained to map a target of interest (TOI) and a non-TOI to corresponding feature vectors in an attribute space such that the feature vectors of the TOIs are relatively close to each other as compared to the feature vectors of the non-TOIs; and evaluating the feature vector of the given TOI candidate to provide a likelihood that the given TOI candidate is a TOI or a non-TOI.

[0037] These aspects of the subject matter of the present disclosure may be modified as necessary and may include any desired combination or arrangement, technically possible, of one or more of features (xiv) to (xxi) listed above with respect to the system.

[0038] According to other aspects of the presently disclosed subject matter, there is provided a non-transitory computer-readable storage medium including instructions that, when executed by a computer, cause the computer to perform the method steps of any of the above methods. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to understand the present disclosure and to see how it may be carried out in practice, embodiments will now be described, by way of non-limiting example only, with reference to the accompanying drawings, in which:

[0040] Figure 1 A generalized block diagram of an inspection system according to certain embodiments of the presently disclosed subject matter is shown.

[0041] Figure 2 A generalized flowchart of defect detection of a semiconductor sample according to certain embodiments of the presently disclosed subject matter is shown.

[0042] Figure 3 A generalized flowchart of detecting DOI and NOI among one or more candidates on a semiconductor sample according to certain embodiments of the presently disclosed subject matter is shown.

[0043] Figure 4 A generalized flowchart of runtime defect detection of a semiconductor sample based on machine learning according to certain embodiments of the presently disclosed subject matter is shown.

[0044] Figure 5 Shows a generalized flowchart of training an ML model that can be used to generate feature vectors according to certain embodiments of the presently disclosed subject matter.

[0045] Figure 6 Shows a schematic diagram of an example of template matching-based defect detection according to certain embodiments of the presently disclosed subject matter.

[0046] Figure 7 Shows a schematic diagram of the training process of an ML model according to certain embodiments of the presently disclosed subject matter. DETAILED DESCRIPTION

[0047] Semiconductor manufacturing processes typically require multiple sequential processing steps and / or layers, some of which may result in errors, which may lead to yield loss. Examples of various processing steps may include lithography, etching, deposition, planarization, growth (e.g., epitaxial growth), and implantation, etc. Various inspection operations such as defect-related inspections (e.g., defect detection, defect review, and defect classification, etc.) and / or metrology-related inspections (e.g., critical dimension (CD) measurement, etc.) may be performed at different processing steps / layers during the manufacturing process to monitor and control the process. The inspection operations may be performed multiple times, e.g., after certain processing steps and / or after manufacturing certain layers, etc.

[0048] As described above, defect inspection typically may employ a two-stage process, e.g., inspecting a sample and then reviewing the sampled locations of potential defects. During the first stage, the surface of the sample is inspected at high speed and relatively low resolution. Defect detection is typically performed by applying a defect detection algorithm to the inspection image. Various detection algorithms can be used to detect defects on the sample, such as die-to-die (D2D), die-to-history (D2H), die-to-database (D2DB), cell-to-cell (C2C), etc.

[0049] As an example, in some cases, a classical die-to-reference detection algorithm such as die-to-die (D2D) is typically used. In D2D, an inspection image of the target die is captured. To detect defects in the inspection image, one or more reference images are captured from one or more reference dies (e.g., one or more adjacent dies) of the target die. The inspection image and the reference images are aligned and compared with each other. One or more difference images (and / or their derivatives, such as a grading image) can be generated based on the differences between the pixel values of the inspection image and the pixel values derived from one or more reference images. Then a detection threshold is applied to the difference map, and a defect map indicating defect candidates in the target die is created.

[0050] In some cases, a known target defect (i.e., defect of interest (DOI)) can be provided, for example, by a customer or a user, and it is desired to find a similar defect to the target defect among defect candidates on an inspection image or on a defect map generated by defect detection. In some cases, handcrafted attributes and / or machine learning-based features of the target defect can be calculated and used for the purpose of searching for similar defects. However, it is generally difficult and time-consuming to derive relevant attributes / features that adequately represent the target defect. In addition, different variations on the inspection image, such as process variations, color variations, etc., can be caused by physical effects of the manufacturing process and / or the inspection process of the sample, which can further affect the quality of the calculated attributes. As a result, the classification result based on the extracted attributes usually includes a large number of false alarms, which include, in addition to the desired type of the target defect, interferences and other types of defects, which affects the defect detection sensitivity and thus reduces the detection performance.

[0051] With the continuous progress of semiconductor manufacturing processes, semiconductor devices with increasingly complex structures with reduced feature dimensions have been developed, which makes it even more challenging for the above-mentioned conventional detection methods to provide satisfactory inspection performance.

[0052] Accordingly, certain embodiments of the presently disclosed subject matter propose to use a matching-based defect inspection system that does not have one or more of the drawbacks described above. The present disclosure proposes to detect a target of interest (TOI), particularly a defect of interest (DOI), on a semiconductor sample based on template matching or machine learning. The proposed runtime detection system can be configured to perform selective template matching between a pre-prepared set of template patches and a set of runtime images, or use a pre-trained ML model to at least process inspection patches and reference patches of a given TOI candidate. Thus, the detection system can provide the likelihood of the presence of the TOI based on the matching result or the feature vector generated by the ML model. The proposed system is capable of suppressing false alarms and improving defect detection sensitivity, as will be described in detail below.

[0053] With this in mind, attention turns to Figure 1 , Figure 1 FIG. shows a functional block diagram of an inspection system according to certain embodiments of the presently disclosed subject matter.

[0054] Figure 1The inspection system 100 shown can be used for inspecting semiconductor samples (e.g., wafers, dies, or portions thereof) as part of a sample manufacturing process. As described above, the inspection referred to herein can be interpreted to cover any kind of operation related to defect inspection / detection, defect review, defect classification, interference filtering, segmentation, and / or metrology operations, etc. on the sample. The system 100 includes one or more inspection tools 120, and the one or more inspection tools 120 are configured to scan the sample and capture an image of the sample for further processing for various inspection applications.

[0055] The term "(s) inspection tool" used herein should be interpreted broadly to cover any tool that can be used for an inspection-related process, as non-limiting examples, including scanning (in a single or multiple scans), imaging, sampling, reviewing, measuring, classifying, and / or other processes provided for the sample or a portion thereof. Without limiting the scope of the present disclosure in any way, it should also be noted that the inspection tool 120 can be implemented as various types of inspection machines, such as optical inspection machines, electron beam inspection machines (e.g., scanning electron microscope (SEM), atomic force microscope (AFM), or transmission electron microscope (TEM), etc.), and so on.

[0056] One or more inspection tools 120 may include one or more inspection tools and / or one or more review tools. In some cases, at least one of the inspection tools 120 in the inspection tool 120 can be an inspection tool configured to scan the sample (e.g., the entire wafer, the entire die, or a portion thereof) to capture an inspection image (usually at a relatively high speed and / or low resolution) for detecting potential defects (i.e., defect candidates). During inspection, the wafer can be moved relative to the detector of the inspection tool at a certain step during exposure (or the wafer and the tool can move relative to each other in opposite directions), and the wafer can be scanned step by step along a strip of the wafer by the inspection tool, where the inspection tool images the components / portions (within the strip) of the sample one by one. As an example, the inspection tool can be an optical inspection tool. In each step, light can be detected from a rectangular portion of the wafer, and this detected light is converted into multiple intensity values at multiple points in the portion, thereby forming an image corresponding to the components / portions of the wafer. For example, in optical inspection, an array of parallel laser beams can scan the wafer surface along the strip. The strips are placed in adjacent parallel rows / columns to build an image of the wafer surface strip by strip. For example, the tool can scan the wafer from top to bottom along the strip, then switch to the next strip and scan the wafer from bottom to top, and so on, until the entire wafer is scanned and the inspection image of the wafer is collected.

[0057] In some cases, at least one inspection tool 120 in inspection tool 120 can be an inspection tool configured to capture inspection images of at least some of the defect candidates detected by the inspection tool for determining whether the defect candidates are indeed defects of interest (DOI). Such inspection tools are typically configured to inspect segments of a sample one at a time (usually at a relatively low speed and / or high resolution). As an example, the inspection tool can be an electron beam tool such as, for example, a scanning electron microscope (SEM). An SEM is an electron microscope that produces an image of a sample by scanning the sample with a focused electron beam. The electrons interact with the atoms in the sample, generating various signals containing information about the surface topography and / or composition of the sample. The SEM is capable of precisely inspecting and measuring features during semiconductor wafer manufacturing.

[0058] The inspection tool and the inspection tool can be different tools located at the same or different locations, or a single tool operating in two different modes. In some cases, the same inspection tool can provide low-resolution image data and high-resolution image data. The resulting image data (low-resolution image data and / or high-resolution image data) can be transmitted - directly or via one or more intermediate systems - to system 101. The present disclosure is not limited to any specific type of inspection tool and / or the resolution of the image data generated by the inspection tool. In some cases, at least one inspection tool 120 in inspection tool 120 has metrology capabilities and can be configured to capture images and perform metrology operations on the captured images. Such inspection tools are also referred to as metrology tools.

[0059] According to certain embodiments of the presently disclosed subject matter, inspection system 100 includes a computer-based system 101 operably connected to inspection tool 120 and capable of performing automatic TOI detection (e.g., defect detection) on a semiconductor sample at runtime based on runtime images obtained during sample manufacturing. System 101 is also referred to as a TOI detection or defect detection system.

[0060] System 101 includes processing circuitry 102 operably connected to a hardware-based I / O interface 126 and configured to provide the processing necessary for the operating system, as described in further detail with reference to Figures 2 to 5 As further detailed. Processing circuitry 102 can include one or more processors (not shown separately) and one or more memories (not shown separately). One or more processors of processing circuitry 102 can be configured to perform a number of functional modules individually or in any suitable combination according to computer-readable instructions implemented on a non-transitory computer-readable memory included in the processing circuitry. Such functional modules are hereinafter referred to as being included in the processing circuitry.

[0061] One or more processors as referred to herein may represent one or more general-purpose processing devices, such as a microprocessor, a central processing unit, etc. More specifically, a given processor may be one of the following: a complex instruction set computing (CISC) microprocessor, a reduced instruction set computing (RISC) microprocessor, a very long instruction word (VLIW) microprocessor, a processor implementing other instruction sets, or a processor implementing a combination of instruction sets. One or more processors may also be one or more dedicated processing devices, such as an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), a digital signal processor (DSP), a network processor, etc. One or more processors are configured to execute instructions for performing the operations and steps discussed herein.

[0062] The memory as referred to herein may include one or more of the following: internal memory (such as processor registers and caches, etc.), main memory (such as read-only memory (ROM)), flash memory, dynamic random access memory (DRAM) (such as synchronous DRAM (SDRAM) or Rambus DRAM (RDRAM), etc.).

[0063] According to certain embodiments of the presently disclosed subject matter, the system 101 may be a runtime detection system configured to perform TOI detection operations based on template matching. In such cases, one or more functional modules included in the processing circuitry 102 of the system 101 may include an image processing module 104 and a defect inspection module 108 operatively connected to the image processing module 104.

[0064] Specifically, the processing circuitry 102, particularly the image processing module 104, may be configured to obtain, at setup or runtime via the I / O interface 126, a template patch set that includes a target template patch capturing a target of interest (TOI), a reference template patch corresponding to the target template patch, and a difference template patch representing the difference between the target template patch and the reference template patch. The image processing module 104 may further collect, at runtime from the inspection tool 120, a runtime image set of the sample to be inspected. The runtime image set includes an inspection image, a reference image corresponding to the inspection image, and a difference image representing the difference between the inspection image and the reference image.

[0065] The image processing module 104 may be configured to perform template matching between the template patch set and the runtime image set, including selectively performing at least two of the following: matching a defect template patch in the inspection image, matching a reference template patch in the reference image, or matching a difference template patch in the difference image. The defect inspection module 108 may be configured to provide a likelihood of the presence of a TOI in the inspection image based on the result of the template matching.

[0066] In some cases, optionally, the defect inspection module 108 can be further configured to perform additional defect inspections based on an estimate of the likelihood of the presence of TOI on the inspection image. Examples of further defect inspections can include, for example, further interference filtering, defect review, and defect classification, etc. In such cases, the image processing module 104 and the defect inspection module 108 can be regarded as part of a defect inspection recipe that can be used to perform runtime defect inspection operations on the acquired runtime images.

[0067] According to some alternative embodiments of the presently disclosed subject matter, the system 101 can be a runtime detection system configured to perform TOI detection operations based on machine learning. In such cases, one or more functional modules included in the processing circuitry 102 of the system 101 can include an image processing module 104, an ML model 106 pre-trained during a training / setup phase, and a defect inspection module 108.

[0068] Specifically, the processing circuitry 102 can be configured to acquire a set of runtime images of a sample to be inspected via the I / O interface 126 at runtime. The set of runtime images includes an inspection image and a reference image corresponding to the inspection image, and the inspection image includes one or more TOI candidates.

[0069] The image processing module 104 can be configured to, for each given TOI candidate, extract an image patch from the inspection image including the given TOI candidate and the surrounding area, and extract a reference patch at the corresponding position from the reference image. The image patch and the reference patch can be fed together into the trained ML model 106 to generate a feature vector representing the given TOI candidate. The ML model has been previously trained to map targets of interest (TOI) and non-TOI to corresponding feature vectors in an attribute space such that the feature vectors of TOI are relatively close to each other compared to the feature vectors of non-TOI. The feature vector of a given candidate can be evaluated to provide the likelihood that the given TOI candidate is a TOI or a non-TOI.

[0070] Once all TOI candidates have been evaluated, in some cases, the defect inspection module 108 can be configured to perform further defect inspections, such as further interference filtering, defect review, defect classification, etc., based on the estimated likelihood of the presence of TOI in one or more candidates. In such cases, the image processing module 104, the ML model 106, and the defect inspection module 108 can be regarded as part of a defect inspection recipe that can be used to perform runtime defect inspection operations on the acquired runtime images.

[0071] In any of the above embodiments, system 101 can be regarded as a runtime detection system that can perform runtime defect-related operations using defect inspection recipes.

[0072] Regarding the ML-based detection system, in some cases, system 101 can be configured as a training system capable of training an ML model using a specific training set during the training / setup phase. In such cases, one or more functional modules included in the processing circuitry 102 of system 101 can include a training module (not shown in the figure) and an ML model 106 to be trained. Specifically, the training module can be configured to obtain a training set that includes a first subset of training samples and a second subset of training samples. Each training sample in the first subset includes a TOI template patch and a corresponding reference template patch of the TOI template patch, and each training sample in the second subset includes a non-TOI template patch and a corresponding reference template patch of the non-TOI template patch.

[0073] The training module can be configured to use the training set to train the ML model 106. As described above, the ML model can be used for TOI detection at runtime after being trained. Details of the training process are described below with reference to Figure 5 and Figure 7 Describe the details of the training process.

[0074] The operations of system 100, system 101, the processing circuitry 102, and the functional modules therein will be described in further detail with reference to Figures 2 to 5 Further details.

[0075] According to certain embodiments, the ML model 106 can be implemented as various types of machine learning models. As an example, the ML model can be implemented as one of the following: various neural networks, Bayesian networks, transformers, and / or an integration / combination of the above. The learning algorithm used by the ML model can be any of the following: supervised learning, unsupervised learning, self-supervised, or semi-supervised learning, etc. The currently disclosed subject matter is not limited to a specific type of ML model or a specific type of learning algorithm used by the ML model.

[0076] In some embodiments, the ML model can be implemented as a deep neural network (DNN). The DNN can include multiple layers organized according to a corresponding DNN architecture. As a non-limiting example, the layers of the DNN can be organized according to the architecture of a convolutional neural network (CNN), a recurrent neural network, a recursive neural network, a generative adversarial network (GAN), or otherwise. Optionally, at least some of the layers can be organized into multiple DNN sub-networks. Each layer of the DNN can include multiple basic computational elements (CEs), which are commonly referred to as dimensions, neurons, or nodes in the art.

[0077] The weights and / or thresholds associated with the CE of the DNN and its connections can be initially selected before training and can be further iteratively adjusted or modified during training to achieve an optimal set of weights and / or thresholds in the trained DNN. After each iteration, the difference between the actual output produced by the DNN module and the target output associated with the corresponding training data set can be determined. The difference can be referred to as an error value. Training can be determined to be complete when a loss / cost function indicating the error value is less than a predetermined value or when there is a limited change in performance between iterations. The input data set used to adjust the weights / thresholds of the DNN is referred to as the training set.

[0078] It should be noted that the teachings of the presently disclosed subject matter are not constrained by the specific architecture of the ML model as described above.

[0079] It should be noted that although some embodiments of the present disclosure relate to the processing circuitry 102 being configured to perform the operations described above, the functions / operations of the above functional modules can be performed in various ways by one or more processors in the processing circuitry 102. As an example, the operations of each functional module can be performed by a specific processor or by a combination of processors. Thus, the operations of the various functional modules (such as template matching, TOI presence estimation, and performing defect inspection, etc.), or ML model processing and TOI presence assessment, etc., can be performed by the corresponding processor (or combination of processors) in the processing circuitry 102, and optionally, these operations can be performed by the same processor. The present disclosure should not be construed as being limited to a single processor that always performs all operations.

[0080] In some cases, in addition to the system 101, the inspection system 100 can further include one or more inspection modules, such as, for example, a defect detection module, an interference filtering module, an automatic defect review module (ADR), an automatic defect classification module (ADC), a metrology operation module, and / or other inspection modules that can be used to inspect semiconductor samples. One or more inspection modules can be implemented as independent computers, or the functions (or at least some of them) of one or more inspection modules can be integrated with the inspection tool 120. In some cases, the output of the system 101 (e.g., the estimated TOI presence and / or further defect inspection results) can be provided to one or more inspection modules (such as ADR, ADC, etc.) for further processing.

[0081] According to certain embodiments, system 100 may include a storage unit 122. The storage unit 122 may be configured to store any data required by the operating system 101, such as data related to the input and output of the system 101, and intermediate processing results generated by the system 101. As an example, the storage unit 122 may be configured to store sample images generated by the inspection tool 120 and / or their derivatives, such as runtime images, training sets as described above. In a template matching-based method, the storage unit 122 may include a template database (DB) 112, which is configured to store a set of template patches prepared during setup or runtime. In an ML-based method, the storage unit 122 may include a feature vector database (DB), which is configured to store a set of feature vectors representing the TOI and a set of feature vectors representing non-TOI prepared during setup or runtime. Thus, different types of required input data can be retrieved from the storage unit 122 and provided to the processing circuitry 102 for further processing. The output of the system 101, such as an estimated TOI presence and / or further defect inspection results, may be sent to the storage unit 122 for storage.

[0082] In some embodiments, system 100 may optionally include a computer-based graphical user interface (GUI) 124, which is configured to implement user-specified inputs related to the system 101. For example, a visual representation of a sample (e.g., via a display forming part of the GUI 124), including an image of the sample, etc., may be presented to the user. Options for defining certain operation parameters, such as weights applied to different template matches, image augmentation options, etc., may be provided to the user via the GUI. The user may also view operation results or intermediate processing results on the GUI, such as an estimated TOI presence and / or further defect inspection results, etc.

[0083] In some cases, the system 101 may be further configured to send operation results to the inspection tool 120 via the I / O interface 126 for further processing. In some cases, the system 101 may be further configured to send the results to the storage unit 122 and / or an external system (e.g., a yield management system (YMS) of a fabrication plant (fab)). A yield management system (YMS) in the context of semiconductor manufacturing is a data management, analysis, and tool system that collects data from a fabrication plant, especially during manufacturing acceleration, and helps engineers find ways to improve yield. YMS helps semiconductor manufacturers and fabrication plants manage large-scale production analysis with fewer engineers. These systems analyze yield data and generate reports. YMS can be used by integrated device manufacturers (IMDs), fabrication plants, fabless semiconductor companies, and outsourced semiconductor assembly and test (OSAT).

[0084] Those skilled in the art will readily understand that the teachings of the presently disclosed subject matter are not limited by Figure 1 the systems shown in Figure 1 Each system component and module in Figure 1 can be composed of any combination of relevant software, hardware, and / or firmware executed on one or more suitable devices, which perform the functions defined and explained herein. Equivalent and / or modified functions described with respect to each system component and module can be combined or divided in another way. Thus, in some embodiments of the presently disclosed subject matter, the system can include fewer, more, modified, and / or different components, modules, and functions than

[0085] Figure 1 Each component in

[0086] It should be noted that Figure 1 the inspection system shown in Figure 1 can be implemented in a distributed computing environment, where one or more of the aforementioned components and functional modules shown in

[0087] are distributed across several local and / or remote devices. As an example, the inspection tool 120 and the system 101 can be located at the same entity (hosted by the same device in some cases) or distributed across different entities. As another example, as described above, in some cases, the system 101 can be configured as a training system for training an ML model, while in some other cases, the system 101 can be configured as a runtime detection system that uses the trained ML model. Depending on the specific system configuration and implementation requirements, the training system and the runtime detection system can be located at the same entity (hosted by the same device in some cases) or distributed across different entities.

[0088] It should also be noted that, in some embodiments, at least some of the inspection tool 120, the storage unit 122, and / or the GUI 124 may be external to the inspection system 100 and communicate data with the systems 100 and 101 via the I / O interface 126. The system 101 may be implemented as one or more separate computers used in conjunction with the inspection tool and / or additional inspection modules as described above. Alternatively, the various functions of the system 101 may be at least partially integrated with one or more inspection tools 120, thereby facilitating and enhancing the functions of the inspection tool 120 in inspection-related processes.

[0089] Although not necessarily so, the operating processes of the system 101 and the system 100 may correspond to some or all of the stages of the method described with respect to Figures 2 to 5 Similarly, with respect to Figures 2 to 5 The method described and its possible implementations may be implemented by the system 101 and the system 100. Therefore, it should be noted that the embodiments discussed in relation to the method described with respect to Figures 2 to 5 Can also be implemented, with the necessary modifications, as various embodiments of the system 101 and the system 100, and vice versa.

[0090] Referring to Figure 2 , a generalized flowchart of TOI detection of a semiconductor sample based on template matching according to certain embodiments of the presently disclosed subject matter is shown.

[0091] As described above, semiconductor samples are typically made up of multiple layers. The inspection process of the sample can be performed multiple times during the manufacturing process of the sample, for example, after a processing step of a particular layer. In some cases, based on the known effects of the processing steps on device characteristics or yield, a set of sampled processing steps can be selected for inline inspection. Images of the sample or portions thereof can be acquired at the sequence of sampled processing steps to be inspected.

[0092] For illustrative purposes only, the images of a given processing step / layer of the set of sampled processing steps are described in certain embodiments described below. Those skilled in the art will readily understand that the teachings of the presently disclosed subject matter, such as the processes of defect detection and inspection described below, can be performed after any layer and / or processing step of the sample. The present disclosure should not be limited to the number of layers included in the sample and / or the particular layer(s) to be inspected.

[0093] A set of template patches can be obtained (202) (e.g., by the data processing module 104 in the processing circuitry 102). The set of template patches includes a target template patch that captures the target of interest (TOI), a reference template patch corresponding to the target template patch, and a difference template patch that represents the difference between the target template patch and the reference template patch.

[0094] A target of interest (TOI) can refer to a defect of interest (DOI) or a nuisance of interest (NOI). As an example, the TOI can be a DOI of a known type that one is interested in detecting. The TOI can be selected / provided by a stakeholder (such as a customer, a user, etc.). A target template patch can be obtained by cropping an image patch that contains the TOI from an inspection image. The image patch can be of various sizes, such as for example 32×32 pixels, 64×64 pixels, or any other suitable size / dimension. In some embodiments, the template patch can be extracted to capture context information around the TOI. The context information can include any context regions / structures near the TOI, such as for example one or more adjacent or ambient structures. As an example, a TOI of a contact can have a line structure as an adjacent neighboring structure to the contact. When selecting the region for cropping the template patch (such as placing a bounding box around the TOI), the bounding box can include at least a portion of the line structure in addition to the TOI of the contact, so as to provide context information of the TOI.

[0095] A reference template patch refers to an image patch cropped at a corresponding location in a reference image corresponding to the inspection image. The reference image corresponds to the inspection image in the sense of capturing a similar region that contains a pattern similar to the pattern of the inspection image. As will be described below with reference to block 204, the reference image generally refers to an image without TOI, that is, a clean image without any TOI features. The reference image and the inspection image can be normally registered (i.e., aligned with each other), and so can the reference template patch and the target template patch cropped from corresponding locations of the two images. In some cases, the reference image and the inspection image can be preprocessed in various aspects, such as for example noise filtering, SNR enhancement, etc.

[0096] A difference template patch represents the difference between the target template patch and the reference patch. As an example, the difference template patch can be cropped from a corresponding location of a difference image or from a derivative of the difference image generated from a comparison between the pixel values of the inspection image and its reference image. For example, a difference image can be generated by subtracting the reference image from the inspection image. In some cases, a graded image as a derivative of the difference image can be generated by applying a predefined difference normalization factor to the difference image. For example, the difference normalization factor can be determined based on the behavior of a normal population of pixel values and can be used to normalize the pixel values of the difference image. As an example, the grading of a pixel can be calculated as the ratio between the corresponding pixel value of the difference image and the predefined difference normalization factor. The difference template patch can be obtained from the difference image, the graded image, or any further derivative of the above.

[0097] In cases where the target template patch is cropped to capture the context information around the TOI, the corresponding reference template patch and differential template patch should also be cropped in a similar manner to capture the same context information in the surrounding area. Using a set of template patches that includes the context information of the TOI (such as the environmental structure) allows for finding an exact match of the expected TOI features with a specific context, rather than identifying any candidate features that are unrelated to the surrounding context. In the previous example, when the TOI of the contact has an environmental context of a line structure, when the template patch is cropped to include at least a part of the line structure, the template matching will only yield similar contacts with a similar context, rather than presenting all contacts with a similar size regardless of the context. This can be particularly advantageous when the TOI exhibits a non-repeating pattern. In such cases, the context area around the TOI can be selected and included in the template patch to help find the expected TOI.

[0098] In some cases, compared to obtaining the set of template patches or at least a part thereof from a ground truth image generated by inspecting a tool to acquire an actual image, the set of template patches or at least a part thereof can be synthetically generated, for example, by image simulation. For example, the reference patch can be a synthetically generated simulated image without the TOI. Such synthetic images can be generated in various ways, such as, for example, based on sampled design data, or using an ML model (or classical algorithm) that learns normal image behavior from a regular scan of a sample, and so on. The target template patch can be synthetically generated by implanting the TOI into a base image that can be a ground truth image or a synthetic image (e.g., an image without the TOI). In some cases, at least one of the target template patch and the reference patch can be a synthetic image. The present disclosure is not limited to the specific manner of acquiring / generating the set of template patches or a part thereof.

[0099] In some embodiments, the set of template patches can be augmented based on image transformation, including one or more of the following augmentation techniques: flipping, rotation, scaling, brightening, darkening, and adding noise, etc. Such image augmentation can synthetically create template patches that represent different orientations and / or variations relative to the original template patch, and the variations are caused by certain physical effects in the manufacturing process and / or inspection process, thereby enabling the identification of candidates with such differences.

[0100] At least one augmented set of template patches can be generated and included in the set of template patches. As an example, the original set of template patches can be horizontally flipped (e.g., swapping left and right) and / or vertically flipped (e.g., swapping up and down) to produce an augmented set of template patches. The original set and the augmented set can be used together during template matching, such that candidates with a similar geometry but different orientations to the original TOI can also be identified during the matching.

[0101] In some cases, multiple augmentation techniques can be applied separately to the original set of template patches to produce multiple augmented sets. The multiple sets can be used with the original set to enrich the template patches, thereby finding candidates with differential variations. It should be noted that in the case of applying image augmentation, the three original template patches in the set should generally be augmented together in a similar manner (e.g., using the same augmentation technique) to maintain consistency and alignment with each other.

[0102] In some cases, a set of template patches can be prepared during the setup phase based on previously captured sample images or synthetic images. In some cases, a set of template patches can be prepared during runtime (e.g., at the start of a runtime inspection) based on a portion of the runtime images that are first acquired during the runtime inspection and determined to be associated with the presence of the TOI.

[0103] After the set of template patches is prepared, a set of runtime images of the sample to be inspected can be acquired (204) at runtime (e.g., by the image processing module 104 in the processing circuitry 102). The set of runtime images can include an inspection image of the semiconductor sample to be inspected, a reference image corresponding to the inspection image, and a difference image representing the difference between the inspection image and the reference image.

[0104] The semiconductor sample here can refer to a semiconductor wafer, die, or components of the above during its manufacturing process in a manufacturing plant. The inspection image of the sample can refer to an image that captures at least a portion of the sample to be inspected by an inspection tool. As an example, the inspection image can capture a target area or target structure of interest to be inspected on the semiconductor sample (e.g., a structural feature or pattern on the semiconductor sample).

[0105] For each inspection image, one or more reference images can be used for defect detection. A reference image refers to a nominal image / TOI-free image that does not contain TOI features or has a high probability of not including any TOI features, such that the nominal image / TOI-free image can be used as a reference for the corresponding inspection image for defect inspection purposes. The reference image and the inspection image are generally registered (i.e., aligned with each other). One or more reference images can be obtained in various ways. In some cases, one or more reference images can be captured from one or more reference dies (e.g., adjacent dies to the inspection die) of the same sample or different samples. In some cases, a reference image can be synthetically generated through image simulation. As an example, a simulated image can be generated based on design data (e.g., CAD data) of the die or a portion thereof. The number of reference images used herein and the manner of obtaining such images should not be construed as limiting the present disclosure in any way. In some cases, the set of runtime images can include one or more reference images, or a composite reference image generated by combining one or more reference images.

[0106] Various types of inspection tools can be used to collect inspection images and / or reference images of inspection images at runtime. For example, the images can be electron beam (e-beam) images collected at runtime by an electron beam tool during inline inspection of a semiconductor sample, or optical images collected by an optical inspection tool. In some cases, the reference images and inspection images can be preprocessed.

[0107] The difference image represents the difference between the inspection image and the reference image. The difference image can refer to a difference image generated by directly subtracting the reference image from the inspection image, or a graded image that is a derivative (or any further derivative) of the difference image, as described in detail above with reference to block 202.

[0108] Template matching (206) can be performed between a set of template patches and a set of runtime images (e.g., by the image processing module 104 in the processing circuitry 102). Template matching between the two sets of images can be performed selectively. As an example, at least two of the following matching options can be performed selectively: matching defect template patches in the inspection image, matching reference template patches in the reference image, or matching difference template patches in the difference image.

[0109] For example, in some cases, the following two matching options can be selected for execution: matching defect template patches in the inspection image and matching reference template patches in the reference image. In some cases, the matching of defect template patches in the inspection image and the matching of difference template patches in the difference image can be selected for execution. In some other cases, all three matching options between corresponding image pairs in the two sets can be performed, including matching defect template patches in the inspection image, matching reference template patches in the reference image, and matching difference template patches in the difference image.

[0110] In some embodiments, template matching can be performed based on a similarity metric between a corresponding template patch and a runtime image. Any suitable similarity-based matching technique can be used, such as, for example, normalized cross-correlation or normalized squared difference.

[0111] Taking the matching of a target template patch in the inspection image as an example, the matching can be performed by moving the target template patch in the inspection image in steps (e.g., the target template patch can move as a sliding window in a region of the inspection image), and performing template matching at each step (e.g., the correlation between the template patch and the image portion of the inspection image currently covered by the template patch). In one example, zero-normalized cross-correlation can be used to perform the matching.

[0112] Once the template patch traverses the entire image area of the inspection image, a matching score map can be generated based on the template matching results of each step. The score map represents the similarity between the template patch and each image part along the traversal of the image area. As an example, the matching score map can include probability scores, where each score corresponds to a specific pixel in the inspection image and represents the probability that the specific pixel is part of the TOI. The matching between the reference template patch and the reference image and the matching between different template patches and the difference image can be performed in a similar manner.

[0113] The likelihood of the presence of the TOI in the inspection image can be provided (208) based on the results of the template matching (e.g., by the defect inspection module 108). As an example, in the case of performing at least two matches, the corresponding template matches result in at least two matching score maps. The likelihood of the presence of the TOI in the inspection image can be estimated / provided by combining (e.g., by any suitable combination / averaging technique such as summation, weighted average, multiplication, etc.) the at least two matching score maps into a composite score map and identifying one or more relatively high scores (e.g., relatively higher than a threshold) in the composite score map corresponding to one or more positions in the inspection image representing the presence of the TOI.

[0114] In some embodiments, the inspection image can include one or more TOI candidates generated by an earlier inspection process of the semiconductor sample. The inspection process of the sample can be performed in advance (e.g., for defect detection or interference filtering purposes), and one or more TOI candidates can be identified based on the detection map (such as, for example, a defect map or an interference map) generated by the inspection process. In such cases, the likelihood of the presence of the TOI in the inspection image can be provided by verifying the presence of the TOI in one or more candidates. For example, the template matching can be specifically performed within one or more image regions containing one or more TOI candidates rather than on the entire image, which greatly improves the computational efficiency.

[0115] In some cases, the likelihood of the presence of the TOI for a given TOI (e.g., the probability score of the TOI provided by the composite score map) can be used as an attribute characterizing the given TOI. Such an attribute can be included in the set of attributes characterizing the given TOI together with other attributes of the TOI. The set of attributes can be used for one or more defect inspection applications such as, for example, defect classification, filtering, etc.

[0116] As described above, the above method for TOI detection can be used to detect defects of interest (DOI) and / or detect nuisances of interest (NOI). In some embodiments, the TOI can be a specific type of DOI to be detected, and the Figure 2 described process can be used to search for similar DOIs in the inspection image and / or in one or more DOI candidates generated by a previous inspection.

[0117] In some other embodiments, the TOI can be a specific type of interference to be detected and filtered, and the processes described with reference to Figure 2 can be used to search for similar types of interference in the inspection image and / or in one or more NOI candidates generated by previous inspections. In some further embodiments, the proposed process can be used to detect both DOI and NOI, as described with reference to Figure 3 above.

[0118] Turning now to Figure 3 , a generalized flowchart for detecting DOI and NOI in one or more candidates on a semiconductor sample in accordance with certain embodiments of the presently disclosed subject matter is shown.

[0119] A first set of template patches in which the target template patches capture DOI and a second set of template patches in which the target template patches capture NOI can be obtained (302) (e.g., by the image processing module 104). The two sets of template patches can be prepared in a similar manner as described in box 202 with reference to Figure 2 above.

[0120] As described above, in some cases, the inspection image can include one or more TOI candidates, such as DOI candidates, generated by the inspection process of the semiconductor sample. Template matching can be performed (304) between the first set of template patches and the runtime image set (e.g., by the image processing module 104) to provide a likelihood of the presence of DOI in one or more TOI candidates. This can enable further selection of candidates that are more likely to be DOI from one or more candidates. Additionally, template matching can also be performed between the second set of template patches and the runtime image set to provide a likelihood of the presence of NOI in one or more TOI candidates. Candidates that are more likely to be NOI can be filtered from the TOI candidates, thereby reducing interference and false alarms from these candidates.

[0121] By performing both DOI matching and NOI matching, TOI candidates (which are typically in a large population) are further processed in two ways such that TOI candidates with a higher probability of being DOI are selected for further inspection (e.g., review and / or classification), and TOI candidates that are likely to be NOI are filtered.

[0122] In some cases, in addition to the first and second sets as described above, it is possible to obtain one or more additional sets of template patches, such as for example a third set of other types of DOI and a fourth set of other types of NOI, etc. In such cases, template matching can be repeatedly performed between each corresponding set of template patches and the set of runtime images, in order to provide the possibility for any TOI candidate to be a corresponding type of DOI and / or NOI defined in the corresponding set of template patches. The TOI candidate can be further refined based on the results of such template matching.

[0123] In some embodiments, the set of template patches obtained in block 202 can be prepared based on images with a relatively high signal-to-noise ratio (SNR) captured during a sensitive scan of the sample. A sensitive scan refers to scanning the sample at a relatively low speed and a relatively high resolution, resulting in an inspection image with a relatively high SNR. As an example, when scanning a sample using an electron beam inspection tool, a sensitive scan can produce more frames captured for a given inspection area, which when combined can form an inspection image where random noise is significantly reduced and the SNR of the image is increased.

[0124] During runtime inspection, in order to meet the throughput (TpT) requirements, the set of runtime images is typically acquired in a throughput scan with a relatively low SNR. A throughput scan refers to scanning the sample at a relatively high speed and a relatively low resolution, resulting in an inspection image with a relatively low SNR. Using the set of template patches obtained in the sensitive scan for template matching in the set of runtime images captured during the throughput scan has been shown to improve the matching accuracy and capture rate as compared to using template patches acquired in a throughput scan with a lower resolution. Since the set of template patches from the sensitive scan is only obtained during setup, using such a set does not have a negative impact on the TpT of the system.

[0125] Now turning to Figure 6 which is a schematic diagram of an example of template matching-based defect detection according to certain embodiments of the presently disclosed subject matter.

[0126] The set of template patches can be prepared during setup from a set of template images that were previously acquired / generated and used for template patch extraction purposes. The set of template images includes a template inspection image 601, the template inspection image 601 includes a target of interest (TOI), and in this example the target of interest (TOI) is a defect of interest (DOI) (a defect line structure marked by a dashed square in the figure, representing certain types of defects such as for example CD shrinkage, gate structure narrowing, or material collapse, etc.) as compared to the corresponding reference structure (marked by a dashed square) of the target of interest (TOI) in the template reference image 603. The set of template images further includes a template difference image 605 representing the difference between image 601 and image 603.

[0127] As shown in the template difference image 605, in addition to the difference between the defective line structure and the reference structure indicating the actual defect features corresponding to the defective line structure, some residual patterns and noises are also shown, which may be caused by process variations or the like.

[0128] As shown in the figure, the template patch set is prepared as follows: The target template patch 602 including the DOI and the surrounding area is cropped from the template inspection image 601, the reference template patch 604 at the corresponding position is cropped from the template reference image 603, and similarly, the difference template patch 606 representing the difference between the patch 602 and the patch 604 is cropped from the template difference image 605.

[0129] In addition to the template patches, a runtime image set of the semiconductor sample to be inspected is acquired at runtime, and the runtime image set includes an inspection image 608, a reference image 610 corresponding to the inspection image, and a difference image 612 representing the difference between the inspection image 608 and the reference image 610. The goal in this example is to find defects in the inspection image 608 that are similar to the target DOI, as shown in the template inspection image 601.

[0130] Template matching can be performed between the template patch set 602, 604, and 606 and the runtime image set 608, 610, and 612. This example shows the selection to perform template matching between all three pairs of images, that is, the matching between the defective template patch 602 and the inspection image 608, the matching between the reference template patch 604 and the reference image 610, and the matching between the difference template patch 606 and the difference image 612.

[0131] Template matching can be performed in any suitable manner. As an example, the target template patch 602 can be moved in the inspection image 608 with a step size (e.g., moved as a sliding box / window in the image area of the inspection image 608). Image correlation (or any other similarity-based matching technique) can be performed at each step (e.g., the correlation between the target template patch 602 and the image portion currently covered by the template patch in the inspection image 608).

[0132] As the template patch traverses the entire image area of the inspection image 608, a matching score map 614 can be generated based on the relevant results of each step. The score map 614 represents the similarity between the template patch 602 and each image part along the traversal of the image area. As an example, the matching score map 614 can be represented as a probability map including probability scores, where each probability score represents the probability that the corresponding pixel in the inspection image 608 is part of the target DOI. The matching between the reference template patch 604 and the reference image 610 and the matching between the difference template patch 606 and the difference image 612 can be performed in a similar manner, respectively generating a matching score map 616 and a matching score map 618.

[0133] The three score maps can be combined (e.g., by any type of combination technique such as averaging, summing, multiplying, etc.) to generate a composite score map 620. Relatively high scores (as marked in the dashed square) can be identified in the composite score map 620, for example, by comparing with a predefined threshold. The position of the high scores in the composite score map 620 corresponds to the position in the inspection image indicating the presence of the DOI (as marked in the dashed square in the inspection image 608').

[0134] As shown, based on the matching score map 614 itself, it is not clear which pixels have a higher likelihood of being the DOI. This is especially true in the case of scanning the sample at a relatively high speed, such as during throughput scanning, resulting in defect features being represented by a limited number of pixels. In some cases, when the matching score map 614 is combined with the matching score map 616, which is generated by reference patch matching and provides useful information about the clean normal pattern and background structure, the combined score map can show enhanced signal strength of the defect feature and improved detection sensitivity for the DOI.

[0135] On the other hand, the matching score map 618 generated by differential patch matching shows a clear indication of the defect feature. However, due to the residual patterns and noise in the differential image 612, the score map 618 also contains false alarm signals (marked by dashed circles) caused by the residual patterns that may affect the detection result. When the score map 618 is combined with the other two score maps (or at least one of the two score maps), the combined composite score map 620 shows an enhanced signal strength of the actual defect feature while reducing the signal strength of the false alarms, thus having better DOI detection sensitivity. This may be due to the combination of the three score maps, each of which has information about the defect feature in the context of the background feature, the clean reference feature itself, and the difference between the two. Therefore, their combination allows for a more comprehensive characterization of the DOI, which results in better detection performance in terms of detection confidence and sensitivity. In particular, the combination can improve the similarity metric to be more accurate, and when used to evaluate the probability that a candidate is a DOI or a non-DOI, it can better separate DOIs and non-DOIs compared to using only one specific match.

[0136] According to certain alternative embodiments of the presently disclosed subject matter, in some cases, runtime defect detection may be performed based on machine learning rather than template matching. Figure 4 A generalized flowchart of runtime defect detection of semiconductor samples based on machine learning according to certain embodiments of the presently disclosed subject matter is shown.

[0137] A runtime image set of the sample to be inspected can be acquired (402) at runtime (e.g., by the image processing module 104 in the processing circuitry 102). The runtime image set can include inspection images and reference images corresponding to the inspection images, where the inspection images include one or more TOI candidates generated by the inspection process of the semiconductor sample. The inspection images and reference images can be obtained in a similar manner as described in box 202 above with reference to Figure 2 The inspection images and reference images can be obtained in a similar manner as described in box 202 above with reference to the inspection process of the sample can be performed in advance (e.g., for the purpose of defect detection or interference filtering), and one or more TOI candidates can be identified based on the detection maps (such as, for example, defect maps or interference maps) generated by the inspection process. In such cases, the goal of runtime detection can be to verify the likelihood of the presence of TOI in one or more candidates.

[0138] For each given TOI candidate, a test patch including the TOI candidate and the surrounding area can be extracted (404) from the test image (e.g., by the image processing module 104). For example, the test patch can be cropped from the test image according to a bounding box placed around the TOI candidate. Similarly, a reference patch can be extracted from the corresponding location in the reference image. The test patch and the reference patch can be cropped in various sizes, such as for example 32×32 pixels, 64×64 pixels, or any other suitable size / dimension.

[0139] The test patch and the reference patch can be fed together (406) into a trained machine learning (ML) model (e.g., the ML model 106) to generate a feature vector representing the given TOI candidate. In particular, the trained ML model generates the feature vector by processing both the test patch and the reference patch, such that the generated feature vector better represents the characteristics of the given TOI candidate itself while being less affected by different variations (such as patterns and noises in the image patches).

[0140] As an example, the ML model can have an input layer that takes two image patches (e.g., the test patch and the reference patch in the form of two grayscale images) as two separate channels, and these two separate channels will pass through the model simultaneously. Taking the CNN as an exemplary implementation of the ML model, during the forward pass, convolution operations are performed independently on each channel. For example, each filter in the convolutional layer of the network can be independently applied to each channel and learn to capture spatial features from the two channels. The output layer of the ML model can generate a feature vector based on the information extracted from the two input channels.

[0141] For example, for each specific layer in the CNN, an output feature map can be generated. For example, by convolving each filter of the specific layer over the width and height of the input feature map from each channel and generating a two-dimensional activation map that gives the response of this filter at each spatial position of the channel. Stacking the activation maps of all filters along the depth dimension forms the complete output feature map of the specific layer for each channel, and the complete output feature map can be represented as a high-dimensional output feature map with multiple channels, where each channel corresponds to the activation map of a given filter. The high-dimensional output feature maps of the two channels can be combined within the network to generate a combined output feature map. The feature vector learned by the ML model can be represented in the form of the combined output feature map at any intermediate layer in the output layer or intermediate layers.

[0142] During training, the model learns how to map the information from the two image patches together to a combined feature vector. Thus, for each given TOI candidate, the ML model can generate a feature vector based on the two inputs of the test patch and the reference patch.

[0143] In some embodiments, optionally, the runtime image set may further include a difference image representing the difference between the inspection image and the reference image. The difference image can be obtained in a similar manner as described above. In such cases, with respect to block 404, for each given TOI candidate, in addition to the inspection patch and the reference patch, a difference patch can be extracted from the corresponding location of the difference image. In block 406, the inspection patch, the reference patch, and the difference patch are fed together into the trained ML model to generate a feature vector representing the given TOI candidate. In such cases, the feature vector so generated takes into account the information extracted from all three image patches, including defect features within the context of background features, clean reference features themselves, and the difference features between the two, and thus is expected to more fully represent the TOI candidate while being less affected by irrelevant features such as background patterns, noise, and variations.

[0144] The ML model is pre-trained during the training phase to map the target of interest (TOI) and non-TOI to corresponding feature vectors in the attribute space such that the feature vectors of the TOIs are relatively close to each other with respect to the feature vectors of the non-TOIs. In other words, the distance between a feature vector and other feature vectors in the attribute space indicates the likelihood that the corresponding TOI candidate is a target of interest (TOI) or a non-TOI. In some cases, the ML model can be trained based on contrastive learning, as will be further described in detail. Figure 5 As will be further described in detail.

[0145] The feature vector of a given TOI candidate can be evaluated (408) (e.g., by the defect inspection module 108) to provide the likelihood that the given TOI candidate is a TOI or a non-TOI.

[0146] In some embodiments, the feature vector of a given TOI candidate can be evaluated by comparing the feature vector of the given TOI candidate with a set of feature vectors representing TOIs (also referred to as TOI feature vectors) and a set of feature vectors representing non-TOIs (also referred to as non-TOI feature vectors), and based on the similarity between the feature vector of the given TOI candidate and the set of feature vectors representing TOIs and the set of feature vectors representing non-TOIs, provide the likelihood that the given TOI candidate is a TOI or a non-TOI. The set of TOI feature vectors and the set of non-TOI feature vectors can be pre-generated by processing a set of TOI template patches and a set of non-TOI template patches (such as two subsets of the template patches in the training set) using the trained ML model and storing the generated feature vectors in a database (e.g., the feature vector database (DB) in the storage unit 122), as will be further described in detail below. Figure 5 As will be further described in detail.

[0147] In some embodiments, alternatively, a classification model operably connected to an ML model can be used to evaluate the feature vector of a given TOI candidate. The classification model can be configured to classify the given TOI candidate as a TOI or a non-TOI based on the feature vector of the given TOI candidate. For example, the classification model can provide a probability score indicating the likelihood that the given TOI candidate is a TOI or a non-TOI. The classification model can be implemented in any suitable type of classifier architecture, such as, for example, a k-nearest neighbor (KNN) classifier.

[0148] Turning now to Figure 5 , a generalized flowchart of training an ML model that can be used to generate feature vectors is shown in accordance with certain embodiments of the presently disclosed subject matter.

[0149] A training set can be obtained (502) (e.g., by a training module in the processing circuitry 102). The training set includes a first subset of training samples and a second subset of training samples. Each training sample in the first subset includes a TOI template patch (e.g., a template patch including a TOI) and a corresponding reference template patch for the TOI template patch. Each training sample in the second subset includes a non-TOI template patch (e.g., a template patch without any TOIs) and a corresponding reference template patch for the non-TOI template patch.

[0150] As previously mentioned, a TOI can be a DOI in some cases and a NOI in some other cases, which can be predefined by a customer, for example. In the case where the TOI is a DOI of a given type, the training set can include a first subset of training samples and a second subset of training samples. Each training sample in the first subset includes a DOI template patch that includes at least one DOI of the given type and a reference template patch corresponding to the DOI template patch (e.g., the reference template patch can be a clean template patch without DOIs and can be used as a reference for verifying the DOI template patch). Each training sample in the second subset includes a template patch that includes at least one interfering feature and a reference template patch corresponding to the interfering template patch (e.g., the reference template patch can be a clean template patch without any DOIs or interferences and can be used as a reference for verifying the interfering template patch).

[0151] In the case where the TOI is a NOI of a given type, the training set may include a first subset of training samples and a second subset of training samples. Each training sample in the first subset includes a NOI template patch containing at least one NOI of the given type and a reference template patch corresponding to the NOI template patch (e.g., the reference template patch may be a clean template patch without any DOI or NOI and can be used as a reference for verifying the NOI template patch). Each training sample in the second subset includes a template patch containing at least one DOI or an interference of another type (rather than a NOI of the given type) and a reference template patch corresponding to the template patch (e.g., the reference template patch may be a clean template patch without any DOI or interference and can be used as a reference for verifying the second template patch).

[0152] In some embodiments, the ML model can be trained based on supervised learning. Contrastive learning refers to an ML paradigm that aims to train a model by maximizing the similarity between similar instances and minimizing the similarity between dissimilar instances. The goal is typically to learn a representation of the training data in such a way that similar data points are closer together in the learned representation space, while dissimilar points are separated.

[0153] In the present disclosure, similar data points refer to positive pairs of image patches that are considered similar or equivalent, such as two TOI template patches from the first subset, or two template patches from the second subset, while dissimilar data points refer to negative pairs of image patches that are considered dissimilar, such as a TOI template patch from the first subset and a template patch from the second subset. When the ML model is trained based on a training set including a large amount of data, the ML model learns to map similar instances to nearby points in the representation space (e.g., the embedding space) and dissimilar instances to farther points. In other words, the ML model learns a low-dimensional data representation to contrast between similar and dissimilar instances, rather than learning to identify each instance one by one.

[0154] Various loss functions can be used for such training. For example, the contrastive loss can guide similar instances to be mapped to the same or nearby points in the representation space and guide dissimilar instances to be mapped to different points with a distance greater than a threshold.

[0155] Specifically, in the present disclosure, a loss function (such as a contrastive loss) can be used (e.g., by a training module in the processing circuitry 102) to train (504) the ML model, where the loss function is configured to maximize the similarity between feature vectors derived from a first subset while minimizing the similarity between feature vectors derived from the first subset and feature vectors derived from a second subset. As an example, assume DOI1 and DOI2 are two template patches from the first subset, and NOI1 is a template patch from the second subset. The feature vectors of DOI1 and DOI2 in the representation space are f(DOI1) and f(DOI2) respectively, and the feature vector of NOI1 is f(NOI1). The loss function aims to minimize the distance d(f(DOI1), f(DOI2)), while maximizing the distances d(f(DOI1), f(NOI1)) and d(f(DOI2), f(NOI1)), where d can be any metric function, such as a distance-based metric, e.g., the Euclidean distance. In some cases, a triplet loss can be used, which requires the distance between similar instances to be less than the distance between dissimilar instances.

[0156] In some embodiments, during each training iteration, a batch of positive pairs and negative pairs are used. Each positive pair includes two training samples from the first subset, where each training sample includes a DOI template patch and a corresponding reference patch. Each negative pair includes a training sample from the first subset that includes a DOI template patch and a corresponding reference patch, and a training sample from the second subset that includes a NOI template patch and a corresponding reference patch. Each time, the training samples can be fed into the ML model, where two image patches are processed together to generate a feature vector representing a given TOI candidate, in a manner similar to the runtime processing described above with respect to Figure 4 the runtime processing of block 404. In some cases, the ML model can be implemented as a Siamese network, in which two identical sub-networks share the same set of parameters. In such cases, each sub-network can process one of the training samples in a pair of training samples simultaneously.

[0157] Then, the ML model is trained to minimize the contrastive loss, adjusting the parameters of the ML model to improve the consistency of positive pairs and the inconsistency of negative pairs. Once trained, the ML model can be used for TOI detection in the runtime inspection of semiconductor samples.

[0158] Figure 7 FIG. shows a schematic diagram of the training process of the ML model according to certain embodiments of the present disclosure.

[0159] Figure 7An ML model 700 is illustrated. The ML model 700 can be implemented in various types and architectures, such as CNNs, attention-based models such as vision image transformers (also known as vision transformers or ViTs), etc. To train the ML model, a training set is obtained, which includes a first subset of training samples and a second subset of training samples. Each training sample in the first subset includes a TOI template patch and a corresponding reference template patch of the TOI template patch, and each training sample in the second subset includes a non-TOI template patch and a corresponding reference template patch of the non-TOI template patch. An example of a training sample from the first subset (also known as the first training sample) is shown, and the training sample of the first subset includes a DOI template patch 702 containing a DOI 704 and a corresponding reference template patch 706. An example of a training sample from the second subset (also known as the second training sample) is also shown, and the training sample of the second subset includes a perturbation template patch 703 (the perturbation can be considered a minor change and is not shown in the figure) and a corresponding reference template patch 705. These two training samples are considered dissimilar samples.

[0160] The first training sample including the DOI template patch 702 and the reference template patch 704 of the DOI template patch 702 can be fed into the ML model 700 for processing. A feature vector 708 representing the DOI 704 in the representation space can be generated by the ML model 700 based on the information extracted from both the template patches 702 and 704.

[0161] Similarly, the second training sample including the perturbation template patch 703 and the reference template patch 705 of the perturbation template patch 703 can be fed into the ML model 700 for processing. A feature vector 708' representing the perturbation in the representation space can be generated by the ML model 700 based on the information extracted from both the template patches 703 and 705.

[0162] A loss function 710 (such as the contrastive loss described above) can be used to evaluate the two feature vectors 708 and 708', and the parameters of the ML model 700 can be optimized to minimize the value of the loss function, for example, by maximizing the distance between the two feature vectors.

[0163] Additionally, two training samples from the first subset (including the first training sample and another training sample from the same subset, where the first training sample includes the DOI template patch 702 and the reference template patch 704 of the DOI template patch 702) can be fed into the ML model 700 for processing. These two training samples are considered to be similar samples. A loss function 710 can be used to evaluate the two feature vectors generated for these two training samples, and the parameters of the ML model 700 can be optimized to minimize the value of the loss function, for example, by minimizing the distance between the two feature vectors.

[0164] As previously described, in some cases, a classification model (such as the classifier 712) can be operably connected to the ML model 700 and configured to classify whether a TOI candidate in a runtime image is a TOI or a non-TOI. In such cases, the classification model and the ML model can together form an ML system. In some cases, an overall loss function including a contrastive loss and a classification loss can be used to optimize the ML system as a whole, which includes its two learning components. In some other cases, the classifier 712 can be trained separately from the ML model 700.

[0165] As an example, the classifier 712 can take the feature vector 708 representing the DOI 704 as input and provide a predicted class 714 based on this (in some cases, the predicted class can be associated with the probability that the candidate is the predicted class). A loss function 716 (e.g., a classification loss, such as cross entropy or squared hinge loss, etc.) can be used to evaluate the predicted class 714 with respect to the ground truth class 718 of the DOI 704. The parameters of the classifier 712 can be optimized to minimize the difference between the predicted class 714 and the ground truth class 718.

[0166] In some embodiments, compared to the real images generated by the actual image acquisition of the inspection tool, some of the training images in the first subset and / or the second subset can be synthetic images generated by image simulation. As an example, the first subset and / or the second subset of training images can in some cases include only real images, or only synthetic images, or a combination of these two types of images in any possible proportion. For example, the first subset can include at least one template patch synthetically generated by implanting a DOI into a clean image patch. Similarly, the second subset can include one or more real images and / or synthetic interference template patches. The present disclosure is not limited to the type or number of training images and / or the specific manner of acquiring / generating the training images.

[0167] Once the ML model 700 and the classifier 712 are trained, the ML model 700 and the classifier 712 can be deployed in production for runtime TOI detection, such as defect detection and / or interference filtering.

[0168] The output generated by the ML system (such as the estimated TOI presence) can be used for further defect inspection (e.g., by the defect inspection module 108). Such defect inspection can refer to one or more of the following operations: defect detection, defect review, and defect classification.

[0169] It should be noted that the examples shown in this disclosure (such as exemplary images and defects, exemplary ML models, classifiers, and ML systems, loss functions, defect inspection applications, etc.) are shown for exemplary purposes and should not be considered as limiting this disclosure in any way. Other suitable examples / implementations can also be used in addition to or in place of the above examples.

[0170] One of the advantages of certain embodiments of the presently disclosed subject matter as described herein is to provide an automatic detection system that can detect the presence of TOI (DOI or NOI) in runtime images based on template matching or machine learning.

[0171] The template matching-based detection system prepares a set of template patches in advance and performs selective matching between the set of template patches and the set of runtime images, where at least two template matches are selected to be performed instead of only matching between the defect template patch and the inspection image. Such template matching can utilize information from the inspection image, reference image, and / or difference image, which can provide an enhanced TOI signal when combined while suppressing false alarms and various variations.

[0172] Another advantage of certain embodiments of the presently disclosed subject matter as described herein is that, in the case where the inspection image includes one or more TOI candidates generated by the inspection process of a semiconductor sample, both DOI matching and NOI matching can be performed, such that candidates with a higher probability of being DOI are selected for further inspection (e.g., review and / or classification), and candidates that may be NOI are filtered out, which can improve detection sensitivity while reducing the false alarm rate.

[0173] One of the further advantages of certain embodiments of the presently disclosed subject matter as described herein is that, in an ML-based method, at least two of the inspection patch, the reference patch, and the difference patch are fed together into a trained ML model to generate a feature vector representing a given TOI candidate. In such cases, the feature vector so generated takes into account information extracted from two or three image patches, including defect features within the context of background features, the clean reference features themselves, and the difference features between the two, and thus can be expected to represent the TOI candidate more fully while being less affected by irrelevant features such as background patterns, noise, and variations.

[0174] When used for TOI detection, the method proposed above can both reduce false alarms caused by variations and noise and significantly improve detection sensitivity.

[0175] It should be understood that the present disclosure is not limited in its application to the details set forth in the description contained herein or shown in the drawings.

[0176] In this detailed description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure. However, one of ordinary skill in the art will understand that the presently disclosed subject matter may be practiced without these specific details. In other instances, well-known methods, procedures, components, and circuits have not been described in detail so as not to obscure the present disclosure.

[0177] Unless otherwise explicitly stated, as will be apparent from this discussion, it should be understood that throughout the specification discussion, terms such as "obtain", "inspect", "provide", "train", "use", "generate", "execute", "match", "select", "acquire", "compare", "combine", "identify", "evaluate", "augment", "extract", "feed", "classify", etc. refer to (multiple) actions and / or (multiple) processes of a computer to manipulate and / or transform data into other data, where the data is represented as physical (such as electronic) quantities and / or the data represents physical objects. The term "computer" should be construed broadly to cover any kind of hardware-based electronic device having data processing capabilities, as a non-limiting example, including the inspection system disclosed in this application, the TOI detection system (e.g., defect detection system), and various parts of the above systems.

[0178] As used herein, the terms "non-transitory memory" and "non-transitory storage medium" should be construed broadly to encompass any volatile or non-volatile computer memory suitable for the presently disclosed subject matter. These terms should be understood to include a single medium or multiple media that store one or more sets of instructions (e.g., a centralized or distributed database, and / or associated caches and servers). These terms should also be understood to include any medium that is capable of storing or encoding a set of instructions for execution by a computer and that causes the computer to perform any one or more of the methods of the present disclosure. Thus, these terms should be understood to include, but not be limited to, read only memory ("ROM"), random access memory ("RAM"), magnetic disk storage media, optical storage media, flash memory devices, and the like.

[0179] As used in this specification, the term "sample" should be construed broadly to encompass any kind of physical object or substrate, including wafers, masks, reticles, and other structures, combinations, and / or portions thereof used in the manufacture of semiconductor integrated circuits, magnetic heads, flat panel displays, and other semiconductor manufactured articles. Samples are also referred to herein as semiconductor samples and can be produced by manufacturing equipment that performs the corresponding manufacturing process.

[0180] As used in this specification, the term "inspection" should be construed broadly to encompass any kind of operation related to various types of defect detection, defect review, and / or defect classification, segmentation, and / or metrology operations during and / or after a sample manufacturing process. Non-destructive inspection tools are used during or after the manufacture of the sample to be inspected to provide the inspection. As a non-limiting example, inspection processes can include runtime scans (in single or multiple scans), imaging, sampling, detection, review, measurement, classification, and / or other operations provided with respect to the sample or portions thereof, using the same or different inspection tools. Similarly, inspection can be provided prior to the manufacture of the sample to be inspected and can include, for example, generating (a)n inspection recipe and / or other setup operations. It should be noted that, unless otherwise explicitly stated, the term "inspection" or its derivatives as used in this specification is not limited with respect to the resolution or size of the inspection area. As non-limiting examples, various non-destructive inspection tools include scanning electron microscopes (SEM), atomic force microscopes (AFM), optical inspection tools, and the like.

[0181] The term "metrology operation" as used in this specification shall be broadly interpreted to cover any metrology operation process for extracting metrology information related to one or more structural elements on a semiconductor sample. In some embodiments, the metrology operation may include measurement operations, such as critical dimension (CD) measurements performed on certain structural elements on the sample, including but not limited to the following: dimensions (e.g., line width, line pitch, contact diameter, element size, edge roughness, gray-scale statistics, etc.), the shape of the element, the distance within or between elements, the relevant angles, the overlay information associated with elements corresponding to different design levels, etc. For example, by adopting image processing techniques to analyze measurement results such as measurement images. It should be noted that unless otherwise explicitly stated, the term "metrology" or its derivatives used in this specification is not restricted in terms of measurement techniques, measurement resolution, or the size of the inspection area.

[0182] The term "defect" as used in this specification shall be broadly interpreted to cover any kind of abnormality or undesired feature / function formed on the sample. In some cases, the defect may be a defect of interest (DOI), which is a real defect that has a certain impact on the function of the manufactured device, so detecting the DOI is in the interest of the customer. For example, any "fatal" defect that may cause yield loss can be indicated as a DOI. In some other cases, the defect may be a perturbation (also known as a "false positive" defect), which can be ignored because the perturbation has no impact on the function of the completed device and does not affect the yield.

[0183] The term "TOI candidate" as used in this specification shall be broadly interpreted to cover a suspected TOI location on the sample that is detected as having a relatively high probability of being the target of interest (TOI). Thus, during review / testing, the TOI candidate may actually be a TOI (e.g., a DOI or NOI), or in some other cases, the TOI candidate may be a non-TOI or random noise caused by different variations during inspection (e.g., process variations, color variations, mechanical and electrical variations, etc.).

[0184] The term "design data" as used in this specification shall be broadly interpreted to cover any data indicating the hierarchical physical design (layout) of the sample. The design data can be provided by the corresponding designer and / or can be derived from the physical design (e.g., through complex simulations, simple geometric and Boolean operations, etc.). The design data can be provided in different formats, as non-limiting examples, such as GDSII format, OASIS format, etc. The design data can be presented in vector format, gray-scale intensity image format, or other ways.

[0185] The terms “(multiple) images” or “image data” as used in the specification should be construed broadly to cover any original image / frame of a sample captured by an inspection tool during a manufacturing process, derivatives of the captured image / frame obtained through various preprocessing stages, and / or computer-generated synthetic images (in some cases based on design data). Depending on the specific scanning mode (e.g., one-dimensional scanning such as line scanning, two-dimensional scanning in the x and y directions, or point scanning at a specific point, etc.), the image data can be represented in different formats, such as for example as grayscale profiles, two-dimensional images, or discrete pixels, etc. It should be noted that in some cases, in addition to the images (e.g., captured images, processed images, etc.), the image data referred to herein can also include digital data associated with the images (e.g., metadata, manually crafted attributes, etc.). It should be further noted that the images or image data can include data related to a processing step / layer of interest or multiple processing steps / layers of a sample.

[0186] It should be understood that, unless otherwise specifically stated, certain features of the presently disclosed subject matter described in the context of separate embodiments can also be provided in combination in a single embodiment. Conversely, the various features of the presently disclosed subject matter described in the context of a single embodiment can also be provided separately or in any suitable sub-combination. In this detailed description, numerous specific details are set forth in order to provide a thorough understanding of the methods and apparatuses.

[0187] It should also be understood that the systems according to the present disclosure can be implemented at least in part on a suitably programmed computer. Similarly, the present disclosure contemplates a computer program readable by a computer for performing the methods of the present disclosure. The present disclosure further contemplates a non-transitory computer-readable memory tangibly embodying an instruction program executable by a computer for performing the methods of the present disclosure.

[0188] The present disclosure is capable of having other embodiments and of being practiced or carried out in various ways. Accordingly, it should be understood that the phraseology and terminology employed herein are for the purpose of description and should not be regarded as limiting. Thus, those skilled in the art will understand that the concept upon which this disclosure is based can readily be utilized as a basis for designing other structures, methods, and systems for carrying out several purposes of the presently disclosed subject matter.

[0189] Those skilled in the art will readily appreciate that various modifications and changes can be applied to the embodiments of the present disclosure described above without departing from the scope of the present disclosure as defined by the appended claims.

Claims

1. A computerized system for performing defect detection on a semiconductor sample, the system comprising processing circuitry configured to: A template patch set is obtained, wherein the template patch set includes: a target template patch capturing a target of interest (TOI), a reference template patch corresponding to the target template patch, and a difference template patch representing a difference between the target template patch and the reference template patch; Acquiring a runtime image set of a semiconductor sample to be inspected at runtime, the runtime image set comprising an inspection image, a reference image corresponding to the inspection image, and a difference image representing a difference between the inspection image and the reference image; performing template matching between the set of template patches and the set of runtime images, including selectively performing at least two of: matching the defect template patch in the inspection image, matching the reference template patch in the reference image, or matching the difference template patch in the difference image; and A possibility of the TOI existing in the inspection image is provided based on the result of the template matching.

2. The computerized system of claim 1, wherein: The TOI is a defect of interest (DOI) or a nuisance of interest (NOI).

3. A computerized system as claimed in claim 1 or 2, wherein: The template matching is performed based on a similarity measure between the corresponding template patch and the runtime image, thereby generating at least two matching score maps, and wherein the likelihood is provided by combining the at least two matching score maps into a composite score map, and identifying one or more relatively high scores in the composite score map corresponding to one or more locations in the inspection image indicating the presence of the TOI.

4. The computerized system of claim 1 or 2, wherein: The template matching is performed by matching the defect template patch in the inspection image and matching the reference template patch in the reference image.

5. The computerized system of claim 1 or 2, wherein: The template matching is performed by matching the defect template patch in the inspection image, matching the reference template patch in the reference image, and matching the difference template patch in the difference image.

6. The computerized system of claim 1 or 2, wherein: The inspection image includes one or more TOI candidates generated by an inspection process of the semiconductor sample, and the possibility is provided with respect to verifying the existence of a TOI in the one or more TOI candidates.

7. The computerized system of claim 6, wherein: The processing circuit system is configured to obtain a first set of template patches in which the target template patch captures the DOI and a second set of template patches in which the target template patch captures the NOI, perform template matching between the first set of template patches and the runtime image set to provide a likelihood of the presence of the DOI in the one or more TOI candidates, and perform template matching between the second set of template patches and the runtime image set to provide a likelihood of the presence of the NOI in the one or more TOI candidates.

8. The computerized system of claim 1 or 2, wherein: The processing circuitry is further configured to augment the set of template patches based on an image transform, thereby generating at least one augmented set of template patches, and include the at least one augmented set in the set of template patches.

9. The computerized system of claim 1 or 2, wherein: The set of template patches captures contextual information surrounding the TOI.

10. The computerized system of claim 1, wherein: The set of template patches is prepared during a setup phase based on previously captured images or synthesized images, or during runtime based on runtime images associated with the presence of a TOI.

11. The computerized system of claim 1, wherein: The template patch set is obtained based on images captured in a sensitivity scan with a relatively high signal-to-noise ratio (SNR), while the runtime image set is acquired in a throughput scan with a relatively low SNR.

12. The computerized system of claim 1, wherein: The processing circuitry is further configured to include the likelihood of TOI presence for a given TOI in the inspection image as an attribute in a set of attributes characterizing the given TOI, and to use the set of attributes for one or more defect inspection applications.

13. A computerized method for defect inspection of a semiconductor sample, the method comprising: Obtaining a template patch set, the template patch set comprising: a target template patch capturing a target of interest (TOI), a reference template patch corresponding to the target template patch, and a difference template patch representing a difference between the target template patch and the reference template patch; Acquiring a runtime image set of a semiconductor sample to be inspected at runtime, the runtime image set comprising an inspection image, a reference image corresponding to the inspection image, and a difference image representing a difference between the inspection image and the reference image; performing template matching between the set of template patches and the set of runtime images, including selectively performing at least two of: matching the defect template patch in the inspection image, matching the reference template patch in the reference image, or matching the difference template patch in the difference image; and A possibility of the TOI existing in the inspection image is provided based on the result of the template matching.

14. The computerized method of claim 13, wherein: The template matching is performed based on a similarity measure between the corresponding template patch and the runtime image, thereby generating at least two matching score maps, and wherein the likelihood is provided by combining the at least two matching score maps into a composite score map, and identifying one or more relatively high scores in the composite score map corresponding to one or more locations in the inspection image indicating the presence of the TOI.

15. A computerized method as claimed in claim 13 or 14, wherein: The template matching is performed by matching the defect template patch in the inspection image and matching the reference template patch in the reference image.

16. A computerized method as claimed in claim 13 or 14, wherein: The template matching is performed by matching the defect template patch in the inspection image, matching the reference template patch in the reference image, or matching the difference template patch in the difference image.

17. The computerized method of claim 13 or 14, wherein: The inspection image includes one or more TOI candidates generated by an inspection process of the semiconductor sample, and the possibility is provided with respect to verifying the existence of a TOI in the one or more TOI candidates.

18. The computerized method of claim 17, wherein: The processing circuit system is configured to obtain a first template patch set in which the target template patch captures the DOI and a second template patch set in which the target template patch captures the NOI, and perform template matching between the first template patch set and the runtime image set to provide a likelihood of the presence of the DOI in the one or more TOI candidates, and perform template matching between the second template patch set and the runtime image set to provide a likelihood of the presence of the NOI in the one or more TOI candidates.

19. The computerized method of claim 13 or 14, wherein: The template patch set is obtained based on images captured in a sensitivity scan with a relatively high signal-to-noise ratio (SNR), while the runtime image set is acquired in a throughput scan with a relatively low SNR.

20. A non-transitory computer-readable storage medium tangibly embodying a program of instructions that, when executed by a computer, causes the computer to perform a method for defect detection on a semiconductor sample, the method comprising: Obtaining a template patch set, the template patch set comprising: a target template patch capturing a target of interest (TOI), a reference template patch corresponding to the target template patch, and a difference template patch representing a difference between the target template patch and the reference template patch; Acquiring a runtime image set of a semiconductor sample to be inspected at runtime, the runtime image set comprising an inspection image, a reference image corresponding to the inspection image, and a difference image representing a difference between the inspection image and the reference image; performing template matching between the set of template patches and the set of runtime images, including selectively performing at least two of: matching the defect template patch in the inspection image, matching the reference template patch in the reference image, or matching the difference template patch in the difference image; and A possibility of the TOI existing in the inspection image is provided based on the result of the template matching.

Images