Lower electrode assembly and plasma processing equipment

Abstract

The invention provides a lower electrode assembly and plasma processing equipment. The lower electrode assembly comprises an electrostatic chuck, the upper surface of which is used for bearing a substrate; the first electrode is positioned in the electrostatic chuck and is electrically connected with a pulse type direct current bias voltage source; the second electrode is positioned in the electrostatic chuck and is electrically connected with a direct-current voltage source through an isolating circuit, and a second capacitor is formed between the second electrode and the substrate; the isolating circuit comprises a diode and a capacitor, the negative electrode of the diode is electrically connected with the negative electrode of the direct-current voltage source, and the positive electrode of the diode is electrically connected with the second electrode; the first end of the capacitor is electrically connected between the positive electrode of the diode and the second electrode, the second end of the capacitor is grounded and electrically connected with the positive electrode of the direct-current voltage source, and the capacitance value of the capacitor is smaller than that of the second capacitor. According to the invention, by isolating the influence of the pulse-type DC bias source on the clamping voltage, the problem of instability of the clamping voltage of the substrate in the process is solved.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor devices, and particularly relates to a lower electrode assembly and a plasma processing device. Background Art

[0002] In a plasma processing device, an electrostatic chuck is one of the core components of the device. The electrostatic chuck mainly plays two roles in plasma processing. One is to generate a bias voltage on the surface of the substrate on the electrostatic chuck, thereby accelerating the movement of ions in the plasma sheath towards the substrate. The other is to firmly hold the substrate disposed thereon, so that the substrate remains stable during the plasma processing. In order to achieve higher aspect ratio etching, an effective method is to bias the substrate using a pulsed DC bias source, which can generate a single-peak ion energy distribution function.

[0003] In the existing solution of using a pulsed DC bias source to bias the substrate, in one solution, the pulsed DC bias source is connected to a first electrode in the electrostatic chuck and coupled to the substrate through a capacitor; the fastening of the substrate is achieved by applying a DC voltage to a second electrode embedded in the electrostatic chuck to generate an electrostatic attraction force between the electrostatic chuck and the substrate. However, the pulsed voltage from the first electrode will greatly affect the electrostatic force between the second electrode and the substrate, resulting in insufficient or excessive clamping of the substrate during etching, causing losses such as substrate scrapping and etching failure.

[0004] In another solution, the pulsed DC bias source and the DC voltage source are commonly coupled to the same electrode in the electrostatic chuck, and the self-bias effect is used to clamp the substrate. Due to the discharge of the plasma sheath, the magnitude of the self-bias is not stable, which easily leads to the instability of the clamping voltage. In addition, since the pulsed DC bias source and the clamping DC voltage source are coupled to the substrate through a common electrode in the electrostatic chuck, the sum of the larger clamping voltage and the RF voltage is extremely likely to break down the insulating layer in the electrostatic chuck, resulting in damage or even scrapping of the electrostatic chuck, causing losses caused by substrate scrapping, downtime, and component replacement. Summary of the Invention

[0005] The object of the present invention is to provide a lower electrode assembly and a plasma processing device, which solve the problem of instability of the clamping voltage of the substrate during the process by isolating the influence of the pulsed DC bias source on the clamping voltage.

[0006] To achieve the above object, the present invention is realized through the following technical solutions:

[0007] A lower electrode assembly for plasma process treatment, comprising:

[0008] An electrostatic chuck, the upper surface of which is used to carry a substrate;

[0009] The first electrode located in the electrostatic chuck is electrically connected to a pulsed DC bias voltage source;

[0010] The second electrode located in the electrostatic chuck is electrically connected to a DC voltage source through an isolation circuit, and a second capacitor is formed between the second electrode and the substrate;

[0011] The isolation circuit includes a diode and a capacitor. The negative electrode of the diode is electrically connected to the negative electrode of the DC voltage source, the positive electrode is electrically connected to the second electrode, the first end of the capacitor is electrically connected between the positive electrode of the diode and the second electrode, the second end is grounded and electrically connected to the positive electrode of the DC voltage source, and the capacitance value of the capacitor is less than the capacitance value of the second capacitor.

[0012] Optionally, the DC voltage source outputs a negative voltage, and the pulsed DC bias voltage source outputs a negative pulse voltage or a positive pulse voltage.

[0013] Optionally, the capacitance value of the capacitor is less than half of the capacitance value of the second capacitor.

[0014] Optionally, the capacitance value of the capacitor is 10 pF to 500 pF.

[0015] Optionally, the isolation circuit further includes a first resistor, and the first resistor is connected in series with the second electrode.

[0016] Optionally, the resistance value of the first resistor is inversely proportional to the frequency of the pulsed DC bias voltage source.

[0017] Optionally, the resistance value of the first resistor is 1 kΩ to 100 kΩ.

[0018] Optionally, the isolation circuit further includes a second resistor, and the second resistor is connected in series with the diode.

[0019] Optionally, the capacitance value of the second capacitor is 1 nF to 100 nF.

[0020] Optionally, the positive electrode of the pulsed DC bias voltage source and the positive electrode of the DC voltage source are grounded.

[0021] Optionally, the first electrode is a disc electrode, and the second electrode is a ring electrode surrounding the first electrode.

[0022] Optionally, the first electrode is a disc electrode, and the second electrode is a disc electrode located above the first electrode; or, the second electrode is a disc electrode, and the first electrode is a ring electrode surrounding the second electrode.

[0023] Optionally, the isolation circuit and the DC voltage source are integrally arranged.

[0024] A plasma processing device, comprising:

[0025] A reaction chamber;

[0026] An intake mechanism for delivering process gas into the reaction chamber;

[0027] A source radio frequency for igniting the process gas into plasma;

[0028] The lower electrode assembly as described in any one of the above, located at the bottom of the reaction chamber, and the electrostatic chuck is used to carry the substrate.

[0029] Optionally, the plasma processing device further includes:

[0030] A base made of a metal material, and the electrostatic chuck is located above the base and made of a ceramic material.

[0031] Compared with the prior art, the present invention has the following advantages:

[0032] The present invention provides an isolation circuit between the DC voltage source and the second electrode to isolate the influence of the pulse voltage of the pulsed DC bias voltage source on the clamping voltage. Since the diode has the characteristics of forward conduction and reverse cut-off, when the pulsed DC bias voltage source outputs a pulse, the diode is reverse cut-off, and the pulse output passes through the second capacitor and the capacitor to ground, and the pulse output charges the second capacitor and the capacitor. Since the capacitance value of the capacitor is smaller than that of the second capacitor, the output voltage of the pulsed DC bias voltage source is smaller at both ends of the second capacitor. Therefore, the influence of the output of the pulsed DC bias voltage source on the clamping voltage can be significantly reduced, and the problem of the instability of the substrate clamping voltage during the process is solved. Description of the Drawings

[0033] In order to more clearly illustrate the technical solutions of the present invention, the drawings required for the description will be briefly introduced below. Obviously, the drawings in the following description are an embodiment of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts:

[0034] Figure 1 Is a structural diagram of a plasma processing device;

[0035] Figure 2 Is a structural diagram of a lower electrode assembly in the prior art;

[0036] Figure 3 Is Figure 2 An equivalent circuit diagram of the structure shown;

[0037] Figure 4 、 Figure 5For the second capacitor C in two simulation experiments using this prior art 2 Graphs showing the variation of the voltage across both ends, DC voltage output, and pulsed DC output with time;

[0038] Figure 6 Structural diagram of the lower electrode assembly in an embodiment of the present invention;

[0039] Figure 7 For Figure 6 An equivalent circuit diagram of the structure shown;

[0040] Figure 8 For Figure 6 Another equivalent circuit diagram of the structure shown;

[0041] Figure 9 Structural diagram of the lower electrode assembly in another embodiment of the present invention;

[0042] Figure 10 、 Figure 11 For the second capacitor C in two simulation experiments using the solution of the present invention 2 Graphs showing the variation of the voltage across both ends, DC voltage output, and pulsed DC output with time. Detailed implementation manners

[0043] The solution proposed by the present invention will be further described in detail below in conjunction with the accompanying drawings and specific implementation manners. According to the following description, the advantages and features of the present invention will be clearer. It should be noted that the accompanying drawings are in a very simplified form and use non-precise scales, only for the purpose of conveniently and clearly assisting in explaining the embodiments of the present invention. In order to make the purpose, features, and advantages of the present invention more obvious and understandable, please refer to the accompanying drawings. It should be known that the structures, scales, sizes, etc. shown in the drawings of this specification are only used to cooperate with the content disclosed in the specification for those skilled in this technology to understand and read, and are not used to limit the limiting conditions for the implementation of the present invention. Therefore, they do not have a technical essence. Any modification of the structure, change in the proportional relationship, or adjustment of the size, without affecting the efficacy that the present invention can produce and the purpose that can be achieved, should still fall within the scope covered by the technical content disclosed by the present invention.

[0044] Figure 1The structural schematic diagram of a plasma processing apparatus is shown. The plasma processing apparatus includes: a reaction chamber 10, a lower electrode assembly 20 located at the bottom of the reaction chamber 10, the lower electrode assembly 20 includes an electrostatic chuck 21 for holding a substrate W. The reaction chamber 10 is further provided with an intake mechanism 30 for delivering a process gas into the reaction chamber 10. The intake mechanism 20 can intake gas from the top or sidewall of the reaction chamber 10. In a capacitively coupled plasma processing apparatus, the intake mechanism 20 can be a gas showerhead, which also serves as the upper electrode for generating plasma. It further includes a source radio frequency 40 for igniting the process gas into plasma. One or more radio frequency power supplies 40 can be individually applied to the lower electrode or simultaneously and separately applied to the upper electrode and the lower electrode to deliver radio frequency power to the lower electrode or the upper electrode and the lower electrode, thereby generating a large radio frequency electric field inside the reaction chamber 10. Neutral gas molecules of the reaction gas lose electrons when subjected to these strong electric fields, leaving positively charged ions. The positively charged ions accelerate towards the lower electrode direction and combine with neutral substances in the substrate W to be processed, exciting wafer processing, namely etching, deposition, etc.

[0045] The lower electrode assembly 20 further includes: a base 22, the base 22 can serve as the lower electrode and is made of a metal material. The electrostatic chuck 21 is located above the base 22 and is made of a ceramic material. Thus, the source radio frequency can be applied to the base 22 to deliver radio frequency power to the lower electrode, thereby generating a radio frequency electric field inside the reaction chamber 10.

[0046] Figure 2 The structural schematic diagram of a lower electrode assembly in an existing plasma processing apparatus is shown. Among them, a first electrode 23' and a second electrode 24' are provided in the electrostatic chuck 21'. The first electrode 23' is electrically connected to a pulsed DC bias source PDC for biasing the substrate W on the electrostatic chuck 21' to accelerate charged particles in the sheath above it to bombard the substrate W. The second electrode 24' is electrically connected to a DC voltage source DC for generating an electrostatic attraction force between the electrostatic chuck 21' and the substrate W to fix the substrate W. There is a part of the dielectric material of the electrostatic chuck 21' between the first electrode 23' and the second electrode 24' and the substrate W, such that a capacitor is formed between the first electrode 23', the second electrode 24' and the substrate. The pulsed voltage of the pulsed DC bias source PDC will first be capacitively coupled upward to the substrate W, and then fed downward into the second electrode 24' through the capacitor between the substrate W and the second electrode 24', thereby coupling the two circuits together. The change of one power supply affects the effect of the other power supply, resulting in insufficient or excessive clamping of the substrate.

[0047] Figure 3 is Figure 2 The equivalent circuit diagram of the shown structure. In the figure, C 1 and C2 respectively represent the capacitances between the first electrode 23' and the second electrode 24' and the substrate W, D SH , C SH and R SH The parallel circuit of and represents the equivalent circuit model of the plasma sheath layer on the substrate surface, D W , C W and R W The parallel circuit of and represents the equivalent circuit model of the plasma sheath layer on the cavity wall surface, R pl represents the resistance inside the plasma.

[0048] Figure 4 , Figure 5 are the capacitances C obtained through two experimental simulations 2 The curves of the voltage across both ends, i.e., the clamping voltage (solid line), the DC voltage output (dashed line), and the pulsed DC output (dash-dotted line) changing with time, where Figure 4 In, the voltage of the DC voltage source DC is set to -3 kV, the pulsed voltage of the pulsed DC bias source PDC is -5 kV, and the duty cycle is 70%, Figure 5 In, the voltage of the DC voltage source DC is set to -3 kV, the pulsed voltage of the pulsed DC bias source PDC is -1 kV, and the duty cycle is 70%. According to the simulation results, the output voltage of the pulsed DC bias source significantly affects the clamping voltage, making the clamping voltage unable to remain stable as expected, and there are problems of over-clamping and under-clamping for the substrate W. This is due to the charging and discharging of the pulsed DC bias source PDC to the capacitance C 2 .

[0049] By comparing Figure 4 and Figure 5 it can be found that although the voltage of the DC voltage source DC is set to -3 kV, the magnitude of the pulsed voltage of the pulsed DC bias source PDC has a great influence on the clamping voltage. During the plasma process treatment, the output voltage of the pulsed DC bias source is usually different under different treatment processes, which will change the clamping voltage, cause process instability, and even damage to the substrate W.

[0050] To solve the above problems, the present invention provides a lower electrode assembly 20 for plasma process treatment, as Figure 6 shown, including: an electrostatic chuck 21, whose upper surface is used to carry the substrate W; a first electrode 23 located in the electrostatic chuck 21, which is electrically connected to a pulsed DC bias source PDC; a second electrode 24 located in the electrostatic chuck 21, which is electrically connected to a DC voltage source DC through an isolation circuit 25. The capacitance formed between the first electrode 23 and the substrate W is called the first capacitance C 1 , and the capacitance formed between the second electrode 24 and the substrate W is called the second capacitance C 2。

[0051] Figure 7 is Figure 6 the equivalent circuit diagram of the structure shown. In combination with Figure 7 as shown, the isolation circuit 25 includes a diode D and a capacitor C. The negative electrode of the diode D is electrically connected to the negative electrode of the DC voltage source DC, and the positive electrode is electrically connected to the second electrode 24. The first end of the capacitor C is electrically connected between the positive electrode of the diode D and the second electrode 24, the second end is grounded and electrically connected to the positive electrode of the DC voltage source DC, and the capacitance value of the capacitor C is less than that of the second capacitor C 2 .

[0052] In the present invention, an isolation circuit 25 is provided between the DC voltage source DC and the second electrode 24 to isolate the influence of the pulse voltage of the pulsed DC bias source PDC on the clamping voltage. Since the diode D has the characteristics of forward conduction and reverse cut-off, when the pulsed DC bias source PDC outputs a pulse voltage, the diode D is reverse cut-off, and a part of the pulse voltage is grounded after passing through the branch composed of the second capacitor C 2 and the capacitor C. This part of the pulse voltage charges the second capacitor C 2 and the capacitor C. Since the capacitance value of the capacitor C is less than that of the second capacitor C 2 , according to the voltage division principle of series capacitors, in this branch, this part of the pulse voltage is smaller at both ends of the second capacitor C 2 , and the second capacitor C 2 represents the magnitude of the clamping voltage. Therefore, the influence of the output of the pulsed DC bias source PDC on the clamping voltage can be significantly reduced, and the problem of instability of the substrate clamping voltage in the process is solved.

[0053] To further reduce the voltage division of the output voltage of the pulsed DC bias source PDC at both ends of the second capacitor C 2 , the capacitance value of the capacitor C can be set to be less than half of the capacitance value of the second capacitor C 2 . Usually, the capacitance value of the second capacitor C 2 is between 1 nF and 100 nF. The capacitance value of the capacitor C can be set between 10 pF and 500 pF to increase the capacitance difference between the second capacitor C 2 and the capacitor C, so that the capacitance value of the capacitor C is much smaller than that of the second capacitor C 2 . Then, the output voltage of the pulsed DC bias source PDC is mainly distributed on the capacitor C, and the voltage division at both ends of the second capacitor C 2 is very small and can be ignored. Thus, the voltage at both ends of the second capacitor C 2 , that is, the clamping voltage, is hardly affected by the output voltage of the pulsed DC bias source PDC.

[0054] In this embodiment, the positive electrode of the DC voltage source DC is grounded, the DC voltage source DC outputs a negative voltage, the positive electrode of the pulsed DC bias voltage source PDC is grounded, and the pulsed DC bias voltage source PDC outputs a negative pulsed voltage. Combining Figure 7 As shown, the negative electrode of the diode D is connected to the negative electrode of the DC voltage source DC. Therefore, for the DC voltage source DC, the diode D is always in the conducting state, and the voltage output by the DC voltage source DC can act on the second capacitor C 2 ; when the pulsed DC bias voltage source PDC outputs a negative pulsed voltage or does not output a voltage, the point a in the circuit is always at a negative voltage. Therefore, for the pulsed DC bias voltage source PDC, the diode D is always in the cut-off state. At the same time, due to the voltage division effect of the capacitor C, the negative pulsed voltage output by the pulsed DC bias voltage source PDC has a 2 smaller impact on the second capacitor C.

[0055] In other embodiments, the positive electrode of the DC voltage source DC is grounded, the DC voltage source DC outputs a negative voltage, the negative electrode of the pulsed DC bias voltage source PDC is grounded, and the pulsed DC bias voltage source PDC outputs a positive pulsed voltage. Referring to Figure 7 As shown, the negative electrode of the diode D is connected to the negative electrode of the DC voltage source DC. Therefore, for the DC voltage source DC, the diode D is always in the conducting state; due to the rectifying effect of the plasma in the reaction chamber 10, even if the pulsed DC bias voltage source PDC outputs a positive pulsed voltage, the point a in the circuit is always at a negative voltage. Therefore, for the pulsed DC bias voltage source PDC, the diode D is always in the cut-off state. At the same time, due to the voltage division effect of the capacitor C, the positive pulsed voltage output by the pulsed DC bias voltage source PDC has a 2 smaller impact on the second capacitor C.

[0056] As Figure 8 shown, the isolation circuit 25 may further include a first resistor R 1 , and the first resistor R 1 is connected in series with the second electrode 24. The function of the first resistor R 1 is to increase the RC time constant in the circuit so that the voltage across the capacitor C does not have an instantaneous jump. The resistance value of the first resistor R 1 is inversely proportional to the frequency of the pulsed DC bias voltage source PDC. When the pulsed DC bias voltage source PDC outputs a pulsed voltage, the resistance value of the first resistor R 1 can be changed, and the chuck voltage of the substrate can be measured so that the chuck voltage is closest to the voltage output by the DC voltage source DC. At this time, the first resistor R 1The resistance value is the optimal resistance value. After that, as long as the frequency of the pulsed DC bias voltage source PDC does not change, there is no need to adjust its resistance value. Generally, the resistance of the first resistor R 1 is in the range of 1 kΩ - 100 kΩ.

[0057] The isolation circuit may further include a second resistor R 2 , and the second resistor R 2 is connected in series with the diode D. The function of the second resistor R 2 is to reduce the instantaneous current in the circuit when the DC voltage source DC is powered on, so as to protect the components in the circuit.

[0058] As Figure 6 shown in the embodiment, the first electrode is a disc electrode, and the second electrode is an annular electrode surrounding the first electrode. Alternatively, it can also be swapped, with the second electrode set as the disc electrode and the first electrode as the annular electrode surrounding the second electrode. Moreover, the shapes of the electrodes are not limited to discs and rings, and other shapes do not affect the realization of the basic functions of this technical solution. In other embodiments, as Figure 9 shown, the first electrode is a disc electrode, and the second electrode is a disc electrode located above the first electrode. The first electrode and the second electrode are both concentrically arranged with the substrate W and are spaced apart by a certain distance.

[0059] To simplify the structure, the isolation circuit 25 can be integrally arranged with the DC voltage source DC. Specifically, each component in the isolation circuit 25 can be designed in the form of an integrated circuit board and fixed in the power supply box of the DC voltage source DC, or the discrete components can be assembled in the power supply box of the DC voltage source DC.

[0060] Figure 10 and Figure 11 are curves showing the change of the voltage across the second capacitor C 2 i.e., the clamping voltage (solid line), the DC voltage output (dashed line), and the pulsed DC output (dash-dotted line) with time obtained through two experimental simulations. Among them, Figure 10 in the DC voltage source DC has a voltage set to -3 kV, the pulsed voltage of the pulsed DC bias voltage source PDC is -5 kV, and the duty cycle is 70%. It can be seen that the isolation circuit 25 can well isolate the influence of the output of the pulsed DC bias voltage source PDC on the clamping voltage, and the clamping voltage is stable at about -2.5 kV and hardly changes with time. Figure 11 in the DC voltage source DC has a voltage set to -3 kV, the pulsed voltage of the pulsed DC bias voltage source PDC is -1 kV, and the duty cycle is 70%. It can be seen that the change in the output voltage of the pulsed DC bias voltage source PDC has a relatively small influence on the clamping voltage.

[0061] In summary, the present invention can effectively isolate the influence of the output voltage of the pulsed DC bias voltage source on the clamping voltage. The clamping voltage is almost only controlled by the DC voltage source, thereby avoiding the risk of insufficient or excessive clamping of the substrate during the process treatment.

[0062] It should be noted that in this text, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "including a..." does not exclude the existence of additional identical elements in the process, method, article or device including the said element.

[0063] Although the content of the present invention has been introduced in detail through the above preferred embodiments, it should be recognized that the above description should not be considered as a limitation of the present invention. After those skilled in the art have read the above content, various modifications and alternatives to the present invention will be obvious. Therefore, the protection scope of the present invention should be defined by the appended claims.

Claims

1. A lower electrode assembly for plasma process treatment, characterized in that, it includes: an electrostatic chuck, whose upper surface is used to carry a substrate; a first electrode located in the electrostatic chuck, which is electrically connected to a pulsed DC bias voltage source; a second electrode located in the electrostatic chuck, which is electrically connected to a DC voltage source through an isolation circuit, and a second capacitor is formed between the second electrode and the substrate; the isolation circuit includes a diode and a capacitor, the negative electrode of the diode is electrically connected to the negative electrode of the DC voltage source, the positive electrode is electrically connected to the second electrode, the first end of the capacitor is electrically connected between the positive electrode of the diode and the second electrode, the second end is grounded and electrically connected to the positive electrode of the DC voltage source, and the capacitance value of the capacitor is less than the capacitance value of the second capacitor.

2. The lower electrode assembly according to claim 1, characterized in that, the DC voltage source outputs a negative voltage, and the pulsed DC bias voltage source outputs a negative pulse voltage or a positive pulse voltage.

3. The lower electrode assembly according to claim 1, characterized in that, the capacitance value of the capacitor is less than half of the capacitance value of the second capacitor.

4. The lower electrode assembly according to claim 1, characterized in that, the capacitance value of the capacitor is 10 pF to 500 pF.

5. The lower electrode assembly according to claim 1, characterized in that, the isolation circuit further includes a first resistor, and the first resistor is connected in series with the second electrode.

6. The lower electrode assembly according to claim 5, characterized in that, the resistance value of the first resistor is inversely proportional to the frequency of the pulsed DC bias voltage source.

7. The lower electrode assembly according to claim 5, characterized in that, the resistance value of the first resistor is 1 kΩ to 100 kΩ.

8. The lower electrode assembly according to claim 1, characterized in that, the isolation circuit further includes a second resistor, and the second resistor is connected in series with the diode.

9. The lower electrode assembly according to claim 1, characterized in that, the capacitance value of the second capacitor is 1 nF to 100 nF.

10. The lower electrode assembly according to claim 1, characterized in that, the positive electrode of the pulsed DC bias voltage source and the positive electrode of the DC voltage source are grounded.

11. The lower electrode assembly according to claim 1, characterized in that, the first electrode is a disc electrode, and the second electrode is a ring electrode surrounding the first electrode; or, the second electrode is a disc electrode, and the first electrode is a ring electrode surrounding the second electrode.

12. The lower electrode assembly according to claim 1, characterized in that, the first electrode is a disc electrode, and the second electrode is a disc electrode located above the first electrode.

13. The lower electrode assembly according to claim 1, characterized in that, the isolation circuit and the DC voltage source are integrally arranged.

14. A plasma processing device, characterized in that, it includes: a reaction chamber; an air inlet mechanism for delivering process gas into the reaction chamber; a source radio frequency for igniting the process gas into plasma; The lower electrode assembly according to any one of claims 1 to 13 is located at the bottom inside the reaction chamber, and the electrostatic chuck is used for carrying a substrate.

15. The plasma processing apparatus according to claim 14, wherein, it further comprises: a pedestal made of a metal material, and the electrostatic chuck is located above the pedestal and made of a ceramic material.

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