Voltage-controlled oscillator based on monolithic FBAR resonator array and preparation method thereof

Abstract

The invention discloses a voltage-controlled oscillator based on a monolithic FBAR resonator array and a preparation method, FBAR resonator units of voltage-controlled oscillation sub-modules are vertically stacked up and down and share a silicon substrate to form the monolithic FBAR resonator array, and the FBAR resonator units are separated by cavities. The independent electrodes are led out and then connected with the IC chip located at the bottom of the structure, the integration level and the space utilization rate are improved, the parasitic effect is reduced, the stability of the oscillator is improved, and the broadband function is achieved. Through the select switch array, the control module provides bias current for the tail current source of the gated driving module, so that the resonators work alternately, mutual interference is reduced, and the tuning range of the voltage-controlled oscillator is enlarged. And the control module is also used for providing a temperature-independent bias voltage VT for the adjustable capacitor of the tuning module, so that the drift of the frequency along with the temperature is effectively reduced, and the frequency of the voltage-controlled oscillator is more stable.

Description

Technical Field

[0001] The present invention relates to a wireless communication device and a preparation method thereof, and particularly relates to a voltage-controlled oscillator and a preparation method thereof. Background Art

[0002] Wireless communication technology plays an increasingly important role in today's society and is widely used in industries such as industry, medicine, and manufacturing. Its applications in satellite communication, vehicle-mounted networks, wireless local area networks, and personal communication, etc., have an even broader market. A wireless communication system mainly consists of an antenna, a radio frequency front-end module, a radio frequency transceiver module, and baseband signal processing, etc. Among them, the radio frequency transceiver module is mainly composed of a receiver, a transmitter, and a frequency synthesizer, and the frequency synthesizer is composed of a voltage-controlled oscillator, a frequency discriminator and phase detector, a charge pump, a frequency divider, etc. The tuning range and phase noise of the voltage-controlled oscillator directly determine the performance of the frequency synthesizer.

[0003] An oscillator is a signal generation circuit that converts DC power into RF power and is the "heart" of a microwave system. The overall performance of the microwave system is affected by the oscillator's indicators. Usually, the performance of the overall system (such as power, channel capacity, cost, etc.) depends to a large extent on the oscillator involved. Therefore, increasing the tuning range, reducing power consumption and phase noise are the key research objectives in the field of oscillators. Common oscillators are mainly divided into ring oscillators and LC oscillators according to the oscillation principle. The LC oscillator is one of the most widely used oscillator types in the analog RF field. Its core component, the resonator, has frequency selectivity, that is, it only allows signals of a specific frequency (or frequency range) to pass through or be amplified, while suppressing signals of other frequencies. When the circuit reaches the resonance frequency, the resonator will accumulate enough energy to generate a stable oscillation signal.

[0004] Quartz crystal oscillators provide a very stable reference frequency for modern electronic systems. However, with the development of modern communication systems towards miniaturization and integration, the integratability of monolithic microwave integrated circuits has become the development trend of frequency signal sources. The limitations of the difficulty in integrating quartz crystals as frequency signal sources are becoming increasingly apparent. Nowadays, cross-coupled negative resistance units are usually used to compensate for the losses of the resonator to improve the quality factor (Q value) of the resonator and achieve low-phase-noise oscillation. And integrated frequency signal sources are generally realized by means of on-chip inductors, but the low quality factor of on-chip inductors (some are only single digits) seriously affects the phase noise and frequency stability of the oscillator.

[0005] Therefore, the development of an integrable and high-quality-factor resonant device has become an urgent need. In recent years, with the continuous progress of Micro-Electro-Mechanical Systems (MEMS) technology, MEMS resonators have developed accordingly. Moreover, due to their extremely small size and excellent performance characteristics, they have attracted attention. Among them, the typical one is the Film Bulk Acoustic Resonator (FBAR). Due to its advantages such as small size, high quality factor, and integrability, there are many possibilities for its application scenarios.

[0006] Currently, there are mainly three types of integration methods for MEMS devices and ICs. First, planar wire-bonding integration is a traditional method of connecting MEMS devices and ICs by using metal leads. However, the large area of the integrated device and the long bonding leads will lead to an enhanced parasitic effect. Second, flip-chip integration is a face-to-face press welding technology that faces the front side of the MEMS device to the IC, which reduces the length of the bonding leads to a certain extent and reduces the parasitic effect. However, when multiple devices are integrated, they still need to be arranged in a plane, resulting in a large area of the integrated device. Third, TSV integration is a technology that realizes the back-to-back connection between MEMS devices and ICs by fabricating vertical vias between chips and filling conductive materials. When multiple devices are integrated, they can be vertically stacked, which reduces the area of the integrated device to a certain extent. However, the bonding leads need to penetrate the substrate, resulting in an enhanced parasitic effect caused by the long bonding leads. Since the operating frequency range of the oscillator based on the FBAR resonator is relatively narrow, limited to between the series resonance frequency and the parallel resonance frequency, it is difficult to start oscillation, and the tuning range is relatively small, generally within 20 MHz. In addition, the frequency temperature stability is poor. To solve the problems of wide tuning range and temperature drift, multiple FBAR resonators need to be integrated with IC devices. Using the above conventional integration methods will increase the bonding leads, resulting in an enhanced parasitic effect, or increase the area of the integrated device, increasing the integration difficulty. Summary of the Invention

[0007] Object of the Invention: A voltage-controlled oscillator based on a monolithic FBAR resonator array is proposed for the above-mentioned existing technologies, which is used to improve the tuning range of the FBAR voltage-controlled oscillator, reduce the frequency drift with temperature, and at the same time greatly shorten the bonding leads, reduce the parasitic effect, and reduce the area of the integrated device. Another object of the present invention is to propose a preparation method for the voltage-controlled oscillator.

[0008] Technical Solution: A voltage-controlled oscillator based on a monolithic FBAR resonator array includes a control module, a noise reduction module, a select switch array, and a plurality of voltage-controlled oscillation sub-modules; The voltage-controlled oscillator sub-module includes an FBAR resonator unit, a tuning module and a driving module connected to the FBAR resonator unit; wherein, the FBAR resonator unit adopts a sandwich structure of electrode layer - piezoelectric layer - electrode layer; the tuning module, the driving module, the control module, the noise reduction module and the select switch array of each voltage-controlled oscillator sub-module jointly form an IC chip; The control module is used to provide a temperature-independent bias voltage VT to the adjustable capacitors of each tuning module, and through the select switch array, provide a bias current Ibias to the tail current source of one of the selected driving modules; each voltage-controlled oscillator sub-module has a different tuning range; The FBAR resonator units of each voltage-controlled oscillator sub-module adopt a monolithic vertical stacked form and share a silicon substrate to form a monolithic FBAR resonator array, and the FBAR resonator units are separated by cavities; the upper and lower electrode layers of each FBAR resonator unit are led out through independent electrodes and then connected to the IC chip located at the bottom of the structure.

[0009] Further, the control module includes PMOS transistors M7, M8, M9, M10, triodes Q1, Q2, resistors R2, R3, R4, R5 and an operational amplifier A1; the sources of PMOS transistors M7, M8, M9, M10 are all connected to the power supply Vdd, the gates of PMOS transistors M7, M8, M9, M10 are connected together and connected to the output terminal of the operational amplifier A1; the emitter of the triode Q1 is connected to the drain of the PMOS transistor M7, the negative input terminal of the operational amplifier A1, and one end of the resistor R2; the base and collector of the triode Q1 and the other end of the resistor R2 are grounded; the emitter of the triode Q2 is connected to one end of the resistor R3; the other end of the resistor R3 is connected to one end of the resistor R4, the positive input terminal of the operational amplifier A1, and the drain of the PMOS transistor M8; the base and collector of the triode Q2 and the other end of the resistor R4 are grounded; one end of the resistor R5 is connected to the drain of the PMOS transistor M9, and the other end of the resistor R5 is grounded; the connection end of the resistor R5 and the PMOS transistor M9 is the voltage terminal output, outputting the bias voltage VT; the drain of the PMOS transistor M10 is the current output terminal, outputting the bias current Ibias.

[0010] Further, the driving module includes a PMOS coupling pair M3 and M4 and an NMOS coupling pair M1 and M2. The drains of the PMOS coupling pair M3 and M4 are respectively connected to the drains of the NMOS coupling pair M1 and M2, and the connection points are respectively denoted as point X and point Y; FBAR1 is connected between point X and point Y; two resistors Rb are connected in series between point X and point Y, and the common-mode voltage Vcm extracted from the common point of the two resistors Rb is respectively used to provide gate bias for the PMOS coupling pair M3 and M4 and the NMOS coupling pair M1 and M2 through resistor R; the gates of the PMOS coupling pair M3 and M4 and the NMOS coupling pair M1 and M2 are also respectively connected to one end of a capacitor C, and the other ends of the four capacitors C are respectively connected to the drains of the PMOS coupling pair M3 and M4 and the NMOS coupling pair M1 and M2; the sources of the PMOS coupling pair M3 and M4 are connected to the power supply Vdd; the driving module further includes a tail current source and a tail capacitor Ctail; the drain of the NMOS transistor M5 of the tail current source is connected to the source connection end of the NMOS coupling pair M1 and M2, the gate of the NMOS transistor M5 is connected to one end of a select switch correspondingly, and the source of the NMOS transistor M5 is grounded; one end of the tail capacitor Ctail is connected to the source connection end of the NMOS coupling pair M1 and M2, and the other end is grounded; the adjustable capacitor includes adjustable capacitors Cvar1 and Cvar2, and the adjustable capacitors Cvar1 and Cvar2 are connected in series between point X and point Y, and the common point of the adjustable capacitors Cvar1 and Cvar2 is connected to the bias voltage VT output by the control module.

[0011] Further, the tuning module further includes a switched capacitor array connected between point X and point Y, and the frequency range of the FBAR-based voltage-controlled oscillator sub-module is extended by changing the control word and tuning voltage of the switched capacitor array through the control module.

[0012] Further, a noise reduction module for optimizing the phase noise of the bias current Ibias is also included.

[0013] Further, the noise reduction module includes a resistor R1 and a capacitor C1; one end of the resistor R1 is connected to the gate of the NMOS transistor M6 that provides the mirror current of the tail current source, the other end of the resistor R1 is connected to one end of the capacitor C1 and the other ends of the select switches; the drain of the NMOS transistor M6 is connected to the bias current Ibias, and the source of the NMOS transistor M6 and the other end of the capacitor C1 are grounded.

[0014] Further, there is an overlap between different frequency bands of each voltage-controlled oscillator sub-module to ensure continuous frequency adjustment.

[0015] The manufacturing method of the voltage-controlled oscillator, wherein the manufacturing process of the monolithic FBAR resonator array includes: Step 1: Perform photolithography, chemical vapor deposition, and chemical mechanical polishing processes on the upper surface of the substrate in sequence to prepare a first cavity sacrificial layer within the substrate. Step 2: Sputter a first bottom electrode, a first piezoelectric layer, and a first top electrode in sequence through a magnetron sputtering process. After each electrode sputtering, patterning is required. Then deposit a first insulating layer on the device surface through a chemical vapor deposition process. Perform photolithography, chemical vapor deposition, and chemical mechanical polishing processes on the upper surface of the first insulating layer in sequence to prepare a second cavity sacrificial layer within the first insulating layer. Step 3: Repeat Step 2 several times according to the number of voltage-controlled oscillator sub-modules. In the last repetition process, after completing the preparation of the insulating layer, directly perform a chemical mechanical polishing process without continuing to prepare the sacrificial layer. Step 4: Anisotropically etch and electroplate the device to form electrode leads. Finally, anisotropically etch the device to release the sacrificial layers of each cavity, forming cavities between each group of sandwich structures to complete the preparation. Connect each lead electrode in the structure prepared in Step 4 to the IC chip located at the bottom of the structure to complete the preparation of the voltage-controlled oscillator.

[0016] Beneficial effects: Traditional oscillators generally optimize the tuning range through adjustable capacitors. Since the oscillation frequency is limited to the series resonance frequency or parallel resonance frequency of the resonator, the tuning range is limited. Frequency temperature compensation generally compensates and loads a control voltage that is a quadratic function of temperature on the tuning module, and the temperature compensation effect is limited. The connection between the FBAR resonator and the IC circuit chip is generally achieved through planar bonding wire integration, flip-chip bonding integration, and TSV integration. If the traditional integration method is used for each group of resonator units in the present invention, the area and parasitic effects are relatively large, resulting in poor integration and oscillator stability.

[0017] First, the present invention uses a select switch array with high linearity, high response speed, and low loss characteristics. By precisely controlling the switching time of the switch, it is possible to reduce the phase noise and frequency offset introduced during the switch switching process, complete the alternating operation of multiple groups of resonators and reduce mutual interference, thereby increasing the tuning range of the voltage-controlled oscillator circuit. In addition, by changing the control word of the switch capacitor array and the tuning voltage, the frequency range can be further expanded.

[0018] Second, the present invention generates a bias voltage independent of temperature through the control module. This voltage is biased at the adjustable capacitor terminal of the tuning module, making the frequency output when the FBAR resonator unit oscillates independent of temperature, effectively reducing the frequency drift with temperature and making the frequency of the voltage-controlled oscillator more stable.

[0019] Thirdly, the monolithic FBAR resonator array designed by the present invention has multiple groups of FBAR resonator arrays stacked vertically up and down. Both the upper and lower surfaces of each FBAR resonator unit have independent electrode layers and independent electrode leads, forming a sandwich structure of electrode layer - piezoelectric layer - electrode layer. Each FBAR resonator unit is separated by a cavity and shares a silicon substrate at the same time. The monolithic FBAR resonator array is vertically integrated face to face with the IC chip, and the bonding leads are led out from the front thin film of the FBAR resonator, achieving the effect of reducing the length of the bonding leads and reducing the parasitic effect; at the same time, the purpose of improving the integration degree, reducing the oscillator area, and improving the frequency stability of the oscillator is achieved.

[0020] In summary, the voltage - controlled oscillator based on the monolithic FBAR resonator array of the present invention has the advantages of a large tuning range, small frequency drift with temperature, high integration degree and space utilization rate, and high stability. Brief Description of the Drawings

[0021] Figure 1 It is a schematic diagram of the overall structure of the voltage - controlled oscillator according to the embodiment of the present invention; Figure 2 It is a circuit diagram of the FBAR voltage - controlled oscillator according to the embodiment of the present invention; Figure 3 It is a circuit diagram of the control module according to the embodiment of the present invention; Figure 4 It is a schematic diagram of the structure of the monolithic FBAR resonator array according to the embodiment of the present invention; Figures 5 to 8 It is a preparation flow chart of the monolithic FBAR resonator array according to the embodiment of the present invention; Reference numerals in the drawings: 1 - substrate; 201 - first cavity; 202 - second cavity; 203 - third cavity; 301 - first bottom electrode; 302 - second bottom electrode; 303 - third bottom electrode; 401 - first piezoelectric layer; 402 - second piezoelectric layer; 403 - third piezoelectric layer; 501 - first top electrode; 502 - second top electrode; 503 - third top electrode; 601 - first insulating layer; 602 - second insulating layer; 603 - third insulating layer; 701 - first bottom - electrode electrical lead - out; 702 - second bottom - electrode electrical lead - out; 703 - third bottom - electrode electrical lead - out; 704 - third top - electrode electrical lead - out; 705 - second top - electrode electrical lead - out; 706 - first top - electrode electrical lead - out. Detailed Embodiments

[0022] The following further explains the present invention with reference to the drawings.

[0023] As Figure 1 、 Figure 2As shown, a voltage-controlled oscillator based on a monolithic FBAR resonator array in this embodiment is composed of a control module, a noise reduction module, a select switch array, and three voltage-controlled oscillation sub-modules.

[0024] Each voltage-controlled oscillation sub-module includes an FBAR resonator unit, a tuning module connected to the FBAR resonator unit, and a driving module. Among them, the tuning module is jointly composed of a 4-bit switched capacitor array and adjustable capacitors Cvar1 and Cvar2; the driving module is composed of a negative resistance unit and is matched with the FBAR resonator. The control module is used to provide a temperature-independent bias voltage VT to the adjustable capacitors Cvar1 and Cvar2 of the tuning module, and a bias current Ibias to the tail current source of the driving module. The noise reduction module is used to optimize the phase noise of the voltage-controlled oscillator. By controlling the select switch array, the connection between the bias current Ibias and the tail current source of one of the FBAR resonator units is gated; each voltage-controlled oscillation sub-module has a different tuning range.

[0025] As Figure 2As shown, one of the voltage-controlled oscillator sub-modules is specifically described. In the voltage-controlled oscillator sub-module based on FBAR1, the driving module includes PMOS coupling pairs M3, M4 and NMOS coupling pairs M1, M2. The drains of PMOS coupling pairs M3, M4 are respectively connected to the drains of NMOS coupling pairs M1, M2, and the connection points are respectively denoted as points X and Y. Two resistors Rb are connected in series between points X and Y, and the common-mode voltage Vcm extracted from the common point of the two resistors Rb is used to provide gate bias for PMOS coupling pairs M3, M4 and NMOS coupling pairs M1, M2 through resistors R respectively. The gates of PMOS coupling pairs M3, M4 and NMOS coupling pairs M1, M2 are also respectively connected to one end of a capacitor C, and the other ends of the four capacitors C are respectively connected to the drains of PMOS coupling pairs M3, M4, NMOS coupling pairs M1, M2. The sources of PMOS coupling pairs M3, M4 are connected to the power supply Vdd. The driving module also includes a tail current source and a tail capacitor Ctail. The drain of the NMOS transistor M5 of the tail current source is connected to the source connection end of NMOS coupling pairs M1, M2. The gate of the NMOS transistor M5 is connected to one end of the select switch 1 in the select switch array. The source of the NMOS transistor M5 is grounded. One end of the tail capacitor Ctail is connected to the source connection end of NMOS coupling pairs M1, M2, and the other end is grounded. FBAR1 is connected in parallel between the drains of PMOS coupling pairs M3, M4 and the drains of NMOS coupling pairs M1, M2, that is, connected between points X and Y. Tunable capacitors Cvar1, Cvar2 are connected in series and then in parallel between the drains of PMOS coupling pairs M3, M4 and the drains of NMOS coupling pairs M1, M2, that is, connected in series between points X and Y. The common point of tunable capacitors Cvar1, Cvar2 is connected to the bias voltage VT output by the control module. The 4-bit switched capacitor array of the tuning module is connected in parallel between the drains of PMOS coupling pairs M3, M4 and the drains of NMOS coupling pairs M1, M2, that is, connected between points X and Y. By changing the control word and tuning voltage of the 4-bit switched capacitor array through the control module, the frequency range of the voltage-controlled oscillator sub-module based on FBAR is expanded.

[0026] The noise reduction module includes a resistor R1 and a capacitor C1; one end of the resistor R1 is connected to the gate of the NMOS transistor M6 that provides the mirror current of the tail current source, and the other end of the resistor R1 is connected to the other end of the select switch 1 and one end of the capacitor C1; the drain of the NMOS transistor M6 is connected to the bias current Ibias generated by the control module, and the source of the NMOS transistor M6 and the other end of the capacitor C1 are grounded. In the voltage-controlled oscillator of this embodiment, the voltage-controlled oscillation sub-modules based on the FBAR resonator are respectively connected to the same connection point of the noise reduction module through the select switch, that is, the common point of the resistor R1 and the capacitor C1. By controlling the on and off of each select switch, the three voltage-controlled oscillation sub-modules work alternately, thereby increasing the tuning range in the voltage-controlled oscillator. Specifically, the selection of the oscillation mode is achieved by the on / off of the select switch 1, the select switch 2, and the select switch 3. When the select switch 1 is turned on and the other select switches are turned off, the corresponding drive module is connected to the circuit to ensure that the voltage-controlled oscillator operates in the low-frequency band ωl; when the select switch 2 is turned on and the other select switches are turned off, the corresponding drive module is connected to the circuit to ensure that the voltage-controlled oscillator operates in the medium-frequency band ωm; when the select switch 3 is turned on and the other select switches are turned off, the corresponding drive module is connected to the circuit to ensure that the voltage-controlled oscillator operates in the high-frequency band ωh. Then, the frequency range is extended by changing the control word and the tuning voltage of the corresponding 4-bit switched capacitor array.

[0027] To ensure continuous frequency adjustment, there needs to be a certain overlap between different frequency bands. In this embodiment, the three voltage-controlled oscillation sub-modules based on the FBAR resonator unit respectively achieve tuning ranges of 3.4 - 3.43 GHz, 3.42 - 3.45 GHz, and 3.44 - 3.47 GHz, and finally achieve a tuning range of 70 MHz for the FBAR voltage-controlled oscillator.

[0028] Furthermore, by precisely controlling the switching time of the select switch, the phase noise and frequency offset introduced during the switching process of the switch can be reduced, and the mutual interference when different FBAR oscillators work alternately can be reduced. Select a select switch with high linearity and low loss characteristics to avoid current distortion caused by non-linearity.

[0029] The temperature-frequency characteristics of the voltage-controlled oscillator are optimized through the control module to reduce the frequency drift with temperature. As Figure 3As shown, the control module includes PMOS transistors M7, M8, M9, M10, bipolar transistors Q1, Q2, resistors R2, R3, R4, R5, and operational amplifier A1. The sources of PMOS transistors M7, M8, M9, M10 are all connected to the power supply Vdd. The gates of PMOS transistors M7, M8, M9, M10 are connected together and connected to the output terminal of operational amplifier A1. The emitter of bipolar transistor Q1 is connected to the drain of PMOS transistor M7, the negative input terminal of operational amplifier A1, and one end of resistor R2. The base and collector of bipolar transistor Q1 and the other end of resistor R2 are grounded. The emitter of bipolar transistor Q2 is connected to one end of resistor R3. The other end of resistor R3 is connected to one end of resistor R4, the positive input terminal of operational amplifier A1, and the drain of PMOS transistor M8. The base and collector of bipolar transistor Q2 and the other end of resistor R4 are grounded. One end of resistor R5 is connected to the drain of PMOS transistor M9, and the other end of resistor R5 is grounded. The connection end of resistor R5 and PMOS transistor M9 is the voltage terminal output, outputting the bias voltage VT. The drain of PMOS transistor M10 is the current output terminal, outputting the bias current Ibias.

[0030] In the control module, the current I3 flowing through resistor R3 = ΔVbe / R3, where ΔVbe is the voltage difference across resistor R3, and this current is proportional to temperature due to the characteristics of the bipolar transistor. The current I4 flowing through resistor R4 = Vbe / R4, where Vbe is the voltage difference between the base and emitter, and this current is inversely proportional to temperature due to the characteristics of the bipolar transistor. The drain current Id8 of PMOS transistor M8 = I3 + I4. By setting appropriate parameters, Id8 can be made independent of temperature. The drain current Id9 of PMOS transistor M9 = K * Id8, where K is the aspect ratio of PMOS transistors M9 and M8. Ibias = N * Id8, where N is the aspect ratio of PMOS transistors M10 and M8. This current flows into the drain of M6 to provide the bias current for the oscillator. VT = Id9 * R5 = K * Id8 * R5, and VT is independent of temperature. It is biased at the adjustable capacitor terminal of the tuning module, thus ensuring that the output frequency of the FBAR voltage-controlled oscillator is independent of temperature during oscillation, effectively reducing the frequency drift with temperature and making the frequency of the FBAR oscillator more stable.

[0031] When a traditional FBAR resonator is integrated with an IC chip using planar bond wires, this form connects the MEMS device to the IC chip using metal leads. The large integrated device area and long bond leads will result in enhanced parasitic effects.

[0032] When a traditional FBAR resonator is integrated with an IC chip by flip-chip bonding, this form faces the front side of the MEMS device towards the IC for face-to-face pressure welding. To a certain extent, it reduces the length of the bonding wire and the parasitic effect. However, when multiple devices are integrated, they still need to be arranged in a plane, resulting in a relatively large integrated device area. When a traditional FBAR resonator is integrated with an IC chip by TSV, this form creates vertical vias between chips and realizes the back-to-face connection between the MEMS device and the IC by filling conductive materials. When multiple devices are integrated, they can be vertically stacked, which reduces the area of the integrated device to a certain extent. However, since the bonding wire needs to penetrate the substrate, the relatively long bonding wire leads to an enhanced parasitic effect.

[0033] The present invention designs a monolithic FBAR resonator array integrated structure with an IC chip. Specifically, as Figure 4 shown, each FBAR resonator unit adopts a sandwich structure of electrode layer - piezoelectric layer - electrode layer. The FBAR resonator units are separated by cavities, and at the same time, they share a silicon substrate to form a monolithic FBAR resonator array. Three groups of FBAR resonator units are vertically integrated face-to-face with the IC chip. After the upper and lower electrode layers of each FBAR resonator unit are led out through independent electrodes, they are connected to the IC chip located at the bottom of the structure, realizing that the bonding wire is led out from the front film of the resonator, reducing the length of the bonding wire, reducing the parasitic effect, improving the integration degree, reducing the area of the oscillator, and improving the frequency stability of the oscillator.

[0034] Figure 4 The manufacturing process of the monolithic FBAR resonator array shown in includes the following steps: Step 1: Perform a photolithography process on the upper surface of the substrate 1 to etch out the filling area of the sacrificial layer of the first cavity 201 on the upper surface of the substrate 1. Then, deposit the sacrificial layer material BPSG in the filling area of the sacrificial layer of the first cavity 201 through chemical vapor deposition. Finally, through chemical mechanical polishing, the BPSG on the surface of the substrate 1 is removed, and the roughness of the surface of the substrate 1 and the sacrificial layer of the first cavity 201 is reduced, as Figure 5 shown.

[0035] Step 2: Sputter the first bottom electrode 301 on the device surface by magnetron sputtering and pattern it. Then, sequentially sputter the first piezoelectric layer 401 and the first top electrode 501, and pattern the first top electrode 501. Next, deposit the first insulating layer 601 on the device surface by chemical vapor deposition, and process the device surface by chemical mechanical polishing. Finally, etch out the filling area of the second cavity 202 sacrificial layer on the first insulating layer 601, then deposit the sacrificial layer material BPSG in the filling area of the second cavity 202 sacrificial layer by chemical vapor deposition and remove the BPSG on the surface of the first insulating layer 601 by chemical mechanical polishing to reduce the roughness of the surfaces of the first insulating layer 601 and the second cavity 202 sacrificial layer, as Figure 6 shown.

[0036] Step 3: Repeat Step 2 to prepare the second bottom electrode 302, the second piezoelectric layer 402, the second top electrode 502, the second insulating layer 602 and the third cavity 203 sacrificial layer on the device surface. Then, prepare and pattern the third bottom electrode 303 by magnetron sputtering on the surface, and then sequentially sputter the third piezoelectric layer 403 and the third top electrode 503, and pattern the third top electrode 503. Finally, deposit the third insulating layer 603 on the surface of the third top electrode 503 by chemical vapor deposition, as Figure 7 shown.

[0037] Step 4: Anisotropically etch and electroplate the device to form the first bottom electrode electrical lead-out 701, the second bottom electrode electrical lead-out 702, the third bottom electrode electrical lead-out 703, the third top electrode electrical lead-out 704, the second top electrode electrical lead-out 705 and the first top electrode electrical lead-out 706. Finally, anisotropically etch the device to release the sacrificial layers of each cavity, forming the first cavity 201, the second cavity 202 and the third cavity 203, as Figure 8 shown.

[0038] Step 5: Connect the electrical lead-outs of each electrode in the structure prepared in Step 4 to the IC chip located at the bottom of the structure to complete the preparation of the voltage-controlled oscillator.

[0039] The above are only the preferred embodiments of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the principle of the present invention, several improvements and refinements can still be made, and these improvements and refinements should also be regarded as the protection scope of the present invention.

Claims

1. A voltage-controlled oscillator based on a monolithic FBAR resonator array, characterized in that: It includes a control module, a noise reduction module, a select switch array and several voltage-controlled oscillator modules; The voltage-controlled oscillator module includes an FBAR resonator unit, a tuning module and a driving module connected to the FBAR resonator unit; wherein the FBAR resonator unit adopts a sandwich structure of electrode layer-piezoelectric layer-electrode layer; the tuning module, driving module, control module, noise reduction module, and select switch array of each voltage-controlled oscillator module together form an IC chip; The control module is used to provide a bias voltage VT that is independent of temperature to the adjustable capacitor of each tuning module, and to provide a bias current Ibias to the tail current source of one of the selected driving modules through the select switch array; each voltage-controlled oscillator module has a different tuning range; The FBAR resonator units of each voltage-controlled oscillator module are in the form of a monolithic upper and lower vertical stack and share a silicon substrate to form a monolithic FBAR resonator array, and each FBAR resonator unit is separated by a cavity; the upper and lower electrode layers of each FBAR resonator unit are led out through independent electrodes and connected to the IC chip located at the bottom of the structure.

2. A voltage-controlled oscillator based on a monolithic FBAR resonator array according to claim 1, characterized in that: The control module includes PMOS tubes M7, M8, M9, M10, triodes Q1, Q2, resistors R2, R3, R4, R5 and operational amplifier A1; the sources of the PMOS tubes M7, M8, M9, M10 are all connected to the power supply Vdd, the gates of the PMOS tubes M7, M8, M9, M10 are connected, and connected to the output end of the operational amplifier A1; the emitter of the triode Q1 is connected to the drain of the PMOS tube M7, the negative input end of the operational amplifier A1, and one end of the resistor R2; the base of the triode Q1 is connected to the collector and the other end of the resistor R2. One end is grounded; the emitter of the transistor Q2 is connected to one end of the resistor R3; the other end of the resistor R3 is connected to one end of the resistor R4, the positive input end of the operational amplifier A1, and the drain of the PMOS tube M8; the base and collector of the transistor Q2 and the other end of the resistor R4 are grounded; one end of the resistor R5 is connected to the drain of the PMOS tube M9, and the other end of the resistor R5 is grounded; the connection end of the resistor R5 and the PMOS tube M9 is a voltage terminal output, which outputs the bias voltage VT; the drain of the PMOS tube M10 is a current output terminal, which outputs the bias current Ibias.

3. A voltage-controlled oscillator based on a monolithic FBAR resonator array according to claim 1 or 2, characterized in that: The driving module includes a PMOS coupling pair M3, M4 and an NMOS coupling pair M1, M2. The drains of the PMOS coupling pair M3, M4 are connected to the drains of the NMOS coupling pair M1, M2 respectively, and the connection points are respectively recorded as points X and Y; FBAR1 is connected between points X and Y; two resistors Rb are connected in series between points X and Y, and the common mode voltage Vcm extracted at the common point of the two resistors Rb provides gate bias to the PMOS coupling pair M3, M4 and the NMOS coupling pair M1, M2 through the resistor R; the gates of the PMOS coupling pair M3, M4 and the NMOS coupling pair M1, M2 are also connected to one end of a capacitor C respectively, and the other ends of the four capacitors C are connected to the PMOS coupling pair M3, M4, the NMOS coupling pair M1, The drain of the NMOS tube M5 of the tail current source is connected to the source connection end of the NMOS coupling pair M1 and M2; the source of the PMOS coupling pair M3 and M4 is connected to the power supply Vdd; the driving module also includes a tail current source and a tail capacitor Ctail; the drain of the NMOS tube M5 of the tail current source is connected to the source connection end of the NMOS coupling pair M1 and M2, the gate of the NMOS tube M5 is correspondingly connected to one end of a select switch, and the source of the NMOS tube M5 is grounded; one end of the tail capacitor Ctail is connected to the source connection end of the NMOS coupling pair M1 and M2, and the other end is grounded; the adjustable capacitor includes adjustable capacitors Cvar1 and Cvar2, the adjustable capacitors Cvar1 and Cvar2 are connected in series between points X and Y, and the common point of the adjustable capacitors Cvar1 and Cvar2 is connected to the bias voltage VT output by the control module.

4. A voltage-controlled oscillator based on a monolithic FBAR resonator array according to claim 3, characterized in that: The tuning module also includes a switched capacitor array connected between points X and Y. The control module changes the control word and tuning voltage of the switched capacitor array to achieve the expansion of the frequency range of the FBAR-based voltage-controlled oscillator module.

5. A voltage-controlled oscillator based on a monolithic FBAR resonator array according to claim 3, characterized in that: A noise reduction module is also included for optimizing the phase noise of the bias current Ibias.

6. A voltage-controlled oscillator based on a monolithic FBAR resonator array according to claim 5, characterized in that: The noise reduction module includes a resistor R1 and a capacitor C1; one end of the resistor R1 is connected to the gate of an NMOS tube M6 that provides a tail current source mirror current, and the other end of the resistor R1 is connected to one end of the capacitor C1 and the other end of each select switch; the drain of the NMOS tube M6 is connected to the bias current Ibias, and the source of the NMOS tube M6 and the other end of the capacitor C1 are grounded.

7. The voltage controlled oscillator according to any one of claims 1, 2, 4-6, characterized in that: There is overlap between different frequency bands of each voltage-controlled oscillator module, ensuring that the frequency can be adjusted continuously.

8. The method for preparing a voltage controlled oscillator according to any one of claims 1 to 7, characterized in that: The preparation process of the monolithic FBAR resonator array includes: Step 1: performing a photolithography process, a chemical vapor deposition process, and a chemical mechanical polishing process on the upper surface of the substrate (1) in sequence to prepare a first cavity (201) sacrificial layer in the substrate (1); Step 2: sputtering a first bottom electrode (301), a first piezoelectric layer (401) and a first top electrode (501) in sequence by a magnetron sputtering process, and patterning is performed after each sputtering of the electrode is completed; then depositing a first insulating layer (601) on the surface of the device by a chemical vapor deposition process; sequentially performing a photolithography process, a chemical vapor deposition process and a chemical mechanical polishing process on the upper surface of the first insulating layer (601) to prepare a second cavity (202) sacrificial layer in the first insulating layer (601); Step 3: Repeat step 2 several times according to the number of the voltage-controlled oscillator modules, and directly perform a chemical mechanical polishing process without further preparing a sacrificial layer after the insulating layer is prepared in the last repetition process; Step 4: Anisotropically etch the device and perform electroplating to form electrode leads; finally, anisotropically etch the device to release the sacrificial layer of each cavity, form each cavity between each group of sandwich structures, and complete the preparation; Each lead electrode in the structure prepared in step 4 is connected to the IC chip located at the bottom of the structure to complete the preparation of the voltage-controlled oscillator.

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