Pixel reading circuit, compensation correction method and device thereof, equipment and medium

Abstract

The invention discloses a pixel reading circuit and a compensation correction method, device, equipment and medium thereof, and particularly relates to the technical field of image sensors. The pixel reading circuit comprises a pixel signal reading unit and an output unit which are sequentially connected with a pixel unit; an OOC compensation current source unit is connected between the pixel unit and the pixel signal reading unit; acquiring an average integral sub-current of each pixel unit in the pixel unit array within a set frame number and at a set correction target temperature, calculating by using the average integral sub-current to obtain an average integral current of the pixel unit array, and taking the average integral current as a correction reference value; and obtaining a difference value between each average integral sub-current and the correction reference value, taking the difference value as an OOC compensation current of the corresponding pixel unit, and performing current compensation on the integral sub-current of the corresponding pixel unit by using the OOC compensation current so as to correct the integral voltage output by the pixel reading unit.

Description

Technical Field

[0001] The present invention relates to the technical field of image sensors, and particularly relates to a pixel readout circuit and a compensation and correction method, device, equipment and medium thereof. Background Art

[0002] As a key component of digital imaging technology, an image sensor undertakes the task of converting optical information into electronic information. In recent years, image sensors have been widely used in multiple fields such as mobile communication, security monitoring, autonomous driving, low-light night vision, industrial control, biomedicine, and aerospace. With the rapid development of sensor technology, higher requirements have been put forward for the performance of image sensors such as imaging quality, system size, weight, and power consumption (Size, Weight and Power, SWaP). The development trend of high-quality and small-pixel image sensors has become increasingly prominent.

[0003] As the pixel area shrinks, the sizes of individual pixels (pixel units) and pixel readout unit circuits of the image sensor are also gradually decreasing. However, smaller device sizes will bring greater mismatches, and the influence of the offset and mismatch between pixels and pixel readout unit circuits becomes more serious (such as larger fixed pattern noise FPN); at the same time, due to limitations in manufacturing processes (such as process deviations in oxide layer thickness, diffusion doping, etching, etc.), the actual parameters (such as current gain, threshold voltage, etc.) of each device in the pixel readout circuit cannot be completely matched. These mismatch factors will lead to the generation of non-uniformity, resulting in problems such as a decline in detection quality and image distortion.

[0004] At the same time, the non-uniformity of the pixel readout circuit mainly comes from the following aspects: (1) non-uniformity of the detector (from aspects such as process deviations and material inhomogeneity); (2) non-uniformity caused by the inconsistent bias of the detector array due to the offset of the readout circuit; (3) gain non-uniformity caused by the deviation of the integration capacitor of the readout circuit.

[0005] Therefore, in the design of a readout circuit for small pixels (such as pixel pitches of 15μm and below), appropriate methods need to be adopted to reduce and eliminate the influence of the offset and mismatch between pixels and pixel readout circuits on the image signal of the readout circuit; based on this, the present invention aims to provide a pixel readout circuit and a compensation and correction method, device, equipment and medium thereof to solve the above-mentioned related problems. Summary of the Invention

[0006] The technical problem to be solved by the present invention is that the traditional image sensor has the offset and mismatch of pixels and pixel readout circuits, which causes the inconsistency of the bias of the detector array, resulting in non-uniformity problems, thus leading to problems such as the decline of detection quality and image distortion. The purpose is to provide a pixel readout circuit and its compensation and correction method, device, equipment and medium. By using the average integrated sub-current to calculate the average integrated current of the pixel unit array, and taking the average integrated current as the correction reference value to correct the non-uniformity of the pixel array in the spatial domain; by obtaining the difference between each average integrated sub-current and the correction reference value, and taking the difference as the OOC compensation current of the corresponding pixel unit to eliminate the non-uniformity in the time domain and spatial domain of the pixel readout circuit of the image sensor; by adopting the pixel readout circuit and the compensation and correction method of the pixel readout circuit provided by the present invention, it is possible to eliminate the influence of the output offset of the pixel output circuit, the mismatch of the pixel reverse bias voltage, the difference in the background response between pixels, and the mismatch of the outputs between pixels in the pixel array, thereby reducing the fixed pattern noise of the pixel array and improving the uniformity of the pixel readout circuit pixel array.

[0007] The present invention is realized through the following technical solutions:

[0008] A pixel readout circuit, the circuit includes a pixel signal readout unit and an output unit connected to the pixel unit in sequence, and an OOC compensation current source unit is connected between the pixel unit and the pixel signal readout unit.

[0009] Further, the OOC compensation current source unit includes a light-emitting diode, one end of the light-emitting diode is connected between the pixel unit and the pixel signal readout unit, and the other end of the light-emitting diode is grounded or connected to a reference voltage.

[0010] The present invention also provides a compensation and correction method for the pixel readout circuit described in any one of the above, the method includes:

[0011] Obtain the average integrated sub-current of each pixel unit in the pixel unit array within a set number of frames and at a set correction target temperature, and use the average integrated sub-current to calculate the average integrated current of the pixel unit array, and take the average integrated current as the correction reference value;

[0012] Obtain the difference between each average integrated sub-current and the correction reference value, take the difference as the OOC compensation current of the corresponding pixel unit, and use the OOC compensation current to perform current compensation on the integrated sub-current of the corresponding pixel unit to correct the integrated voltage output by the pixel readout unit.

[0013] Further, obtaining the average integrated sub-current of each pixel unit in the pixel unit array within a set number of frames and at the correction target temperature is specifically:

[0014] Obtain the continuous pixel output voltage of each pixel unit within a set number of frames, and use the continuous pixel output voltage to calculate the average output sub-voltage of each pixel unit at the set calibration target temperature, and calculate the average integrated sub-current of each pixel unit under the average output sub-voltage.

[0015] Furthermore, use the OOC compensation current to perform current compensation on the integrated sub-current of the corresponding pixel unit to correct the integrated voltage output by the pixel readout unit. Specifically:

[0016] Obtain the OOC compensation current codeword corresponding to the OOC compensation current in the pre-constructed look-up table, and input the OOC compensation current codeword into the pixel unit of the corresponding pixel readout circuit to perform current compensation on the integrated sub-current of the pixel unit to correct the integrated voltage output by the pixel readout unit.

[0017] The present invention also provides a compensation and calibration device for a pixel readout circuit. This device is used in the compensation and calibration method for a pixel readout circuit described in any one of the above. The device includes:

[0018] A calibration reference value calculation unit, configured to obtain the average integrated sub-current of each pixel unit in the pixel unit array within a set number of frames and at a set calibration target temperature, and calculate the average integrated current of the pixel unit array using the average integrated sub-current, and use the average integrated current as the calibration reference value;

[0019] A compensation and calibration unit, configured to obtain the difference between each average integrated sub-current and the calibration reference value, use the difference as the OOC compensation current for the corresponding pixel unit, and use the OOC compensation current to perform current compensation on the integrated sub-current of the corresponding pixel unit to correct the integrated voltage output by the pixel readout unit.

[0020] Furthermore, to obtain the average integrated sub-current of each pixel unit in the pixel unit array within a set number of frames and at the calibration target temperature, specifically:

[0021] Obtain the continuous pixel output voltage of each pixel unit within a set number of frames, and use the continuous pixel output voltage to calculate the average output sub-voltage of each pixel unit at the set calibration target temperature, and calculate the average integrated sub-current of each pixel unit under the average output sub-voltage.

[0022] The present invention also provides a compensation and calibration device for a pixel readout circuit, including a system memory and a processor. The system memory stores a computer program, and when the processor executes the computer program, the steps of the method described in any one of the above are implemented.

[0023] The present invention also provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the method described in any one of the above are implemented.

[0024] The present invention also provides a computer program product containing instructions. When the instructions are run by a computer device cluster, the computer device cluster is caused to execute the method described in any one of the above.

[0025] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0026] In the present invention, by using the average integrated sub-current to calculate the average integrated current of the pixel unit array, and taking the average integrated current as the correction reference value to correct the non-uniformity of the pixel array in the spatial domain; by obtaining the difference between each average integrated sub-current and the correction reference value, and taking the difference as the OOC compensation current of the corresponding pixel unit to eliminate the non-uniformity in the time domain and spatial domain of the pixel readout circuit of the image sensor; by adopting the pixel readout circuit provided by the present invention and the compensation and correction method of the pixel readout circuit, it is possible to eliminate the influence of the output offset of the pixel output circuit, the mismatch of the reverse bias voltage of the pixel, the difference in the background response between pixels, and the mismatch of the outputs between the pixels in the pixel array, thereby reducing the fixed pattern noise of the pixel array and improving the uniformity of the pixel readout circuit pixel array. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the technical solutions of the exemplary embodiments of the present invention, the following will briefly introduce the drawings required for use in the embodiments. It should be understood that the following drawings only show some embodiments of the present invention, and therefore should not be regarded as limiting the scope. For those of ordinary skill in the art, other related drawings can also be obtained based on these drawings without creative efforts. In the drawings:

[0028] Figure 1 is a schematic structural diagram of a pixel readout circuit in this embodiment;

[0029] Figure 2 is a schematic circuit diagram of a CTIA-type pixel readout circuit exemplified in this embodiment;

[0030] Figure 3 is a schematic structural diagram of the pixel unit matrix in this embodiment;

[0031] Figure 4 is a schematic flow diagram of a method for compensating and correcting a pixel readout circuit in this embodiment;

[0032] Figure 5Schematic diagram of the offset cancellation circuit of the CTIA pixel readout circuit adopting the compensation and correction method provided in this embodiment;

[0033] Figure 6 Timing diagram of the CTIA pixel readout circuit adopting the compensation and correction method provided in this embodiment;

[0034] Figure 7 Schematic diagram of the circuit connection when the reset switch of the pixel readout circuit is in the reset stage;

[0035] Figure 8 Schematic diagram of the circuit connection when the reset switch of the pixel readout circuit is in the off stage;

[0036] Figure 9 Schematic diagram of the structure of a compensation and correction device for a pixel readout circuit in this embodiment;

[0037] Figure 10 Schematic diagram of the structure of a computer device in this embodiment. Detailed implementation manners

[0038] The following describes exemplary embodiments of the present disclosure with reference to the accompanying drawings. Various details of the embodiments of the present disclosure are included to assist understanding, and they should be considered merely exemplary. Therefore, those of ordinary skill in the art should recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope of the present disclosure. Similarly, for the sake of clarity and conciseness, descriptions of well-known functions and structures are omitted in the following.

[0039] In the present disclosure, unless otherwise specified, the terms "first", "second", etc. are used to describe various elements and are not intended to limit the positional relationship, timing relationship, or importance relationship of these elements. Such terms are only used to distinguish one element from another. In some examples, the first element and the second element may refer to the same instance of the element, and in certain cases, based on the context description, they may also refer to different instances.

[0040] In the description of various examples in the present disclosure, the terms used are only for the purpose of describing specific examples and are not intended to be restrictive. Unless the context clearly indicates otherwise, if the number of elements is not specifically limited, the element may be one or more. In addition, the term "and / or" used in the present disclosure covers any one of the listed items and all possible combinations.

[0041] Embodiment 1

[0042] As described in the background, as the pixel area shrinks, the sizes of individual pixels and pixel readout unit circuits in the image sensor are also gradually decreasing. Smaller device sizes will bring greater mismatches, and the effects of offset and mismatch of pixels and pixel readout unit circuits become more serious (such as greater fixed pattern noise FPN); at the same time, due to limitations in manufacturing processes and other aspects (process deviations in oxide layer thickness, diffusion doping, etching, etc.), the actual parameters of each device in the pixel readout circuit (such as current gain, threshold voltage, etc.) cannot be completely matched. These mismatch factors will cause non-uniformity, resulting in a decline in detection quality and image distortion; therefore, the present invention provides a current compensation method that can eliminate the effects of output offset of the pixel output circuit, mismatch of the PD reverse bias voltage, differences in background response between pixels, and mismatch of outputs between pixels in the pixel array, thereby reducing the FPN of the pixel array and improving the uniformity of the pixel readout circuit pixel array;

[0043] See Figure 1 , Figure 1 which shows a schematic structural diagram of a pixel readout circuit, where the circuit includes a pixel signal readout unit and an output unit connected to the pixel unit in sequence, and an OOC compensation current source unit is connected between the pixel unit and the pixel signal readout unit.

[0044] At the same time, it should also be noted that this method is applicable to all types of photovoltaic image sensor pixel readout circuits (for example: direct injection type (Direct Injection, DI), gate modulation injection type (Gate Modulated Injection, GMI), source follower type (Source Follower, SFD), and capacitive transimpedance amplifier type (Capacitive Transimpedance Amplifier, CTIA), etc.); in this embodiment, specifically taking the CTIA type pixel readout circuit as an example, see Figure 2 , Figure 2 which shows a circuit schematic diagram of a CTIA type pixel readout circuit, where the pixel unit includes a photodiode, the pixel signal readout unit includes an integration capacitor, an integration reset switch, and an amplifier, and the OOC compensation current source unit includes a light-emitting diode; a bias voltage is input to the negative electrode of the photodiode, the positive electrode of the photodiode is connected to the negative input terminal of the amplifier, a reference voltage is input to the positive input terminal of the amplifier, and the output terminal of the amplifier is connected to the output unit; one end of the integration capacitor and the integration reset switch connected in parallel is connected to the negative input terminal of the amplifier, and the other end of the integration capacitor and the integration reset switch connected in parallel is connected to the output terminal of the amplifier; one end of the light-emitting diode is connected between the pixel unit and the pixel signal readout unit, and the other end of the light-emitting diode is grounded or connected to the reference voltage;

[0045] It should also be noted that, in this embodiment, the positive electrode of the light-emitting diode is connected between the positive electrode of the photodiode and the negative input terminal of the amplifier, and the negative electrode of the light-emitting diode is grounded; meanwhile, in other embodiments, the negative electrode of the light-emitting diode can also be connected to other reference voltages; or in other embodiments, the negative electrode of the light-emitting diode can also be connected between the positive electrode of the photodiode and the negative input terminal of the amplifier, and the positive electrode of the light-emitting diode is grounded or connected to other reference voltages; the specific connection method depends on the actual situation and will not be limited here.

[0046] Meanwhile, it should also be noted that, referring to Figure 3 , Figure 3 shows a schematic structural diagram of a pixel unit array. A pixel unit array is composed of m×n pixel units, and each pixel is connected with a pixel signal reading unit and an output unit.

[0047] Referring to Figure 4 , Figure 4 shows a schematic flowchart of a compensation and correction method for a pixel reading circuit. The method includes:

[0048] S1: Obtain the average integrated sub-current of each pixel unit in the pixel unit array within a set number of frames and at a set correction target temperature, and calculate the average integrated current of the pixel unit array using the average integrated sub-current, and use the average integrated current as the correction reference value;

[0049] It should be noted that, in this embodiment, the set number of frames depends on the actual situation and can be 24 frames, 30 frames, 60 frames, 120 frames or other numbers of frames, which will not be limited here; meanwhile, the set correction target temperature also depends on the actual situation and will not be limited here;

[0050] Specifically, in this embodiment, obtain the continuous pixel output voltage of each pixel unit within the set number of frames, and calculate the average output sub-voltage of each pixel unit at the set correction target temperature using the continuous pixel output voltage. Specifically: Among them, represents the average output sub-voltage of the pixel unit at the i-th column and j-th row in the pixel unit array at the set correction target temperature, where i∈{1,2,3……,m}, j∈{1,2,3……,n}; F represents the set number of frames; represents the output voltage of the pixel unit at the i-th column and j-th row in the pixel unit array at the n-th frame at the set correction target temperature, where n∈{0,2,3……,F - 1}; T1 represents the set correction target temperature;

[0051] And calculate the average integrated sub-current of each pixel unit under the average output sub-voltage. Specifically: Among them, represents the average integrated sub - current of the pixel unit at the \(i\) - th column and \(j\) - th row in the pixel unit array under the set calibration target temperature; C int (i,j) represents the integration capacitance of the pixel unit at the \(i\) - th column and \(j\) - th row in the pixel unit array; t int represents the integration time;

[0052] The average integrated current of the pixel unit array is calculated using the average integrated sub - current, specifically: where, represents the average integrated current of the pixel unit array; The average integrated current is regarded as the calibration reference value of the integrated current of the \(m\times n\) pixel unit array at temperature \(T1\), and thus the non - uniformity of the pixel array in the spatial domain is calibrated.

[0053] S2: Obtain the difference between each average integrated sub - current and the calibration reference value, use the difference as the OOC compensation current of the corresponding pixel unit, and use the OOC compensation current to perform current compensation on the integrated sub - current of the corresponding pixel unit to calibrate the integrated voltage output by the pixel readout unit.

[0054] Specifically, in this embodiment, first obtain the difference between the average integrated sub - current of each pixel unit in the pixel unit array and the calibration reference value, and use the difference as the OOC compensation current of the corresponding pixel unit, specifically: I ooc [(i,j),T1]= Specifically: I ooc [(i,j),T1] represents the OOC compensation current of the pixel unit at the \(i\) - th column and \(j\) - th row in the pixel unit array at temperature \(T1\); ΔI int [(i,j),T1] represents the difference between the pixel unit at the \(i\) - th column and \(j\) - th row in the pixel unit array at temperature \(T1\) and the calibration reference value;

[0055] Then obtain the OOC compensation current codeword OOC(i,j) corresponding to the OOC compensation current in the pre - constructed look - up table, and use the OOC compensation current to perform current compensation on the integrated sub - current of the corresponding pixel unit to calibrate the integrated voltage output by the pixel readout unit, so as to eliminate the non - uniformity in the time domain and spatial domain of the pixel readout circuit of the photovoltaic image sensor.

[0056] Exemplarily, to verify the effectiveness of the present invention, taking the CTIA pixel readout circuit of a pixel unit as an example, if under ideal conditions, the output voltage of the CTIA - type pixel readout circuit is specifically: where, V ref represents the reference voltage; I int represents the integrated current generated by the pixel unit; t int represents the integration time; C intrepresents an integrating capacitor; if under the actual offset (assuming the equivalent offset voltage of the operational amplifier caused by mismatch is V os ), refer to Figure 5 and Figure 6 , Figure 5 shows the offset cancellation schematic diagram of the CTIA pixel readout circuit adopting the compensation and correction method proposed in this embodiment, Figure 6 shows the working timing diagram of the CTIA pixel readout circuit adopting the compensation and correction method proposed in this embodiment; meanwhile, the OOC compensation current I OOC of this pixel unit is calculated by adopting the compensation and correction method proposed in this embodiment, and the integrated voltage output by the pixel readout circuit is Assume that the CTIA output voltage deviation caused by non-uniformity is 0 (i.e., the integrated voltage output by the pixel readout circuit under ideal conditions is the same as that under the offset condition), and the relationship function between the calculated OOC compensation current and the equivalent offset voltage of the operational amplifier is obtained

[0057] At time t 0 , the reset switch S 1 is closed, the working cycle of the pixel readout circuit starts, and the pixel readout circuit is in the reset stage, as shown in Figure 7 ; at this time, the charges Q A1 , Q B1 at points A and B are respectively; Q A1 = Q B1 = (V A1 - V B1 )C int + (V A1 - V BIAS_PDN )C PD , where V BIAS_PDN represents the bias voltage, and the voltage at point A and the bias voltage provide the required reverse bias voltage for the pixel unit; C PD represents the photodiode junction capacitance of the pixel unit; the voltages at points A and B are respectively: V A1 = V B1 = V ref + V os ;

[0058] At time t 1 , the reset switch S 1 is disconnected, and the integration stage starts, as shown in Figure 8 ; at this time, the charge Q A2 at point A is Q A1 + (I int + I OOC ) × t int , and the charges Q A2 , Q B2They are respectively: Q A2 =(V A2 -V B2 )C int +(V A2 -V BIAS_PDN )C PD ; Q B2 =(V B2 -V A2 )C int , where the voltages at points A and B are respectively: V A2 =V ref +V os , V B2 =V out ;

[0059] Combined with the electric charges and voltage values of points A and B at time t 0 and the electric charges and voltage values of points A and B at time t 1 , the electric charges of point A at two moments are obtained: Q A1 =(V ref +V os -V BIAS_PDN )C PD ; Q A2 =(V ref +V os -V out )C int +(V ref +V os -V BIAS_PDN )C PD ; Then let the integration time t int =t 2 -t 1 . According to the principle of charge conservation Q A2 =Q A1 +(I int +I OOC )×t int , it can be obtained that: (V ref +V os -V out )C int -(I int +I ooc )×t int =0; Substituting the relationship function between the calculated OOC compensation current and the equivalent offset voltage of the operational amplifier into the above formula, we can get It can be seen that this expression is the same as the integral voltage expression of the output of the CTIA pixel readout circuit under the ideal condition without misalignment mentioned above. Therefore, the correction and compensation method of the pixel readout circuit proposed in this patent can eliminate the influence of the output misalignment of the pixel circuit, the mismatch of the PD reverse bias voltage, the difference in background response between pixels, and the mismatch of the output between pixels in the pixel array, thereby reducing the FPN of the pixel array and improving the uniformity of the pixel array of the pixel readout circuit.

[0060] Example 2

[0061] See also Figure 9 As shown, the present invention further provides a compensation correction device for a pixel readout circuit, which is used in any one of the compensation correction methods for a pixel readout circuit described above, and the device comprises:

[0062] The correction reference value calculation unit 100 is used to obtain the average integrated quantum current of each pixel unit in the pixel unit array within a set number of frames and at a set correction target temperature, and calculate the average integrated current of the pixel unit array using the average integrated quantum current, and use the average integrated current as the correction reference value;

[0063] The compensation correction unit 200 is used to obtain the difference between each average integral sub-current and the correction reference value, use the difference as the OOC compensation current of the corresponding pixel unit, and use the OOC compensation current to perform current compensation on the integral sub-current of the corresponding pixel unit to correct the integral voltage output by the pixel readout unit.

[0064] Furthermore, the average integrated quantum current of each pixel unit in the pixel unit array within a set number of frames and at a correction target temperature is obtained, specifically:

[0065] The continuous pixel output voltages of each pixel unit within a set number of frames are obtained, and the average output sub-voltage of each pixel unit at a set correction target temperature is calculated using the continuous pixel output voltages, and the average integrated sub-current of each pixel unit under the average output sub-voltage is calculated.

[0066] It should be noted that the modules in the device of Example 2 correspond to the steps in the method of Example 1. The steps in the method of Example 1 have been described in detail in Example 1, and the contents of the modules in the device will not be described in detail in this Example 2.

[0067] Example 3

[0068] See also Figure 10 As shown, the present invention also provides a compensation correction device for a pixel readout circuit, including a system memory 1005 and a processor 1001, wherein the system memory 1005 stores a computer program, and the processor 1001 implements the steps of any one of the above methods when executing the computer program.

[0069] It should be noted that the processor 1001 is used to execute the steps in the above method embodiments according to the instructions in the program code. Alternatively, when the processor 1001 executes the computer program, it realizes the functions of each module / unit in the above system / device embodiments.

[0070] Specifically, in this embodiment, the computer program can be divided into one or more modules / units, and one or more modules / units are stored in the system memory 1005 and executed by the processor 1001 to complete this application. One or more modules / units can be a series of computer program instruction segments capable of performing specific functions, and these instruction segments are used to describe the execution process of the computer program in the terminal device.

[0071] The terminal device can be a computing device such as a desktop computer, a notebook, a palm computer, and a cloud server, etc. The terminal device may include, but is not limited to, a processor 1001 and a system memory 1005. Those skilled in the art can understand that this does not limit the terminal device, and it may include more or fewer components than shown in the figure, or combine certain components, or different components. For example, the terminal device may also include an input / output device 1003, a network access device 1002, a bus 1006, etc.

[0072] The processor 1001 may be a central processing unit (CPU), or may also be other general-purpose processors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc.

[0073] The system memory 1005 may be an internal storage unit of the terminal device, such as the hard disk or memory of the terminal device. The system memory 1005 may also be the storage device 1004 of the terminal device, such as a plug-in hard disk equipped on the terminal device, a SmartMedia Card (SMC), a Secure Digital (SD) card, a FlashCard, etc. Further, the system memory 1005 may also include both the internal storage unit of the terminal device and the storage device 1004. The system memory 1005 is used to store computer programs and other programs and data required by the terminal device. The system memory 1005 may also be used to temporarily store data that has been output or will be output.

[0074] Those skilled in the art can clearly understand that for the convenience and brevity of description, the specific working processes of the above-described systems, systems, and units can refer to the corresponding processes in the foregoing method embodiments and will not be elaborated herein.

[0075] Embodiment 4

[0076] This embodiment provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the steps of the method in any one of the above are implemented.

[0077] Among them, the computer-readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, system, or device, or any combination of the above. More specific examples (non-exhaustive list) of the computer-readable storage medium include: an electrical connection having one or more wires, a portable computer disk, a hard disk. Random Access Memory (RAM), Read-Only Memory (ROM), Erasable Programmable Read Only Memory (EPROM), registers, hard disks, optical fibers, portable compact disc read-only memory (Compact Disc Read-Only Memory, CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the above, or any other form of computer-readable storage medium known in the art.

[0078] An exemplary storage medium is coupled to a processor, enabling the processor to read information from the storage medium and write information to the storage medium. Of course, the storage medium can also be a component of the processor. The processor and the storage medium can be located in an Application Specific Integrated Circuit (ASIC). In an embodiment of the present invention, the computer-readable storage medium can be any tangible medium that contains or stores a program, and the program can be used by or in conjunction with an instruction execution system, system, or device.

[0079] Embodiment 5

[0080] This embodiment also provides a computer program product containing instructions. When the instructions are run by a computer device cluster, the computer device cluster is caused to execute the method described in Embodiment 1.

[0081] The specific embodiments described above further elaborate on the object, technical solution, and beneficial effects of the present invention. It should be understood that the above are only specific embodiments of the present invention and are not used to limit the protection scope of the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A pixel readout circuit, characterized in that: The circuit comprises a pixel signal readout unit and an output unit which are sequentially connected to the pixel unit, and an OOC compensation current source unit is connected between the pixel unit and the pixel signal readout unit.

2. A pixel readout circuit according to claim 1, characterized in that: The OOC compensation current source unit includes a light emitting diode, one end of which is connected between the pixel unit and the pixel signal readout unit, and the other end of the light emitting diode is grounded or connected to a reference voltage.

3. A compensation correction method for the pixel readout circuit according to any one of claims 1 to 2, characterized in that the method include: Obtaining an average integrated quantum current of each pixel unit in the pixel unit array within a set number of frames and at a set correction target temperature, and calculating an average integrated current of the pixel unit array using the average integrated quantum current, and using the average integrated current as a correction reference value; The difference between each average integral sub-current and the correction reference value is obtained, and the difference is used as the OOC compensation current of the corresponding pixel unit. The OOC compensation current is used to perform current compensation on the integral sub-current of the corresponding pixel unit to correct the integral voltage output by the pixel readout unit.

4. The compensation correction method of a pixel readout circuit according to claim 3, characterized in that: The average integrated quantum current of each pixel unit in the pixel unit array within the set frame number and the correction target temperature is obtained, specifically: The continuous pixel output voltages of each pixel unit within a set number of frames are obtained, and the average output sub-voltage of each pixel unit at a set correction target temperature is calculated using the continuous pixel output voltages, and the average integrated sub-current of each pixel unit under the average output sub-voltage is calculated.

5. The compensation correction method of a pixel readout circuit according to claim 3, characterized in that: The OOC compensation current is used to compensate the integral sub-current of the corresponding pixel unit to correct the integral voltage output by the pixel readout unit, specifically: The OOC compensation current codeword corresponding to the OOC compensation current is obtained in a pre-constructed comparison table, and the OOC compensation current codeword is input into the pixel unit of the corresponding pixel readout circuit to perform current compensation on the integral sub-current of the pixel unit to correct the integral voltage output by the pixel readout unit.

6. A compensation correction device for a pixel readout circuit, characterized in that: The device is used in a compensation correction method for a pixel readout circuit as described in any one of claims 3 to 5, and the device comprises: A correction reference value calculation unit, used to obtain an average integrated quantum current of each pixel unit in the pixel unit array within a set number of frames and at a set correction target temperature, and calculate an average integrated current of the pixel unit array using the average integrated quantum current, and use the average integrated current as a correction reference value; The compensation correction unit is used to obtain the difference between each average integral sub-current and the correction reference value, use the difference as the OOC compensation current of the corresponding pixel unit, and use the OOC compensation current to perform current compensation on the integral sub-current of the corresponding pixel unit to correct the integral voltage output by the pixel readout unit.

7. The compensation correction device for a pixel readout circuit according to claim 6, characterized in that: The average integrated quantum current of each pixel unit in the pixel unit array within the set frame number and the correction target temperature is obtained, specifically: The continuous pixel output voltages of each pixel unit within a set number of frames are obtained, and the average output sub-voltage of each pixel unit at a set correction target temperature is calculated using the continuous pixel output voltages, and the average integrated sub-current of each pixel unit under the average output sub-voltage is calculated.

8. A compensation correction device for a pixel readout circuit, comprising a system memory and a processor, wherein the system memory stores a computer program, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 3 to 5 are implemented.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 3 to 5 are implemented.

10. A computer program product comprising instructions, characterized in that When the instructions are executed by a computer device cluster, the computer device cluster executes the method according to any one of claims 3 to 5.

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