A method for preparing a solar cell and a solar cell

Abstract

The present application relates to the field of photovoltaic cell technology, and more specifically to a method for preparing a solar cell and a solar cell. The solar cell includes a grid line, and the method comprises: preparing a silicon substrate, wherein the back surface of the silicon substrate has a first region and a second region, the grid line is projected in the first region along the thickness direction of the solar cell, and the second region is a region outside the first region; texturing the front and back surfaces of the silicon substrate; forming an emitter on the front surface of the silicon substrate; sequentially forming a tunneling oxide layer and a doped conductive layer on the back surface of the silicon substrate; and removing the tunneling oxide layer and the doped conductive layer at a position on the back surface of the silicon substrate corresponding to the second region. By eliminating the tunneling oxide layer and the doped conductive layer in the second region, parasitic absorption in the second region can be reduced, preventing the tunneling oxide layer and the doped conductive layer in the second region from absorbing a large amount of incident light, resulting in light energy being converted into heat energy rather than electrical energy, thereby improving the operating efficiency of the solar cell.

Description

Technical Field

[0001] The present application relates to the technical field of photovoltaic cells, and in particular to a method for preparing a solar cell and a solar cell. Background Art

[0002] Tunnel oxide passivating contact (Topcon) cells are a type of photovoltaic solar cell with advantages such as high conversion efficiency, low attenuation, and high cost-effectiveness in mass production. Topcon cells have metal electrodes. The area corresponding to the metal electrodes is the metal contact area, and the remaining area is called the non-metallic contact area. Both the metal and non-metallic contact areas are equipped with tunnel oxide layers and doped conductive layers, resulting in high parasitic absorption in the non-metallic contact area, which affects the efficiency of the Topcon cell. Summary of the Invention

[0003] In order to solve the above technical problems, the present application provides a method for preparing a solar cell and a solar cell, so as to solve the problem of high parasitic absorption in the non-metallic contact area in the prior art.

[0004] In a first aspect, the present application provides a method for preparing a solar cell, wherein the solar cell includes a grid line, and the method for preparing the solar cell includes:

[0005] Prepare a silicon substrate, wherein the back surface of the silicon substrate has a first area and a second area, the projection of the gate line along the thickness direction of the solar cell is located in the first area, and the second area is an area outside the first area;

[0006] Texturing the front and back surfaces of the silicon substrate;

[0007] generating an emitter on the front surface of the silicon substrate;

[0008] sequentially forming a tunneling oxide layer and a doped conductive layer on the back side of the silicon substrate;

[0009] The tunneling oxide layer and the doped conductive layer at a position corresponding to the second region on the back side of the silicon substrate are removed.

[0010] In this embodiment, after sequentially forming a tunneling oxide layer and a doped conductive layer on the back side of the silicon substrate, the tunneling oxide layer and the doped conductive layer at the position corresponding to the second region of the back side of the silicon substrate are removed. The beneficial effect is as follows: since the second region does not correspond to the position of the gate line, the second region is a non-metallic contact region, so that the second region is not provided with a tunneling oxide layer and a doped conductive layer, which can reduce the parasitic absorption of the second region, and avoid the tunneling oxide layer and the doped conductive layer in the second region absorbing more incident light, resulting in light energy being converted into heat energy instead of electrical energy, thereby improving the working efficiency of the solar cell. At the same time, in the method for preparing a solar cell provided in the embodiment of the present application, there is no need to perform an alkali polishing step on the back side of the silicon substrate, so that the velvet structure of the back side of the silicon substrate can be retained. During the use of the solar cell, the first region of the silicon substrate is made into a velvet structure, which can increase the effective surface area, optimize the transmission of carriers, thereby improving the fill factor, and further improving the working performance of the solar cell. In addition, compared with the method for preparing a solar cell in the related art, the method for preparing a solar cell provided in the embodiment of the present application can omit the alkali polishing step, simplify the preparation process, and reduce the preparation cost.

[0011] In a specific embodiment, in the step of removing the tunneling oxide layer and the doped conductive layer at a position corresponding to the second region on the back side of the silicon substrate, the method for preparing the solar cell specifically includes:

[0012] The tunneling oxide layer, the doped conductive layer and a portion of the structure at a position corresponding to the second region on the back side of the silicon substrate are removed by laser.

[0013] In a specific embodiment, the method for preparing the solar cell further includes: the laser frequency is 580KHz-620KHz, and the speed is 48000mm / s-52000mm / s.

[0014] In a specific embodiment, in the step of generating a tunneling oxide layer on the back side of the silicon substrate, the method for preparing the solar cell satisfies at least one of the following conditions: the flow rate of the reaction gas is 15750 sccm-28750 sccm, the reaction time is 420s-880s, and the reaction temperature is 593°C-630°C.

[0015] In a specific embodiment, when the doped conductive layer is generated on the tunnel oxide layer, the preparation method of the solar cell satisfies at least one of the following conditions: the flow rate of the reaction gas is 1050 sccm-2300 sccm, the reaction time is 1365s-2420s, and the reaction temperature is 593°C-650°C.

[0016] In a specific embodiment, in the step of forming an emitter on the front surface of the silicon substrate, the method for preparing a solar cell further comprises:

[0017] Generating an emitter and a first glass layer on the front and back sides of the silicon substrate;

[0018] Chain pickling removes the first glass layer on the back side of the silicon substrate.

[0019] In a specific embodiment, in the step of sequentially forming a tunneling oxide layer and the doped conductive layer on the back side of the silicon substrate, the method for preparing a solar cell further comprises:

[0020] sequentially forming the tunneling oxide layer, the doped conductive layer and the second glass layer on the front and back sides of the silicon substrate;

[0021] After the step of removing the tunneling oxide layer and the doped conductive layer at a position corresponding to the second region on the back side of the silicon substrate, the method for preparing a solar cell further includes:

[0022] Removing the second glass layer on the front side of the silicon substrate by chain pickling;

[0023] The tunneling oxide layer, the doped conductive layer and the first glass layer on the front surface of the silicon substrate and the second glass layer on the back surface of the silicon substrate are removed by a wet chemical cleaning method.

[0024] In a second aspect, an embodiment of the present application further provides a solar cell, which is manufactured by the above-mentioned solar cell manufacturing method;

[0025] Wherein, along the thickness direction of the solar cell, a tunneling oxide layer and a doped conductive layer are provided at a position on the back side of the silicon substrate corresponding to the first region, and a polished surface is provided at a position on the back side of the silicon substrate corresponding to the second region.

[0026] In this embodiment, the beneficial effects of the solar cell are as follows: the first region of the solar cell is a metal contact region, and the second region is a non-metallic contact region. The first region is provided with a tunneling oxide layer and a doped conductive layer. Through the synergistic effect of the tunneling oxide layer and the doped conductive layer, efficient passivation, low-resistance contact, and structural stability can be achieved, thereby ensuring the operating efficiency of the solar cell. Furthermore, the second region is not provided with a tunneling oxide layer and a doped conductive layer, which can reduce parasitic absorption in the second region and prevent the tunneling oxide layer and the doped conductive layer in the second region from absorbing a large amount of incident light, resulting in light energy being converted into heat energy rather than electrical energy, thereby further improving the operating efficiency of the solar cell. Furthermore, the back surface of the silicon substrate corresponding to the second region is polished, which can also improve the reflective performance of the back surface of the silicon substrate corresponding to the second region, enhance the secondary reflection absorption of incident light, thereby increasing the short-circuit current and improving the operating efficiency of the solar cell.

[0027] In a specific embodiment, along the thickness direction of the solar cell, the back surface of the silicon substrate at a position corresponding to the first region is a velvet surface.

[0028] In a specific embodiment, the thickness of the silicon substrate at the position corresponding to the first area is greater than the thickness of the silicon substrate at the position corresponding to the second area; the difference between the thickness of the silicon substrate at the position corresponding to the first area and the thickness of the silicon substrate at the position corresponding to the second area is 3mm-5mm. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0030] Figure 1 This is a schematic structural diagram of a solar cell provided in this application in a specific embodiment;

[0031] Figure 2 for Figure 1 Schematic diagram of the structure of the silicon substrate;

[0032] Figure 3 This is a structural diagram corresponding to step S131 of the method for preparing a solar cell provided in this application;

[0033] Figure 4 This is a structural diagram corresponding to step S132 of the method for preparing a solar cell provided in this application;

[0034] Figure 5This is a schematic structural diagram corresponding to steps S141 and S142 of the solar cell manufacturing method provided in this application;

[0035] Figure 6 This is a structural diagram corresponding to step S151 of the method for preparing a solar cell provided in this application;

[0036] Figure 7 This is a structural diagram corresponding to step S16 of the method for preparing a solar cell provided in this application;

[0037] Figure 8 This is a structural diagram corresponding to step S17 of the method for preparing a solar cell provided in this application;

[0038] Reference numerals:

[0039] 1- Solar cell;

[0040] 11-silicon substrate;

[0041] 111-first area;

[0042] 112-Second Area;

[0043] 12-emitter;

[0044] 13- first glass layer;

[0045] 14- tunneling oxide layer;

[0046] 15-doped conductive layer;

[0047] 16- second glass layer;

[0048] 17-first grid line;

[0049] 18- first passivation layer;

[0050] 19- second passivation layer;

[0051] 20-Second grid line. DETAILED DESCRIPTION

[0052] In order to better understand the technical solution of the present application, the embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0053] It should be clear that the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0054] The terms used in the embodiments of the present application are for the purpose of describing specific embodiments only and are not intended to limit the present application. The singular forms "a", "an", "the" and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms unless the context clearly indicates otherwise.

[0055] It should be understood that the term "and / or" as used herein simply describes a relationship between associated objects, indicating that three possible relationships exist. For example, "A and / or B" can represent: A alone, A and B together, or B alone. Furthermore, the character " / " in this document generally indicates an "or" relationship between the associated objects.

[0056] Photovoltaic cells can convert solar energy into electrical energy. They have the advantages of being pollution-free, not geographically restricted, and inexhaustible. They are the main direction for the development of new energy in the future. As a type of photovoltaic cell, the Topcon cell is provided with a tunneling oxide layer and a doped conductive layer on the back. The two together form a passivation contact structure, providing good interface passivation for the back of the silicon wafer. The Topcon cell also has a gate line, and the area corresponding to the gate line is the metal contact area, and the remaining area is the non-metallic contact area. The metal contact area and the non-metallic contact area of ​​the Topcon cell are both provided with a tunneling oxide layer and a doped conductive layer, resulting in higher parasitic absorption in the non-metallic area, affecting the working efficiency of the topcon cell.

[0057] In order to solve the above technical problems, Figures 1 to 8 As shown, an embodiment of the present application provides a method for preparing a solar cell 1, wherein the solar cell 1 includes a grid line. The method for preparing the solar cell 1 includes but is not limited to the following steps:

[0058] S11: preparing a silicon substrate 11, wherein the back surface of the silicon substrate 11 has a first region 111 and a second region 112, wherein the projection of the gate line along the thickness direction of the solar cell 1 is located in the first region 111, and the second region 112 is an area outside the first region 111;

[0059] S12: Texturing the front and back surfaces of the silicon substrate 11;

[0060] S13: generating an emitter 12 on the front surface of the silicon substrate 11;

[0061] S14: sequentially forming a tunneling oxide layer 14 and a doped conductive layer 15 on the back side of the silicon substrate 11;

[0062] S15 : removing the tunneling oxide layer 14 and the doped conductive layer 15 at a position corresponding to the second region 112 on the back surface of the silicon substrate 11 .

[0063] In this embodiment, after the tunneling oxide layer 14 and the doped conductive layer 15 are sequentially formed on the back surface of the silicon substrate 11, the tunneling oxide layer 14 and the doped conductive layer 15 are removed from the back surface of the silicon substrate 11 at the position corresponding to the second region 112. Since the second region 112 does not correspond to the position of the gate line, the second region 112 is a non-metallic contact region. The absence of the tunneling oxide layer 14 and the doped conductive layer 15 in the second region 112 can reduce parasitic absorption in the second region 112, preventing the tunneling oxide layer 14 and the doped conductive layer 15 in the second region 112 from absorbing a large amount of incident light, resulting in the conversion of light energy into heat energy rather than electrical energy, thereby improving the operating efficiency of the solar cell 1. At the same time, in the preparation method of the solar cell 1 provided in the embodiment of the present application, there is no need to perform an alkali polishing step on the back surface of the silicon substrate 11, thereby preserving the textured structure of the back surface of the silicon substrate 11. During the use of the solar cell 1, the first region 111 of the silicon substrate 11 has a textured structure, which can increase the effective surface area, optimize carrier transmission, and thus improve the fill factor, thereby further improving the operating performance of the solar cell 1.

[0064] In addition, compared with the preparation method of solar cells in the related art, the preparation method of the solar cell 1 provided in the embodiment of the present application can omit the alkali polishing step, simplifying the preparation process while reducing the preparation cost.

[0065] In the above embodiment, the silicon substrate 11 can be an N-type silicon substrate or a P-type silicon substrate. When the silicon substrate 11 is an N-type silicon substrate, the emitter 12 on the front side can be a boron-doped layer, and the doped conductive layer 15 on the back side can be a phosphorus-doped layer. When the silicon substrate 11 is a P-type silicon substrate, the emitter 12 on the front side can be a phosphorus-doped layer, and the doped conductive layer 15 on the back side can be a boron-doped layer. In other embodiments, the emitter 12 on the front side of the silicon substrate 11 and the doped conductive layer 15 on the back side can also be formed by doping with other elements. The embodiments of the present application do not specifically limit the doping elements and can be adjusted according to actual conditions.

[0066] The present application also provides a solar cell 1, such as Figure 1 As shown, the solar cell 1 is manufactured using the above-described method for manufacturing a solar cell 1. The solar cell 1 may include a silicon substrate 11 having a first region 111 and a second region 112. The solar cell 1 also includes a gate line, the projection of which along the thickness direction of the solar cell 1 is located in the first region 111. The second region 112 is an area outside the first region 111. Along the thickness direction of the solar cell 1, a tunneling oxide layer 14 and a doped conductive layer 15 are provided on the back surface of the silicon substrate 11 at a position corresponding to the first region 111. The back surface of the silicon substrate 11 at a position corresponding to the second region 112 is a polished surface.

[0067] In this embodiment, the first region 111 of the solar cell 1 is a metal contact region, and the second region 112 is a non-metallic contact region. The first region 111 is provided with a tunneling oxide layer 14 and a doped conductive layer 15. The synergistic effect of the tunneling oxide layer 14 and the doped conductive layer 15 achieves efficient passivation, low-resistance contact, and structural stability, thereby ensuring the operating efficiency of the solar cell 1. Furthermore, the second region 112 is not provided with the tunneling oxide layer 14 and the doped conductive layer 15. This reduces parasitic absorption in the second region 112, preventing the tunneling oxide layer 14 and the doped conductive layer 15 in the second region 112 from absorbing a significant amount of incident light, which would result in the conversion of light energy into heat rather than electrical energy. This further improves the operating efficiency of the solar cell 1. Furthermore, the polished surface of the back surface of the silicon substrate 11 corresponding to the second region 112 further improves the reflective performance of the back surface of the silicon substrate 11 corresponding to the second region 112, enhancing the secondary reflection absorption of incident light, thereby increasing the short-circuit current and improving the operating efficiency of the solar cell 1.

[0068] In a specific embodiment, Figure 1 As shown, along the thickness direction of the solar cell 1 , the back surface of the silicon substrate 11 at a position corresponding to the first region 111 may be a velvet surface.

[0069] In this embodiment, by omitting the alkaline polishing process, the velvet structure at the position corresponding to the first region 111 on the back side of the silicon substrate 11 can be retained, thereby increasing the effective surface area and optimizing the transport of carriers, thereby improving the fill factor and further improving the working performance of the solar cell 1.

[0070] The solar cell in the above embodiment may be a topcon cell, such as Figure 1 As shown, the topcon cell may also include structures such as a gate line, a passivation layer, and an emitter. Along its thickness direction, the topcon cell may include a first gate line 17, a first passivation layer 18, an emitter 12, a silicon substrate 11, a tunneling oxide layer 14, a doped conductive layer 15, a second passivation layer 19, and a second gate line 20. Among them, the tunneling oxide layer 14 and the doped conductive layer 15 can together form a passivation contact structure, which can block the recombination of minority carriers and holes and improve the open circuit voltage of the solar cell 1. Specifically, the tunneling oxide layer 14 can allow majority electrons to tunnel into the doped conductive layer 15 while blocking the recombination of minority carriers and holes, and has a good passivation effect. The doped conductive layer 15 can induce energy band bending, thereby forming a field passivation effect. The probability of electron tunneling is greatly increased, which improves the open circuit voltage of the solar cell 1, thereby improving the photoelectric conversion efficiency of the solar cell 1.

[0071] In a specific embodiment, Figures 1 to 4 As shown, the above step S13 may also include but is not limited to:

[0072] S131: sequentially forming an emitter 12 and a first glass layer 13 on the front and back sides of the silicon substrate 11;

[0073] After step S131, the method for preparing the solar cell 1 provided in the embodiment of the present application may further include:

[0074] S132 : chain pickling to remove the first glass layer 13 and the emitter 12 on the back side of the silicon substrate 11 .

[0075] In this embodiment, during the boron diffusion process, the emitter 12 and the by-product first glass layer 13 are simultaneously generated on the front and back sides of the silicon substrate 11. The first glass layer 13 and the emitter 12 on the back side of the silicon substrate 11 can be removed separately through chain pickling, so that the tunneling oxide layer 14 and the doped conductive layer 15 can be deposited on the back side of the silicon substrate 11 in the subsequent preparation process, so that the emitter 12 on the front side of the silicon substrate 11 and the doped conductive layer 15 on the back side of the silicon substrate 11 can form a PN junction.

[0076] In a specific embodiment, Figure 4 and Figure 5 As shown, when the tunneling oxide layer 14 and the doped conductive layer 15 are formed on the back side of the silicon substrate 11, the above step S14 may include but is not limited to:

[0077] S141: Generating a tunnel oxide layer 14 on the front and back surfaces of the silicon substrate 11;

[0078] S142 : sequentially forming a doped conductive layer 15 and a second glass layer 16 on the tunneling oxide layer 14 .

[0079] In the above embodiment, when the tunnel oxide layer 14 is formed on the back side of the silicon substrate 11, the above step S141 can meet at least one of the following conditions: the flow rate of the reaction gas is 15750 sccm-28750 sccm, the reaction time is 420s-880s, and the reaction temperature is 593°C-630°C.

[0080] In this embodiment, since the method for preparing a solar cell provided in the embodiment of the present application omits the alkaline polishing step, the back side of the silicon substrate 11 still retains a velvet structure. When the tunneling oxide layer 14 is deposited on the back side of the silicon substrate 11, a smooth and flat morphology is not formed on the back side of the silicon substrate 11. Therefore, step S141 satisfies at least one of the following conditions: the flow rate of the reaction gas introduced is 15750 sccm-28750 sccm, the reaction time is 420s-880s, and the reaction temperature is 593°C-630°C. This can improve the uniformity of the tunneling oxide layer 14 during deposition to meet the use requirements of the solar cell.

[0081] Optionally, the flow rate of the reactant gas is set to 15750 sccm-28750 sccm, for example, the flow rate of the reactant gas can be 15750 sccm, 20000 sccm, 28750 sccm, etc., which can be increased by 5%-15% compared to the related art. Alternatively, the reaction time is set to 420 s-880 s, for example, the reaction time can be 420 s, 600 s, 880 s, etc., which can be increased by 5%-10% compared to the related art. Alternatively, the reaction temperature is set to 593° C.-630° C., for example, the reaction temperature can be 593° C., 610° C., 630° C., etc., which can be increased by 3° C.-10° C. compared to the related art. By increasing at least one of the three conditions, the reaction gas flow rate, the reaction time, or the reaction temperature, the uniformity of the tunnel oxide layer 14 during deposition can be improved, so that the electrical properties of the tunnel oxide layer 14 meet the requirements of solar cell use.

[0082] In other embodiments, the reaction gas flow rate, reaction time, and reaction temperature when preparing the tunnel oxide layer 14 may also be other values. The embodiments of the present application do not limit their specific values ​​and they can be adaptively adjusted according to actual conditions.

[0083] In the above embodiment, Figure 5 As shown, while the doped conductive layer 15 is formed on the tunnel oxide layer 14, a byproduct second glass layer 16 is also formed. The above step S142 can meet at least one of the following conditions: the flow rate of the reaction gas is 1050 sccm-2300 sccm, the reaction time is 1365s-2420s, and the reaction temperature is 593°C-650°C.

[0084] In this embodiment, because the method for preparing a solar cell provided in this embodiment of the present application omits the alkaline polishing step, the back surface of the silicon substrate 11 still retains a textured structure, so that the generated tunneling oxide layer 14 also has textured structural characteristics. Therefore, step S142 is required to meet at least one of the following conditions: a reaction gas flow rate of 1050 sccm-2300 sccm, a reaction time of 1365 s-2420 s, and a reaction temperature of 593°C-650°C, thereby improving the uniformity of the deposition and doping of the doped conductive layer 15 and reducing the defect density to meet the use requirements of the solar cell.

[0085] Optionally, the flow rate of the reactant gas is set to 1050 sccm-2300 sccm, for example, the flow rate of the reactant gas can be 1050 sccm, 1800 sccm, 2300 sccm, etc., which can be increased by 5%-15% compared to the related art. Alternatively, the reaction time is set to 1365 s-2420 s, for example, the reaction time can be 1365 s, 1800 s, 2420 s, etc., which can be increased by 5%-10% compared to the related art. Alternatively, the reaction temperature is set to 593° C.-650° C., for example, the reaction temperature can be 593° C., 610° C., 650° C., etc., which can be increased by 3° C.-10° C. compared to the related art. By increasing at least one of the three conditions of the reactant gas flow rate, the reaction time, or the reaction temperature, the uniformity of the doped conductive layer 15 during deposition can be improved, the defect density can be reduced, and the electrical properties of the doped conductive layer 15 can meet the requirements of solar cell use.

[0086] In other embodiments, the reaction gas flow rate, reaction time, and reaction temperature when preparing the doped conductive layer 15 may also be other values. The embodiments of the present application do not limit their specific values ​​and they can be adaptively adjusted according to actual conditions.

[0087] In the above embodiment, Figure 4 and Figure 5 As shown, since the alkaline polishing process is omitted in the preparation process of the solar cell, the velvet structure on the back of the silicon substrate 11 is retained. Therefore, when the tunneling oxide layer 14 and the doped conductive layer 15 are sequentially deposited on the back of the silicon substrate 11, at least one reaction condition of the temperature, reaction gas flow rate or reaction time during the deposition process needs to be increased.

[0088] At the same time, compared to the preparation methods in the prior art, which first perform alkaline polishing and then re-texture the metal contact area separately, the solar cell preparation method provided in the embodiment of the present application retains the textured structure of the silicon substrate 11 by omitting the alkaline polishing step. This can avoid damage to the silicon substrate 11 during the alkaline polishing cleaning process due to the high temperature and high pressure environment or uneven corrosion of the alkaline solution, which can cause cracks on the surface of the silicon substrate 11 or uneven thickness of the silicon substrate 11, thereby affecting the yield rate. In addition, compared to the preparation methods in the related art, which require the use of a mask to block the non-metallic contact area separately, the solar cell preparation method provided in the embodiment of the present application removes the textured structure of the non-metallic contact area (i.e., the second area) through laser, thereby achieving the purpose of retaining the textured structure of the metal contact area only. This eliminates the need for a mask and can further simplify the preparation process.

[0089] In the above embodiment, Figure 4 and Figure 5As shown, when the silicon substrate 11 is an N-type silicon substrate, the emitter 12 on the front side can be a boron-doped layer, and the doped conductive layer 15 on the back side can be a phosphorus-doped layer. In this case, the first glass layer 13 can be a borosilicate glass layer, and the second glass layer 16 can be a phosphorus-doped glass layer. When the silicon substrate 11 is a P-type silicon substrate, the emitter 12 on the front side can be a phosphorus-doped layer, and the doped conductive layer 15 on the back side can be a boron-doped layer. In this case, the first glass layer 13 can be a phosphorus-doped glass layer, and the second glass layer 16 can be a borosilicate glass layer. In other embodiments, the emitter 12 on the front side and the doped conductive layer 15 on the back side of the silicon substrate 11 can also be formed by doping with other elements, so that the first glass layer 13 and the second glass layer 16 can also have other structures. The embodiments of the present application do not limit their specific structures and can be adjusted according to actual conditions.

[0090] In a specific embodiment, Figure 6 As shown, in the step of removing the tunneling oxide layer 14 and the doped conductive layer 15 at the position corresponding to the second region 112 on the back side of the silicon substrate 11, the above step S15 may include but is not limited to:

[0091] S151 : removing the tunneling oxide layer 14 , the doped conductive layer 15 and a portion of the structure at a position corresponding to the second region 112 on the back surface of the silicon substrate 11 by laser.

[0092] In this embodiment, the tunneling oxide layer 14 and the doped conductive layer 15 in the second region 112 are removed by laser patterning, which can reduce the parasitic absorption generated in the second region 112 during the use of the solar cell, thereby improving the light absorption efficiency and improving the working efficiency of the solar cell. In addition, the use of laser etching has the advantages of high precision, low preparation cost and strong process flexibility. At the same time, when the tunneling oxide layer 14 and the doped conductive layer 15 in the second region 112 are removed by laser, part of the structure on the back side of the silicon substrate 11 corresponding to the position of the second region 112 can also be removed, which can ensure that the tunneling oxide layer 14 and the doped conductive layer 15 in the second region 112 are completely removed, and the velvet structure on the back side of the silicon substrate 11 corresponding to the position of the second region 112 can also be removed, so as to pave the way for the subsequent preparation process to make the position of the silicon substrate 11 corresponding to the second region 112 a polished surface.

[0093] In a specific embodiment, Figure 6 As shown, in the solar cell prepared by the above step S151, the thickness of the silicon substrate 11 at the position corresponding to the first region 111 is greater than the thickness of the silicon substrate 11 at the position corresponding to the second region 112. The difference between the thickness of the silicon substrate 11 at the position corresponding to the first region 111 and the thickness of the silicon substrate 11 at the position corresponding to the second region 112 can be 3 mm to 5 mm.

[0094] In this embodiment, in the step of laser removing the tunneling oxide layer 14 and the doped conductive layer 15 in the second region 112, part of the silicon substrate 11 structure at the position corresponding to the second region 112 on the back side of the silicon substrate 11 is also removed simultaneously. Therefore, the thickness of the silicon substrate 11 at the position corresponding to the first region 111 is greater than the thickness of the silicon substrate 11 at the position corresponding to the second region 112. While ensuring that the tunneling oxide layer 14 and the doped conductive layer 15 in the second region 112 are completely removed, the velvet structure at the position corresponding to the second region 112 on the back side of the silicon substrate 11 can also be removed, so that the position corresponding to the second region 112 on the back side of the silicon substrate 11 can be a polished surface.

[0095] At the same time, the difference between the thickness of the silicon substrate 11 at the position corresponding to the first area 111 and the thickness of the silicon substrate 11 at the position corresponding to the second area 112 can be 3mm-5mm, for example, the difference can be 3mm, 4mm, 5mm, etc., which can not only ensure that the tunneling oxide layer 14, the doped conductive layer 15 and the velvet structure of the second area 112 are cleanly removed, but also avoid the laser removal of too much silicon substrate 11 structure, prevent it from affecting the light absorption efficiency of the solar cell, and cause the composite loss to increase, thereby affecting the working efficiency of the solar cell.

[0096] In other embodiments, the difference between the thickness of the silicon substrate 11 at the position corresponding to the first region 111 and the thickness of the silicon substrate 11 at the position corresponding to the second region 112 may also be other values. The specific value of the difference is not limited in the embodiment of the present application and can be adjusted for applicability according to actual conditions.

[0097] In a specific embodiment, Figure 6 As shown, in the above step S151, the frequency of the laser can be 580KHz-620KHz, and the speed can be 48000mm / s-52000mm / s.

[0098] In this embodiment, the laser is a high-frequency laser within the range of 580 kHz to 620 kHz, for example, the laser frequency can be 580 kHz, 600 kHz, 620 kHz, etc., which can improve the energy input efficiency of the laser, thereby achieving the effect of quickly removing the tunneling oxide layer 14, the doped conductive layer 15, and a portion of the silicon substrate 11 structure in the second region, and can also reduce the damage to the material caused by heat accumulation. At the same time, the laser speed is within the range of 48,000 mm / s to 52,000 mm / s, for example, the laser speed can be 48,000 mm / s, 50,000 mm / s, 52,000 mm / s, etc., which can reduce the time the laser stays on the material surface, avoiding damage to the silicon substrate 11 or excessive laser etching during the laser removal of the tunneling oxide layer 14, the doped conductive layer 15, and a portion of the silicon substrate 11 structure in the second region 112, thereby affecting the normal use of the silicon substrate 11.

[0099] In other embodiments, the frequency and speed during the laser processing may also be other values. The specific values ​​of the frequency and speed of the laser are not limited in the embodiments of the present application and can be adaptively adjusted according to actual conditions.

[0100] In a specific embodiment, Figure 7 and Figure 8 As shown, after step S15, the method for preparing a solar cell provided in the embodiment of the present application may further include:

[0101] S16: chain pickling to remove the second glass layer 16 on the front surface of the silicon substrate 11;

[0102] S17 : using a wet chemical cleaning method to remove the tunneling oxide layer 14 , the doped conductive layer 15 and the first glass layer 13 on the front surface of the silicon substrate 11 and the second glass layer 16 on the back surface of the silicon substrate 11 .

[0103] In this embodiment, in step S16, the second glass layer 16 on the front surface of the silicon substrate 11 is first removed by chain pickling, while the second glass layer 16 on the back surface of the silicon substrate 11 corresponding to the first region 111 is retained. This protects the tunneling oxide layer 14 and the doped conductive layer 15 on the back surface of the silicon substrate 11 corresponding to the first region 111, preventing them from being removed during the wet chemical cleaning in step 17. In step 17, the tunneling oxide layer 14, the doped conductive layer 15, and the first glass layer 13 on the front surface of the silicon substrate 11, and the second glass layer 16 on the back surface of the silicon substrate 11 are removed by wet chemical cleaning, so that only the emitter 12 structure remains on the front surface of the silicon substrate 11, and only the tunneling oxide layer 14 and the doped conductive layer 15 structure remain on the back surface of the silicon substrate 11 corresponding to the first region 111. Simultaneously, in step 17, the wet chemical cleaning can further clean the back surface of the silicon substrate 11 corresponding to the second region 112, removing impurities and defects at this location, further improving the reflective effect at the back surface of the silicon substrate 11 corresponding to the second region 112.

[0104] In a specific embodiment, as shown in Table 1 below, solar cell A is solar cell 1 produced by the preparation method provided in the embodiments of this application. Solar cell B is a solar cell produced by the preparation method provided in the related art, wherein the backside of the silicon substrate is polished and covered with a tunneling oxide layer and a doped conductive layer. Except for the preparation parameters modified in the above embodiments, other preparation parameters (such as silicon wafer thickness, resistivity, tunneling oxide layer thickness, etc.) remain the same during the preparation of solar cells A and B.

[0105] Table 1

[0106]

[0107] In this embodiment, the test results of solar cell A and solar cell B are shown in Table 1. Compared with solar cell B, the open circuit voltage, short circuit current and fill factor of solar cell A are all improved, thereby improving the overall working efficiency of solar cell A. It can be seen that compared with solar cell B prepared by the preparation method in the relevant technology, solar cell A prepared by the preparation method provided in the embodiment of the present application has higher working efficiency, and can also save the alkali polishing step, avoid damage to the silicon substrate during the alkali polishing process, affect the yield rate, and can simplify the steps and reduce costs. The above is only a preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application can have various changes and variations. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application should be included in the scope of protection of the present application.

Claims

1. A method for preparing a solar cell, wherein the solar cell (1) comprises a grid line, characterized in that: The method for preparing the solar cell (1) comprises: A silicon substrate (11) is prepared, wherein the back surface of the silicon substrate (11) has a first region (111) and a second region (112), the projection of the grid line along the thickness direction of the solar cell (1) is located in the first region (111), and the second region (112) is a region outside the first region (111); Texturing the front and back surfaces of the silicon substrate (11); generating an emitter (12) on the front surface of the silicon substrate (11); sequentially generating a tunneling oxide layer (14) and a doped conductive layer (15) on the back side of the silicon substrate (11); removing the tunneling oxide layer (14) and the doped conductive layer (15) at a position corresponding to the second region (112) on the back side of the silicon substrate (11); In the step of removing the tunneling oxide layer (14) and the doped conductive layer (15) at a position corresponding to the second region (112) on the back side of the silicon substrate (11), the method for preparing the solar cell (1) specifically comprises: The tunneling oxide layer (14) of the second region (112), the doped conductive layer (15) and a portion of the structure at a position corresponding to the second region (112) on the back side of the silicon substrate (11) are removed by laser.

2. The method for preparing a solar cell according to claim 1, wherein: The method for preparing the solar cell (1) further comprises: The laser frequency is 580KHz-620KHz, and the speed is 48000mm / s-52000mm / s.

3. The method for preparing a solar cell according to claim 1, wherein: In the step of generating a tunneling oxide layer (14) on the back side of the silicon substrate (11), the method for preparing the solar cell (1) satisfies at least one of the following conditions: a flow rate of the introduced reaction gas is 15750 sccm-28750 sccm, a reaction time is 420 s-880 s, and a reaction temperature is 593° C.-630° C.

4. The method for preparing a solar cell according to claim 3, wherein: When the doped conductive layer (15) is generated on the tunneling oxide layer (14), the preparation method of the solar cell (1) satisfies at least one of the following conditions: the flow rate of the reaction gas is 1050 sccm-2300 sccm, the reaction time is 1365 s-2420 s, and the reaction temperature is 593° C.-650° C.

5. The method for preparing a solar cell according to claim 1, wherein: In the step of generating an emitter (12) on the front surface of the silicon substrate (11), the method for preparing the solar cell (1) further comprises: Generating the emitter (12) and the first glass layer (13) on the front and back sides of the silicon substrate (11); Chain pickling removes the first glass layer (13) on the back side of the silicon substrate (11).

6. The method for preparing a solar cell according to claim 5, wherein: In the step of sequentially generating a tunneling oxide layer (14) and a doped conductive layer (15) on the back side of the silicon substrate (11), the method for preparing the solar cell (1) further comprises: Sequentially generating the tunneling oxide layer (14), the doped conductive layer (15), and the second glass layer (16) on the front and back sides of the silicon substrate (11); After the step of removing the tunneling oxide layer (14) and the doped conductive layer (15) at a position corresponding to the second region (112) on the back side of the silicon substrate (11), the method for preparing the solar cell further comprises: Chain pickling to remove the second glass layer (16) on the front side of the silicon substrate (11); The tunneling oxide layer (14), the doped conductive layer (15) and the first glass layer (13) on the front surface of the silicon substrate (11) and the second glass layer (16) on the back surface of the silicon substrate are removed by a wet chemical cleaning method.

7. A solar cell, characterized in that: The solar cell (1) is manufactured by the method for manufacturing the solar cell (1) according to any one of claims 1 to 6; Wherein, along the thickness direction of the solar cell (1), a tunneling oxide layer (14) and a doped conductive layer (15) are provided at positions corresponding to the first region (111) on the back side of the silicon substrate (11), and positions corresponding to the second region (112) on the back side of the silicon substrate (11) are polished surfaces.

8. The solar cell according to claim 7, characterized in that Along the thickness direction of the solar cell (1), the back surface of the silicon substrate (11) at a position corresponding to the first region (111) is a velvet surface.

9. The solar cell according to claim 8, characterized in that The thickness of the silicon substrate (11) at a position corresponding to the first region (111) is greater than the thickness of the silicon substrate (11) at a position corresponding to the second region (112); The difference between the thickness of the silicon substrate (11) at a position corresponding to the first region (111) and the thickness of the silicon substrate (11) at a position corresponding to the second region (112) is 3 mm to 5 mm.

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