An adaptive zero tracking compensation circuit applied to a linear voltage regulator

Abstract

The application belongs to the technical field of integrated circuits and relates to a self-adaptive zero tracking compensation circuit applied to a linear voltage regulator, comprising a reference module BG, a main operational amplifier EA, a voltage-controlled current source VCCS, a driving tube MN1, a linear region tube MN2, a power tube MP1, five resistors and three capacitors; the devices are sequentially connected; the self-adaptive zero tracking compensation circuit adopted by the application can switch the resistance of the voltage-controlled current source VCCS by detecting the size of the load current, generate a tracking zero point with a larger moving range, and has a better compensation effect on the output pole and a higher loop stability.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of integrated circuits, and particularly relates to a self-adaptive zero tracking compensation circuit applied to a linear voltage regulator. BACKGROUND

[0002] In a power management chip (PMIC), a linear voltage regulator (LDO) is widely used due to its high output accuracy, low power consumption, small area, high ripple suppression and other characteristics, and has a huge and diverse market demand. The LDO circuit mainly consists of a reference, an error amplifier, a power stage, a feedback network and an auxiliary circuit, and the output accuracy is ensured through a high-gain feedback loop. However, in the feedback loop of the LDO, there are usually multiple low-frequency poles, which seriously challenge the stability of the loop; and the large range of LDO load variation causes the output pole to move in a large range, which further deteriorates the stability of the loop.

[0003] In order to improve the loop stability of the LDO, a frequency compensation scheme needs to be introduced. The traditional frequency compensation scheme can be divided into three types: fixed zero compensation, pole-pole tracking compensation and zero-pole tracking compensation. Among them, the fixed zero compensation introduces a fixed zero frequency, which cannot effectively compensate for the movement of the output pole, and the improvement of the loop stability is limited; the pole-pole tracking compensation ensures the stability of the distance between the two poles by tracking the adjacent pole of the output pole through a tracking circuit, thereby improving the loop stability, but in practice, there are usually three or more poles within the loop bandwidth, and the movement range of the output pole is much larger than that of its adjacent poles, which makes the compensation effect cannot reach the ideal level; the zero-pole tracking compensation uses a controlled resistance to track the movement of the output pole to compensate for the position of the zero point, which also faces the problem that the movement range of the compensation zero point is much smaller than that of the output pole, and the compensation effect is limited. SUMMARY

[0004] To solve the above problems existing in the prior art, the application provides a self-adaptive zero tracking compensation circuit applied to a linear voltage regulator, which comprises a reference module BG, a main operational amplifier EA, a voltage-controlled current source VCCS, a driving tube MN1, a linear region tube MN2, a power tube MP1, five resistors and three capacitors.

[0005] The connection relationship of each device comprises that the output end of the reference module BG is connected with the positive input end of the main operational amplifier EA; one end of resistors R1 and R2 is respectively connected with the negative input end of the main operational amplifier EA, the output end of the main operational amplifier EA is respectively connected with the gate of the linear zone tube MN2, one end of the resistor R3 and the gate of the driving tube MN1; the other end of the resistor R3 is connected with one end of the capacitor C1; the other end of the capacitor C1 is connected with the drain of the MN2; the source of the MN2 is grounded; the source of the MN1 is grounded, the drain of the MN1 is respectively connected with the output end of the voltage-controlled current source VCCS and the gate of the power tube MP1; the source of the power tube MP1 is connected with the input end of the voltage-controlled current source VCCS and then connected with the input signal, the drain of the power tube MP1 is respectively connected with one end of the resistor R4, one end of the resistor RL, the other end of the resistor R1 and one end of the capacitor CL; the other end of the resistor R4 is connected with one end of the capacitor C2; the other end of the capacitor C2, the resistor RL, the capacitor CL and the resistor R2 are all grounded.

[0006] The beneficial effects of the present application are as follows:

[0007] The adaptive zero point tracking compensation circuit adopted by the present application can switch the internal resistance of the voltage-controlled current source (VCCS) by detecting the load current size, generate a tracking zero point with a larger moving range, and the compensation effect on the output pole is better, and the loop stability is higher. BRIEF DESCRIPTION OF DRAWINGS

[0008] Figure 1 The LDO main circuit diagram of the present application is as follows:

[0009] Figure 2 The small signal block diagram of the LDO main circuit of the present application is as follows:

[0010] Figure 3 The internal structure diagram of the VCCS of the present application is as follows:

[0011] Figure 4 The VCCS internal resistance R eq value changes with the load resistance R L graph;

[0012] Figure 5 The adaptive zero point tracking compensation circuit of the present application is as follows: when the load current is 10 mu A, the start-up and shutdown loop stability comparison graph is as follows:

[0013] Figure 6 The adaptive zero point tracking compensation circuit of the present application is as follows: when the load current is 10 mu A, the start-up and shutdown loop stability comparison graph is as follows:

[0014] Figure 7 The adaptive zero point tracking compensation circuit of the present application is as follows: when the load current is 200 mA, the start-up and shutdown loop stability comparison graph is as follows. DETAILED DESCRIPTION

[0015] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work fall within the protection scope of the present application.

[0016] An adaptive zero tracking compensation circuit applied to a linear voltage regulator, as shown in Figure 1 The connection relationship of each device comprises that the output end of the reference module BG is connected to the positive input end of the main operational amplifier EA; the negative input end of the main operational amplifier EA is connected to one end of the resistors R1 and R2 respectively, and the output end of the main operational amplifier EA is connected to the gate of the linear region tube MN2, one end of the resistor R3 and the gate of the driving tube MN1 respectively; the other end of the resistor R3 is connected to one end of the capacitor C1; the other end of the capacitor C1 is connected to the drain of the MN2; the source of the MN2 is grounded; the source of the MN1 is grounded, and the drain of the MN1 is connected to the output end of the voltage-controlled current source VCCS and the gate of the power tube MP1 respectively; the source of the power tube MP1 is connected to the input end of the voltage-controlled current source VCCS and then connected to the input signal, and the drain of the power tube MP1 is connected to one end of the resistor R4, one end of the resistor RL, the other end of the resistor R1 and one end of the capacitor CL respectively; the other end of the resistor R4 is connected to one end of the capacitor C2; the other end of the capacitor C2, the resistor RL, the capacitor CL and the resistor R2 are all grounded.

[0017] In the embodiment, an adaptive zero tracking compensation circuit for a linear voltage regulator is disclosed, a voltage-controlled current source (VCCS) and a tracking zero generating circuit are added in the LDO circuit, a wider range of moving zero tracking compensation output poles is realized, and the influence of the output poles on the loop stability is obviously reduced.

[0018] Without changing the main structure of the LDO, the voltage-controlled current source is used to make the tracking zero have different relevance with the output poles under light load, medium load and heavy load of the load current, so that the zero moving range is wider, the output poles can be more effectively tracked and compensated than the traditional structure, the influence of the output poles in the loop bandwidth is reduced, the phase margin and stability of the loop are improved, and the circuit output is ensured to be stable under full load conditions. The present application has little influence on the original structure of the LDO, the additional circuit structure is simple, the tracking zero moving range is wide, the loop stability is obviously improved, and the demand of the LDO circuit for the loop stability under full load conditions can be met.

[0019] LDO circuits have a wide load variation range and require high output accuracy, placing high demands on loop stability. Therefore, a frequency compensation scheme is needed to achieve stable output across the entire load. This invention designs an adaptive zero-point tracking compensation circuit that uses zero-point tracking to compensate for the output poles. Compared to traditional structures, the zero-point movement range is larger, resulting in superior compensation performance.

[0020] Appendix Figure 1 This is a circuit diagram of the present invention. Changes in load current will be directly reflected in the gate-source voltage V of power transistor MP1. GS,MP1 Above, V GS,MP1 The voltage-controlled current source (VCCS) converts the current into a drive current to supply the drive transistor MN1; then, transistor MN1 converts the drive current into a gate-source voltage V. GS,MN1 ; Finally V GS,MN1 The linear region resistance value of MN2 is affected, resulting in a shifted zero point z that tracks changes in the load current. c Compensation output pole p out .

[0021] right Figure 1 The simplified version is attached. Figure 2 As shown, this figure is a small-signal block diagram of the circuit of the present invention. The figure shows that the poles in the circuit include the op-amp output pole p. EA Power transistor gate pole p pow Output pole p out Three, zero point has tracking zero point z c Two fixed zeros, z1 and p. Output pole p. out The range of motion is large, making compensation relatively difficult. Other pole frequencies are relatively fixed, so conventional compensation methods can be used.

[0022] The circuit design of this invention features an adaptive zero-point tracking compensation circuit to generate a moving zero point z. c Compensation output pole p out Meanwhile, a bypass capacitor C2 and a resistor R4 are used to form a fixed zero-point compensation for the gate pole p of the power transistor. pow This ensures that the only major active pole within the loop bandwidth is p. EA The stability of the loop has been greatly improved.

[0023] op-amp output pole p EA The frequency is:

[0024]

[0025] Among them, R out,EA C1 is the equivalent output resistance of the op-amp, and C1 is the capacitance of capacitor C1.

[0026] Power transistor gate pole p pow The frequency is:

[0027]

[0028] where g ds,MN1 is the drain-source conductance of the MOS transistor, R eq is the equivalent internal resistance of the VCCS, C gg,MP1 is the total gate capacitance of the MOS transistor.

[0029] The frequency of the output pole p out is:

[0030]

[0031] where R L is the equivalent load resistance, C L is the output capacitance. The load current decreases, R L becomes larger; the load current increases, R L becomes smaller.

[0032] The frequency of the fixed zero point z1 is:

[0033]

[0034] When the load resistance R L changes, the output pole position moves obviously. The light load output pole is low frequency, and the heavy load output pole is high frequency. The corresponding relationship between the load change and V GS,MP1 is:

[0035]

[0036] where μ p is the hole mobility, C OX is the gate oxide capacitance of the MOS transistor, V TH is the threshold voltage of the MOS transistor, V OUT is the output voltage of the LDO.

[0037] The V GS,MP1 voltage is converted to the driving current I d by the VCCS. The corresponding relationship between the current and V GS,MN1 is:

[0038]

[0039] where μ n is the electron mobility. After the V GS,MN1 voltage is applied to the MN2 transistor, the linear region resistance R Z of the MN2 transistor is:

[0040]

[0041] The types of the MN1 and MN2 transistors are consistent, V THAlways the same. Combined with formula (5) ~ (7), the final tracking zero point z c is:

[0042]

[0043] Wherein, z c is the tracking zero point, C1 is the capacitance of capacitor C1, R3 is the resistance value of resistor R3, W is the channel width of MOS tube, L is the channel length of MOS tube, μ n is the electron mobility, C OX is the gate oxide layer capacitance of MOS tube, V OUT is the output voltage, μ p is the hole mobility, R L is the resistance value of resistor RL, V TH,MP1 is the threshold voltage of MP1 tube, R eq is the equivalent resistance of voltage-controlled current source VCCS.

[0044] Formula (3) shows that when the load current moves from light load to heavy load, R L becomes smaller, p out frequency becomes higher. Formula (8) shows that when R L becomes smaller, the tracking zero point also moves to high frequency, which can adaptively compensate the output pole. In addition, the equivalent resistance R eq of VCCS also changes with the load, further widening the moving range of the tracking zero point. When the load is light, R eq is larger, so that the tracking zero point z c moves to low frequency with a larger amplitude; when the load is heavy, R eq is smaller, so that the tracking zero point z c moves to high frequency with a larger amplitude.

[0045] In this embodiment, the working of voltage-controlled current source VCCS includes: when the circuit is lightly loaded, MP8 and MP9 tubes are closed, and the current flows through R7 resistor branch to MN1 tube, so that the equivalent resistance R eq of VCCS has the maximum value; when the circuit is loaded, MP8 tube is opened and MP9 tube is closed, and by adjusting the resistance ratio of R7 branch, MP8 is opened and is in linear region, so that the equivalent resistance R eq of VCCS changes; when the circuit is heavily loaded, MP8 and MP9 tubes are opened, and MP9 tube is connected as a diode and is in saturation region, so that the equivalent resistance R eq of VCCS has the minimum value.

[0046] The attached Figure 3 is the internal structure diagram of VCCS of the present application, which includes transistors MP8 and MP9, resistors R7, R8 and R9. When the load is light, V GS,MP1The difference is too small to turn on MP8 and MP9 transistors. Current flows to MN1 transistor through the R7 resistor branch. At this time, the equivalent resistance R of VCCS is... eq The maximum value is:

[0047] R eq (L)=R7+R8+R9(9)

[0048] During intermediate load, V GS,MP1 The difference is sufficient to turn on MP8 but not MP9. By adjusting the ratio of the R7 branch resistor, MP8 can be turned on in the linear region. At this time, the equivalent resistance R of VCCS is... eq The value decreases significantly, and its value is:

[0049]

[0050] Under heavy load, V GS,MP1 The difference is the largest, both MP8 and MP9 are turned on, MP9 is a diode connected and is in the saturation region with very low resistance. At this time, the equivalent resistance R of VCCS is... eq The minimum value is:

[0051]

[0052] Among them, g m It is the transconductance of the MOSFET. R eq The change in value can make the tracking zero point z under light load possible. c The value is lower frequency, and the tracking zero z-point under heavy load is higher. c The value is more frequent, broadening z c Movement range. (Attached) Figure 4 It is R eq The value varies with the load resistance R L The variation diagram is consistent with formulas (9) to (11).

[0053] Appendix Figure 5 Appendix Figure 6 Appendix Figure 7 The figures show a comparison of the loop stability of the adaptive zero-point tracking compensation circuit of this invention when the circuit is enabled and disabled, with load currents of 10μA, 10mA, and 200mA. The comparison reveals that without the tracking circuit, output pole movement severely impacts loop stability. Under medium and heavy load conditions, the output pole moves too close to other poles, potentially resulting in a negative phase margin. However, with the tracking circuit enabled, the output pole is effectively compensated, reducing the impact on loop stability, and the phase margin remains normal under full load conditions.

[0054] The above examples further illustrate the objects, technical solutions and advantages of the present application. It should be understood that the above examples are only preferred embodiments of the present application and are not intended to limit the present application. Any modification, equivalent replacement, improvement, etc. made to the present application within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. An adaptive zero-trace compensation circuit for a linear voltage regulator, comprising: It comprises: a reference module BG, a main operational amplifier EA, a voltage-controlled current source VCCS, a driving tube MN1, a linear region tube MN2, a power tube MP1, five resistors and three capacitors; The connection relationship of each device comprises that the output end of the reference module BG is connected to the positive input end of the main operational amplifier EA. The negative input end of the main operational amplifier EA is connected to one end of the resistor R1 and the resistor R2 respectively, the output end of the main operational amplifier EA is connected to the gate of the linear region tube MN2, one end of the resistor R3 and the gate of the driving tube MN1 respectively; the other end of the resistor R3 is connected to one end of the capacitor C1; the other end of the capacitor C1 is connected to the drain of the MN2; the source of the MN2 is grounded; the source of the MN1 is grounded, the drain of the MN1 is connected to the output end of the voltage-controlled current source VCCS and the gate of the power tube MP1 respectively; the source of the power tube MP1 is connected to the input end of the voltage-controlled current source VCCS and then connected to an input signal, the drain of the power tube MP1 is connected to one end of the resistor R4, one end of the resistor RL, the other end of the resistor R1 and one end of the capacitor CL respectively; one end of the capacitor C2 connected to the other end of the resistor R4; the other end of the capacitor C2, the resistor RL, the capacitor CL and the resistor R2 are all grounded.

2. The adaptive zero-trace compensation circuit for a linear voltage regulator according to claim 1, wherein, The voltage-controlled current source VCCS comprises two power tubes MP8-MP9 and three resistors R7-R9; the source of the MP8 is connected to one end of the resistor R7 and the source of the MP9 respectively, the drain of the MP8 is connected to the other end of the resistor R7 and one end of the resistor R8 respectively, the gate of the MP8 is connected to one end of the resistor R9 respectively; the other end of the resistor R9 is connected to the other end of the resistor R8, the drain of the MP9 and the gate of the MP9 respectively.

3. The adaptive zero-trough compensation circuit for a linear voltage regulator of claim 1, wherein, Main operational amplifier EA output pole p EA The frequency is: wherein, Rop is the equivalent output resistance of the operational amplifier, C1 is the capacitance of the capacitor.

4. The adaptive zero-trough compensation circuit for a linear voltage regulator of claim 1, wherein, The power tube gate pole frequency is: wherein, is the drain-source conductance of the MOS transistor, is the equivalent resistance of the VCCS, is the total gate capacitance of the MOS transistor.

5. The adaptive zero-trough compensation circuit for a linear voltage regulator of claim 1, wherein, The output end of the adaptive zero tracking compensation circuit is the drain of the MP1, and the frequency output by the output end is negatively fed back with the resistor RL and the capacitor CL.

6. The adaptive zero-trough compensation circuit for a linear voltage regulator of claim 1, wherein, The expression of the tracking zero point of the adaptive zero tracking compensation circuit is: wherein, is the zero point, is the capacitance of the capacitor C1, is the resistance of the resistor R3, is the channel width of the MOS transistor, is the channel length of the MOS transistor, is the electron mobility, is the gate oxide capacitance of the MOS transistor, is the output voltage, is the hole mobility, is the resistance of the resistor RL, is the threshold voltage of the MP1 transistor, is the equivalent resistance of the voltage controlled current source VCCS.

7. The adaptive zero-trough compensation circuit for a linear voltage regulator of claim 2, wherein, The working of the voltage-controlled current source VCCS includes: when the circuit is lightly loaded, the MP8 and MP9 tubes are closed, the current flows to the MN1 tube through the R7 resistance branch, the equivalent resistance R eq of the VCCS is maximum; when the circuit is heavily loaded, the MP8 tube is opened, the MP9 tube is closed, the MP8 tube is opened in the linear region by adjusting the resistance ratio of the R7 branch, and the equivalent resistance R eq of the VCCS changes; when the circuit is heavily loaded, the MP8 and MP9 tubes are opened, the MP9 tube is connected in diode mode and is in the saturation region, and the equivalent resistance R eq of the VCCS is minimum.

8. The adaptive zero-trough compensation circuit for a linear voltage regulator of claim 7, wherein, When the circuit is lightly loaded, the equivalent resistance R eq is equal to: Circuit in the load time, the equivalent resistance R eq The value is: The equivalent resistance R eq is equal to: wherein, is the resistance value of the resistor R7, is the resistance value of the resistor R8, is the resistance value of the resistor R9, is the drain-source conductance of the MOS transistor, is the parallel symbol, is the drain-source conductance of the MP9, is the transconductance of the MP9.

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