System architecture reliability analysis method, device, equipment and medium

Abstract

The invention relates to a system architecture reliability analysis method and device, equipment and a medium. The method comprises the following steps: inputting a top event and system architecture information; establishing a system performance state model; adopting a performance index for judging a system state corresponding to the top event, and setting a judgment threshold value for a system performance working state according to the index; according to the input failure rate parameters and failure time distribution types of the devices, the states of the devices are randomly generated according to the reliability of the devices in a certain working time, and a system performance state model is repeatedly simulated and operated in a Monte Carlo simulation mode; the working state is judged according to the set judgment threshold value in each operation; and performing statistical analysis according to a simulation result to obtain a top event index. According to the method, the system performance state model is established, Monte Carlo is used for simulation, the model convenient to support and efficient in migration is established, the analysis and evaluation workload is remarkably reduced, and the efficiency is remarkably improved.

Description

Technical Field

[0001] The present invention belongs to the field of computer science and engineering technology, and particularly relates to a method, device, equipment and medium for analyzing the reliability of a system architecture. Background Art

[0002] In order to achieve specific functions and implement redundant design, all-electric aircraft often have complex system architectures. One of the main differences between different system architectures lies in different failure rate levels, and reliability analysis support is required for scheme evaluation and selection, which is very crucial. However, in a complex system architecture, the number of devices is large and the connection relationships between devices are complex, making it difficult to apply traditional reliability analysis methods. Therefore, there is an urgent need to propose a new reliability analysis method.

[0003] The prior art adopts fault tree analysis and failure mode and effects analysis (FMEA). Fault tree analysis is a deductive analysis method that analyzes from the top event (what kind of failure occurs) to the bottom event (the cause of the failure) through a logic diagram, and is used to show which components of the product, external events, or their combinations will cause a given failure of the product. According to the occurrence probabilities of each bottom event, using logic gates to combine various events, the occurrence probability of the top event, that is, the failure rate, can be calculated.

[0004] The FMEA method aims to analyze potential failure modes within the system scope, so as to classify them according to the severity level, or determine the impact of the failure on the system. The FMEA method analyzes from bottom to top how each underlying failure leads to the occurrence of the top event. However, it cannot be used to discover complex failure modes involving multiple failure problems, so it is not applicable to this requirement.

[0005] Fault tree analysis has problems such as a long analysis cycle for complex system architectures, incomplete analysis, and inability to conveniently and efficiently migrate models for comparative analysis of other alternative architectures with similarities. Since a complex system architecture usually consists of a relatively large number of components, the connection methods between components are complex, and often has multiple redundant designs. When using the fault tree analysis method for analysis, every possible failure situation that may cause system failure needs to be included in the fault tree. Since there are a huge number of combinations of failure situations leading to complex system failures, the number of branches of the fault tree to be drawn is numerous, and the analysis faces the problem of an overly long analysis time cycle. In addition, only by listing all possible failure situations and analyzing comprehensively in each situation can a comprehensive analysis be achieved, but in actual analysis, it is easy to miss some situations, especially high-order terms are easily overlooked. In addition, during the process of studying complex system architectures, it is often necessary to conduct comparative analysis of multiple alternative system architectures. Even if there are similarities between the architectures, using fault tree analysis requires separate repeated analysis for each alternative architecture, and it is impossible to conveniently and efficiently migrate models to study new architectures, further resulting in a huge workload. Summary of the Invention

[0006] In view of the technical problems in the prior art that the analysis time period required for quantifying and evaluating the failure rate by the traditional reliability analysis method for complex system architectures is too long, it is easy to miss situations, resulting in large errors, and it cannot be conveniently and quickly migrated to similar new architectures, the present invention provides a system architecture reliability analysis method, device, equipment and medium to overcome the existing defects.

[0007] A system architecture reliability analysis method, the method comprising:

[0008] S1. Input the top event and system architecture information;

[0009] S2. Establish a system performance state model;

[0010] S3. Adopt the performance index for judging the system state corresponding to the top event, and set the judgment threshold for the working state of the system performance according to the index;

[0011] S4. According to the failure rate parameters of each device and the failure time distribution type of each device input, and based on the reliability of each device at a certain working time, randomly generate the states of each device, and use the Monte Carlo simulation method to simulate and run the system performance state model multiple times. In each run, judge the working state according to the set judgment threshold;

[0012] S5. Statistically analyze the simulation results to obtain the top event index.

[0013] In the above-mentioned aspect and any possible implementation manner, a further implementation manner is provided. The system is an all-electric aircraft system, and the devices include one or more combinations of motors, fans, shaft connections, cables, motor controllers, busbars, batteries, and switches.

[0014] In the above-mentioned aspect and any possible implementation manner, a further implementation manner is provided. The system architecture information includes the architecture, the failure rate parameters of each device, and / or the failure time distribution type of each device.

[0015] In the above-mentioned aspect and any possible implementation manner, a further implementation manner is provided. S2 specifically includes: analyzing the system architecture to obtain the connection relationship between each device, and using formula calculation or conditional judgment to reflect the transmission process of energy and / or signals along a certain path in the system architecture, and generating the working state of this path.

[0016] In the above-mentioned aspect and any possible implementation manner, a further implementation manner is provided. The states of each device are generated by using a Mersenne Twister random number generator.

[0017] For the aspects and any possible implementation manners described above, a further implementation manner is provided, and S4 further includes: selecting a CPU or a GPU for parallel computing acceleration according to the computer conditions for running the simulation.

[0018] For the aspects and any possible implementation manners described above, a further implementation manner is provided, and specifically, S5 includes: after the simulation is completely finished, counting the number of failure and working states of the system, and calculating the occurrence probability of the top event.

[0019] The present invention further provides a system architecture reliability analysis device for implementing the method described above, and the device includes:

[0020] An input module for inputting the top event and system architecture information;

[0021] A building module for building a system performance state model;

[0022] A setting module for adopting the performance index for judging the system state corresponding to the top event, and setting a judgment threshold for the system performance working state according to the index;

[0023] A simulation module for randomly generating the states of each device according to the failure rate parameters of each input device and the failure time distribution type of each device, and based on the reliability of each device at a certain working time, and repeatedly simulating and running the system performance state model in a Monte Carlo simulation manner, and judging the working state according to the set judgment threshold during each run;

[0024] A statistical analysis module for statistically analyzing and obtaining the top event index according to the simulation results.

[0025] The present invention further provides an electronic device, and the electronic device includes:

[0026] A memory storing executable instructions;

[0027] A processor that runs the executable instructions in the memory to implement the method described above.

[0028] The present invention further provides a computer storage medium, and a computer program is stored on the medium, and the computer program is executed by a processor to implement the method described above.

[0029] Compared with the prior art, the present invention has the following beneficial effects:

[0030] The system architecture reliability analysis method of the present invention, the method comprising: inputting a top event and system architecture information; establishing a system performance state model; using the performance index for judging the system state corresponding to the top event, setting a judgment threshold for the system performance working state according to the index; according to the input failure rate parameters of each device and the failure time distribution type of each device, generating the state of each device randomly according to the reliability of each device at a certain working time, and simulating and running the system performance state model multiple times by means of Monte Carlo simulation, and judging the working state according to the set judgment threshold during each run; statistically analyzing the top event index according to the simulation results. The present invention establishes a system performance state model, uses Monte Carlo for simulation, establishes a model that supports convenient and efficient migration, significantly reduces the analysis and evaluation workload, and significantly improves the efficiency. The present invention can significantly reduce the manual workload of analysis and analyze system architectures that are difficult to analyze by traditional methods. The present invention can effectively ensure the accuracy of analysis and evaluation. When processing, only the top-level performance requirements need to be specified, and there is no need to enumerate detailed failure situations artificially. When the number of simulation times meets the convergence requirements, the analysis and evaluation results can be guaranteed to be very close to the theoretical values. At the same time, when it is necessary to compare and analyze multiple alternative architectures, the present invention only needs to modify the changed parts to adapt to the research of the new architecture, and can achieve convenient and efficient migration. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 is a schematic flowchart of the method of the present invention;

[0032] Figure 2 is a schematic diagram of the number of failures obtained by simulation of the present invention;

[0033] Figure 3 is a schematic diagram of the change of the failure rate with the increase of the number of simulations of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0034] For a better understanding of the technical solution of the present invention, the content of the present invention includes but is not limited to the following specific embodiments, and similar technologies and methods should be regarded as within the scope of protection of the present invention. To make the technical problems, technical solutions and advantages to be solved by the present invention clearer, the following will be described in detail with reference to the drawings and specific embodiments.

[0035] It should be clear that the embodiments described in the present invention are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative work belong to the scope of protection of the present invention.

[0036] The present invention provides a system architecture reliability analysis method, the method comprising: S1. Inputting a top event and system architecture information;

[0037] S2. Establish a system performance state model;

[0038] S3. Adopt the performance index for evaluating the system state corresponding to the top event, and set the judgment threshold for the working state of the system performance according to the index;

[0039] S4. According to the input failure rate parameters of each device and the failure time distribution type of each device, based on the reliability of each device at a certain working time, randomly generate the state of each device, and use the Monte Carlo simulation method to simulate and run the system performance state model multiple times. In each run, judge the working state according to the set judgment threshold;

[0040] S5. Statistically analyze the simulation results to obtain the top event index.

[0041] Further, the system is an all-electric aircraft system, and the devices include one or a combination of more of motors, fans, shaft connections, cables, motor controllers, busbars, batteries, and switches.

[0042] Further, the top event includes the architecture, the failure rate parameters of each device, and / or the failure time distribution type of each device.

[0043] Further, S2 specifically includes: analyzing the system architecture to obtain the connection relationship between each device, using formulas to calculate or conditional judgments to reflect the transmission process of energy and / or signals along a certain path in the system architecture, and generating the working state of this path.

[0044] Further, use the Mersenne Twister random number generator to generate the state of each device.

[0045] Further, S4 also includes: Select the CPU or GPU for parallel computing acceleration according to the computer conditions for running the simulation.

[0046] Further, S5 specifically includes: After all the simulations are completed, count the number of failure and working states of the system, and calculate the occurrence probability of the top event.

[0047] Specifically, the process of the present invention is as follows: The present invention includes processes such as inputting the top event and system architecture information, establishing a system performance state model, judging the state according to performance, Monte Carlo simulation, parallel computing acceleration, and statistically analyzing to obtain the top event index. The process flow of the processes is as Figure 1 shown:

[0048] To ensure the efficiency of dense matrix operations, the entire method uses the software MATLAB for numerical simulation and data processing.

[0049] Process 1: Input the top event and system architecture information. In this process step, for the top event to be analyzed, the scope of system architecture analysis is defined, and the failure probabilities of each device in the system and the different working times of each device are input. Among them, the top event refers to a failure mode to be analyzed, including but not limited to, such as "complete loss of thrust"; the system architecture includes information such as the failure probabilities of each device involved, the working times of each device, the failure time distribution types of each device, the composition and connection methods between devices, and the output of the system.

[0050] Process 2: Establish a system performance state model. The system performance state model refers to an expression of the system architecture described by using methods such as formula calculation and conditional judgment after analyzing the connection relationships between devices in the system. In this process, the connection relationships between devices are analyzed from the system architecture, and methods such as formula calculation and conditional judgment are used to reflect the transmission process of energy / signals along a certain path in the system architecture, and the working state of the path is generated. A specific path refers to a path where energy / signals pass through a combination of certain devices. If there are individual devices that do not work in these device combinations and this device is a single node, then this path is considered to be failed and energy / signals cannot be transmitted through this path. The working state refers to whether the devices on this path can transmit the input energy / signals to the output. If they can, it is considered that they are working; otherwise, it is considered that they are not working. Conditional judgments include but are not limited to, such as using multiplication calculation for the series relationship between devices obtained from the analysis of the architecture, and using addition calculation for the relationship where multiple paths converge into one path between devices obtained from the analysis of the architecture. The established system performance state model reflects the faults and their propagation effects on the system performance state. Among them, the generation of faults comes from the non-operation of devices in the system architecture. The manifestations of faults include but are not limited to a decrease in system performance. If it drops below the threshold, the system is considered not to work. In this step, only the system architecture is involved, which has nothing to do with the input top event, failure probability, working time, etc. According to the input system architecture, a formulaic description is made, and the resulting formula is the system performance state model. The system performance state model without substituting specific parameters and setting performance thresholds is obtained. This system performance state model will set performance thresholds in the following Process 3 as the judgment criterion for whether the system is working. This system performance state model will also substitute a set of device state combination values generated according to the failure probability, working time, etc. into each run of the Monte Carlo simulation in Process 4 to run the simulation.

[0051] Process 3: Set performance thresholds. In this process, the performance indicators corresponding to the top event's judged system state are adopted, and the judgment thresholds for the system's performance working state are established based on these indicators. In this process, the input top event is analyzed, and the performance threshold for judging the system state is set (for example, if the top event is thrust and the system fails when the thrust is less than 7, then the performance threshold is set to 7). The object of judgment is the performance indicator obtained in a certain simulation run. The specific judgment process is that if the system performance is greater than or equal to this performance threshold in a certain simulation run, it is considered that the system is working; if it is less than this performance threshold, it is considered that the system is not working. And the objects of working and failure are the system.

[0052] Construction and judgment of the system performance state model. The specific content is as follows:

[0053] Record the states of the 1st device, the 2nd device, up to the nth device on the i-th path as [x1, x2,..., x n , and the i-th path is a set of device combinations obtained after analysis. After a system architecture is fixed, it includes one or more paths, and each path needs to be described formulaically.

[0054] Among them, x j = 1 indicates that the device is working, x j = 0 indicates that the device has failed, and j belongs to 1 to n.

[0055] For those in which energy / signals are directly transmitted between devices on the path, it is considered to depend on the working states of all devices on this path. Then the state of the i-th path is X i = x1 * x2 *... * x n . Energy and / or signals are independent signals and can appear alone. It depends on the objects of performance requirements when analyzing different top events.

[0056] For those in which energy / signals are merged on the branch path, it is considered to depend on the working states of the devices on each branch path, and the devices between branches have no mutual influence. Then the state of the i-th path is X i = x1 + x2 +... + x n . A path can be divided into a main path and branch paths, which are all defined within a path system. The main path is unique and irreplaceable in a path system, and can extend into multiple branch paths, or branch paths converge into this path; the branch path is a path extended from the main path, guiding energy / resources to converge into the main path.

[0057] For the voting judgment of the energy / signal state, the if condition method is used for judgment. Then the state of the i-th path is X i = if([x1, x2,..., x n== conditions), where these conditions are obtained based on the analysis system architecture and the form can vary according to the specific content. For example, when X i is the main path, and x1, x2, …, x n are branch paths. When the branch paths merge into the main path, the main path is considered to be working only when the number of working branch paths is greater than or equal to 4. Then it is written as X i = if(sum(x1, x2, …, x n ) >= 4).

[0058] By synthesizing each path, the state of the system architecture [X1, X2, … X i , …] is obtained, where i is a positive integer and its value varies according to the specific architecture.

[0059] According to the system performance requirement threshold, it is judged whether the state of the system architecture belongs to working / failing.

[0060] Process Step 4: Conduct multiple Monte Carlo simulations. Use the randomly generated model parameters as inputs and run the system performance state model multiple times. In this process step, according to the input failure rate parameters of each device and the type of failure time distribution of each device, based on the reliability of each device at a certain working time, use the Mersenne Twister random number generator to generate the state of each device. Through the system performance state model for simulation. Among them, the generation process of the Mersenne Twister random number generator is specifically as follows: According to the input type of failure time distribution of each device, including typical distributions such as exponential distribution and Weibull distribution. Each distribution represents a variation law of the device failure rate with working time. Input the device failure rate parameter (such as lamda = 1e-5) and the working time parameter (such as t = 2h) into a type of failure time distribution (such as exponential distribution), and the corresponding reliability (such as R = exp(-lamda*t) = 0.99998) can be obtained. Next, use the Mersenne Twister random number generator to generate 1 and 0 in the ratio of 0.99998:0.00002, where 1 represents the device is working and 0 represents the device is not working. The object of the Monte Carlo simulation is the system performance state model, or it can be said to be the system itself; the result output by each simulation run is whether the system is working or not this time. Through multiple runs of the Monte Carlo simulation, the result is to obtain n times of system working and m times of system not working, where m and n are both integers; Process Step 3 only established the system performance state model and did not run it, and it is run here in Process Step 4; The implementation of the Monte Carlo simulation is to generate random numbers of 1 or 0 for each device through the previous Mersenne Twister random number generator and input them into the system performance state model. Each set of inputs corresponds to one execution of the system performance state model, and then a result is obtained. Repeat this for multiple sets of inputs. The main running time of this process step, the specific duration is determined according to the number of devices and the complexity of the system architecture. With the Mersenne Twister cycle being very long (reaching 219937 -1) It can be evenly distributed among the dimensions of 1 ≤ k ≤ 623. Among all pseudo-random number generator methods, except for statistically incorrect random number generators, the Mersenne Twister random number generator has the fastest speed and can generate high-quality random numbers, thus ensuring high precision of calculation results. Specifically, it can be achieved through the default settings of the rand() function in MATLAB. Process 4 also includes the option to set parallel computing acceleration. In this process, according to the computer conditions, choose CPU / GPU parallel computing to speed up the tool processing speed. If the number of CPU cores is large, then choosing CPU acceleration has a better effect; if the number of CUDA of the GPU is large, then choosing GPU acceleration has a better effect. This operation mode is used to reduce the time taken for Process 4. If the number of devices is small, this mode is not required. When performing parallel computing, when using CPU parallel operation, use the parfor statement to replace the for statement, which can be used to distribute loop operations without mutual dependencies to up to 250 cores, further improving efficiency; when using GPU parallel operation, use CUDA cores, create an array on the GPU with gpuArray, use the arrayfun function to calculate, and use the gather statement to collect the calculation results from the GPU and transfer them back to the CPU.

[0061] Process 5: Statistical analysis to obtain the top event index. This process is carried out after the Monte Carlo simulation loop is completed. The process of the loop is that each time the device state generated by the random number generator is input, the system performance state model is executed once, and one loop is completed. What is obtained each time the loop is completed is whether the system works or not under this set of input conditions, and the loop is carried out under different given input conditions. In this process, the number of failure / working states of the system is counted, that is, the simulation results are statistically analyzed. Each time the loop is completed, it is obtained whether the system works or not. After all the loops are completed, the proportion of the number of non-working times to the total number of loops is counted, and the probability of the top event occurrence can be obtained. Calculating the probability of the top event occurrence (system architecture failure rate) is specifically calculated according to the number of non-working times of the system. The failure rate lamda = the number of non-working times m / the total number of loops n. The proportion of the system not working (failure) is the probability of the top event occurrence.

[0062] For the use of high-efficiency algorithms in the case of dense matrix operations, high-efficiency matrix algorithms and parallel acceleration algorithms in MATLAB are used. Since the number of loops is often very large (such as 1e10 times), it is necessary to generate matrices of huge scale, and operations such as addition and multiplication need to be performed between matrices. The matrix algorithms and parallel acceleration algorithms are used in the Monte Carlo simulation in Process 4.

[0063] In summary, the present invention first establishes a system performance state model, and then adopts the core process of the Monte Carlo simulation model. The system performance state model describes the system architecture logic according to the energy / signal transmission path, selects the MATALAB language according to the characteristics of dense matrix operations, and performs parallel operations using the CPU / GPU, etc., so that the present invention does not need to analyze and list a large number of failure cases as in the traditional solution. The present invention is proposed to overcome the technical problem that the analysis time period required for quantifying the failure rate by the traditional reliability analysis method for complex system architectures is too long, and realizes the effect of significantly reducing the analysis and evaluation workload and significantly improving the efficiency. Aiming at the traditional reliability analysis method that requires a huge amount of work, even difficult to achieve, to complete the analysis of each failure case, the present invention significantly reduces the manual workload of analysis through the above processes, and can analyze system architectures that are difficult to analyze by traditional methods. Moreover, the present invention can effectively ensure the accuracy of analysis and evaluation. The traditional reliability analysis method is prone to omission, resulting in a large error in the analysis result, especially prone to ignoring high-order terms. The present invention only needs to specify the top-level performance requirements (that is, the performance requirements corresponding to the top event. For example, the top event is the complete loss of thrust, and the corresponding thrust is less than 7, which is the top-level performance requirement), and does not need to manually enumerate detailed failure cases. When the number of simulation times meets the convergence requirement, it can ensure that the analysis and evaluation result is very close to the theoretical value.

[0064] Meanwhile, when it is necessary to conduct comparative analysis on multiple alternative architectures, the present invention only needs to modify the changed parts. Due to the architecture change, the input system architecture information changes. In this case, only the system performance state model of process two needs to be modified to adapt to the research on the new architecture, and convenient and efficient migration can be achieved. The objects of migration are the model and the analysis conclusion. The new architecture has similar equipment compositions as the original architecture, and parameters such as the failure rate and working time of the equipment remain the same, only some changes occur in the connection relationship.

[0065] The following uses specific embodiments for illustration:

[0066] Embodiment

[0067] The present invention evaluates the reliability of two alternative system architectures of a certain type of all-electric aircraft distributed electric propulsion system. The architecture formed by the battery system, power distribution line, and electric drive system in the all-electric aircraft is collectively referred to as the distributed electric propulsion system architecture. Both of the two alternative architecture solutions use five batteries to provide energy, drive a total of ten groups of electric drive systems on the left and right sides through the power distribution line, and provide the thrust required for the aircraft. To meet the indicators such as the climb rate during the aircraft climb phase, it is required that the power grid architecture provides the thrust of at least seven motors. The difference between the two solutions lies in the different power distribution lines. The following describes the reliability analysis and evaluation of alternative architecture one. After the analysis, the application of this method is also adopted for alternative architecture two to illustrate the advantages of convenient and efficient migration of the present invention.

[0068] For the first alternative architecture, in order to improve the reliability of the distributed electric propulsion system, a redundant design is adopted, that is, two output switches are set for each battery, and each switch supplies power to one of the motor controllers of a set of electric drive systems on the left and right sides respectively. One battery supplies power to one of the motor controllers of four sets of electric drive systems at symmetrical positions on both sides. At the same time, since each motor is connected to two motor controllers, when a normally operating motor is connected to two normally operating motor controllers, it outputs 100% thrust, and when a normally operating motor is connected to one normally operating motor controller, it outputs 50% thrust.

[0069] The present invention adopts the following procedures to process the first alternative architecture, including: Procedure 1: Input the top event and system architecture information; Procedure 2: Establish a system performance state model; Procedure 3: Judge according to the performance state; Procedure 4: Conduct multiple simulations by Monte Carlo; Procedure 5: Accelerate parallel computing; Procedure 6: Obtain the top event index through statistical analysis.

[0070] Procedure 1: Input the top event and system architecture information. First, list the top event as "loss of thrust of any three or fewer motors", and input all the devices in the power grid architecture, including 10 motors, 10 fans, 10 shaft connections, 60 type-a cables, 10 type-b cables, 20 motor controllers, 10 busbars, 5 batteries, and 10 switches, a total of 145 device names and the failure rate parameters of each device. That is, the system architecture information includes the names and failure rate parameters of each device.

[0071] Procedure 2: Establish a system performance state model. From the energy transmission logic and flow path in the power grid architecture, the following formula can be obtained:

[0072] Taking thrust as the performance index, the following expression is the system performance state model. This expression is obtained by sorting out and analyzing the transmission logic and flow path.

[0073] Thrust of the nth motor = 1 / 2 * (the state of the first battery corresponding to the nth motor * the state of the corresponding switch of the first battery of the nth motor * the state of the corresponding busbar of the first battery of the nth motor * the state of the corresponding type B cable of the first battery of the nth motor * the state of the first motor controller corresponding to the nth motor * the state of the first type A cable corresponding to the nth motor * the state of the second type A cable corresponding to the nth motor * the state of the third type A cable corresponding to the nth motor * the state of the shaft connection corresponding to the nth motor * the state of the fan corresponding to the nth motor * the state of the motor corresponding to the nth motor) + 1 / 2 * (the state of the second battery corresponding to the nth motor * the state of the corresponding switch of the second battery of the nth motor * the state of the corresponding busbar of the second battery of the nth motor * the state of the corresponding type B cable of the second battery of the nth motor * the state of the second motor controller corresponding to the nth motor * the state of the fourth type A cable corresponding to the nth motor * the state of the fifth type A cable corresponding to the nth motor * the state of the sixth type A cable corresponding to the nth motor * the state of the shaft connection corresponding to the nth motor * the state of the fan corresponding to the nth motor * the state of the motor corresponding to the nth motor)

[0074] The thrust of the nth motor may be equal to 1, 1 / 2, or 0. Being equal to 1 means the path is working properly and this motor outputs 100% thrust; being equal to 1 / 2 means the path is partially working and this motor outputs 50% thrust; being equal to 0 means the path fails and this motor does not output thrust.

[0075] Process Step 3: Set the performance threshold. In this process step, analyze the input top event and set the performance threshold for judging the system state. Here, the top event is failure when the thrust is less than 7, so the performance threshold is set to 7.

[0076] Process Step 4: Conduct multiple Monte Carlo simulations. Use the Monte Carlo method with a Mersenne Twister random number generator to generate 0 or 1 for the performance state of each device according to the reliability of each device over a certain working time. Conduct one simulation through the system performance state model. After judgment, it can be obtained whether the system is working or failed, that is, substitute 1 or 0 representing the state of each device into the system performance state model for calculation to conduct one simulation. Each time different inputs are substituted and the system performance state model is executed multiple times, the Monte Carlo can be realized. Repeat multiple times to conduct multiple success - failure type tests until the results converge. In this process step, it is preferably set that the number of loops is 4.8E10 times.

[0077] Process Step 5: Parallel computing for acceleration. Since each Monte Carlo simulation is independent, parallel computing is used for acceleration processing. Select the CPU or GPU for acceleration according to the computer conditions. If the computer has more CPU cores, select CPU acceleration; if the computer's GPU contains more CUDA cores, select GPU acceleration.

[0078] Process Step 6: Statistical analysis to obtain the top event indicators. After all cycles are completed, the test data is processed, recorded after each cycle, and statistically analyzed after all cycles are completed. By calculating the proportion of the total number of failures, the estimated failure rate indicator of the distributed electric propulsion system architecture can be obtained, which is specifically calculated based on the number of times the system does not work. Failure rate lamda = number of times the system does not work m / total number of cycles n. The proportion of the system not working (failure) is the occurrence probability of the top event.

[0079] The method of the present invention has been verified for the system architecture, indicating that the calculated architecture reliability indicators are reasonable. Among them, to ensure that the number of cycles meets the convergence requirements and satisfies the law of large numbers, the number of failures obtained from the simulation test with 500 cycles and each cycle having 1.08*1E8 is as Figure 2 shown. The distribution of the number of failures is close to a normal distribution. After fitting, it is N(10.0880, 3.3067). Plotting the positions of ±3σ on the graph, as shown by the vertical dotted lines in Figure 2 , it can be obtained that the experimental data is distributed within ±3σ, indicating that 5.4e10 cycles have ensured that the simulation results are relatively convergent. Plotting the change of the failure rate with the increase in the number of simulation times as Figure 3 shown. The curve is relatively stable when the number of simulation times is large, indicating that the test results are convergent. The calculation results of 5.4E10 (5.4e10 = 500*1.08e8) times are highly credible and relatively close to the theoretical value.

[0080] After completing the analysis and evaluation of Alternative Architecture 1, the present invention is applied to the analysis and evaluation of Alternative Architecture 2. Since the types and numbers of devices in the two architectures are the same, only the power distribution scheme is different, so the second process step is modified accordingly. In Alternative Architecture 2, each battery has two output switches, and each switch supplies power to the two motor controllers of each group of electric drive systems at symmetrical positions on the left and right sides at the same time. In the second process step, by sorting out the energy transmission logic and flow path in the distributed electric propulsion system architecture, there is no need to modify the formula for calculating the thrust of the nth motor, but only the corresponding relationship needs to be modified. For example, when analyzing Architecture 2, modify the corresponding logic in the second process step, such as replacing some device numbers, to express the change in the connection relationship, and then the simulation test can be carried out to analyze and evaluate the reliability of Alternative Architecture 2. This reflects the advantages of convenience and high efficiency of the present invention, which can be applied to similar alternative architectures with only individual modifications.

[0081] As an embodiment disclosed by the present invention, the present invention also provides a system architecture reliability analysis device for implementing the above method. The device includes:

[0082] An input module for inputting the top event and system architecture information;

[0083] A building module for building a system performance state model;

[0084] A setting module, configured to adopt the performance index of the judgment system state corresponding to the top event, and set a judgment threshold for the working state of the system performance according to the index;

[0085] A simulation module, configured to generate the states of each device randomly according to the failure rate parameters of each input device and the failure time distribution type of each device, and based on the reliability of each device at a certain working time, and perform multiple simulation runs on the system performance state model in the way of Monte Carlo simulation, and perform a judgment on the working state according to the set judgment threshold during each run;

[0086] A statistical analysis module, configured to statistically analyze and obtain the top event index according to the simulation results.

[0087] As an embodiment disclosed by the present invention, the present invention further provides an electronic device, which includes:

[0088] A memory, storing executable instructions;

[0089] A processor, the processor runs the executable instructions in the memory to implement the method.

[0090] As an embodiment disclosed by the present invention, the present invention further provides a computer storage medium, on which a computer program is stored, and the computer program is executed by a processor to implement the method.

[0091] The terms used in the embodiments of the present invention are only for the purpose of describing specific embodiments, and are not intended to limit the present invention. The singular forms of "a", "the" and "said" used in the embodiments of the present invention and the appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise.

[0092] The above description shows and describes several preferred embodiments of the present invention. However, as mentioned above, it should be understood that the present invention is not limited to the forms disclosed herein, should not be regarded as excluding other embodiments, but can be used in various other combinations, modifications and environments, and can be changed within the scope of the application concept described herein through the above teachings or the technology or knowledge in the relevant field. And the changes and modifications made by those skilled in the art without departing from the spirit and scope of the present invention shall fall within the protection scope of the appended claims of the present invention.

Claims

1. A system architecture reliability analysis method, characterized in that: The method comprises: S1. Input the top event and system architecture information; S2. Establish system performance status model; S3. Using the performance indicators corresponding to the top events to judge the system status, according to the indicators set the threshold for judging the performance of the system working state; S4. According to the input failure rate parameters of each device and the failure time distribution type of each device, according to the reliability of each device at a certain working time, the state of each device is randomly generated, and the system performance state model is simulated and operated multiple times by Monte Carlo simulation. In each operation, the working state is judged according to the set judgment threshold; S5. Obtain the top event index based on the statistical analysis of the simulation results.

2. The method according to claim 1, characterized in that The system is an all-electric aircraft system, and the equipment includes a combination of one or more of a motor, a fan, a shaft connection, a cable, a motor controller, a bus bar, a battery, and a switch.

3. The method according to claim 2, characterized in that The system architecture information includes architecture, failure rate parameters of each device and / or failure time distribution type of each device.

4. The method according to claim 1, characterized in that: S2 specifically includes: analyzing the system architecture to obtain the connection relationship between various devices, using formula calculation or conditional judgment to reflect the transmission process of energy and / or signals along a certain path in the system architecture, and generating a working status about the path.

5. The method according to claim 1, characterized in that The Mersenne Twister random number generator is used to generate the status of each device.

6. The method according to claim 1, characterized in that S4 also includes: selecting a CPU or a GPU for parallel computing acceleration according to the computer conditions for running the simulation.

7. The method according to claim 1, characterized in that The S5 specifically includes: after all simulations are completed, counting the number of failures and working states of the system, and calculating the probability of occurrence of the top event.

8. A system architecture reliability analysis device, characterized in that: The device is used to implement the method according to any one of claims 1 to 7, and the device comprises: An input module, used to input top events and system architecture information; Establishing a module for establishing a system performance status model; A setting module, used to use the performance index corresponding to the top event to judge the system status, and set a judgment threshold for the system performance working status according to the index; The simulation module is used to randomly generate the status of each device according to the input failure rate parameters of each device and the failure time distribution type of each device, according to the reliability of each device during a certain working time, and to simulate and run the system performance status model multiple times using the Monte Carlo simulation method, and to judge the working status according to the set judgment threshold in each operation; The statistical analysis module is used to obtain the top event index based on the statistical analysis of the simulation results.

9. An electronic device, characterized in that: The electronic device comprises: A memory storing executable instructions; A processor, wherein the processor runs the executable instructions in the memory to implement the method according to any one of claims 1 to 7.

10. A computer storage medium, characterized in that: The medium stores a computer program, and the computer program is executed by a processor to implement the method according to any one of claims 1 to 7.

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