A method, apparatus, device, and medium for fusing a layout of a semiconductor device

Abstract

The application relates to the technical field of layout design, and discloses a fusion method, device and equipment of a layout of a semiconductor device and a medium, the method comprising the following steps: acquiring a first simulation engineering file and a second simulation engineering file; determining a target layer layout based on preset hierarchical information of two-layer layouts; acquiring mapped position information of a target graphic element and mapped position information of a third graphic element from position information of the target graphic element and position information of the third graphic element according to a preset correlation; and determining layout position information of a third layer layout in the target layer layout according to the mapped position information of the target graphic element and the mapped position information of the third graphic element, and importing the third layer layout into the target layer layout according to the layout position information. The method ensures accurate superposition of elements of different layer layouts and solves problems such as interlacing and misplacement.

Description

Technical Field

[0001] This application relates to the field of layout design technology, specifically to a method, apparatus, device, and medium for integrating the layout of a semiconductor device. Background Technology

[0002] Currently, in the field of semiconductor device layout design, the GDS (Graphic Data System) file format, as a standard binary file format, is widely used in chip layout design, carrying key data such as the geometric information, hierarchical structure, and circuit connections of the chip design. The universality of GDS files makes them a bridge between design, manufacturing, and testing stages, ensuring the accurate transmission and implementation of design information. However, with increasing design complexity, traditional manual inspection and correction methods are gradually revealing their inefficiency and error-proneness during the integration of semiconductor device layouts. This is especially true when manually checking line segment splicing, which can easily lead to errors and affect the performance and reliability of semiconductor devices. Summary of the Invention

[0003] This application provides a method, apparatus, device, and medium for integrating the layout of semiconductor devices to solve the problem of how to accurately and efficiently integrate the layout of semiconductor devices.

[0004] This application provides a method for integrating the layout of a semiconductor device, the method comprising:

[0005] Obtain the first simulation project file, which includes a first layer layout and a second layer layout. The first layer layout includes at least one first graphic element, and the second layer layout includes at least one second graphic element.

[0006] When the first fusion instruction is received, the second simulation project file is obtained. The second simulation project file includes a third layer layout, and the third layer layout includes at least one third graphic element.

[0007] When the first fusion instruction indicates that the third layer layout is imported in a preset non-overlapping import method, the first layer layout or the second layer layout is determined as the target layer layout based on the preset hierarchical information of at least two layers layout, and the position information of at least one target graphic element and the position information of at least one third graphic element are obtained. The hierarchical information of the target layer layout and the third layer layout are the same.

[0008] According to the preset association relationship, the position information of at least one mapped target graphic element and the position information of at least one mapped third graphic element are obtained from the position information of at least one target graphic element and the position information of at least one third graphic element, respectively. The preset association relationship indicates the mapping relationship between at least one first target graphic element and at least one second target graphic element.

[0009] Based on the position information of at least one target graphic element and the position information of at least one third graphic element in the mapping, the layout position information of the third layer layout in the target layer layout is determined, and the third layer layout is imported into the target layer layout according to the layout position information.

[0010] This application also provides a layout fusion apparatus for semiconductor devices, comprising:

[0011] The first acquisition module is used to acquire a first simulation project file. The first simulation project file includes a first layer layout and a second layer layout. The first layer layout includes at least one first graphic element, and the second layer layout includes at least one second graphic element.

[0012] The second acquisition module is used to acquire the second simulation project file when the first fusion instruction is received. The second simulation project file includes a third layer layout, and the third layer layout includes at least one third graphic element.

[0013] The determination module is used to determine the first layer layout or the second layer layout as the target layer layout based on the preset hierarchical information of at least two layers layout when the first fusion instruction indicates that the third layer layout is imported in a preset non-overlapping import method. The module also obtains the position information of at least one target graphic element and the position information of at least one third graphic element. The hierarchical information of the target layer layout and the third layer layout are the same.

[0014] The third acquisition module is used to acquire, according to a preset association relationship, the position information of at least one mapped target graphic element and the position information of at least one mapped third graphic element from the position information of at least one target graphic element and the position information of at least one third graphic element, respectively. The preset association relationship indicates the mapping relationship between at least one first target graphic element and at least one second target graphic element.

[0015] The import module is used to determine the layout position information of the third layer layout in the target layer layout based on the position information of at least one target graphic element and the position information of at least one third graphic element, and to import the third layer layout into the target layer layout according to the layout position information.

[0016] This application also provides an electronic device, including: a memory for storing a computer program; and a processor for executing the computer program to implement the steps of the layout fusion method of any of the above-described semiconductor devices.

[0017] This application also provides a computer-readable storage medium storing a computer program, wherein when the computer program is executed by a processor, it implements the steps of the layout fusion method of any of the above-described semiconductor devices.

[0018] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of the layout integration method for any of the above-described semiconductor devices.

[0019] This application significantly improves design and correction efficiency by reducing the need for manual intervention through an automated fusion process. Compared to traditional manual inspection and modification methods, this method can complete complex layout fusion in a short time. Utilizing pre-defined relationships ensures the accuracy of mapping and positional relationships between layout elements, avoiding positional errors or improper splicing that can occur due to manual operation, thereby improving the controllability and reliability of semiconductor device performance. Through reasonable graphical element mapping and layer information processing, compatibility and consistency between different layouts can be ensured, avoiding fusion problems caused by differences between layers. It ensures the precise overlay of layout elements from different layers, resolving issues such as interleaving and misalignment. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0021] Figure 1 This is one of the flowcharts for a method of integrating the layout of semiconductor devices according to an embodiment of this application;

[0022] Figure 2 This is a second flowchart of a method for integrating the layout of semiconductor devices according to an embodiment of this application;

[0023] Figure 3 This is the third flowchart of a method for integrating the layout of semiconductor devices according to an embodiment of this application;

[0024] Figure 4 This is a schematic diagram of a fusion apparatus for a semiconductor device layout according to an embodiment of this application;

[0025] Figure 5 This is a schematic diagram of the hardware structure of a computer device according to an embodiment of this application. Detailed Implementation

[0026] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0027] It should be noted that in the description of this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. The terms "first," "second," etc., in this application are used to distinguish similar objects and are not used to describe a specific order or sequence. According to an embodiment of this application, a method embodiment for integrating the layout of a semiconductor device is provided. It should be noted that the steps shown in the flowcharts of the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions, and although a logical order is shown in the flowcharts, in some cases, the steps shown or described may be performed in a different order than that shown here.

[0028] This embodiment provides a method for integrating the layout of semiconductor devices, which can be used in servers. Figure 1 This is one of the flowcharts for a method of integrating the layout of semiconductor devices according to an embodiment of this application, such as... Figure 1 As shown. The method includes:

[0029] Step S101: Obtain the first simulation project file.

[0030] The first simulation project file includes a first-layer layout and a second-layer layout. The first-layer layout includes at least one first graphic element, and the second-layer layout includes at least one second graphic element.

[0031] The elements in the layout are important components in semiconductor chip design, representing different parts of the circuit, such as wires and transistors.

[0032] Step S102: When the first fusion command is received, the second simulation project file is obtained.

[0033] The second simulation project file includes a third-layer layout. The third-layer layout includes at least one third-layer graphic element.

[0034] When the system receives the first fusion command, it retrieves the second simulation project file. This file contains a third-layer layout, indicating that the introduction of the third-layer layout is triggered by the fusion command during the fusion operation.

[0035] Step S103: When it is determined that the first fusion instruction indicates that the third layer layout is imported in a preset non-overlapping import method, the first layer layout or the second layer layout is determined as the target layer layout according to the preset layer information of at least two layers layout, and the position information of at least one target graphic element and the position information of at least one third graphic element are obtained.

[0036] The target layer map has the same hierarchical information as the third layer map.

[0037] When the confirmation command requests the import of the third-layer layout using a preset non-overlapping import method, the system determines the target-layer layout based on its layer information. The target-layer layout refers to a layout with the same layer information as the third-layer layout, and can be either a first-layer or second-layer layout. The system obtains the position of at least one graphic element in the target-layer layout, as well as the position of graphic elements in the third-layer layout.

[0038] Step S104: According to the preset association relationship, obtain the position information of at least one mapped target graphic element and the position information of at least one mapped third graphic element from the position information of at least one target graphic element and the position information of at least one third graphic element, respectively.

[0039] The preset association indicates the mapping relationship between at least one first target graphic element and at least one second target graphic element.

[0040] Based on predefined associations, the system maps graphic elements in the target layer layout to graphic elements in the third layer layout. These predefined associations specify which graphic elements have corresponding relationships and can be interacting components from different layers. At least one target graphic element and at least one third graphic element are mapped, thus determining the relationship between them.

[0041] Step S105: Based on the position information of at least one mapped target graphic element and the position information of at least one mapped third graphic element, determine the layout position information of the third layer layout in the target layer layout, and import the third layer layout into the target layer layout according to the layout position information.

[0042] Based on the mapping relationship, the system determines how to accurately import the third-layer layout into the target-layer layout. Using the layout position information, i.e., the coordinates of each graphic element, the system imports the third-layer layout into the target-layer layout at the determined positions. This step ultimately completes the import process of the third-layer layout, ensuring accurate alignment and compliance with design requirements.

[0043] This application provides a method for merging semiconductor device layouts. Through an automated merging process, it reduces the need for manual intervention and significantly improves design and correction efficiency. Compared to traditional manual inspection and modification methods, this method can complete complex layout merging in a short time. Utilizing pre-defined relationships, it ensures the accuracy of mapping and positional relationships between layout elements, avoiding positional errors or improper splicing that can occur due to manual operation, thereby improving the controllability and reliability of semiconductor device performance. Through reasonable graphical element mapping and layer information processing, it ensures compatibility and consistency between different layouts, avoiding merging problems caused by differences between layers. It ensures the precise superposition of layout elements from different layers, avoiding problems such as interleaving and misalignment.

[0044] In one alternative implementation, to further accurately merge the two-layer layout, Figure 2 This is a second flowchart of a method for integrating the layout of semiconductor devices according to an embodiment of this application, as shown below. Figure 2 As shown. After obtaining the first simulation project file, it also includes:

[0045] Step S201: When the second fusion instruction is received, the position information of at least one first graphic element and at least one second graphic element is obtained, and based on the position information of at least one first graphic element and at least one second graphic element, at least one pair of overlapping first graphic elements and second graphic elements, at least one non-overlapping first graphic element and at least one non-overlapping second graphic element are determined.

[0046] In this step, the positional information of graphic elements in the first and second layer layouts is obtained through the second fusion instruction. First, the positional information of the first and second graphic elements is acquired, and this information is used to identify the overlapping and non-overlapping relationships between the two types of elements. Overlapping graphic elements refer to graphic elements in the first and second layer layouts that overlap in position. Non-overlapping graphic elements refer to graphic elements in the first and second layer layouts that do not overlap.

[0047] Step S202: Based on the position information of at least one pair of overlapping first graphic elements and second graphic elements, fuse at least one pair of overlapping first graphic elements and second graphic elements to generate at least one fused graphic element, and a mapping relationship between at least one fused graphic element and at least one pair of overlapping first graphic elements and second graphic elements.

[0048] In this step, a fusion operation is performed based on overlapping graphic elements. After identifying at least one pair of overlapping first and second graphic elements, the system fuses the graphic elements based on their positional relationship. This fusion produces a merged graphic element, a new graphic element representing the element extracted and synthesized from the overlapping first and second graphic elements. A mapping relationship is generated, that is, the relationship between these merged graphic elements and the original overlapping graphic elements.

[0049] Step S203: Based on the mapping relationship and the position information of at least one pair of overlapping first and second graphic elements, at least one fused graphic element is added to the first or second layer layout, and at least one pair of overlapping first and second graphic elements is removed from the first and second layer layouts.

[0050] In this step, the merged graphic elements are added back to the original layout, and overlapping original elements are deleted. Based on the aforementioned mapping relationship, the system inserts the merged graphic elements into the first or second layer of the layout. Original graphic elements that were merged during the merging process (i.e., overlapping first and second graphic elements) are deleted.

[0051] The method provided in this embodiment avoids manual operation through an automated graphic element fusion process, reducing errors and time consumption caused by human intervention. By fusion of overlapping elements, redundant designs can be removed, resulting in a simpler and clearer layout, and unnecessary repetition is avoided. Precise calculation of positional information ensures that the fused graphic elements are accurately added to the original layout, preventing misalignment or deviation in layout splicing. It ensures that graphic elements between the first and second layers are effectively connected and merged according to design requirements, thereby improving the overall consistency of multi-layered designs. Since the system automatically records the mapping relationship of fused elements, it facilitates easier tracing and modification of fused elements if subsequent adjustments or corrections are needed.

[0052] In one optional implementation, step S202 includes:

[0053] Based on the positional information of at least one pair of overlapping first and second graphic elements, the path information of the at least one pair of overlapping first and second graphic elements is determined. Based on the path information, the at least one pair of overlapping first and second graphic elements is converted into a polygon point set, which includes multiple points. The coordinates of the multiple points are obtained to form the coordinate set of the polygon point set. An OR operation is performed on the coordinates in the coordinate set to obtain the merged polygon point set. The merged polygon point set is converted into at least one fused graphic element.

[0054] In this embodiment, path information refers to data such as the boundary, curve, or path of each graphic element, which can be used to describe the specific shape of the graphic element. The system determines the path information of at least one pair of overlapping first and second graphic elements based on their positional information. Path information can be specific to the outline, edge, or path point coordinates of each graphic element, and can include straight line segments, curves, closed shapes, etc. Using the path information, overlapping graphic elements are transformed into polygon point sets. A polygon point set is a collection of multiple coordinate points that describe the boundary of the graphic. The path of each overlapping graphic element is converted into a series of points (coordinates), which represent the outline of the graphic. After obtaining the coordinates of these multiple points, the system performs an OR operation on them. Merging these polygonal regions through geometric operations is equivalent to performing a union operation on the graphics, merging the regions of two overlapping graphics into one.

[0055] The method provided in this embodiment, through a merging operation based on path information and coordinate point sets, can accurately fuse overlapping graphic elements, rather than simply superimposing them. This avoids potential splicing errors and ensures the accuracy of the new graphic elements. Since the merged graphic elements are calculated based on specific path information and coordinate point sets, the final layout is more compact and concise, avoiding the appearance of duplicate elements. By merging polygons, redundant areas can be removed, improving the efficiency of design space utilization. Using path information to convert into polygon point sets before merging can effectively handle the overlap of complex graphic elements, especially for elements with complex shapes, where traditional merging methods may result in errors or processing difficulties.

[0056] In an optional implementation, after step S102, the method further includes:

[0057] When the first fusion instruction indicates that the third-layer layout should be imported using a preset overlapping import method, the preset import position of the third-layer layout indicated by the overlapping import method is obtained. Based on the preset import position of the third-layer layout, the third-layer layout is imported into the preset import position in the first simulation project file.

[0058] In this embodiment, when performing the import operation, the system first determines the location where the third-layer layout should be imported based on user instructions or preset rules. Overlapping import methods can be implemented through an automated process or manual settings to indicate this location. Preset import location: This is a fixed location predefined by the system, typically a specific area or coordinate in the design. The determination of the import location can be based on the needs of the graphic design, ensuring correct alignment and reasonable layout of the graphics within the design layout. Based on the obtained preset import location, the third-layer layout will be precisely imported to that location. The import operation involves not only copying the graphic data to the file but also adjusting the position to ensure the third-layer layout is in the correct spatial position in the first simulation project file. This step ensures a clear relationship between the third-layer layout and the first or second-layer layout, preventing misalignment or overlap, thus making the hierarchical relationship of the project file more standardized.

[0059] The method provided in this embodiment, by setting a preset import position, ensures that each layer of the layout does not unexpectedly shift or become disordered during the import process, which is especially important for complex designs. Designers can precisely control the positional relationship of each layer of the layout, guaranteeing the final design effect. This method provides an automated import process that adjusts according to the position indicated by the import method, reducing errors and complexity associated with manual operations. Designers can select different import methods as needed and quickly and accurately complete the layout import according to preset rules.

[0060] In one alternative implementation, the position information of the second graphic element includes: the edge position and center position of the third layer layout.

[0061] Step S105 includes: obtaining the edge and center positions of the target layer layout, and determining the distance between the first and third layer layouts based on the edge and center positions of the target layer layout and the third layer layout. Determining the position information of the third layer layout within the target layer layout based on the edge and center positions of the target layer layout and the distance. Importing the third layer layout into the target layer layout of the first simulation project file based on the position information of the third layer layout within the target layer layout.

[0062] In this embodiment, the edge position refers to the intersection of the four edges of the layout with the coordinate system, typically representing the outermost boundary of the layout. The center position is the geometric center of the layout, usually the midpoint of its length and width, and is a key reference for layout and alignment. Based on the edge and center positions of the target layer layout and the third layer layout, the system can calculate the relative position between these two layouts. Using this positional data, the precise distance between the layouts can be determined. This distance can be a horizontal distance, a vertical distance, or a combination of both.

[0063] The method provided in this embodiment, by utilizing edge and center positions for precise calculations, ensures that the layout will not be misaligned during import, avoiding errors caused by manual adjustments. The accuracy of alignment improves design precision, allowing layouts at different levels to be combined in the most reasonable way. This method ensures that the hierarchical structure of the layout is well maintained in multi-layered designs. The relative positions of each layer are clear and stable, avoiding design chaos caused by improper import.

[0064] In one optional implementation, after obtaining the first simulation project file, the method further includes:

[0065] Upon receiving the third fusion instruction, the first-layer layout and / or the second-layer layout are divided into N image segments, where N is a positive integer. After modifying the N image segments, the position information of the modified N image segments is recorded. The preset position information of the modified N image segments indicated by the overlapping import method is obtained. Based on the preset position information of the modified N image segments, the modified N image segments are imported into the third simulation project file.

[0066] In this embodiment, upon receiving the third fusion command, the system divides the previously obtained first-layer and / or second-layer layout into multiple layout segments. These layout segments can be multiple small regions or specific design blocks, depending on the command. The number of divisions is represented by N (a positive integer). The value of N represents the number of layout divisions. For example, if N = 4, the layout is divided into 4 segments, each with its own independent location information and design content. Each divided layout segment can be modified by the user or the system. These modifications can include geometric adjustments, layout optimizations, design changes, etc. Each layout segment can be processed independently, maintaining flexibility in the modification process. The modified layout segments will have their modified location information recorded to ensure accurate backtracking and locating of the updated position of each layout segment in subsequent operations. The system obtains the preset location information of the N modified layout segments according to preset import rules or the design requirements of the target project. This location information is set according to the design requirements in the target file, ensuring that each layout segment can be accurately placed in the corresponding position in the simulation project.

[0067] The method provided in this embodiment divides the layout into multiple segments, allowing users to independently modify each segment, thus improving design flexibility. Each modified segment can be adjusted according to specific needs, flexibly responding to changes that occur during the design process. The system supports independent operations on different layout segments, saving design time and enabling rapid response to changes in design requirements. By recording and using the position information of the modified layout segments, as well as obtaining preset import position information, it ensures that each segment is accurately placed in the target position during import. This precise import process avoids displacement or overlap issues, improving the overall accuracy of the import. After importing multiple layout segments into the third simulation project file, layout management becomes more refined and hierarchical. Different design segments can be reasonably positioned and managed in a unified simulation file, improving the manageability and maintainability of the simulation project.

[0068] In one optional implementation, after obtaining the first simulation project file, the method further includes:

[0069] Receive the initial fusion command. Parse the initial fusion command. If the initial fusion command indicates fusion of the first layer layout and the second layer layout, then the initial fusion command is determined to be the first fusion command. Alternatively, if the initial fusion command indicates obtaining the second simulation project file, then the initial fusion command is determined to be the second fusion command. Alternatively, if the initial fusion command indicates splitting the first layer layout and / or the second layer layout, then the initial fusion command is determined to be the third fusion command.

[0070] In this embodiment, the system merges the first and second layer layouts: When an instruction indicates the need to merge the first and second layer layouts, the system recognizes it as a first merging instruction and performs a layout merging operation accordingly. It also acquires a second simulation project file: If the instruction requests the acquisition of a second simulation project file, the system recognizes it as a second merging instruction and performs the corresponding operation, which may be merging or loading the contents of the second simulation project file. Finally, it splits the first and / or second layer layouts: When an instruction requires splitting an existing layout, the system recognizes it as a third merging instruction and performs a splitting operation on the layout according to the instruction, generating multiple sub-regions or fragments.

[0071] The method provided in this embodiment, through the parsing and processing of different types of fusion instructions (first, second, and third fusion instructions), enables the system to flexibly respond to various design requirements. This flexibility ensures that different operations can meet diverse engineering needs, thereby supporting more complex design operations. By parsing the initial fusion instruction and automatically executing the corresponding fusion or split operation, the complexity of manual operations is reduced, and the level of automation is improved. Simultaneously, since each operation is precisely parsed by the system, the efficiency and accuracy of the operation are ensured. Different types of fusion and split instructions enable efficient management of the layout. By splitting or fusion the layout, the system can effectively adjust the layout structure, reduce redundancy, and improve the operability and maintainability of the design.

[0072] Figure 3 This is the third flowchart of a method for integrating the layout of semiconductor devices according to an embodiment of this application, as shown below. Figure 3 As shown. After starting the layout fusion process, the initial semiconductor device can be simulated based on parameters such as the expected capacitance value, maximum width, maximum height, and minimum difference of the capacitance error, thereby obtaining the simulation results, which can be the first simulation project file. Then, it is determined whether it is a single-person layout design, a multi-person layout design, or a layout optimization design.

[0073] If it's a single-user layout design, corresponding to the second merge instruction, then each layer of the layout is traversed; intersection detection is performed on the graphic elements of the layout; a merge operation prompt is sent to the user; after the user confirms the merge, the images are overlaid and merged to complete the layout fusion. Then, the simulation project file of the semiconductor device layout (i.e., the GDS file) is exported, and the process ends.

[0074] If it's a multi-person layout design, corresponding to the first merge instruction, the graphic position and size are calculated. If it's determined that the graphics were imported in a non-overlapping manner, the positioning information of the original graphic object (i.e., graphic element) is obtained, sent to the corresponding layer, and new coordinates are set. The new object is sent after the previous object, new relative coordinates are set, and all objects in the same layer are traversed. This process is repeated across all layers to complete the layout merge. Then, the simulation project file of the semiconductor device layout is exported, and the process ends. If it's determined that the graphics were imported in an overlapping manner, the coordinate values ​​are manually set, the object is set as a positioning model (overlapping is possible), the left, right, top, and bottom coordinates of the layout are defined, the graphics are imported and merged, and then all layers are traversed to complete the layout merge. Finally, the simulation project file of the semiconductor device layout is exported, and the process ends.

[0075] If it's a layout optimization design, corresponding to the third fusion instruction, the layout is divided into small modules, optimized, and the position information of the small module units is recorded. Then, coordinate values ​​are manually set, the object is set as a positioning model (which can overlap), the left, right, top, and bottom coordinates of the layout are defined, the graphics are imported and merged, and then all layers are traversed to complete the layout fusion. Finally, the simulation project file of the semiconductor device layout is exported, and the process ends.

[0076] In one alternative implementation, after receiving the initial fusion command, the method further includes:

[0077] After parsing the initial fusion command, if the command instructs to perform an interactive operation with an external database or cloud resources, then further obtain external database information related to the first simulation project file.

[0078] Based on information from external databases, perform corresponding data verification, optimization, or supplementation of missing information. Afterward, reassess the requirements for layout import and fusion, and update the content of the first simulation project file.

[0079] After ensuring that the updated simulation project file conforms to the latest design specifications, execute the first or second fusion command.

[0080] The method provided in this embodiment ensures that the data in the simulation engineering files remains up-to-date and accurate by retrieving, verifying, supplementing, and optimizing the latest data from external databases or the cloud. This avoids design errors or mismatches caused by inconsistent or outdated data, improving the reliability of the design process. After parsing the initial fusion instructions, it automatically executes steps such as interacting with external databases, data verification, and information supplementation, greatly simplifying the designer's operation process. Automated data optimization and supplementation reduce manual intervention and improve work efficiency.

[0081] Embodiments of this application also provide a semiconductor device layout fusion apparatus. Figure 4 This is a schematic diagram of a fusion apparatus for a semiconductor device layout according to an embodiment of this application, such as... Figure 4 As shown, the device includes:

[0082] The first acquisition module 401 is used to acquire a first simulation project file. The first simulation project file includes a first layer layout and a second layer layout. The first layer layout includes at least one first graphic element, and the second layer layout includes at least one second graphic element.

[0083] The second acquisition module 402 is used to acquire a second simulation project file when a first fusion instruction is received. The second simulation project file includes a third layer layout, and the third layer layout includes at least one third graphic element.

[0084] The determination module 403 is used to determine the first layer layout or the second layer layout as the target layer layout based on the preset hierarchical information of at least two layers layout when the first fusion instruction indicates that the third layer layout is imported in a preset non-overlapping import method, and to obtain the position information of at least one target graphic element and the position information of at least one third graphic element. The hierarchical information of the target layer layout and the third layer layout are the same.

[0085] The third acquisition module 404 is used to acquire, according to a preset association relationship, the position information of at least one mapped target graphic element and the position information of at least one mapped third graphic element from the position information of at least one target graphic element and the position information of at least one third graphic element, respectively. The preset association relationship indicates the mapping relationship between at least one first target graphic element and at least one second target graphic element.

[0086] Import module 405 is used to determine the layout position information of the third layer layout in the target layer layout based on the position information of at least one target graphic element of the mapping and the position information of at least one third graphic element of the mapping, and import the third layer layout into the target layer layout according to the layout position information.

[0087] Furthermore, the device includes a processing module for, upon receiving a second fusion instruction, acquiring position information of at least one first graphic element and at least one second graphic element, and determining, based on the position information of the at least one first graphic element and at least one second graphic element, at least one non-overlapping first graphic element and at least one non-overlapping second graphic element. Based on the position information of the at least one pair of overlapping first graphic elements and second graphic elements, the at least one pair of overlapping first graphic elements and second graphic elements are fused to generate at least one fused graphic element, and a mapping relationship between the at least one fused graphic element and the at least one pair of overlapping first graphic elements and second graphic elements. Based on the mapping relationship and the position information of the at least one pair of overlapping first graphic elements and second graphic elements, the at least one fused graphic element is added to a first-layer layout or a second-layer layout, and the at least one pair of overlapping first graphic elements and second graphic elements are deleted from the first-layer layout and the second-layer layout.

[0088] The processing module is further configured to determine path information for at least one pair of overlapping first and second graphic elements based on their positional information. Based on the path information, the at least one pair of overlapping first and second graphic elements is converted into a polygon point set, which includes multiple points. The coordinates of the multiple points are obtained to form a coordinate set of the polygon point set. An OR operation is performed on the coordinates in the coordinate set to obtain a merged polygon point set. The merged polygon point set is then converted into at least one fused graphic element.

[0089] The processing module is further configured to, when determining that the first fusion instruction indicates that the third-layer layout is imported using a preset overlapping import method, obtain the preset import position of the third-layer layout indicated by the overlapping import method. Based on the preset import position of the third-layer layout, the third-layer layout is imported into the preset import position in the first simulation project file.

[0090] The positional information of the second graphic element includes the edge and center positions of the third-layer layout. The processing module is further configured to acquire the edge and center positions of the target-layer layout, and determine the distance between the first and third-layer layouts based on these positions, as well as the edge and center positions of the third-layer layout. Based on the edge and center positions of the target-layer layout and the distance, the positional information of the third-layer layout within the target-layer layout is determined. Based on the positional information of the third-layer layout within the target-layer layout, the third-layer layout is imported into the target-layer layout of the first simulation project file.

[0091] The processing module is also used to, upon receiving a third fusion instruction, divide the first-layer layout and / or the second-layer layout into N image segments, where N is a positive integer. After modifying the N image segments, it records the position information of the modified N image segments. It obtains the preset position information of the modified N image segments indicated by the overlapping import method. Based on the preset position information of the modified N image segments, it imports the modified N image segments into the third simulation project file.

[0092] The processing module is also used to receive initial fusion instructions. It parses the initial fusion instructions, and if the initial fusion instruction indicates fusion of the first layer layout and the second layer layout, it is determined to be the first fusion instruction. Alternatively, if the initial fusion instruction indicates obtaining the second simulation project file, it is determined to be the second fusion instruction. Alternatively, if the initial fusion instruction indicates splitting the first layer layout and / or the second layer layout, it is determined to be the third fusion instruction.

[0093] This application provides a semiconductor device layout fusion apparatus that, through an automated fusion process, reduces the need for manual intervention and significantly improves design and correction efficiency. Compared to traditional manual inspection and modification methods, this method can complete complex layout fusion in a short time. Utilizing pre-defined relationships, it ensures the accuracy of mapping and positional relationships between layout elements, avoiding positional errors or improper splicing that can occur due to manual operation, thereby improving the controllability and reliability of semiconductor device performance. Through reasonable graphic element mapping and layer information processing, it ensures compatibility and consistency between different layouts, avoiding fusion problems caused by differences between layers. It ensures the precise superposition of layout elements from different layers, avoiding problems such as interleaving and misalignment.

[0094] Further functional descriptions of the above modules and units are the same as those in the corresponding embodiments described above, and will not be repeated here.

[0095] In this embodiment, the semiconductor device layout integration device is presented in the form of functional units. Here, a unit refers to an ASIC (Application Specific Integrated Circuit) circuit, a processor and memory that execute one or more software or fixed programs, and / or other devices that can provide the above functions.

[0096] Embodiments of this application also provide an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to perform the steps in any of the above embodiments of the method for updating global model parameters of federated learning.

[0097] The electronic device can be a computer device, having the above-mentioned features. Figure 4 The diagram shows a fusion device for the layout of semiconductor devices.

[0098] Please see Figure 5 , Figure 5 This is a schematic diagram of the structure of a computer device provided in an optional embodiment of this application, such as... Figure 5 As shown, the computer device includes one or more processors 10, memory 20, and interfaces for connecting the components, including high-speed interfaces and low-speed interfaces. The components communicate with each other via different buses and can be mounted on a common motherboard or otherwise installed as needed. The processors can process instructions executed within the computer device, including instructions stored in or on memory to display graphical information of a GUI on external input / output devices (such as display devices coupled to the interfaces). In some alternative implementations, multiple processors and / or multiple buses can be used with multiple memories and multiple memory modules, if desired. Similarly, multiple computer devices can be connected, each providing some of the necessary operations (e.g., as a server array, a group of blade servers, or a multiprocessor system). Figure 5 Take a processor 10 as an example.

[0099] Processor 10 may be a central processing unit, a network processor, or a combination thereof. Processor 10 may further include an integrated circuit. The integrated circuit may be an application-specific integrated circuit (ASIC), a programmable logic device (PLD), or a combination thereof. The programmable logic device may be a complex programmable logic device (CAMP), a field-programmable gate array (FPGA), a general-purpose array logic (GPRS), or any combination thereof.

[0100] The memory 20 stores instructions executable by at least one processor 10 to cause the at least one processor 10 to perform the method shown in the above embodiment.

[0101] The memory 20 may include a program storage area and a data storage area. The program storage area may store the operating system and applications required for at least one function; the data storage area may store data created based on the use of the computer device. Furthermore, the memory 20 may include high-speed random access memory and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some alternative embodiments, the memory 20 may optionally include memory remotely located relative to the processor 10, and this remote memory may be connected to the computer device via a network.

[0102] The memory 20 may include volatile memory, such as random access memory; the memory may also include non-volatile memory, such as flash memory, hard disk or solid-state drive; the memory 20 may also include a combination of the above types of memory.

[0103] The computer device also includes a communication interface 30 for communicating with other devices or communication networks.

[0104] This application also provides a computer-readable storage medium. The methods described in this application can be implemented in hardware or firmware, or implemented as recordable on a storage medium, or implemented as computer code downloaded over a network and originally stored on a remote storage medium or a non-transitory machine-readable storage medium and subsequently stored on a local storage medium. Thus, the methods described herein can be processed by software stored on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. The storage medium can be a magnetic disk, optical disk, read-only memory, random access memory, flash memory, hard disk, or solid-state drive, etc.; further, the storage medium can also include combinations of the above types of memory. It is understood that computers, processors, microprocessor controllers, or programmable hardware include storage components capable of storing or receiving software or computer code. When the software or computer code is accessed and executed by the computer, processor, or hardware, the methods shown in the above embodiments are implemented.

[0105] Although embodiments of this application have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of this application, and all such modifications and variations fall within the scope defined by the appended claims.

Claims

1. A method of fusing a layout of a semiconductor device, characterized by, The method comprises: obtaining a first simulation engineering file, the first simulation engineering file comprising a first layer layout and a second layer layout, the first layer layout comprising at least one first graphical element, and the second layer layout comprising at least one second graphical element; obtaining a second simulation engineering file when a first fusion instruction is received, the second simulation engineering file comprising a third layer layout, the third layer layout comprising at least one third graphical element; when it is determined that the first fusion instruction indicates that the third layer layout is imported in a preset non-overlapping import manner, determining, according to preset hierarchical information of the at least two layer layouts, that the first layer layout or the second layer layout is a target layer layout, and obtaining position information of at least one target graphical element and position information of at least one third graphical element, the target layer layout having the same hierarchical information as the third layer layout; obtaining, from the position information of the at least one target graphical element and the position information of the at least one third graphical element, respectively, position information of at least one mapped target graphical element and position information of at least one mapped third graphical element according to a preset association relationship, the preset association relationship indicating a mapping relationship between the at least one first target graphical element and the at least one second target graphical element; determining, according to the position information of the at least one mapped target graphical element and the position information of the at least one mapped third graphical element, layout position information of the third layer layout in the target layer layout, and importing the third layer layout into the target layer layout according to the layout position information.

2. The method of claim 1, wherein, After the first simulation engineering file is obtained, the method further comprises: obtaining position information of the at least one first graphical element and the at least one second graphical element when a second fusion instruction is received, and determining, according to the position information of the at least one first graphical element and the at least one second graphical element, at least one pair of overlapping first graphical elements and second graphical elements, at least one non-overlapping first graphical element, and at least one non-overlapping second graphical element; fusing the at least one pair of overlapping first graphical elements and second graphical elements based on the position information of the at least one pair of overlapping first graphical elements and second graphical elements, to generate at least one fused graphical element, and a mapping relationship between the at least one fused graphical element and the at least one pair of overlapping first graphical elements and second graphical elements; based on the mapping relationship and the position information of the at least one pair of overlapping first graphical elements and second graphical elements, adding the at least one fused graphical element to the first layer layout or the second layer layout, and deleting the at least one pair of overlapping first graphical elements and second graphical elements from the first layer layout and the second layer layout.

3. The method of claim 2, wherein, The fusing of the at least one pair of overlapping first graphical elements and second graphical elements based on the position information of the at least one pair of overlapping first graphical elements and second graphical elements to generate at least one fused graphical element comprises: determine path information of the at least one pair of overlapped first and second graphical elements based on the position information of the at least one pair of overlapped first and second graphical elements; convert the at least one pair of overlapped first and second graphical elements into a polygon point set based on the path information, the polygon point set including a plurality of points; obtain coordinates of the plurality of points to form a coordinate set of the polygon point set; perform an or operation on the coordinates in the coordinate set to obtain a merged polygon point set; convert the merged polygon point set into at least one fused graphical element.

4. The method according to any one of claims 1 to 3, characterized in that, After the second simulation engineering file is obtained, the method further includes: when it is determined that the first fusion instruction indicates that the third layer layout is imported in a preset overlapping import manner, obtaining a preset import position of the third layer layout indicated by the overlapping import manner; based on the preset import position of the third layer layout, importing the third layer layout into the preset import position in the first simulation engineering file.

5. The method according to any one of claims 1 to 3, characterized in that, The position information of the second graphical element includes an edge position and a center position of the third layer layout; determining layout position information of the third layer layout in the target layer layout according to the position information of the at least one mapped target graphical element and the position information of the at least one mapped third graphical element, and importing the third layer layout into the target layer layout according to the layout position information, includes: obtaining an edge position and a center position of the target layer layout, and determining a distance between the first layer layout and the third layer layout according to the edge position and the center position of the target layer layout and the edge position and the center position of the third layer layout; determining position information of the third layer layout in the target layer layout according to the edge position and the center position of the target layer layout and the distance; importing the third layer layout into the target layer layout in the first simulation engineering file according to the position information of the third layer layout in the target layer layout.

6. The method of claim 1, wherein, After the first simulation engineering file is obtained, the method further includes: when a third fusion instruction is received, dividing the first layer layout and / or the second layer layout into N layout picture segments, where N is a positive integer; after the N layout picture segments are modified, recording position information of the modified N layout picture segments; obtaining preset position information of the modified N layout picture segments indicated by an overlapping import manner; based on the preset position information of the modified N layout picture segments, importing the modified N layout picture segments into a third simulation engineering file.

7. The method according to any one of claims 1 to 3, characterized in that, After the first simulation engineering file is obtained, the method further includes: receiving an initial fusion instruction; parsing the initial fusion instruction, and when the initial fusion instruction indicates that the first layer layout and the second layer layout are fused, determining that the initial fusion instruction is the first fusion instruction; or, when the initial fusion instruction indicates that a second simulation engineering file is obtained, determining that the initial fusion instruction is a second fusion instruction; Or, when the initial fusion instruction indicates splitting the first layer layout and / or the second layer layout, determining the initial fusion instruction as a third fusion instruction.

8. A fusing apparatus of a layout of a semiconductor device, characterized by comprising: The device comprises: A first obtaining module is configured to obtain a first simulation engineering file, wherein the first simulation engineering file comprises a first layer layout and a second layer layout, the first layer layout comprises at least one first graphical element, and the second layer layout comprises at least one second graphical element. A second obtaining module is configured to obtain a second simulation engineering file when a first fusion instruction is received, wherein the second simulation engineering file comprises a third layer layout, and the third layer layout comprises at least one third graphical element. A determining module is configured to determine the first layer layout or the second layer layout as a target layer layout according to preset hierarchical information of at least two layer layouts when it is determined that the first fusion instruction indicates importing the third layer layout in a preset non-overlapping importing manner, and obtain position information of at least one target graphical element and position information of at least one third graphical element, wherein the target layer layout has the same hierarchical information as the third layer layout. A third obtaining module is configured to obtain, according to a preset association relationship, position information of at least one mapped target graphical element and position information of at least one mapped third graphical element from the position information of the at least one target graphical element and the position information of the at least one third graphical element, wherein the preset association relationship indicates a mapping relationship between the at least one first target graphical element and the at least one second target graphical element. An importing module is configured to determine layout position information of the third layer layout in the target layer layout according to the position information of the at least one mapped target graphical element and the position information of the at least one mapped third graphical element, and import the third layer layout into the target layer layout according to the layout position information.

9. An electronic device, comprising: The device comprises: A memory is configured to store a computer program. A processor is configured to implement the steps of the layout fusion method of any one of the semiconductor devices in claims 1 to 7 when executing the computer program.

10. A computer readable storage medium characterized by, The computer readable storage medium stores a computer program, wherein the computer program is executed by a processor to implement the steps of the layout fusion method of any one of the semiconductor devices in claims 1 to 7.

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