Hidden danger early warning and positioning system based on intelligent circuit breaker

Abstract

The invention discloses a hidden danger early warning and positioning system based on intelligent circuit breakers, and particularly relates to the technical field of electrical circuit monitoring, which comprises a power distribution intelligent gateway and a plurality of intelligent circuit breakers, the intelligent circuit breaker comprises a switch room, a carrier wave STA module, a filtering sampling module, a power supply conversion module and an MCU. The power distribution intelligent gateway comprises a gateway and a CCO module. The carrier wave STA module is used for communication and topology identification; and the MCU is used for realizing the work of AD reading and operation, data processing and communication. According to the invention, the detection range is large, the branch circuit breaker can detect the hidden danger of electricity utilization under a branch line and is not limited to detection of end users, a power supply network topology is formed through the circuit breaker, the hidden danger is positioned and tracked, the equipment adopts an edge on-site calculation method and does not depend on the cloud, network security risks do not exist, and the method is suitable for large-scale popularization and application. And the judgment accuracy is improved by studying and judging according to the method of collecting the comprehensive feature vector according to the load type, so that the actual application effect of the method is relatively good.

Description

Technical Field

[0001] The present invention relates to the technical field of electrical circuit monitoring, and more specifically, to a hidden danger early warning and positioning system based on an intelligent circuit breaker. Background Art

[0002] With the continuous growth of social electricity consumption, electrical fires have become one of the main causes of fire accidents. According to statistics, electrical fires caused by line problems such as short circuits, overloading, and poor contact account for 68.9% of the total, and those caused by equipment failures or improper use account for 26.2%. There is an urgent need for effective early warning means for the safety hazards of low-voltage electrical circuits and equipment. Fault arcs are important factors leading to electrical fires, and their detection and positioning technologies have become research hotspots. Currently, some arc detection devices are generally installed on the user side to detect arcs of a single user under small currents, and such products cannot be installed at branch points; there are also products based on the cloud-edge protocol scheme that deploy algorithms on servers to improve detection accuracy. The above methods still have the following problems: 1. The detection range is small. The rated current of existing arc detectors generally does not exceed 100A, which is used to detect the electricity consumption environment of end users. 2. A single device only judges the hidden danger state below the device, and does not form a topology to realize the positioning and tracking of hidden dangers. 3. The hidden danger detection device that works in cloud-edge collaboration depends on the wireless communication link. The algorithm is deployed on the public cloud platform, which does not meet the requirements of power grid information security, and the device continuously incurs communication traffic costs, resulting in high costs. 4. The algorithms of existing products do not form an arc comprehensive feature vector, and only judge faults based on the satisfaction of a single criterion, resulting in a high false judgment rate.

[0003] Therefore, there is an urgent need for a hidden danger early warning and positioning system based on an intelligent circuit breaker to solve the above problems. Summary of the Invention

[0004] In order to overcome the above-mentioned defects of the prior art, an embodiment of the present invention provides a hidden danger early warning and positioning system based on an intelligent circuit breaker. The present invention has a large detection range. The branch circuit breaker can detect the electricity consumption hidden dangers under the branch line, not limited to detecting end users. Through the circuit breaker, a power supply network topology is formed to realize the positioning and tracking of hidden dangers. The device adopts the edge in-situ calculation method, does not depend on the cloud, and there is no network security risk. It judges by collecting the comprehensive feature vector according to the load type, improving the accuracy of judgment, making the actual application effect of the present invention better, and solving the problems raised in the above background art.

[0005] To achieve the above object, the present invention provides the following technical solution: A hidden danger early warning and positioning system based on an intelligent circuit breaker, comprising a distribution intelligent gateway and a plurality of intelligent circuit breakers; The intelligent circuit breaker includes a switch chamber, a carrier STA module, a filtering and sampling module, a power conversion module, and an MCU; The distribution intelligent gateway includes a gateway and a CCO module; The carrier STA module is used for communication and topology identification; The MCU is used to implement AD reading and operation, data processing, and communication.

[0006] In a preferred embodiment, the carrier STA module is set as a built-in HPLC three-phase STA module, and the carrier STA module communicates with the distribution intelligent gateway through the CCO module.

[0007] A usage method of a hidden danger warning and positioning system based on an intelligent circuit breaker, characterized by including the above-mentioned hidden danger warning and positioning system based on an intelligent circuit breaker and the following steps: Step 1: The MCU realizes load type identification based on the sampling value; Step 2: Cache the sampling value and the adjacent cycle change value, calculate and cache the number of mutation anomalies within 1s, and apply the double-region double-cache technology. The first region is the sampling difference double-cache, and the second region is the sampling value double-cache. Calculate once per cycle, sample 256 points per cycle, clean the sampling value by the interpolation method, and the cleaned cycle sampling value matrix is , the load type recognition matrix for neural network training , perform matrix operations , obtain the load type matrix , when the algorithm convergence effect is not good, use the sampling difference cycle cache to re-identify; Step 3: Statistically analyze the zero rest duration of the sampling value, identify the zero rest duration anomaly according to the load type, and multiply the load type matrix by the mutation amount anomaly threshold coefficient matrix to obtain the mutation amount anomaly threshold matrix: , allocate a 1s sampling mutation anomaly cache T[12,800,0]. In the sampling interruption, when a new sampling is inserted, update the sampling cache and the sampling difference cache , and these values are respectively recorded as and , The absolute value of is compared with , when , record 1 in the cell pointed to by the current pointer of the sampling mutation exception cache T, otherwise record 0, move the pointer to the next cell, and return to the starting cell in case of overflow. In the main loop, count the number of sampling mutation exceptions T_sum for 1s. If it is greater than 420, it is judged as an abnormal mutation quantity. During the sampling interruption, apply the fast Fourier transform algorithm to calculate the effective value of the latest cycle, and use 0.03 times of this effective value as the zero rest threshold β. Allocate the zero rest caches M1[256,0] and M2[256,0] for two cycles of sampling values. M1 is the zero rest record of the previous cycle, and M2 is the zero rest record of the current cycle. During the sampling interruption, when a new sampling is inserted, the value is respectively recorded as , Compare the absolute value of with β. When , write 1 into the latest value of the zero rest cache, otherwise write 0. In the main loop, calculate the sum Sum_M1 of M1[256,0] and the sum Sum_M2 of M2[256,0]. When |Sum_M2 - Sum_M1| > 5, update the cycle zero rest duration standard value Z_std = min(Sum_M2, Sum_M1). When |Sum_M2 - Z_std| > 5, record the current cycle as a zero rest exception, Z_abnormal = Z_abnormal + 2. In the main loop, count Z_abnormal for 1s duration. According to the standard, if Z_abnormal ≥ 14, it is judged as a zero rest exception; Step 4: Calculate the waveform asymmetry correlation coefficient according to the load type. Calculate the mean value of the absolute values of the sampling points in a half cycle. The formula is: , ; Calculate the standard deviation of the absolute values of the sampling points. The formula is: , ; Define the structural similarity - correlation coefficient method to calculate this correlation coefficient for judging the similarity between two adjacent half cycles. The formula is: ; Step 5: Calculate the key harmonics and the total harmonic content, identify harmonic anomalies according to the load type, and multiply through the load type matrix and the harmonic anomaly threshold coefficient matrix to obtain the harmonic anomaly threshold matrix: . In the main loop, calculate the amplitudes of the key harmonics in one cycle. The key harmonics include the 2nd harmonic, 3rd harmonic, 5th harmonic, 7th harmonic, and 9th harmonic. In the main loop, calculate the total harmonic content, and calculate the proportion of key harmonics: the proportion of key harmonics r = sum of key harmonic amplitudes / total harmonic content. When the proportion of key harmonics , it is judged as a harmonic anomaly; Step 6: Calculate the comprehensive characteristic value of potential fault of the above abnormal vector. Multiply it by the load type matrix and the comprehensive characteristic coefficient matrix to obtain the harmonic anomaly threshold matrix: , and calculate the comprehensive characteristic value. The formula is: ; When E>0.5, it is judged as a potential fault. The intelligent gateway reads the message of function code "FE FE 90 FF" through the 645 extended protocol, and obtains the load type, potential fault status and potential fault type word under each circuit breaker. According to the topological sim file of the circuit breaker and the status word of each circuit breaker, the fault location is judged.

[0008] Technical effects and advantages of the present invention: The MCU of the present invention realizes load type identification based on sampling values, caches the sampling values and the change values of adjacent cycles, calculates and caches the number of mutation anomalies within 1s, counts the zero rest duration of the sampling values, identifies the zero rest duration anomaly according to the load type, calculates the waveform asymmetry correlation coefficient according to the load type, calculates the key harmonics and the total harmonic content, and identifies the harmonic anomaly according to the load type. Calculate the comprehensive characteristic value of potential fault of the above abnormal vector. The detection range of the present invention is large. The branch circuit breaker can detect the electricity consumption potential hazards under the branch line, not limited to detecting the end users. The power supply network topology is formed by the circuit breaker to realize the positioning and tracking of potential hazards. The device adopts the edge in-situ calculation method, does not depend on the cloud, and there is no network security risk. Judging according to the method of collecting the comprehensive characteristic vector according to the load type improves the accuracy of judgment, making the actual application effect of the present invention better. Description of the Drawings

[0009] Figure 1 is the overall structure schematic diagram of the present invention.

[0010] Figure 2 is the intelligent circuit breaker structure schematic diagram of the present invention.

[0011] Figure 3 is the working process schematic diagram of the present invention.

[0012] Figure 4 is the sampling difference double buffer schematic diagram of the present invention.

[0013] Figure 5 is the sampling value double buffer schematic diagram of the present invention.

[0014] Figure 6 is the judgment process schematic diagram of the present invention. Detailed Embodiment

[0015] Next, in combination with the accompanying drawings in the embodiments of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0016] As shown in the attached Figure 1 , attached Figure 2 , attached Figure 3 , attached Figure 4 , attached Figure 5 and attached Figure 6 shown, the present invention provides a hidden danger early warning and positioning system based on an intelligent circuit breaker, including a distribution intelligent gateway 1 and a plurality of intelligent circuit breakers 2; The intelligent circuit breaker 2 includes a switch chamber, a carrier STA module, a filtering and sampling module, a power conversion module, and an MCU; The distribution intelligent gateway 1 includes a gateway and a CCO module; The carrier STA module is used for communication and topology identification; The MCU is used to implement AD reading and operation, data processing and communication.

[0017] The carrier STA module is set as a built-in HPLC three-phase STA module, and the carrier STA module communicates with the distribution intelligent gateway 1 through the CCO module.

[0018] A method for using a hidden danger early warning and positioning system based on an intelligent circuit breaker, characterized in that it includes the above-mentioned hidden danger early warning and positioning system based on an intelligent circuit breaker and the following steps: Step 1: The MCU realizes load type identification based on the sampling value; Step 2: Cache the sampling value and the adjacent cycle change value, calculate and cache the number of mutation anomalies within 1 s, and apply the double-region double-cache technology. The first region is the sampling difference double-cache, and the second region is the sampling value double-cache. Calculate once per cycle, sample 256 points per cycle, clean the sampling value by the interpolation method, and the cleaned cycle sampling value matrix is , the load type recognition matrix for neural network training , perform matrix operation , obtain the load type matrix , when the algorithm convergence effect is not good, use the sampling difference cycle cache to re-identify; Step 3: Statistically analyze the zero-rest duration of the sampling value, identify the zero-rest duration anomaly according to the load type, and pass the load type matrix and the mutation amount anomaly threshold coefficient matrix Multiply to obtain the mutation variable anomaly threshold matrix: , allocate a 1s sampling mutation anomaly cache T[12,800,0]. During the sampling interruption, when new sampling is inserted, update the sampling cache and the sampling difference cache . These values are respectively denoted as and . The absolute value of is compared with . When , 1 is recorded in the cell pointed to by the current pointer of the sampling mutation anomaly cache T, otherwise 0 is recorded. The pointer points to the next cell, and when overflow occurs, it returns to the starting cell. In the main loop, count the number of sampling mutation anomalies T_sum in 1s. If it is greater than 420, it is judged as a mutation variable anomaly. During the sampling interruption, use the fast Fourier transform algorithm to calculate the effective value of the latest cycle, and use 0.03 times of this effective value as the zero rest threshold β. Allocate two-cycle sampling value zero rest caches M1[256,0] and M2[256,0]. M1 is the zero rest record of the previous cycle, and M2 is the zero rest record of this cycle. During the sampling interruption, when new sampling is inserted, these values are respectively denoted as , . The absolute value of is compared with β. When , 1 is written into the latest value of the zero rest cache, otherwise 0 is written. In the main loop, count the sum Sum_M1 of M1[256,0] and the sum Sum_M2 of M2[256,0]. When |Sum_M2 - Sum_M1| > 5, update the cycle zero rest duration standard value Z_std = min(Sum_M2, Sum_M1). When |Sum_M2 - Z_std| > 5, this cycle is recorded as a zero rest anomaly, and Z_abnormal = Z_abnormal + 2. In the main loop, count Z_abnormal in 1s duration. According to the standard, if Z_abnormal ≥ 14, it is judged as a zero rest anomaly; Step Four: Calculate the waveform asymmetry correlation coefficient according to the load type, calculate the mean value of the absolute values of the sampling points in a half cycle, and the formula is: , ; Calculate the standard deviation of the absolute values of the sampling points, and the formula is: , ; Define the structural similarity - correlation coefficient method to calculate this correlation coefficient for judging the similarity of two adjacent half cycles, and the formula is: ; Step Five: Calculate the key harmonics and the total harmonic content, identify harmonic anomalies according to the load type, and pass through the load type matrix Multiply with the harmonic anomaly threshold coefficient matrix to obtain the harmonic anomaly threshold matrix: , calculate the amplitudes of the key harmonics in one cycle in the main loop. The key harmonics include the 2nd harmonic, 3rd harmonic, 5th harmonic, 7th harmonic, and 9th harmonic. Calculate the total harmonic content in the main loop, and calculate the proportion of key harmonics: the proportion of key harmonics r = sum of key harmonic amplitudes / total harmonic content. When the proportion of key harmonics is met, it is judged as harmonic anomaly; Step Six: Calculate the comprehensive characteristic value of the potential fault of the above abnormal vector. Multiply through the load type matrix with the comprehensive characteristic coefficient matrix to obtain the harmonic anomaly threshold matrix: , calculate the comprehensive characteristic value, and the formula is: ; When E > 0.5, it is judged as a potential fault. The intelligent gateway reads the message of function code "FE FE 90 FF" through the 645 extended protocol, obtains the load type, potential fault status, and potential fault type word under each circuit breaker, and determines the fault location according to the topological sim file of the circuit breaker and the status words of each circuit breaker.

[0019] The MCU of the present invention realizes load type identification based on sampled values, caches the sampled values and the change values of adjacent cycles, calculates and caches the number of mutation anomalies within 1s, counts the zero rest duration of the sampled values, identifies the zero rest duration anomaly according to the load type, calculates the waveform asymmetry correlation coefficient according to the load type, calculates the key harmonics and the total harmonic content, identifies harmonic anomalies according to the load type, and calculates the comprehensive characteristic value of the potential fault of the above abnormal vector. The detection range of the present invention is large. The branch circuit breaker can detect the electricity use potential hazards under the branch line, not limited to detecting the end users. The power supply network topology is formed through the circuit breaker to realize the positioning and tracking of potential hazards. The device adopts the edge in-situ calculation method, does not rely on the cloud, and there is no network security risk. The judgment is made by the method of collecting the comprehensive characteristic vector according to the load type, improving the accuracy of judgment, and making the actual application effect of the present invention better.

[0020] Finally: The above are only the preferred embodiments of the present invention and are not used to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A hidden danger early warning and positioning system based on intelligent circuit breakers, characterized in that: It includes a power distribution intelligent gateway (1) and a plurality of intelligent circuit breakers (2); The intelligent circuit breaker (2) comprises a switch room, a carrier STA module, a filter sampling module, a power conversion module and an MCU; The power distribution intelligent gateway (1) comprises a gateway and a CCO module; The carrier STA module is used for communication and topology identification; The MCU is used to realize AD reading and calculation, data processing and communication.

2. According to claim 1, a hidden danger early warning and positioning system based on intelligent circuit breaker is characterized by: The carrier STA module is configured as a built-in HPLC three-phase STA module, and the carrier STA module communicates with the power distribution intelligent gateway (1) via the CCO module.

3. A method for using a hidden danger early warning and positioning system based on an intelligent circuit breaker, characterized in that: The method comprises the hidden danger early warning and positioning system based on intelligent circuit breaker as described in claims 1-2 and the following steps: Step 1: MCU identifies the load type based on the sampled value; Step 2: Cache the sampling values ​​and adjacent frequency change values, calculate and cache the number of mutation anomalies within 1s, and apply the dual-area dual-cache technology. The first area is the sampling difference dual cache, and the second area is the sampling value dual cache. Calculate once per cycle, sample 256 points per cycle, and clean the sampling values ​​by interpolation. The cleaned frequency sampling value matrix is , the load type identification matrix for neural network training , perform matrix operations , the load type matrix When the algorithm converges poorly, use the sampling difference frequency cache Re-identification; Step 3: Count the zero-break duration of the sampling value, identify the zero-break duration anomaly according to the load type, and use the load type matrix and mutation abnormal threshold coefficient matrix Multiply them together to get the mutation abnormality threshold matrix: , allocate 1s sampling mutation exception cache T[12,800,0], during sampling interruption, when new samples are inserted, update the sampling cache and sampling difference buffer , the values ​​are recorded as and , The absolute value of In comparison, , the unit pointed to by the current pointer of the sampling mutation abnormality cache T is recorded as 1, otherwise it is recorded as 0, the pointer points to the next grid unit, and overflow returns to the starting unit. In the main loop, the number of sampling mutation abnormalities T_sum in 1s is counted, and it is judged as mutation abnormality if it is greater than 420. During the sampling interruption, the fast Fourier algorithm is used to calculate the effective value of the latest cycle, and 0.03 times of the effective value is used as the zero-rest threshold β. Two-cycle sampling value zero-rest caches M1[256,0] and M2[256,0] are allocated. M1 is the zero-rest record of the previous cycle, and M2 is the zero-rest record of this cycle. During the sampling interruption, when a new sample is inserted, the value is recorded as , The absolute value of is compared with β. , write 1 to the latest value of the zero-rest cache, otherwise write 0. In the main loop, count the sum Sum_M1 of M1[256,0] and the sum Sum_M2 of M2[256,0]. When |Sum_M2-Sum_M1|>5, update the standard value of the zero-rest duration of the cycle Z_std=min(Sum_M2,Sum_M1). When |Sum_M2-Z_std|>5, this cycle is recorded as a zero-rest abnormality, Z_abnormal=Z_abnormal+2. Count the Z_abnormal of 1s in the main loop. According to the standard, Z_abnormal≥14 is judged as a zero-rest abnormality. Step 4: Calculate the waveform asymmetry correlation coefficient according to the load type and calculate the mean of the absolute values ​​of the sampling points of the half cycle. The formula is: ， ； Calculate the standard deviation of the absolute value of the sampling points. The formula is: ， ； Define the structural similarity-correlation coefficient method and calculate the correlation coefficient to judge the similarity of two adjacent half-cycles. The formula is: ； Step 5: Calculate the key harmonics and total harmonic content, identify harmonic anomalies according to load type, and use the load type matrix and harmonic anomaly threshold coefficient matrix Multiply them together to get the harmonic anomaly threshold matrix: , calculate the amplitude of the key harmonics in one cycle in the main loop. The key harmonics include the 2nd harmonic, 3rd harmonic, 5th harmonic, 7th harmonic and 9th harmonic. Calculate the total harmonic content in the main loop and calculate the key harmonic ratio: key harmonic ratio r = key harmonic amplitude sum / total harmonic content. When the key harmonic ratio When , it is judged as harmonic abnormality; Step 6: Calculate the comprehensive characteristic value of the hidden fault of the above abnormal vector, through the load type matrix And the comprehensive characteristic coefficient matrix Multiply them together to get the harmonic anomaly threshold matrix: , calculate the comprehensive eigenvalue, the formula is: ； When E>0.5, it is judged as a hidden danger fault. The intelligent gateway reads the message with function code "FE FE 90 FF" through the 645 extended protocol to obtain the load type, hidden danger fault status and hidden danger type word under each circuit breaker. According to the topology sim file of the circuit breaker and the status word of each circuit breaker, the fault location is determined.

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