Noise suppression logic in error concealment cells using noise-to-signal ratio

Abstract

A method and decoder for generating hidden audio frames of an audio signal. The method includes performing a frequency domain analysis on a sequence of previously decoded audio signals to obtain a spectrum and identify peaks in the spectrum. The method further includes estimating a relative energy between the noise spectrum and the complete spectrum, determining an attenuation of the noise spectrum based on the relative energy, and applying the attenuation to the noise spectrum. The method includes applying an inverse transform to the time domain to an error hidden spectrum, the error hidden spectrum including a peak and an attenuated noise spectrum.

Description

[0001] This application is a divisional application of the invention patent application with the application date of November 24, 2021, the application number of 202180074251.2, and the invention name of "Noise Suppression Logic in Error Concealment Unit Using Noise Signal Ratio". Technical Field

[0002] The present disclosure generally relates to communications, and more particularly to encoder / decoder methods and related devices and nodes that support encoder / decoder operations. Background Art

[0003] The transmission of voice / audio over modern communication channels / networks is mainly accomplished in the digital domain using a voice / audio codec. Using a voice / audio codec may involve obtaining an analog signal and digitizing it using sampling and an analog-to-digital (A / D) converter 100 to obtain digital samples. These digital samples may be further grouped into frames that contain samples from a 10 - 40 millisecond continuous period, depending on the application. The frames can then be processed (e.g., encoded) using a compression algorithm, which reduces the number of bits that need to be sent and still allows for as high a quality as possible. The resulting encoded bitstream is then sent as a data packet over a digital network 104 to a receiver. At the receiver, the process is reversed. The data packet can first be decoded to reconstruct the frame with digital samples, and then the digital samples can be input into a digital-to-analog (D / A) converter 108 to reconstruct an approximation of the input analog signal at the receiver. Figure 1 An example of a block diagram for audio transmission using an audio encoder 102 and a decoder 106 over a network 104 (e.g., a digital network) using the above method is provided.

[0004] Due to poor connections, network congestion, etc., the data packets sent may be lost or corrupted. To overcome the problems of transmission errors and packet loss, the telecommunications service uses packet loss concealment (PLC) techniques. The missing information of the lost or corrupted data packets on the receiver side can be replaced by the decoder with a synthesized signal to conceal the lost or corrupted data packets. There are many different terms used for packet loss concealment techniques, including frame error concealment (FEC), frame loss concealment (FLC), and error concealment unit (ECU). Some embodiments of PLC techniques are generally closely related to the decoder, where the internal state can be used to generate signal continuation or extrapolation to compensate for packet loss. For a multi-mode codec with multiple operating modes for different signal types, there are usually multiple PLC techniques that can be implemented to handle the concealment of lost or corrupted data packets.

[0005] For a linear prediction (LP)-based speech coding mode, one technique that can be used is the adjustment of glottal pulse positions based on the use of estimated end-of-frame pitch information and the replication of pitch periods of previous frames. The gain of the long-term predictor (LTP) converges to zero, and the speed depends on the number of consecutive lost frames and the stability of the last good frame. Frequency domain (FD)-based coding modes are generally designed to handle general or complex signals, such as music. For such signals, different techniques can be used depending on the characteristics of the last received frame. The analysis can include the number of detected tonal components and the periodicity of the signal. If frame loss occurs during a highly periodic signal (such as active speech or single instrumental music), a time-domain PLC similar to LP-based PLC may be suitable for implementation. In this case, the FD PLC can mimic the LP decoder by estimating the LP parameters and the excitation signal based on the last received frame. In the case where the lost frame occurs during an aperiodic or noise-like signal, the last received frame can be repeated in the spectral domain, where the coefficients are multiplied by a random sign signal to reduce the metallic sound of the repeated signal. For fixed-tone signals, it has been found that in some embodiments, it is advantageous to use methods based on the prediction and extrapolation of detected tonal components.

[0006] A hiding method operating in the frequency domain is the phase ECU disclosed in WO2014123471A1. The phase ECU can be implemented as an independent tool that operates on a buffer of a previously decoded time-domain signal. Thus, it can be used for different audio coding modes, including mono, stereo, or multi-channel audio coding modes. Its framework is based on the sine analysis and synthesis paradigm. Figure 4A flowchart showing the steps taken in signal reconstruction is presented. In this technique, the sine components of the last good frame (i.e., the error - free frame received) are extracted and phase - shifted. When a frame is lost, the sine frequencies are obtained from past decoded synthesis in the DFT (Discrete Fourier Transform) domain. First, the corresponding frequency bin is identified by finding the peak 404 in the magnitude - spectrum plane 402. Then, the fractional frequency of the peak is estimated 406 using the peak frequency bin. The peak frequency bin and the corresponding fractional frequency can be stored for creating a substitute for the lost frame. The fractional frequency is used to phase - shift 408 the frequency bins of the complex DFT spectrum corresponding to the peak and the adjacent frequency bins. For the remaining frequency bins of the frame, which can be referred to as the noise spectrum, the magnitude of the past synthesis is retained while the phase can be randomized 410. Then, the inverse DFT 412 is used to transform the signal including the noise spectrum with randomized phase and the peak with adjusted phase into the time domain. Burst errors can also be processed so that the estimated signal can be smoothly muted by converging it to zero. Figure 2 is an example of the sine component 200 (i.e., the peak) and the noise spectrum 202.

[0007] Figure 3 A block diagram of the decoder 300 is shown, including a phase ECU solution for compensating for lost packets. The bit - stream 302 is input to the stream decoder 306. When the BFI (Bad Frame Indicator) 304 does not indicate that the current frame is lost or corrupted, i.e., BFI = 0, the stream decoder 306 outputs the decoded signal to the digital - to - analog converter 310. When the BFI 304 indicates that the current frame is lost or corrupted, i.e., BFI = 1, the phase ECU 308 steps are activated. These steps are as Figure 5 shown and are explained below.

[0008] If the encoded audio frame is received correctly, the decoder generates a synthesized audio frame that will be forwarded to the digital - to - analog converter (DAC) for playback. Additionally, it is input to the buffer 510, which serves as a memory for past decoded frames in the case of frame loss. If a frame is lost, the following steps are taken. The past decoded analysis frame can be written as

[0009] x(n)

[0010] where n = 0, 1, 2, …, N denotes the number of samples in the analysis frame m, and N is the length of the analysis frame. Note that the analysis frame may be longer than the lost frame, such that N is greater than the length of the audio frame to be hidden. First, an analysis window is typically applied.

[0011] x win (n)=x(n)w(n)

[0012] where \(w(n)\) is a windowing function. The windowing function reduces the effect of the edges of the short-time DFT. It can further suppress the side-lobes of the spectrum of the transform while sacrificing a little frequency resolution. A suitable window can be, for example, a Hann window, a Hamming window, or a Hammrect window, which has the rise and decay of the Hamming window and a flat part in the middle.

[0013] In block 520, the frame \(x(n)\) is transformed into the DFT domain spectrum \(X(k)\) according to the following formula, where \(k\) represents the frequency bin index win \(X(k)=\sum_{n = 0}^{N - 1}x(n)e^{-j\frac{2\pi}{N}kn}\)

[0014]

[0015] In some embodiments, the decoder has reconstructed the DFT spectrum \(X(k)\) during the decoding process. In this case, the DFT transform block 520 is not required and the DFT spectrum from the last decoded frame can be stored and retrieved from the memory when a frame loss occurs.

[0016] The magnitude representation of \(X(k)\) is then calculated in block 530 and will be used as the input to the peak finder algorithm in block 540.

[0017]

[0018] where \(\text{Re}\{X(k)\}\) and \(\text{Im}\{X(k)\}\) represent the real part and the imaginary part of \(X(k)\) respectively. It can be noted that for a real-valued signal, the DFT spectrum is symmetric, where the second half is the mirrored complex conjugate of the first half. Therefore, it is only necessary to evaluate for \(k = 0, 1, 2, \ldots, N / 2\).

[0019] In block 540, different algorithms can be used to find the peaks and the corresponding positions in the spectrum.

[0020] \(k\) i \(=\text{PeakFinder}(|X(k)|)\)

[0021] where \(k\) i is the peak position represented as the number of frequency bins, \(N\) peaks indicates the number of peaks, and \(i = 1, 2, \ldots, N\) peaksis the peak index of the spectrum. The integer index provides a coarse frequency resolution, which is determined by the reciprocal of the length of the analysis window. For a more accurate frequency estimate, the interpolation method in block 550 is applied. In short-time DFT analysis, the tonal or sinusoidal components in this analysis are typically distributed across multiple frequency bins. For this reason, each peak is represented by a series of adjacent bins around the peak index. This set of bins G(i) can be formed by including N i adjacent bins on each side of the peak index k near . Figure 14A An example of a set of peaks and adjacent bins is shown in

[0022] G(i) = {k i - N near , …, k i , …, k i + N neat}

[0023] It should be noted that these groups may need to be adjusted so that the group is entirely within the spectrum range. For peak indices closer than N near / 2, the groups are adjusted so that bins are assigned to the nearest peak and there is no group overlap.

[0024] After estimating the fractional frequency of the peak, an estimate of the continuous sinusoidal component is generated by applying a phase shift in block 560, where the phase shift corresponds to the phase evolution from the start of the analysis frame to the start point of the ECU frame to be generated. The same phase shift is applied to each set of bins G(i) representing peak i.

[0025] The remaining bins that are not part of any group G(m,i) constitute the noise component of the spectrum, also known as the noise spectrum:

[0026] X noise (k) = X(k), i = 1, 2, …, N peaks

[0027] Figure 14BAn example of an isolated noise spectrum is shown. The phase of the noise spectrum coefficients is randomized 570. A signal including the noise spectrum with randomized phase and peaks with adjusted phase is then transformed to the time domain using an inverse DFT 580 to render an ECU frame in the time domain. If the DFT analysis is performed on a windowed signal, it may be desirable to apply inverse windowing at this stage. When combined with previously decoded synthesis and future decoded frames, the reconstructed time domain signal can be further processed to provide seamless continuity. If the decoder operates in a modified discrete cosine transform (MDCT) domain or generally in any modulation overlap transform (MLT)-based decoder, an artificial time domain aliasing (TDA) operation can be applied. In that case, the frame has the same format as the output of the MDCT decoder stage and is directly suitable for MDCT synthesis and overlap add operations. Excluding TDA may also be advantageous because the generated time domain aliasing may not be aligned to cancel the TDA of the previous frame. In such cases, a windowing and overlap add strategy can be applied without the TDA operation. Summary of the Invention

[0028] In cases where the background noise does not carry sufficient energy but is still audible, the noise spectrum present in the reconstructed signal may have a negative impact on the overall quality because it adds unwanted artifacts to the output of the audio codec. In these cases, the noise spectrum should preferably be zeroed or attenuated. However, in some other cases where the noise spectrum carries a significant amount of energy of the corresponding signal, zeroing or attenuating the noise spectrum may result in a sudden drop in energy in the reconstructed signal, which in turn may have a negative impact on the overall quality.

[0029] The different effects of the noise spectrum on the overall quality make it necessary to create a mechanism that should zero or attenuate the noise spectrum when needed and otherwise leave it unchanged.

[0030] Accordingly, a decision method and apparatus are provided based on whether the noise spectrum is to be zeroed or attenuated or left unchanged. The decision works based on the noise signal ratio (NSR) of the reconstructed signal.

[0031] According to a first aspect, there is provided a method for generating a hidden audio frame of an audio signal in a decoding device. The method includes performing a frequency-domain analysis on a sequence of previously decoded audio signals to obtain a spectrum, and identifying tonal components in the spectrum by identifying peaks in the spectrum. Phase adjustment is applied to the identified peaks by adjusting the phases of the peaks and adjacent bins. A random phase adjustment is applied to a noise spectrum that includes spectral bins that do not belong to the peaks and their adjacent bins. The relative energy between the noise spectrum and the complete spectrum is estimated, the attenuation of the noise spectrum is determined based on the relative energy, and the attenuation is applied to the noise spectrum. An inverse transform in the time domain is applied to an error concealment spectrum that includes the peaks with adjusted phases and the attenuated noise spectrum.

[0032] According to a second aspect, there is provided a decoder for generating a hidden audio frame of an audio signal in a decoding device. The decoder includes a processing circuit and a memory coupled to the processing circuit, wherein the memory includes instructions that, when executed by the processing circuit, cause the decoder to perform operations including performing a frequency-domain analysis on a sequence of previously decoded audio signals to obtain a spectrum, and identifying tonal components in the spectrum by identifying peaks in the spectrum. The memory includes instructions that, when executed by the processing circuit, cause the decoder to perform operations including applying phase adjustment to the identified peaks by adjusting the phases of the peaks and adjacent bins, and applying a random phase adjustment to a noise spectrum that includes spectral bins that do not belong to the peaks and their adjacent bins. The memory includes instructions that, when executed by the processing circuit, cause the decoder to perform operations including estimating the relative energy between the noise spectrum and the complete spectrum, determining the attenuation of the noise spectrum based on the relative energy, applying the attenuation to the noise spectrum; and applying an inverse transform in the time domain to an error concealment spectrum that includes the peaks with adjusted phases and the attenuated noise spectrum.

[0033] According to a third aspect, there is provided a decoder. The decoder is adapted to perform operations including performing a frequency-domain analysis on a sequence of previously decoded audio signals to obtain a spectrum, and identifying tonal components in the spectrum by identifying peaks in the spectrum. The decoder is adapted to apply phase adjustment to the identified peaks by adjusting the phases of the peaks and adjacent bins, and applying a random phase adjustment to a noise spectrum that includes spectral bins that do not belong to the peaks and their adjacent bins. The decoder is adapted to estimate the relative energy between the noise spectrum and the complete spectrum, determine the attenuation of the noise spectrum based on the relative energy, apply the attenuation to the noise spectrum; and apply an inverse transform in the time domain to an error concealment spectrum that includes the peaks with adjusted phases and the attenuated noise spectrum.

[0034] According to a fourth aspect, a computer program is provided. The computer program includes program code to be executed by a processing circuit of a decoder, whereby execution of the program code causes the decoder to perform the operations according to the first aspect.

[0035] According to a fifth aspect, a computer program product is provided. The computer program product includes a non-transitory storage medium including program code to be executed by a processing circuit of a decoder, whereby execution of the program code causes the decoder to perform the operations according to the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] The drawings, which are included to provide a further understanding of the disclosure and are incorporated in and constitute a part of this application, illustrate certain non-limiting embodiments of the inventive concept. In the drawings:

[0037] Figure 1 is a block diagram showing an example of audio transmission using an audio encoder and a decoder over a network;

[0038] Figure 2 shows an example of a sine component of a signal and a noise spectrum;

[0039] Figure 3 is a block diagram showing a phase ECU decoder for compensating lost packets;

[0040] Figure 4 and 5 is showing Figure 3 the operation of a phase ECU decoder;

[0041] Figure 6 is an illustration of an operating environment of an encoder and a decoder according to some embodiments;

[0042] Figure 7 is a block diagram showing an encoder according to some embodiments of the inventive concept;

[0043] Figure 8 is a block diagram showing a decoder according to some embodiments of the inventive concept;

[0044] Figures 9 - 13 is a flowchart showing the operation of a decoder according to some embodiments of the inventive concept;

[0045] Figure 14A and 14B is an illustration of bins included in a noise and signal energy ratio according to some embodiments of the inventive concept;

[0046] Figure 15 is a block diagram of a wireless network according to some embodiments;

[0047] Figure 16 is a block diagram of a virtualized environment according to some embodiments; Detailed implementation

[0048] The inventive concept will now be described more fully hereinafter with reference to the accompanying drawings, in which examples of embodiments of the inventive concept are shown. However, the inventive concept may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the inventive concept to those skilled in the art. It should also be noted that these embodiments are not mutually exclusive. Components from one embodiment may be assumed to be present / used in another embodiment by default.

[0049] The following description presents various embodiments of the disclosed subject matter. These embodiments are presented as teaching examples and should not be construed as limiting the scope of the disclosed subject matter. For example, certain details of the described embodiments may be modified, omitted, or extended without departing from the scope of the described subject matter.

[0050] Before describing the embodiments in further detail, Figure 6 an example of an operating environment of an encoder 600 that can be used to encode a bitstream and a decoder 602 that can be used to decode a bitstream as described herein is shown. The encoder 600 receives audio from the network 604, from the microphone / recorder 605, and / or from the storage device 606, encodes the audio into a bitstream as described below, and sends the encoded audio to the decoder 602 via the network 608. The storage device 606 can be a repository of multi-channel audio signals, such as a repository of a store or a streaming audio service, a separate storage component, a component of a mobile device, etc. The decoder 602 can be part of a device 610 having a media player 612. The device 610 can be a mobile device, a set-top device, a desktop computer, etc.

[0051] Figure 7 is a block diagram of elements of an encoder 600 configured to encode audio frames according to some embodiments of the inventive concept. As shown, the encoder 600 may include a network interface circuit 705 (also referred to as a network interface), which is configured to provide communication with other devices / entities / functions / etc. The encoder 600 may also include a processing circuit 701 (also referred to as a processor and a processor circuit) coupled to the network interface circuit 705, and a memory circuit 703 (also referred to as a memory) coupled to the processing circuit. The memory circuit 703 may include computer-readable program code, which when executed by the processing circuit 701 causes the processing circuit to perform operations according to the embodiments disclosed herein.

[0052] According to other embodiments, the processing circuit 701 may be defined to include a memory, such that a separate memory circuit is not required. As discussed herein, the operations of the encoder 600 may be performed by the processing circuit 701 and / or the network interface 705. For example, the processing circuit 701 may control the network interface 705 to send communications to the decoder 602 and / or receive communications from one or more other network nodes / entities / servers (such as other encoder nodes, repository servers, etc.) via the network interface 605. Additionally, modules may be stored in the memory 703, and these modules may provide instructions such that when the instructions of the modules are executed by the processing circuit 701, the processing circuit 701 performs corresponding operations.

[0053] Figure 8 FIG. 4 is a block diagram showing elements of a decoder 602 configured to decode audio frames according to some embodiments of the inventive concept. As shown, the decoder 602 may include a network interface circuit 805 (also referred to as a network interface) configured to provide communications with other devices / entities / functions / etc. The decoder 602 may also include a processing circuit 801 (also referred to as a processor or a processor circuit) coupled to the network interface circuit 805, and a memory circuit 803 (also referred to as a memory) coupled to the processing circuit. The memory circuit 803 may include computer-readable program code which, when executed by the processing circuit 801, causes the processing circuit to perform operations according to the embodiments disclosed herein.

[0054] According to other embodiments, the processing circuit 801 may be defined to include a memory, such that a separate memory circuit is not required. As discussed herein, the operations of the decoder 602 may be performed by the processor 801 and / or the network interface 805. For example, the processing circuit 801 may control the network interface circuit 805 to receive communications from the encoder 600. Additionally, modules may be stored in the memory 803, and these modules may provide instructions such that when the instructions of the modules are executed by the processing circuit 801, the processing circuit 801 performs corresponding operations.

[0055] As previously mentioned, when the background noise does not carry sufficient energy but is still audible, the noise spectrum present in the reconstructed signal may negatively affect the overall quality by adding to the noise spectrum. In other cases where the noise spectrum carries a large amount of energy of the corresponding signal, zeroing or attenuating the noise spectrum may result in a sudden drop in energy in the reconstructed signal, which in turn may negatively affect the overall quality of the perceived signal.

[0056] According to various embodiments of the inventive concept, the noise spectrum will be attenuated or zeroed when it is harmful, and remain unchanged when the noise spectrum is needed.

[0057] One aspect of various embodiments of the inventive concept is the use of the available amplitude representation of the reconstructed signal, which results in a very low complexity of controlling the noise spectrum in the reconstructed signal.

[0058] The described inventive concept can also be used with sub - frame notation. In other words, sub - frames can form a group of frames having the same window shape as described herein, and sub - frames do not need to be part of a larger frame.

[0059] According to some embodiments of the inventive concept, the operation of decoder 602 will now be discussed with reference to Figure 9 the flowchart of (implemented using the structure of the block diagram of Figure 8 . For example, the modules can be stored in the memory 803 of Figure 8 , and these modules can provide instructions such that when the instructions of the modules are executed by the corresponding decoder processing circuit 801, the processing circuit 801 performs the corresponding operations of the flowchart.

[0060] As previously mentioned, the past decoded analysis frame can be written as

[0061] x(n)

[0062] where n = 0, 1, 2, …, N denotes the number of samples in frame m, and N is the length of the frame. In block 901, the processing circuit 801 performs a frequency - domain analysis of the previously decoded audio signal to obtain the spectrum. A window can be applied to obtain the window sequence.

[0063] x win (n)=x(n)w(n)

[0064] The frequency - domain analysis can be a discrete Fourier transform according to the following formula

[0065]

[0066] In block 903, the processing circuit 801 identifies the tonal components in the spectrum by identifying the peaks in the spectrum. For example, the magnitude representation of X(k) is determined according to the following formula

[0067]

[0068] where Re{X(k)} and Im{X(k)} represent the real and imaginary parts of X(k) respectively. Various algorithms can be used to find the peaks and the corresponding positions of the peaks in the spectrum, rendering the peak position at frequency bin k i where i is the peak index.

[0069] In block 905, processing circuitry 801 determines (e.g., finds) the fractional frequency of each identified peak. For example, the peak detector algorithm used can detect peak frequencies on a fractional frequency scale. A set of peaks

[0070] F = {f i}, i = 1, 2, … N peaks

[0071] can be detected, which are represented by their estimated fractional frequency f i and where N peaks is the number of detected peaks. The fractional frequency can be expressed as a fraction of DFT bins such that, for example, the Nyquist frequency is found at f = N / 2. Each peak can be associated with multiple frequency bins representing that peak. Frequency bin k i represents a frequency on an integer scale, while f i represents the peak position on a fractional scale:

[0072]

[0073] where k i is an integer frequency and G(i) is a set of bins representing the peak at frequency f i . The number N near is an adjustment constant that can be determined when designing the system. A larger N near provides higher accuracy in each peak representation but also introduces a greater distance between the peaks that can be modeled. A suitable value for N near can be in the range [1...6].

[0074] In block 907, processing circuitry 801 applies a phase adjustment to each identified peak by adjusting the phase of the peak and adjacent bins. In block 909, processing circuitry 801 applies a random phase adjustment to the noise spectrum that includes spectral bins that do not belong to the peak and its adjacent bins. In other words, a random phase is applied to the remaining bins that are not occupied by the peak bins G i and are referred to as the noise spectrum or the noise component of the spectrum. These bins can be populated with the coefficients of the stored spectrum to which the random phase has been applied. The remaining bins can also be populated with spectral coefficients that preserve the desired characteristics of the signal, such as the correlation with the second channel in a multichannel decoder system.

[0075] In block 911, processing circuitry 801 estimates the relative energy between the noise spectrum and the complete spectrum. This may occur after the identification of the peaks, fractional peak frequencies, set of peaks G(m,i), and the remaining noise spectrum X noise (k). The analysis of the relative energy of the noise spectrum can be done using the noise signal ratio (NSR) according to the following equation:

[0076]

[0077] where E X is the energy of the full spectrum, is the energy of the noise spectrum, N is the number of samples in the analysis window, and G(i) is the bin set of the peak and adjacent bins. Note that NSR will be in the range [0,1]. Note that due to the symmetry of the DFT spectrum and since energy ratios are being compared, the mirror negative frequencies at may be omitted in the energy calculation. To correctly calculate the absolute energy, the entire spectrum must be included.

[0078] In block 913, the processing circuit 801 determines the attenuation of the noise spectrum based on the relative energy. In some embodiments of the inventive concept, the NSR and a threshold NSR thr are used to obtain a noise attenuation factor that is later applied to the noise spectrum. In an embodiment, when the NSR is below the threshold NSR thr a noise is set to zero, otherwise it is set to one. A suitable value for NSR thr in some embodiments of the inventive concept may be NSR thr = 0.175 or in other embodiments of the inventive concept is in the range NSR thr ∈(0,0.5].

[0079]

[0080] Then in block 915, the processing circuit 801 applies the noise attenuation factor to the noise spectrum to form the attenuation of the noise spectrum. For example, the attenuation of the noise spectrum may be formed according to the following equation

[0081] X noise,att (k) = a noise ·X noise (k)

[0082] Note that the signal-to-noise ratio may also be used to make a decision. In block 917, the processing circuit 801 applies an inverse transform to the error concealment spectrum to the time domain, the error concealment spectrum including the peak and the attenuated noise spectrum, and inserts the time domain concealment frame into the decoded audio sample sequence. Thus, together with the peak whose phase has been adjusted, the attenuated noise spectrum X noise，att (k) is then transformed to the time domain by an inverse DFT step. The time domain ECU frame may be further processed with an optional TDA step and appropriate windowing and overlap-add operations to fit the decoded audio sample sequence generated by the decoder 602. In some embodiments of the inventive concept, the time domain ECU frame is adapted using a time domain aliasing operation to fit a decoder based on a modulated lapped transform (MLT).

[0083] In another embodiment of the inventive concept, the noise attenuation factor a noise may be located at a noise ∈ [0,1]. The noise attenuation factor may be formed by performing a linear mapping of the NSR to the noise attenuation factor using, for example, a piecewise linear function such as the following formula,

[0084]

[0085] where NSR lo is a constant in the range NSR lo ∈ (0, 0.5], and NSR hi is a constant in the range NSR hi ∈ (NSR lo , 1).

[0086] In a further embodiment of the inventive concept, the noise attenuation factor a noise may depend only on the NSR. For example, a noise may be determined according to the following formula

[0087] a noise = min(1, c·NSR)

[0088] where c is a constant in the range c ∈ (0, 1]. Generally, the attenuation factor may be formed as a function of the analyzed spectrum X(k) and the set of peaks Z.

[0089] a noise = f(X(k), Z), Z = {z i}, i = 1, 2, …, N peaks

[0090] Figure 10 illustrates how the inventive concept of noise attenuation can be integrated with the Figure 4 phase ECU block diagram. The noise suppression decision maker block 1001 determines whether noise suppression attenuation should be applied. Although the noise suppression decision maker block 1001 is shown between the peak finder and the fractional decision estimator, the noise suppression block 1001 may be performed elsewhere in the phase ECU block diagram. The application of the noise attenuation factor on the noise spectrum block 1003 may be applied after the phase randomization of the noise spectrum block, but may also be applied before the phase randomization.

[0091] Figure 11 illustrates how the inventive concept of noise attenuation can be integrated with the Figure 5Integration of the phase ECU flowchart. The noise suppression decision maker block 1001 determines whether noise suppression attenuation should be applied. Although the noise suppression decision maker block 1001 is shown between the peak finder block 540 and the fractional decision estimator block 550, the noise suppression block 1001 can be executed elsewhere in the phase ECU flowchart. The application of the noise attenuation factor on the noise spectrum block 1003 can be applied after the phase randomization of the noise spectrum block 570, but can also be applied before the phase randomization.

[0092] Figure 12 The operations performed to reach the noise suppression decision are shown. In block 1210, the processing circuit 801 determines the magnitude representation of X(k). This can be determined according to the following formula

[0093]

[0094] where Re{X(k)} and Im{X(k)} represent the real and imaginary parts of X(k), respectively.

[0095] In block 1220, the processing circuit 801 inputs the magnitude representation into a peak finder algorithm, such as the peak finder algorithm described above.

[0096] In block 1230, the processing circuit 801 calculates the energy of the signal (e.g., the complete spectrum) including the peak and the adjacent bins of the peak. In block 1240, the processing circuit 801 excludes the peak and the adjacent bins of the peak to determine the noise spectrum. In block 1250, the processing circuit 801 calculates the energy of the noise spectrum. This calculation can be performed as shown in block 911.

[0097] In block 1260, the processing circuit 801 obtains the noise signal ratio (NSR). For example, as described in block 911, the noise signal ratio (NSR) can be determined according to the following formula:

[0098]

[0099] where E X is the energy of the complete spectrum, is the energy of the noise spectrum, N is the number of samples, and G(i) is the set of bins of the peak and the adjacent bins.

[0100] In block 1270, the processing circuit 801 determines whether the NSR is below the threshold level. For example, in some embodiments of the inventive concept, the threshold can be 0.175, or preferably 0.03, or in other embodiments of the inventive concept as described above, within the range of (0, 0.5].

[0101] In block 1280, in response to the NSR being not lower than a threshold (i.e., the NSR being higher than the threshold), the processing circuit 801 sets the noise attenuation factor to 1. In block 1290, in response to the NSR being lower than the threshold, the processing circuit 801 sets the noise attenuation factor to zero.

[0102] Figure 13 Another embodiment of the noise suppression decision maker is shown. Blocks 1210 to 1260 are performed as Figure 12 described. In block 1300, the processing circuit 801 updates the noise attenuation factor. For example, if the NSR is higher than the threshold ratio, the noise attenuation factor is updated to indicate that noise attenuation is to be applied. If the NSR is lower than the threshold ratio, the noise attenuation factor is updated to indicate that no noise attenuation is to be applied.

[0103] Figure 14A and 14B show an example of bins for determining the energy of a signal and the energy of the noise spectrum. In Figure 14A it, the bin of the peak and the adjacent bins of the peak bin are shown as the peak and the adjacent bins, and the noise bins are indicated as the noise spectrum. In Figure 14B it, the peak and the adjacent bins of the peak are excluded to determine the noise spectrum.

[0104] It should be noted that the above description applies to the first lost frame after the correctly received frame has been decoded. Under poor channel conditions, several consecutive frames may be lost, which is also called a burst error. In this case, the method of the phase ECU is to continue to reconstruct the frames based on the same spectral analysis as the first lost frame, except that the phase adjustment continues for an extended hidden period. The results of the analysis performed in the first lost frame, including peak analysis and noise floor attenuation, can preferably be reused in subsequent lost frames.

[0105] Example embodiments are discussed below.

[0106] Embodiment 1. A method for generating a hidden audio frame of an audio signal in a decoding device, the method comprising:

[0107] Performing (901) a frequency domain analysis of a sequence of previously decoded audio signals to obtain a spectrum;

[0108] Identifying (903) tone components in the spectrum by identifying peaks in the spectrum;

[0109] Determining (905) the fractional frequency of each identified peak;

[0110] Applying (907) phase adjustment to each identified peak by adjusting the phase of the peak and the adjacent bins;

[0111] Apply a random phase adjustment (909) to the noise spectrum that includes spectral bins that do not belong to the peak and its adjacent bins;

[0112] Estimate (911) the relative energy between the noise spectrum and the full spectrum;

[0113] Determine (913) the attenuation of the noise spectrum based on the relative energy;

[0114] Apply (915) the attenuation to the noise spectrum; and

[0115] Apply an inverse transform to the error concealment spectrum including the peak and the attenuated noise spectrum to the time domain, and insert the time domain concealed frame into the decoded audio sample sequence.

[0116] Example 2. The method according to Example 1, wherein determining (913) the attenuation of the noise spectrum includes: using an attenuation factor according to the following formula,

[0117]

[0118] and applying the factor to the noise spectrum according to the following formula

[0119] X noise,att (k) = a noise ·X noise (k)

[0120] , if the relative energy is below a threshold, set the noise spectrum to zero.

[0121] Example 3. The method according to Example 1, wherein determining (913) the attenuation of the noise spectrum includes setting an attenuation factor according to the following formula

[0122]

[0123] and applying the factor to the noise spectrum according to the following formula

[0124] X noise，att (k) = a noise ·X noise (k)

[0125] Example 4. The method according to Example 1, wherein determining (913) the attenuation of the noise spectrum includes:

[0126] setting an attenuation factor according to the following formula

[0127] a noise = min(1, c·NSR)

[0128] and applying the factor to the noise spectrum according to the following formula

[0129] Xnoise,att (k) = a noise ·X noise (k)

[0130] Example 5. The method according to any one of Examples 1 - 3, wherein a time - domain aliasing operation is used to adapt a time - domain hidden frame to a decoder based on a modulated lapped transform (MLT).

[0131] Example 6. A decoder (602) for generating a hidden audio frame of an audio signal in a decoding device, the decoder (602) comprising:

[0132] a processing circuit (801); and

[0133] a memory (803) coupled to the processing circuit, wherein the memory comprises instructions that, when executed by the processing circuit, cause the decoder (602) to perform operations including the following operations:

[0134] Perform (901) a frequency - domain analysis of a sequence of previously decoded audio signals to obtain a spectrum;

[0135] Identify (903) tonal components in the spectrum by identifying peaks in the spectrum;

[0136] Determine (905) the fractional frequency of each identified peak;

[0137] Apply (907) a phase adjustment to each identified peak by adjusting the phase of the peak and adjacent bins;

[0138] Apply (909) a random phase adjustment to a noise spectrum that includes spectral bins that do not belong to the peaks and their adjacent bins;

[0139] Estimate (911) the relative energy between the noise spectrum and the complete spectrum;

[0140] Determine (913) the attenuation of the noise spectrum based on the relative energy;

[0141] Apply (915) the attenuation to the noise spectrum; and

[0142] Apply (917) an inverse transform to the error - concealment spectrum including the peaks and the attenuated noise spectrum to the time domain, and insert the time - domain hidden frame into the sequence of decoded audio samples.

[0143] Example 7. The decoder (602) according to Example 6, wherein when determining (913) the attenuation of the noise spectrum, the memory comprises instructions that, when executed by the processing circuit, cause the decoder (602) to perform operations including the following operation: use an attenuation factor according to the following formula

[0144]

[0145] and apply this factor to the noise spectrum according to the following formula

[0146] X noise,att (k) = a noise ·X noise (k)

[0147] If the relative energy is below the threshold, set the noise spectrum to zero.

[0148] Example 8. The decoder (602) according to Example 6, wherein when determining (913) the attenuation of the noise spectrum, the memory includes instructions that, when executed by the processing circuit, cause the decoder (602) to perform operations including the following: Set the attenuation factor according to the following formula

[0149]

[0150] and apply this factor to the noise spectrum according to the following formula

[0151] X noise,att (k) = a noise ·X noise (k)

[0152] Example 9. The decoder (602) according to Example 6, wherein when determining (913) the attenuation of the noise spectrum, the memory includes instructions that, when executed by the processing circuit, cause the decoder (602) to perform operations including the following:

[0153] Set the attenuation factor according to the following formula

[0154] a noise = min(1, c·NSR)

[0155] and apply this factor to the noise spectrum according to the following formula

[0156] X noise,att (k) = a noise ·X noise (k)

[0157] Example 10. The decoder (602) according to any one of Examples 6-9, wherein a time-domain aliasing operation is used to adapt the time-domain hidden frame to a decoder based on a modulation lapped transform (MLT).

[0158] Example 11. A decoder (602) adapted to perform operations, the operations including:

[0159] Perform (901) a frequency-domain analysis of a sequence of previously decoded audio signals to obtain a spectrum;

[0160] Identify (903) tonal components in a spectrum by identifying peaks in the spectrum;

[0161] Determine (905) the fractional frequency of each identified peak;

[0162] Apply (907) phase adjustment to each identified peak by adjusting the phase of the peak and adjacent bins;

[0163] Apply (909) a random phase adjustment to a noise spectrum that includes spectrum bins that do not belong to the peak and its adjacent bins;

[0164] Estimate (911) the relative energy between the noise spectrum and the full spectrum;

[0165] Determine (913) the attenuation of the noise spectrum based on the relative energy;

[0166] Apply (915) the attenuation to the noise spectrum; and

[0167] Apply (917) an inverse transform to the error concealment spectrum including the peak and the attenuated noise spectrum to the time domain and insert the time domain concealment frame into the decoded audio sample sequence.

[0168] Example 12. The decoder (602) according to Example 11, wherein the decoder (602) is further adapted to perform the operations according to any one of Examples 2-5.

[0169] Example 13. A computer program comprising program code to be executed by a processing circuit (801) of a decoder (602), whereby execution of the program code causes the decoder (602) to perform operations including the following operations:

[0170] Perform (901) a frequency domain analysis of a sequence of previously decoded audio signals to obtain a spectrum;

[0171] Identify (903) tonal components in the spectrum by identifying peaks in the spectrum;

[0172] Determine (905) the fractional frequency of each identified peak;

[0173] Apply (907) phase adjustment to each identified peak by adjusting the phase of the peak and adjacent bins;

[0174] Apply (909) a random phase adjustment to a noise spectrum that includes spectrum bins that do not belong to the peak and its adjacent bins;

[0175] Estimate (911) the relative energy between the noise spectrum and the full spectrum;

[0176] Determine (913) the attenuation of the noise spectrum based on the relative energy;

[0177] Apply (915) the attenuation to the noise spectrum; and

[0178] Apply an inverse transform (917) to the error concealment spectrum including the peaks and the attenuated noise spectrum to the time domain, and insert the time domain concealed frame into the decoded audio sample sequence.

[0179] Example 14. The computer program according to Example 12 includes further program code, whereby the execution of the further program code causes the decoder (602) to perform the operations according to any one of Examples 2-5.

[0180] Example 15. A computer program product including a non-transitory storage medium, the non-transitory storage medium including program code to be executed by a processing circuit (801) of a decoder (602), whereby the execution of the program code causes the decoder (602) to perform operations including the following operations:

[0181] Perform (901) a frequency domain analysis of a sequence of previously decoded audio signals to obtain a spectrum;

[0182] Identify (903) tonal components in the spectrum by identifying peaks in the spectrum;

[0183] Determine (905) the fractional frequency of each identified peak;

[0184] Apply (907) a phase adjustment to each identified peak by adjusting the phase of the peak and adjacent bins;

[0185] Apply a random phase adjustment (909) to the noise spectrum, the noise spectrum including spectral bins that do not belong to the peaks and their adjacent bins;

[0186] Estimate (911) the relative energy between the noise spectrum and the complete spectrum;

[0187] Determine (913) the attenuation of the noise spectrum based on the relative energy;

[0188] Apply (915) the attenuation to the noise spectrum; and

[0189] Apply an inverse transform (917) to the error concealment spectrum including the peaks and the attenuated noise spectrum to the time domain, and insert the time domain concealed frame into the decoded audio sample sequence.

[0190] Example 16. The computer program product according to Example 15, wherein the non-transitory storage medium includes further program code to be executed by a processing circuit (801) of the decoder (602), whereby the execution of the further program code causes the decoder (602)) to perform the operations according to any one of Examples 2-5.

[0191] Explanations of various abbreviations / acronyms used in this disclosure are provided below.

[0192] Abbreviation Explanation

[0193] ADC Analog-to-Digital Converter

[0194] BFI Bad Frame Indicator

[0195] DAC Digital-to-Analog Converter

[0196] DFT Discrete Fourier Transform

[0197] MDCT Modified Discrete Cosine Transform

[0198] MLT Modulation Lapped Transform

[0199] TDA Time Domain Aliasing

[0200] PLC Packet Loss Concealment

[0201] ECU Error Concealment Unit

[0202] NSR Noise Signal Ratio

[0203] Additional explanations are provided below.

[0204] In general, unless a different meaning is clearly given and / or implied in the context in which the term is used, all terms used herein will be interpreted according to their ordinary meaning in the relevant technical field. All references to an element, device, component, apparatus, step, etc. shall be construed broadly as referring to at least one instance of the element, device, component, apparatus, step, etc. unless explicitly stated otherwise. The steps of any method disclosed herein need not be performed in the exact order disclosed unless a step is explicitly described as being after or before another step and / or implicitly a step must be after or before another step. In appropriate cases, any feature of any embodiment disclosed herein may be applied to any other embodiment. Similarly, any advantage of any embodiment may be applied to any other embodiment and vice versa. Other objects, features, and advantages of the appended embodiments will become apparent from the following description.

[0205] Some embodiments contemplated herein will now be described more fully with reference to the accompanying drawings. However, other embodiments are included within the scope of the subject matter disclosed herein, and the disclosed subject matter should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided only as examples to convey the scope of the subject matter to those skilled in the art.

[0206] Figure 15 A wireless network according to some embodiments is shown.

[0207] Although the subject matter described herein can be implemented using any suitable components in any suitable type of system, the embodiments disclosed herein are capable of being implemented in a wireless network such as Figure 15 the example wireless network shown. For simplicity, Figure 15 the wireless network only depicts network 1506, network nodes 1560 and 1560b, and wireless devices (WDs) 1510, 1510b, and 1510c (also referred to as mobile terminals). In various embodiments, decoder 602 and encoder 600 can be implemented in network nodes 1560 and 1560b and / or WDs 1510, 1510b, and 1510c. In practice, the wireless network can further include any additional elements suitable for supporting communication between wireless devices or between a wireless device and another communication device (e.g., a landline telephone, a service provider, or any other network node or terminal device). Among the components shown, network node 1560 and wireless device (WD) 1510 are depicted in additional detail. The wireless network can provide communication and other types of services to one or more wireless devices to facilitate the wireless devices' access to and / or use of services provided by the wireless network or services provided via the wireless network.

[0208] The wireless network can include any type of communication, telecommunication, data, cellular, and / or radio network or other similar type of system and / or interface therewith. In some embodiments, the wireless network can be configured to operate according to a specific standard or other type of predefined rules or procedures. Thus, a particular embodiment of the wireless network can implement communication standards such as Global System for Mobile Communications (GSM), Universal Mobile Telecommunications System (UMTS), Long Term Evolution (LTE), and / or other suitable 2G, 3G, 4G, or 5G standards; Wireless Local Area Network (WLAN) standards such as the IEEE 802.11 standard; and / or any other appropriate wireless communication standards such as Worldwide Interoperability for Microwave Access (WiMax), Bluetooth, Z-Wave, and / or ZigBee standards.

[0209] Network 1506 can include one or more backhaul networks, core networks, IP networks, Public Switched Telephone Network (PSTN), packet data networks, optical networks, Wide Area Network (WAN), Local Area Network (LAN), Wireless Local Area Network (WLAN), wired networks, wireless networks, Metropolitan Area Network (MAN), and other networks that enable communication between devices.

[0210] Network nodes 1560 and WD 1510 include various components described in more detail below. These components work together to provide network node and / or wireless device functionality, such as providing wireless connectivity in a wireless network. In different embodiments, a wireless network may include any number of wired or wireless networks, network nodes, base stations, controllers, wireless devices, relay stations, and / or any other components or systems that can facilitate or participate in the communication of data and / or signals over wired or wireless connections.

[0211] As used herein, a network node refers to a device that is capable of, configured to, arranged to, and / or operable to communicate directly or indirectly with a wireless device and / or with other network nodes or devices in a wireless network to enable and / or provide wireless access to the wireless device and / or perform other functions (such as management) in the wireless network. Examples of network nodes include, but are not limited to, access points (APs) (e.g., radio access points), base stations (BSs) (e.g., radio base stations, Node B, evolved Node B (eNB), and NR Node B (gNBs)). Base stations can be classified based on the amount of coverage they provide (or, in other words, their transmit power levels), and can then also be referred to as femto base stations, pico base stations, micro base stations, or macro base stations. A base station can be a relay node or a relay donor node that controls a relay. A network node can also include one or more (or all) parts of a distributed radio base station, such as a centralized digital unit and / or a remote radio unit (RRU) (sometimes also referred to as a remote radio head (RRH)). Such a remote radio unit may or may not be integrated with an antenna as an antenna integrated radio. Parts of a distributed radio base station can also be referred to as nodes in a distributed antenna system (DAS). Other examples of network nodes include multi-standard radio (MSR) devices such as MSR BSs, network controllers such as radio network controllers (RNCs) or base station controllers (BSCs), base transceiver stations (BTSs), transmission points, transmission nodes, multi-cell / multicast coordination entities (MCEs), core network nodes (e.g., MSC, MME), O&M nodes, OSS nodes, SON nodes, positioning nodes (e.g., E-SMLC), and / or MDTs. As another example, a network node can be a virtual network node as described in more detail below. However, more generally, a network node can represent any suitable device (or group of devices) that is capable of, configured to, arranged to, and / or operable to enable a wireless device to access a wireless network and / or provide access to the wireless network to the wireless device or provide some service to a wireless device that has accessed the wireless network.

[0212] In Figure 15In this example, network node 1560 includes processing circuitry 1570, a device-readable medium 1580, an interface 1590, auxiliary equipment 1584, a power supply 1586, a power supply circuit 1587, and an antenna 1562. Although the network node 1560 shown in the example wireless network of Figure 15 may represent a device including a combination of the illustrated hardware components, other embodiments may include network nodes with different combinations of components. It should be understood that a network node includes any suitable combination of hardware and / or software required to perform the tasks, features, functions, and methods disclosed herein, including encoder 600 and / or decoder 602. Additionally, although the components of network node 1560 are depicted as a single box located within a larger box or nested within multiple boxes, in reality, a network node may include multiple different physical components that make up a single illustrated component (e.g., the device-readable medium 1580 may include multiple individual hard disk drives as well as multiple RAM modules).

[0213] Similarly, network node 1560 may include multiple physically separate components (e.g., NodeB components and RNC components, or BTS components and BSC components, etc.), each of which may have their own respective components. In some cases where network node 1560 includes multiple separate components (e.g., BTS and BSC components), one or more of the separate components may be shared among several network nodes. For example, a single RNC may control multiple NodeBs. In such cases, each unique NodeB and RNC pair may be considered a separate network node in some instances. In some embodiments, network node 1560 may be configured to support multiple radio access technologies (RATs). In such embodiments, some components may be replicated (e.g., separate device-readable media 1580 for different RATs), and some components may be reused (e.g., the same antenna 1562 may be shared by the RATs). Network node 1560 may also include multiple sets of various illustrated components for different wireless technologies (e.g., GSM, WCDMA, LTE, NR, Wi-Fi, or Bluetooth wireless technologies) to be integrated into network node 1560. These wireless technologies may be integrated into the same or different chips or chip sets and other components within network node 1560.

[0214] The processing circuitry 1570 is configured to perform any determination, calculation, or similar operation described herein as being provided by a network node (e.g., certain acquisition operations). Operations performed by the processing circuitry 1570 may include: processing information acquired by the processing circuitry 1570, such as by converting the acquired information into other information, comparing the acquired information or the converted information with information stored in the network node, and / or performing one or more operations based on the acquired information or the converted information; and making a determination as a result of such processing.

[0215] The processing circuitry 1570 may include a microprocessor, a controller, a microcontroller, a central processing unit, a digital signal processor, an application specific integrated circuit, a field programmable gate array, or any other suitable computing device, resource, or combination of one or more of hardware, software, and / or encoded logic operable to provide the functionality of the network node 1560 alone or in combination with other components of the network node 1560 (e.g., the device-readable medium 1580). For example, the processing circuitry 1570 may execute instructions stored in the device-readable medium 1580 or in a memory within the processing circuitry 1570. Such functionality may include providing any of the various wireless features, functions, or benefits discussed herein. In some embodiments, the processing circuitry 1570 may include a system on a chip (SOC).

[0216] In some embodiments, the processing circuitry 1570 may include one or more of radio frequency (RF) transceiver circuitry 1572 and baseband processing circuitry 1574. In some embodiments, the radio frequency (RF) transceiver circuitry 1572 and the baseband processing circuitry 1574 may be on separate chips (or chip sets), boards, or units (e.g., a radio unit and a digital unit). In alternative embodiments, some or all of the RF transceiver circuitry 1572 and the baseband processing circuitry 1574 may be on the same chip or chip set, board, or unit.

[0217] In certain embodiments, some or all of the functionality described herein as being provided by a network node, base station, eNB, or other such network device may be performed by the processing circuitry 1570 executing instructions stored on the device-readable medium 1580 or in a memory within the processing circuitry 1570. In alternative embodiments, some or all of the functionality may be provided by the processing circuitry 1570 without executing instructions stored on a separate or discrete device-readable medium, such as in a hardwired manner. In any of those embodiments, whether or not instructions stored on a device-readable storage medium are executed, the processing circuitry 1570 may be configured to perform the described functionality. The benefits provided by such functionality are not limited to the processing circuitry 1570 alone or to other components of the network node 1560, but are enjoyed by the network node 1560 as a whole and / or generally by an end user and a wireless network.

[0218] The device-readable medium 1580 can include any form of volatile or non-volatile computer-readable memory, including but not limited to persistent memory, solid-state memory, remotely installed memory, magnetic media, optical media, random access memory (RAM), read-only memory (ROM), mass storage media (such as hard disks), removable storage media (such as flash drives, compact discs (CDs) or digital video discs (DVDs)), and / or any other volatile or non-volatile, non-transitory device-readable and / or computer-executable storage device that stores information, data, and / or instructions that can be used by the processing circuitry 1570. The device-readable medium 1580 can store any suitable instructions, data, or information, including computer programs, software, applications including one or more of logic, rules, code, tables, etc., and / or one or more of other instructions that can be executed by the processing circuitry 1570 and utilized by the network node 1560. The device-readable medium 1580 can be used to store any calculations performed by the processing circuitry 1570 and / or any data received via the interface 1590. In some embodiments, the processing circuitry 1570 and the device-readable medium 1580 can be considered integrated.

[0219] The interface 1590 is used for wired or wireless communication of signaling and / or data between the network node 1560, the network 1506, and / or the WD 1510. As shown, the interface 1590 includes ports / terminals 1594 to send and receive data to and from the network 1506, for example, via a wired connection. The interface 1590 also includes a radio front-end circuit 1592 that can be coupled to the antenna 1562 or is part of the antenna 1562 in certain embodiments. The radio front-end circuit 1592 includes a filter 1598 and an amplifier 1596. The radio front-end circuit 1592 can be connected to the antenna 1562 and the processing circuitry 1570. The radio front-end circuit 1592 can be configured to condition the signals communicated between the antenna 1562 and the processing circuitry 1570. The radio front-end circuit 1592 can receive digital data that is to be transmitted to other network nodes or the WD via a wireless connection. The radio front-end circuit 1592 can convert the digital data into a radio signal with appropriate channel and bandwidth parameters using a combination of the filter 1598 and / or the amplifier 1596. The radio signal can then be transmitted via the antenna 1562. Similarly, when receiving data, the antenna 1562 can collect the radio signal, which is then converted into digital data by the radio front-end circuit 1592. The digital data can be passed to the processing circuitry 1570. In other embodiments, the interface can include different components and / or different combinations of components.

[0220] In certain alternative embodiments, network node 1560 may not include a separate radio front-end circuit 1592. Instead, processing circuit 1570 may include a radio front-end circuit and may be connected to antenna 1562 without a separate radio front-end circuit 1592. Similarly, in some embodiments, all or some of RF transceiver circuits 1572 may be considered part of interface 1590. In other embodiments, interface 1590 may include one or more ports or terminals 1594, radio front-end circuit 1592, and RF transceiver circuits 1572 as part of a wireless unit (not shown), and interface 1590 may communicate with baseband processing circuit 1574, which is part of a digital unit (not shown).

[0221] Antenna 1562 may include one or more antennas or antenna arrays configured to transmit and / or receive wireless signals. Antenna 1562 may be coupled to radio front-end circuit 1592 and may be any type of antenna capable of wirelessly transmitting and receiving data and / or signals. In some embodiments, antenna 1562 may include one or more omnidirectional, sector, or panel antennas operable to transmit / receive radio signals, for example, between 2 GHz and 66 GHz. Omnidirectional antennas can be used to transmit / receive radio signals in any direction, sector antennas can be used to transmit / receive radio signals from devices within a specific area, and panel antennas can be line-of-sight antennas used to transmit / receive radio signals in a relatively straight line. In some cases, the use of more than one antenna may be referred to as MIMO. In certain embodiments, antenna 1562 may be separate from network node 1560 and may be connected to network node 1560 via an interface or port.

[0222] Antenna 1562, interface 1590, and / or processing circuit 1570 may be configured to perform any of the receiving operations and / or certain acquisition operations described herein as being performed by a network node. Any information, data, and / or signals may be received from a wireless device, another network node, and / or any other network device. Similarly, antenna 1562, interface 1590, and / or processing circuit 1570 may be configured to perform any of the sending operations described herein as being performed by a network node. Any information, data, and / or signals may be sent to a wireless device, another network node, and / or any other network device.

[0223] The power supply circuit 1587 may include or be coupled to a power management circuit and be configured to supply power to components of the network node 1560 to perform the functions described herein. The power supply circuit 1587 may receive power from a power source 1586. The power source 1586 and / or the power supply circuit 1587 may be configured to supply power to the respective components of the network node 1560 in a form suitable for each component (e.g., at the voltage and current levels required for each corresponding component). The power source 1586 may be included within the power supply circuit 1587 and / or the network node 1560 or external thereto. For example, the network node 1560 may be connectable via an input circuit or interface (e.g., a cable) to an external power source (e.g., a power outlet), and the external power source may supply power to the power supply circuit 1587. As another example, the power source 1586 may include a power source in the form of a battery or battery pack that is connected to or integrated within the power supply circuit 1587. The battery may provide backup power in the event of a failure of the external power source. Other types of power sources, such as photovoltaic devices, may also be used.

[0224] Alternative embodiments of the network node 1560 may include additional components in addition to Figure 15 the components shown, which may be responsible for providing certain aspects of the functionality of the network node, including any of the functions described herein and / or any functions necessary to support the subject matter described herein. For example, the network node 1560 may include a user interface device to allow information to be input into the network node 1560 and to allow information to be output from the network node 1560. This may allow a user to perform diagnostic, maintenance, repair, and other administrative functions of the network node 1560.

[0225] As used herein, a wireless device (WD) refers to a device capable of, configured to, arranged to, and / or operable to communicate wirelessly with a network node and / or another wireless device. Unless otherwise specified, the term WD may be used interchangeably with user equipment (UE) herein. Wireless communication may involve the use of electromagnetic waves, radio waves, infrared waves, and / or other types of signals suitable for transmitting and / or receiving wireless signals over the air. In some embodiments, the WD may be configured to send and / or receive information without direct human interaction. For example, when triggered by an internal or external event or in response to a request from the network, the WD may be designed to send information to the network according to a predetermined schedule. Examples of WDs include, but are not limited to, smart phones, mobile phones, cellular phones, IP voice (VoIP) phones, wireless local loop phones, desktop computers, personal digital assistants (PDAs), wireless cameras, gaming consoles or devices, music storage devices, playback devices, wearable terminal devices, wireless endpoints, mobile stations, tablets, laptops, laptop embedded equipment (LEE), laptop mounted equipment (LME), smart devices, wireless client equipment (CPE), in-vehicle wireless terminal devices, etc. The WD may support device-to-device (D2D) communication (e.g., by implementing 3GPP standards for sidelink communication, vehicle-to-vehicle (V2V), vehicle-to-infrastructure (V2I), vehicle-to-everything (V2X)), and in such cases may be referred to as a D2D communication device. As yet another specific example, in an Internet of Things (IoT) scenario, the WD may represent a machine or other device that performs monitoring and / or measurement and sends the results of such monitoring and / or measurement to another WD and / or network node. In this case, the WD may be a machine-to-machine (M2M) device, which may be referred to as an MTC device in the 3GPP context. As a specific example, the WD may be a UE that implements the 3GPP narrowband Internet of Things (NB-IoT) standard. Specific examples of such machines or devices are sensors, metering devices such as power meters, industrial machinery, or household or personal appliances (e.g., refrigerators, televisions, etc.), personal wearable devices (e.g., watches, fitness trackers, etc.). In other cases, the WD may represent a vehicle or other device capable of monitoring and / or reporting its operating status or other functions associated with its operation. The WD as described above may represent a wirelessly connected endpoint, in which case the device may be referred to as a wireless terminal. Additionally, the WD as described above may be mobile, in which case it may also be referred to as a mobile device or mobile terminal.

[0226] As shown in the figure, the wireless device 1510 includes an antenna 1511, an interface 1514, a processing circuit 1520, a device-readable medium 1530, a user interface device 1532, an auxiliary device 1534, a power supply 1536, and a power supply circuit 1537. The WD 1510 may include multiple sets of one or more of the shown components for different wireless technologies supported by the WD 1510 (such as GSM, WCDMA, LTE, NR, Wi-Fi, WiMAX, or Bluetooth wireless technologies, to name just a few). These wireless technologies may be integrated with other components in the WD 1510 into the same or different chips or chip sets.

[0227] The antenna 1511 may include one or more antennas or antenna arrays configured to transmit and / or receive wireless signals and is connected to the interface 1514. In some alternative embodiments, the antenna 1511 may be separate from the WD 1510 and may be connected to the WD 1510 through an interface or a port. The antenna 1511, the interface 1514, and / or the processing circuit 1520 may be configured to perform any receiving or transmitting operations described herein as being performed by the WD. Any information, data, and / or signals may be received from a network node and / or another WD. In some embodiments, the radio front-end circuit and / or the antenna 1511 may be considered an interface.

[0228] As shown in the figure, the interface 1514 includes a radio front-end circuit 1512 and an antenna 1511. The radio front-end circuit 1512 includes one or more filters 1518 and amplifiers 1516. The radio front-end circuit 1512 is connected to the antenna 1511 and the processing circuit 1520 and is configured to condition the signals transmitted between the antenna 1511 and the processing circuit 1520. The radio front-end circuit 1512 may be coupled to the antenna 1511 or be part of the antenna 1511. In some embodiments, the WD 1510 may not include a separate radio front-end circuit 1512; instead, the processing circuit 1520 may include a radio front-end circuit and may be connected to the antenna 1511. Similarly, in some embodiments, some or all of the RF transceiver circuit 1522 may be considered part of the interface 1514. The radio front-end circuit 1512 may receive digital data to be transmitted to other network nodes or WDs via a wireless connection. The radio front-end circuit 1512 may convert the digital data into a radio signal with appropriate channel and bandwidth parameters using a combination of the filters 1518 and / or the amplifiers 1516. The radio signal may then be transmitted through the antenna 1511. Similarly, when receiving data, the antenna 1511 may collect the radio signal, which is then converted into digital data by the radio front-end circuit 1512. The digital data may be passed to the processing circuit 1520. In other embodiments, the interface may include different components and / or different combinations of components.

[0229] The processing circuitry 1520 may include one or more combinations of a microprocessor, a controller, a microcontroller, a central processing unit, a digital signal processor, an application specific integrated circuit, a field programmable gate array, or any other suitable computing device, resource, or combination of hardware, software, and / or code, which is operable to be used alone or in combination with other WD1510 components (such as the device-readable medium 1530) to provide WD1510 functionality. Such functionality may include providing any one of the various wireless features or benefits discussed herein. For example, the processing circuitry 1520 may execute instructions stored in the device-readable medium 1530 or in a memory within the processing circuitry 1520 to provide the functionality disclosed herein.

[0230] As shown, the processing circuitry 1520 includes one or more of an RF transceiver circuit 1522, a baseband processing circuit 1524, and an application processing circuit 1526. In other embodiments, the processing circuitry may include different components and / or different combinations of components. In certain embodiments, the processing circuitry 1520 of the WD 1510 may include a SOC. In some embodiments, the RF transceiver circuit 1522, the baseband processing circuit 1524, and the application processing circuit 1526 may be on separate chips or chip sets. In an alternative embodiment, some or all of the baseband processing circuit 1524 and the application processing circuit 1526 may be combined into one chip or chip set, and the RF transceiver circuit 1522 may be on a separate chip or chip set. In yet another alternative embodiment, some or all of the RF transceiver circuit 1522 and the baseband processing circuit 1524 may be on the same chip or chip set, and the application processing circuit 1526 may be on a separate chip or chip set. In other alternative embodiments, some or all of the RF transceiver circuit 1522, the baseband processing circuit 1524, and the application processing circuit 1526 may be combined in the same chip or chip set. In some embodiments, the RF transceiver circuit 1522 may be part of the interface 1514. The RF transceiver circuit 1522 may condition RF signals for the processing circuitry 1520.

[0231] In some embodiments, some or all of the functions described herein as being performed by the WD may be provided by processing circuitry 1520 that executes instructions stored on a device-readable medium 1530, which in some embodiments may be a computer-readable storage device medium. In alternative embodiments, some or all of the functions may be provided by the processing circuitry 1520 without executing instructions stored on a separate or discrete device-readable storage medium, such as in a hardwired manner. In any of those particular embodiments, whether or not instructions are executed on a device-readable storage medium, the processing circuitry 1520 may be configured to perform the described functions. The benefits provided by such functions are not limited to the processing circuitry 1520 alone or other components of the WD 1510, but may be enjoyed by the WD 1510 and / or the end user and the wireless network as a whole.

[0232] The processing circuitry 1520 may be configured to perform any determination, calculation, or similar operation described herein as being performed by the WD (such as certain acquisition operations). These operations performed by the processing circuitry 1520 may include: processing information obtained by the processing circuitry 1520, such as by converting the obtained information into other information, comparing the obtained information or the converted information with information stored in the WD 1510, and / or performing one or more operations based on the obtained information or the converted information; and, as a result of such processing, making a determination.

[0233] The device-readable medium 1530 may be used to store computer programs, software, applications including one or more of logic, rules, code, tables, etc., and / or other instructions executable by the processing circuitry 1520. The device-readable medium 1530 may include computer memory (such as random access memory (RAM) or read-only memory (ROM)), mass storage media (such as a hard disk), removable storage media (such as a compact disc (CD) or digital video disc (DVD)), and / or any other volatile or non-volatile, non-transitory device-readable and / or computer-executable storage device that stores information, data, and / or instructions usable by the processing circuitry 1520. In some embodiments, the processing circuitry 1520 and the device-readable medium 1530 may be considered integrated.

[0234] The user interface device 1532 can provide components that allow a human user to interact with the WD 1510. Such interaction can take various forms, such as visual, auditory, tactile, etc. The user interface device 1532 can be used to generate output to the user and allow the user to provide input to the WD 1510. The type of interaction may vary depending on the type of user interface device 1532 installed in the WD 1510. For example, if the WD 1510 is a smart phone, the interaction can be through a touch screen; if the WD 1510 is a smart meter, the interaction can be through a screen that provides usage (such as gallons used) or a speaker that provides an audible alert (such as if smoke is detected). The user interface device 1532 can include input interfaces, devices, and circuits, as well as output interfaces, devices, and circuits. The user interface device 1532 is configured to allow information to be input to the WD 1510 and is connected to the processing circuit 1520 to allow the processing circuit 1520 to process the input information. The user interface device 1532 can include, for example, a microphone, a proximity sensor or other sensors, keys / buttons, a touch display, one or more cameras, a USB port, or other input circuits. The user interface device 1532 is also configured to allow information to be output from the WD 1510 and allow the processing circuit 1520 to output information from the WD 1510. The user interface device 1532 can include, for example, a speaker, a display, a vibration circuit, a USB port, a headphone jack, or other output circuits. Using one or more input and output interfaces, devices, and circuits of the user interface device 1532, the WD 1510 can communicate with an end user and / or a wireless network and allow them to benefit from the functions described herein.

[0235] The auxiliary device 1534 is operable to provide more specific functions that the WD may not typically perform. This can include dedicated sensors for making measurements for various purposes, interfaces for additional communication types such as wired communication, etc. The inclusion and type of components of the auxiliary device 1534 can vary according to the embodiment and / or scenario.

[0236] In some embodiments, power supply 1536 may be in the form of a battery or battery pack. Other types of power supplies may also be used, such as an external power supply (e.g., a power outlet), a photovoltaic device, or a power unit. WD 1510 may also include a power supply circuit 1537 for delivering power from power supply 1536 to various parts of WD 1510 that require power from power supply 1536 to perform any of the functions described or indicated herein. In certain embodiments, power supply circuit 1537 may include a power management circuit. Power supply circuit 1537 may additionally or alternatively be operable to receive power from an external power supply; in such a case, WD 1510 may be connected to the external power supply (e.g., a power outlet) via an input circuit or interface (e.g., a power cable). In certain embodiments, power supply circuit 1537 may also be operable to transfer power from the external power supply to power supply 1536. This may be used, for example, to charge power supply 1536. Power supply circuit 1537 may perform any formatting, conversion, or other modification of the power from power supply 1536 to make the power suitable for the various components of WD 1510 to which it is supplied.

[0237] Figure 16 A virtualized environment is shown in accordance with some embodiments. Figure 16 FIG. 16 is a schematic block diagram showing a virtualized environment 1600 in which functions implemented by some embodiments of encoder 600 and / or decoder 602 may be virtualized. In the present context, virtualization means creating a virtual version of a device or equipment, which may include a virtualized hardware platform, storage devices, and networking resources. As used herein, virtualization may be applied to a node (e.g., a virtualized base station or a virtualized radio access node) or a device (e.g., a UE, a wireless device, or any other type of communication device) or its components, and involves an implementation in which at least a portion of the functions are implemented as one or more virtual components (e.g., by one or more applications, components, functions, virtual machines, or containers executed on one or more physical processing nodes in one or more networks).

[0238] In some embodiments, some or all of the functions described herein may be implemented as virtual components executed by one or more virtual machines implemented in one or more virtual environments 1600 hosted by one or more hardware nodes 1630. Additionally, in embodiments where the virtual node is not a radio access node or does not require a radio connection (e.g., a core network node), then the network node may be fully virtualized.

[0239] These functions may be implemented by one or more applications 1620 (alternatively referred to as software instances, virtual appliances, network functions, virtual nodes, virtual network functions, etc.), which are operable to implement certain features, functions, and / or benefits of some of the embodiments disclosed herein. The applications 1620 run in a virtualization environment 1600 that provides hardware 1630 including processing circuitry 1660 and memory 1690. The memory 1690 contains instructions 1695 executable by the processing circuitry 1660, whereby the applications 1620 are operable to provide one or more of the features, benefits, and / or functions disclosed herein.

[0240] The virtualization environment 1600 includes general or special-purpose network hardware devices 1630, which include a set of one or more processors or processing circuitry 1660, which may be commercial off-the-shelf (COTS) processors, application-specific integrated circuits (ASICs), or any other type of processing circuitry including digital or analog hardware components or dedicated processors. Each hardware device may include a memory 1690-1, which may be a non-persistent memory for temporarily storing instructions 1695 or software executed by the processing circuitry 1660. Each hardware device may include one or more network interface controllers (NICs) 1670 (also referred to as network interface cards), which include physical network interfaces 1680. Each hardware device may also include a non-transitory persistent machine-readable storage medium 1690-2 in which software 1695 and / or instructions executable by the processing circuitry 1660 are stored. The software 1695 may include any type of software, which includes software for instantiating one or more virtualization layers 1650 (also referred to as hypervisors), software for executing virtual machines 1640, and software that allows it to execute functions, features, and / or benefits described in relation to some of the embodiments described herein.

[0241] The virtual machines 1640 include virtual processing, virtual memory, virtual network or interfaces, and virtual storage, and may be run by corresponding virtualization layers 1650 or hypervisors. Different embodiments of instances of the virtual appliances 1620 may be implemented on one or more virtual machines 1640 and may be implemented in different ways.

[0242] During operation, the processing circuitry 1660 executes software 1695 to instantiate a hypervisor or virtualization layer 1650 (which may sometimes be referred to as a virtual machine monitor (VMM)). The virtualization layer 1650 may present a virtual operating platform to the virtual machines 1640 that appears like networked hardware.

[0243] As Figure 16As shown, the hardware 1630 can be an independent network node with general or specific components. The hardware 1630 can include an antenna 16225, and some functions can be implemented through virtualization. Alternatively, the hardware 1630 can be part of a larger hardware cluster (e.g., such as in a data center or a customer premise equipment (CPE)), where many hardware nodes work together and are managed by a management and orchestration (MANO) 16100 that particularly supervises the lifecycle management of the application 1620.

[0244] In certain contexts, the virtualization of hardware is called network function virtualization (NFV). NFV can be used to integrate many network device types into industry-standard high-volume server hardware, physical switches, and physical storage, which can be located in data centers and customer premise equipment. In the context of NFV, a virtual machine 1640 can be a software implementation of a physical machine that runs programs as if they were executed on a physical non-virtualized machine. Each virtual machine 1640 and that part of the hardware 1630 that executes the virtual machine (whether it is the hardware dedicated to the virtual machine and / or the hardware shared by the virtual machine with other virtual machines 1640) form a separate virtual network element (VNE).

[0245] Still in the context of NFV, a virtual network function (VNF) is responsible for handling specific network functions in one or more virtual machines 1640 running on top of the hardware network infrastructure 1630 and corresponds to the application 1620 Figure 16 in.

[0246] In some embodiments, one or more radio units 16200 each including one or more transmitters 16220 and one or more receivers 16210 can be coupled to one or more antennas 16225. The radio units 16200 can communicate directly with the hardware node 1630 via one or more appropriate network interfaces and can be used in combination with virtual components to provide radio capabilities for virtual nodes, such as radio access nodes or base stations.

[0247] In some embodiments, some signaling can be implemented by using a control system 16230, which can alternatively be used for communication between the hardware node 1630 and the radio unit 16200.

[0248] Any suitable steps, methods, features, functions, or benefits disclosed herein may be performed by one or more functional units or modules of one or more virtual devices. Each virtual device may include a plurality of these functional units. These functional units may be implemented via processing circuitry that may include one or more microprocessors or microcontrollers, and other digital hardware that may include a digital signal processor (DSP), dedicated digital logic, etc. The processing circuitry may be configured to execute program code stored in a memory, which may include one or several types of memory, such as read-only memory (ROM), random access memory (RAM), cache memory, flash memory devices, optical memory, etc. The program code stored in the memory includes program instructions for performing one or more telecommunication and / or data communication protocols, and instructions for performing one or more of the techniques described herein. In some embodiments, according to one or more embodiments of the present disclosure, the processing circuitry may be used to cause the corresponding functional unit to perform the corresponding function.

[0249] The term "unit" may have its conventional meaning in the field of electronics, electrical devices, and / or electronic equipment, and may include, for example, electrical and / or electronic circuits, devices, modules, processors, memories, logic solid-state and / or discrete devices, computer programs or instructions for performing various tasks, processes, calculations, outputs, and / or display functions, etc., such as those described herein.

Claims

1. A method for generating a hidden audio frame of an audio signal in a decoding device, the method comprising: Perform (901) a frequency domain analysis of a sequence of previously decoded audio signals to obtain a spectrum; Identify (903) tonal components in the spectrum by identifying peaks in the spectrum; Apply (907) phase adjustment to the identified peaks by adjusting the phase of the peaks and adjacent bins; Apply (909) a random phase adjustment to a noise spectrum that includes spectral bins that do not belong to the identified peaks and their adjacent bins; Estimate (911) an energy ratio between the noise spectrum and a full spectrum; Determine (913) an attenuation of the noise spectrum based on the energy ratio, where the energy ratio indicating a lower relative level of noise gives a stronger attenuation; Apply (915) the attenuation to the noise spectrum; And Apply (917) an inverse transform to the error concealment spectrum to the time domain, the error concealment spectrum including the peaks with adjusted phase and the attenuated noise spectrum.

2. The method according to claim 1, wherein, Determining (913) the attenuation of the noise spectrum includes: if the energy ratio is lower than a threshold, setting the noise attenuation factor a noise to a first value, otherwise setting the noise attenuation factor to a second value, where the second value is higher than the first value.

3. The method according to claim 1, wherein, Determining (913) the attenuation of the noise spectrum includes: forming the noise attenuation factor by performing a linear mapping of the energy ratio to a noise attenuation factor using a piecewise linear function.

4. The method according to claim 3, wherein, The noise attenuation factor is formed according to the following formula: where NSR is the energy ratio, NSR hi is the first threshold, NSR lo is the second threshold lower than the first threshold.

5. The method according to claim 1, wherein, Determining (913) the attenuation of the noise spectrum includes Setting the noise attenuation factor according to the following formula a noise = min(1, c·NSR), where c is a constant in the range c ∈ (0, 1], and NSR is the energy ratio.

6. The method according to any one of claims 2 to 5, wherein, The noise attenuation factor is at a noise within the range of ∈[0, 1].

7. The method according to any one of claims 2 to 6, wherein, Applying the attenuation (915) to the noise spectrum includes: applying the noise attenuation factor a according to the following formula noise to the noise spectrum X moise (k): X noise,att y(k) = a noise ·X noise (k). It should be noted that there may be some inaccuracies in the original text as it seems rather incomplete or unclear in its mathematical / technical meaning. This translation is based on the best understanding of the provided symbols and expressions.

8. The method according to any one of claims 1 to 7, wherein, Use a time domain aliasing operation to adapt the time domain concealed frame to a decoder based on a modulated lapped transform (MLT).

9. A decoder (602) for generating a hidden audio frame of an audio signal in a decoding device, the decoder (602) comprising: A processing circuit (801); And A memory (803) coupled to the processing circuit, where the memory includes instructions that, when executed by the processing circuit, cause the decoder (602) to perform a method that includes: Perform a frequency domain analysis of a sequence of previously decoded audio signals to obtain a spectrum; Identify tonal components in the spectrum by identifying peaks in the spectrum; Apply phase adjustment to the identified peaks by adjusting the phase of the peaks and adjacent bins; Apply a random phase adjustment to a noise spectrum that includes spectral bins that do not belong to the identified peaks and their adjacent bins; Estimate the energy ratio between the noise spectrum and the full spectrum; Determine the attenuation of the noise spectrum based on the energy ratio, where the energy ratio indicating a lower relative level of noise gives a stronger attenuation; Apply the attenuation to the noise spectrum; and Apply an inverse transform to the error concealment spectrum to the time domain, the error concealment spectrum including the peaks with adjusted phase and the attenuated noise spectrum.

10. The decoder (602) according to claim 9, wherein, In determining (913) the attenuation of the noise spectrum, the memory includes instructions that, when executed by the processing circuit, cause the decoder (602) to perform operations that include: if the energy ratio is below a threshold, setting the noise attenuation factor a noise to a first value, and otherwise setting the noise attenuation factor to a second value, where the second value is higher than the first value.

11. The decoder (602) according to claim 9, wherein, When determining the attenuation of the noise spectrum, the memory includes instructions that, when executed by the processing circuit, cause the decoder (602) to perform an operation that includes: forming the noise attenuation factor by performing a linear mapping of the energy ratio to a noise attenuation factor using a piecewise linear function.

12. The decoder (602) according to claim 11, wherein, The noise attenuation factor is formed according to the following formula: where NSR is the energy ratio, NSR hi is the first threshold, NSR lo is the second threshold lower than the first threshold.

13. The decoder (602) according to claim 9, wherein, When determining the attenuation of the noise spectrum, the memory includes instructions that, when executed by the processing circuit, cause the decoder (602) to perform an operation that includes: Setting the noise attenuation factor according to the following formula a noise = min(1, c · NSR), where c is a constant in the range c ∈ (0, 1], and NSR is the energy ratio.

14. The decoder (602) according to any one of claims 10 to 13, wherein, The noise attenuation factor is at a noise within the range of ∈[0, 1].

15. The decoder (602) according to any one of claims 10 to 14, wherein, When applying the attenuation to the noise spectrum, the memory includes instructions that, when executed by the processing circuit, cause the decoder (602) to perform operations, the operations including: Apply the noise attenuation factor a according to the following formula noise to the noise spectrum X moise (k): X noise,att (k) = a noise ·X noise (k).

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