Three-level converter, pulse width modulation control method thereof, controller and medium

Abstract

The invention provides a three-level converter, a pulse width modulation control method of the three-level converter, a controller and a medium, and belongs to the technical field of power electronics. The pulse width modulation control method comprises the following steps: obtaining switching time of two level bridge arms of corresponding phases in two level converters which are in a preset relationship with corresponding circuit parameters of the three-level converter; and determining a voltage switching mode of the three-level bridge arm of the corresponding phase according to the switching time of the three-level bridge arm, and further determining action time of each switch in the three-level bridge arm according to the switching time and the voltage switching mode, thereby outputting a pulse width modulation signal so as to control the three-level converter. Therefore, according to the pulse width modulation method, the calculation amount of three-level space vector action time calculation can be effectively reduced, a controller with relatively low performance can be adopted to control the three-level converter, the control cost of the three-level converter can be reduced, and engineering application is facilitated.

Description

Technical Field

[0001] This application relates to the field of electronic power technology, and particularly to a three-level converter, its pulse width modulation control method, controller, and medium. Background Art

[0002] Due to advantages such as large output capacity, high output voltage, and low current harmonic content, three-level converters have been widely applied in the field of variable frequency speed regulation of high-voltage and high-power AC motors. Compared with two-level converters, the control of three-level converters is relatively more complex. How to reduce the computational load in the control process of three-level converters is of great importance for the application of three-level converters in actual engineering.

[0003] The literature "Modfed SVPWM Algorthmfor Three Level VS Wth Synchronzed andSymmetrcal Waveforms" (Beg A R, [J]. EEE Transactons on ndustral Electroncs, 2007, 54(1): 486–494.) provides an existing control method for three-phase three-level converters. This existing control method divides the three-level voltage space vector into 6 60-degree sector sectors. Each 60-degree sector is divided into 6 parts according to the modulation ratio. There are an even number m of sampling points distributed in each sector to correspond to synchronous 3m / 2 times SVPWM; the m sampling points are all inside the sector, and the sampling points other than the head and tail operate according to the traditional SVPWM seven-segment method. In this existing control method, the operation modes of the head and tail sampling points are relatively special. Taking Sector 1 and Sector 2 as examples, as Figure 1 shown in the table therein, this table is the switching state table of the head and tail sampling points in Sector 1 and Sector 2. The switching states of the head and tail sampling points in Sector 1 and Sector 2 make the number of sampling points in each 60-degree sector even and operate according to the above switching states at each sampling point. Therefore, this existing control method can achieve synchronous 3-multiple times SVPWM control of three-level converters in any linear modulation ratio region, and its phase voltage output waveform satisfies the switching state change rules of synchronization, three-phase symmetry, half-wave symmetry, and 1 / 4 cycle symmetry.

[0004] However, for the above existing SVPWM control method, it is necessary to calculate the action time of each voltage space vector at each sampling point. The calculation steps are complex and the computational load is large, which is not conducive to practical engineering applications. Summary of the Invention

[0005] To solve the existing technical problems, this application provides a three-level converter, its pulse width modulation control method, pulse width modulation controller, and computer-readable storage medium with a low computational load for calculating the action time and facilitating engineering applications.

[0006] According to the first aspect of the embodiments of the present application, a pulse width modulation control method for a three-level converter is provided. The three-level converter includes at least one three-level phase leg. The three-level phase leg includes a first switch, a second switch, a third switch, and a fourth switch connected between the positive end and the negative end of the DC bus. The first switch and the third switch have a complementary switching state relationship, and the second switch and the fourth switch have a complementary switching state relationship. The method includes:

[0007] Obtain the switching times of the two-level phase leg corresponding to the same phase in the two-level converter, where the circuit parameters of the two-level converter and the corresponding circuit parameters of the three-level converter have a preset relationship;

[0008] Determine the level switching mode of the three-level phase leg according to the switching times and the preset relationship;

[0009] Determine the action times of each switch in the three-level phase leg according to the switching times and the level switching mode, so as to output a pulse width modulation signal for controlling the three-level converter.

[0010] According to the second aspect of the embodiments of the present application, a pulse width modulation controller is provided, including a memory and a processor. The memory stores a computer program executable by the processor. When the computer program is executed by the processor, the above-mentioned pulse width modulation control method is implemented.

[0011] According to the third aspect of the embodiments of the present application, a three-level converter is provided, including at least one three-level phase leg and the above-mentioned pulse width modulation controller. The three-level phase leg includes a first switch, a second switch, a third switch, and a fourth switch connected between the positive end and the negative end of the DC bus. The first switch and the third switch have a complementary switching state relationship, and the second switch and the fourth switch have a complementary switching state relationship;

[0012] The pulse width modulation controller is configured to output the pulse width modulation signal to each switch in the three-level phase leg.

[0013] According to the fourth aspect of the embodiments of the present application, a computer-readable storage medium is provided. A computer program is stored on the computer-readable storage medium. When the computer program is executed by a processor, the above-mentioned pulse width modulation control method is implemented.

[0014] The present application provides a three-level converter and its pulse-width modulation control method, controller, and medium, belonging to the field of power electronics. The pulse-width modulation control method determines the voltage switching mode of the corresponding three-level bridge arm of each phase by obtaining the switching times of the corresponding two-level bridge arms in a two-level converter that have a preset relationship with the corresponding circuit parameters of the three-level converter. Then, based on the switching times and the voltage switching mode, the action times of each switch in each three-level bridge arm can be directly determined, thereby outputting a pulse-width modulation signal to control the three-level converter. Therefore, the pulse-width modulation method can effectively reduce the computational complexity of calculating the action time of the three-level space vector, and a controller with relatively low performance can be used to control the three-level converter, which is beneficial to reducing the control cost of the three-level converter and facilitating engineering applications. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The drawings are only used to illustrate the embodiments and are not considered to be a limitation of the present invention. Moreover, throughout the drawings, the same reference numerals are used to represent the same components. In the drawings:

[0016] Figure 1 Schematic diagram of the switching states of the start and end sampling points in Sector 1 and Sector 2 in the existing control method;

[0017] Figure 2 Schematic flowchart of the pulse-width modulation control method for a three-level converter according to some embodiments of the present application;

[0018] Figure 3 Schematic diagram of the topology of a three-phase three-level converter applied to the pulse-width modulation control method provided in the embodiments of the present application;

[0019] Figure 4 Schematic diagram of the topology of a single-phase three-level converter applied to the pulse-width modulation control method provided in the embodiments of the present application;

[0020] Figure 5 Schematic diagram of the switching states of a three-level converter according to the embodiments of the present application;

[0021] Figure 6 Schematic diagram of the topology of a two-level converter according to some embodiments of the present application;

[0022] Figure 7 Schematic flowchart of the steps for determining the action times of each switch in the pulse-width modulation control method according to some embodiments of the present application;

[0023] Figure 8 Schematic flowchart of the control process of the pulse-width modulation control method according to some embodiments of the present application;

[0024] Figure 9Schematic diagram of the control flow of the pulse width modulation control method provided by some other embodiments of the present application;

[0025] Figure 10 Block diagram of the calculation module for implementing the pulse width modulation control method provided by some embodiments of the application;

[0026] Figure 11 Schematic diagram of the structure of the pulse width modulation controller provided by some embodiments of the present application. Detailed implementation manners

[0027] The technical solution of the present application will be further elaborated in detail below in conjunction with the accompanying drawings of the specification and specific embodiments.

[0028] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the technical field to which this application belongs. The terms used in the specification of this application herein are only for the purpose of describing specific embodiments and are not intended to limit the implementation manner of this application. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.

[0029] In the following description, the expression "some embodiments" is involved, which describes a subset of possible embodiments. However, it should be understood that "some embodiments" can be the same subset or different subsets of all possible embodiments and can be combined with each other without conflict.

[0030] Please refer to Figure 2 As shown, it is a schematic diagram of the flow of the pulse width modulation control method of the three-level converter provided by some embodiments of the present application. In some embodiments, the three-level converter to which the pulse width modulation control method provided by the embodiments of the present application is applied includes at least one three-level bridge arm per phase. One three-level bridge arm corresponds to one-phase voltage. For example, the three-phase three-level bridge arm outputs three-phase alternating current. The three-level bridge arm includes a first switch, a second switch, a third switch, and a fourth switch connected between the positive end and the negative end of the DC bus. The first switch and the third switch are in a complementary switch state relationship, and the second switch and the fourth switch are in a complementary switch state relationship. One of the second switch and the fourth switch is connected between the first switch and the third switch, and one of the first switch and the third switch is connected between the second switch and the fourth switch.

[0031] Specifically, the three-level converter to which the pulse width modulation control method provided by the present application is applied is as Figure 3As shown, it is a three-phase three-level converter with an NPC (Neutral Point Clamped) topology structure, specifically a three-phase three-level converter with a type NPC topology structure. The three-phase three-level converter includes an A-phase three-level bridge arm, a B-phase three-level bridge arm, and a C-phase three-level bridge arm corresponding to the three phases A, B, and C respectively, and also includes a first capacitor C1 and a second capacitor C2 connected in series between the positive terminal DC+ and the negative terminal DC- of the DC bus. Among them, the first capacitor C1 and the second capacitor C2 are connected to the neutral point N, and the neutral point N is connected to the reference ground terminal. Each of the three-level bridge arms in the A-phase, B-phase, and C-phase includes switches K1, K2, K3, and K4 connected in sequence between the positive terminal DC+ and the negative terminal DC- of the DC bus, and also includes clamping diodes D1 and D2. The anode of the clamping diode D1 is connected to the neutral point N, and the cathode is connected to the node where the switches K1 and K2 are connected. The cathode of the clamping diode D2 is connected to the neutral point N, and the anode is connected to the node where the switches K3 and K4 are connected.

[0032] The three-level converter applied by the pulse width modulation control method provided in the embodiments of the present application can be a three-phase three-level converter as shown in Figure 3 or a single-phase three-level converter as shown in Figure 4 or any other three-level converter of any phase. Taking the single-phase three-level converter shown in Figure 4 as an example, the output level states altogether include three types, namely a high level state, a zero level state, and a low level state. Among them, the voltage corresponding to the high level state is Udc1, the voltage corresponding to the zero level state is 0, and the voltage corresponding to the low level state is -Udc2. Here, Udc1 is the voltage of the positive terminal DC+ of the DC bus relative to the neutral point N, -Udc2 is the voltage of the negative terminal DC- of the DC bus relative to the neutral point N, and Udc1 + Udc2 = Udc, where Udc is the DC voltage between the positive terminal DC+ and the negative terminal DC- of the DC bus. Please refer to Figure 5 As shown, it is a schematic diagram of the switching states of the three-level converter provided according to the embodiments of the present application. Each three-level bridge arm of the three-level converter can only allow Figure 5 the three switching states shown in. The first switching state is that switches K1 and K2 are both turned on, and switches K3 and K4 are both turned off. In the first switching state, the level output by the three-level bridge arm is a high level, that is, the output voltage is Udc1. The second switching state is that switches K2 and K3 are both turned on, and switches K1 and K4 are both turned off. In the second switching state, the level output by the three-level bridge arm is a zero level, that is, the output voltage is 0. The third switching state is that switches K3 and K4 are both turned on, and switches K1 and K2 are both turned off. In the third switching state, the level output by the three-level bridge arm is a low level, that is, the output voltage is -Udc2. From Figure 5It can be seen that switches K1 and K3 are in a complementary relationship in terms of switch states, and switches K2 and K4 are in a complementary relationship in terms of switch states. The above-mentioned first switch is one of K1 and K3, the above-mentioned third switch is the other of K1 and K3, the above-mentioned second switch is one of K2 and K4, and the fourth switch is the other of K2 and K4. For example, the above-mentioned first switch, second switch, third switch, and fourth switch are switches K1, K2, K3, and K4 respectively. As long as the switching operation time of one switch among K1 and K3 is obtained, the operation time of the other switch can be obtained based on the complementary relationship of switch states. Similarly, as long as the switching operation time of one switch among K2 and K4 is obtained, the operation time of the other switch can be obtained based on the complementary relationship of switch states. Based on this, please continue to refer to Figure 1 As shown, the pulse width modulation control method provided by the embodiment of the present application includes S02, S04, and S06, and the specific steps are as follows.

[0033] S02: Obtain the switching times of the two-level bridge arms corresponding to the phases in the two-level converter. The circuit parameters of the two-level converter and the corresponding circuit parameters of the three-level converter are in a preset relationship.

[0034] The circuit parameters may include the reference vector voltage, the voltage at the positive end DC+ of the DC bus, the voltage at the negative end DC- of the DC bus, the reference vector voltage, and the modulation period time. Among them, the reference vector voltage refers to the reference voltage of the average output voltage of the three-level converter in a modulation period. In the present application, the reference vector voltage of the three-level converter is defined as Uref, the reference vector voltage of the two-level converter is defined as Uref`, the modulation period time of the three-level converter is defined as Tc, and the two-level converter is defined as Tc`. In some embodiments, the structural schematic diagram of the two-level converter in S02 is as Figure 6 shown. The capacitor is connected between the positive end DC+ and the negative end DC- of the DC bus. The modulation period time of the two-level converter is defined as Tc`. The voltage at the positive end DC+ of the DC bus is Udc1`, and the voltage at the negative end DC- of the DC bus is -Udc2`. The input DC voltage Udc` at the DC end = Udc1` + Udc2`. In some embodiments, the above-mentioned preset relationship is specifically: Uref = m1 * Uref`, Udc1 = m2 * Udc1`, Udc2 = m3 * Udc2`, Tc = m4 * Tc`. Among them, m1, m2, m3, and m4 are known parameters, that is, they are respectively preset relationship coefficients.

[0035] The switching time of a two-level arm can refer to the conduction time or the turn-off time of the upper-arm switch Q1 in the corresponding two-level arm, or the conduction time or the turn-off time of the lower-arm switch Q2. For a two-level arm, only two voltage levels can be output at the connection of its upper-arm switch Q1 and lower-arm switch Q2, which are the high-voltage level corresponding to the voltage Udc1` and the low-voltage level corresponding to the voltage -Udc2`, respectively, without a zero-voltage level.

[0036] S04: Determine the level switching mode of the three-level arm according to the switching time and the preset relationship.

[0037] Based on the preset relationship between the corresponding circuit parameters of the two-level arm and the three-level arm in S02, according to the switching time obtained in S02, the average output voltage of the three-level arm in a modulation period can be determined. Thus, according to its output average output voltage, the level switching mode of the three-level arm in a modulation period can be determined.

[0038] In some embodiments, the above preset relationship is an equal relationship, and the coefficients m1, m2, m3, and m4 of the above preset relationship are 1 respectively, that is, Uref = Uref`, Udc1 = Udc1`, Udc2 = Udc2`, Tc = Tc`, and the switching time obtained in S02 is the conduction time Ton of the upper arm Q1, then the following equation can be obtained:

[0039] Ton*Udc1 - (Tc - Ton)*Udc2 = Tc*Uref;

[0040]

[0041] Since Tc, Udc1, and DC2 are all values greater than 0, if the right side of the equal sign in the above second equation is greater than 0, then Uref is also greater than 0. Conversely, if the right side of the equal sign in the above second equation is less than 0, then Uref is also less than 0. Therefore, it can be seen from the above equation that according to the magnitude of Ton, it can be determined whether Uref is greater than 0 or less than 0, that is, it can be determined whether the average value of the output voltage of the three-level converter in a modulation period is greater than 0 or less than 0. Thus, based on this, the level switching mode of the three-level arm can be determined.

[0042] S06: Determine the action time of each switch in the three-level arm according to the switching time and the level switching mode, so as to output a pulse width modulation signal for controlling the three-level converter.

[0043] After determining the level switching mode, the levels involved in the switching can be determined. Thus, based on the preset relationship between the switching time obtained in S02 and the above circuit parameters, the operating time of each switch in the three-level arm can be obtained. Specifically, based on the preset relationship between the switching time obtained in S02 and the above circuit parameters, the operating time of two switches in one of the upper arm and the lower arm of the three-level arm can be obtained. Then, based on the complementary relationship of the switch states, the operating time of the other two switches can be determined. Specifically, for example, based on the preset relationship between the switching time obtained in S02 and the above circuit parameters, the operating time of two switches K1 and K2 in the upper arm is obtained. Then, based on the operating time of the two switches K1 and K2 in the upper arm, the operating time of two switches K3 and K4 in the lower arm is determined respectively. It can also be like this. Based on the preset relationship between the switching time obtained in S02 and the above circuit parameters, the operating time of two switches K3 and K4 in the lower arm is obtained. Then, based on the operating time of the two switches K3 and K4 in the lower arm, the operating time of two switches K1 and K2 in the upper arm is determined respectively. Among them, the operating time of each switch refers to the total conduction time within one modulation period of each switch.

[0044] After obtaining the operating time of each switch, based on the operating time of each switch and the five-segment vector operating sequence or the seven-segment vector operating sequence, a pulse width modulation signal, that is, an SVPWM signal, can be obtained.

[0045] As can be seen from the above, in the pulse width modulation control method of the three-level converter provided by the embodiment of the present application, by obtaining the switching time of the corresponding two-level arm in the two-level converter that has a preset relationship with the corresponding circuit parameters of the three-level converter, the voltage switching mode of the corresponding three-level arm is determined. Furthermore, based on the switching time and the voltage switching mode, the operating time of each switch in each three-level arm is determined, thereby outputting a pulse width modulation signal to control the three-level converter. Therefore, the pulse width modulation method provided by the embodiment of the present application can effectively reduce the computational complexity of calculating the three-level space vector operating time, and a controller with relatively low performance can be used to control the three-level converter, which is beneficial to reducing the control cost and facilitating engineering applications.

[0046] In some embodiments, in order to increase the control stability and control flexibility, the above S02 specifically includes: obtaining the switching time of the two-level arm based on the two-level SVPWM control algorithm. Among them, the switching time represents the conduction time or the turn-off time of the arm switch in the corresponding two-level arm. The arm switch here is such as Figure 6 the upper arm switch Q1 or the lower arm switch Q2 in. In other embodiments, the switching time of the two-level arm can also be a known parameter directly obtained, that is, the controller implementing the pulse width modulation method provided by the embodiment of the present application directly obtains the input parameter from the external module, or can be a parameter preset in the controller.

[0047] In some embodiments, the above S04 specifically includes: determining whether the switching time meets a preset condition; if so, determining that the level switching mode is a first switching mode that switches between a high level and a zero level; if not, determining that the level switching mode is a second switching mode that switches between a zero level and a low level. Controlling the three-level converter to switch only between two adjacent level states in each modulation period can avoid the three-level bridge arm from being directly connected and causing the switch to explode, which is beneficial to improving the use safety and stability of the three-level converter.

[0048] According to the following equation, it can be seen that according to the relationship between the switching time and the relationship between them, the size relationship between Uref and 0 can be determined.

[0049]

[0050] In some embodiments of the present application, is defined as the center point time Tm, so that the corresponding level switching mode can be determined according to the size relationship between the switching time and the center point time. Obviously, the ratio of the center point time Tm to the modulation period time Tc of the three-level bridge arm is a first ratio , the first ratio is equal to the ratio of the first potential difference to the second voltage difference. The first potential difference is the difference between the neutral point potential of the three-level converter and the negative terminal potential of the DC bus, that is, 0 - (Udc2) = Udc2. The second potential difference is the difference between the positive terminal potential of the DC bus and the negative terminal potential of the DC bus, that is, Udc1 - (-Udc2) = Udc1 + Udc2.

[0051] When the switching time represents the conduction time Ton (or the turn-off time of the lower arm switch Q2) T of the upper arm switch Q1 in the two-level bridge arm, the above preset condition is that the conduction time Ton (switching time) is greater than the center point time Tm. When the switching time represents the turn-off time Toff (or the conduction time of the lower arm switch Q2) Ton of the upper arm switch Q1 in the two-level bridge arm, the above preset condition is that the turn-off time Toff (switching time) is less than the center point time Tm. Further, when the conduction time Ton or the turn-off time Toff is exactly equal to the center point time Tm, it is determined that the three-level converter only outputs a zero level in one modulation period, that is, the switches K1 and K4 are always closed throughout the modulation period, while K2 and K3 are always on.

[0052] Please refer to Figure 7As shown, it is a schematic flowchart of the steps for determining the action time of each switch in the pulse width modulation control method provided according to some embodiments of the present application. In order to further reduce the computational amount of each action period, different action time calculation formulas are used to calculate the action time of each switch in different level switching modes. Specifically, in S06, determining the action time of each switch in the three-level bridge arm according to the switch time and the level switching mode specifically includes S062, S064, and S066.

[0053] S062: Determine the action time calculation formulas for the first switch and the second switch according to the level switching mode.

[0054] S064: Based on the action time calculation formulas, obtain the action time of the first switch and the second switch according to the switch time, the center point time, and the modulation period time.

[0055] S066: Based on the complementary relationship of the switch states between the corresponding first switch and the third switch and between the second switch and the fourth switch, determine the action time of the third switch and the fourth switch respectively according to the conduction time of the first switch and the second switch.

[0056] The action time of the first switch and the second switch can be determined based on the mapping relationship between the preset level switching mode categories and the action time calculation formulas according to the category of the level switching mode. In this embodiment, the first switch is one of switches K1 and K3, and the second switch is one of switches K2 and K4. For example, in this embodiment, the first switch is switch K1 and the second switch is switch K2. In other embodiments, the first switch is K3 and the second switch is K4.

[0057] The corresponding action time calculation formulas in different level switching modes are based on the preset relationship between the corresponding circuit parameters in the two-level converter and the three-level converter, and can be determined according to the obtained switch time. The dependent variable in each calculation formula is the action time of the corresponding switch, and the independent variables include the switch time obtained in S02, the center point time Tm, and the modulation period time Tc and / or other parameters determined according to at least one of the switch time, the center point time Tm, and the modulation period time Tc.

[0058] Specifically, S062 includes: If the switching time represents the conduction time of the upper-arm switch in the two-level bridge arm, when the level switching mode is the first switching mode, the calculation formulas for the action times of the first switch and the second switch are determined as: Tg1 = (Ton - Tm) * Gt and Tg2 = Tc; when the level switching mode is the second switching mode, the calculation formulas for the action times of the first switch and the second switch are determined as: Tg1 = 0 and Tg2 = (Tm - Ton) * Gt; if the switching time represents the turn-off time of the upper-arm switch in the two-level bridge arm, when the level switching mode is the first switching mode, the calculation formulas for the action times of the first switch and the second switch are determined as: Tg1 = (Tm - Toff) * Gt and Tg2 = Tc; when the level switching mode is the second switching mode, the calculation formulas for the action times of the first switch and the second switch are determined as: Tg1 = 0 and Tg2 = (Toff - Tm) * Gt. Where Tg1 and Tg2 are the action times of the first switch and the second switch respectively. Ton and Toff are the conduction time and turn-off time of the upper-arm switch in the two-level bridge arm respectively. After obtaining the action time Tg1 of the first switch, based on the complementary relationship of the switch states, the action time Tg3 = Tc - Tg1 of the third switch can be determined, and after obtaining the action time Tg2 of the second switch, based on the complementary relationship of the switch states, the action time Tg4 = Tc - Tg2 of the fourth switch can be determined.

[0059] To facilitate sharing some identical calculation modules under different switching modes to reduce the computational complexity of the entire control process, this application defines a conduction time gain coefficient Gt as the independent variable in the corresponding calculation formula. Where Gt = Tc / (Tc - Tm), that is, this conduction time gain coefficient is the ratio of the modulation period time Tc to the time difference, and the time difference is the difference between the modulation period time Tc and the center point time Tm.

[0060] Generally speaking, in a three-level converter, Udc1 = Udc2, then Tm = 0.5Tc. However, in some cases, there will be a neutral point N offset phenomenon, then Udc1 may not be equal to Udc2, and then Tm is no longer fixed at 0.5Tc. Therefore, in order to improve the control accuracy, in some embodiments, before S064, it further includes: calculating the center point time Tm according to the positive terminal potential of the DC bus, the neutral point potential, and the negative terminal potential of the DC bus. Specifically, based on the above definition of the center point time, the center point time Tm can be calculated according to the positive terminal potential of the DC bus, the neutral point potential, and the negative terminal potential of the DC bus.

[0061] Please refer to Figure 8 shown, which is a schematic diagram of the control flow of the pulse width modulation control method provided according to some embodiments of this application, and it includes the following steps S11 to S16.

[0062] S11: Calculate the on-time Ton of the upper bridge arm in the two-level converter. Specifically, based on the two-level SVPWM control algorithm, obtain Figure 6 the on-time Ton of the upper bridge arm switch Q1.

[0063] S12: Determine whether Ton is greater than the center point time Tm. If the determination is yes, execute S13; otherwise, execute S14.

[0064] S13: According to Ton, Tm, and the on-time gain coefficient Gt determined based on Tm and the modulation period time Tc, calculate Tg1 = (Ton - Tm) * Gt and Tg2 = Tc respectively according to the calculation formulas. When it is determined as yes in S12, determine that the level switching mode of the three-level converter is the first switching mode of switching between the high level and the zero level, and then calculate the on-times of the first switch and the second switch according to the corresponding calculation formulas.

[0065] S14: According to Ton, Tm, and the on-time gain coefficient Gt determined based on Tm and the modulation period time Tc, calculate Tg1 = 0 and Tg2 = (Tm - Ton) * Gt respectively according to the calculation formulas. When it is determined as no in S12, determine that the level switching mode of the three-level converter is the second switching mode of switching between the high level and the zero level, and then calculate the on-times of the first switch and the second switch according to the corresponding calculation formulas.

[0066] S15: According to Tg1 and Tg2, calculate Tg3 = Tc - Tg1 and Tg4 = Tc - Tg2 respectively according to the calculation formulas. Based on the complementary relationship of the switch states, obtain the on-times Tg3 and Tg4 of the third switch and the fourth switch according to the on-times of the first switch and the second switch.

[0067] S16: Output a pulse width modulation signal according to Tg1, Tg2, Tg3, and Tg4.

[0068] Please refer to Figure 9 shown in the figure, which is a schematic diagram of the control flow of the pulse width modulation control method provided according to some other embodiments of the present application, and it includes the following steps S21 to S26.

[0069] S21: Calculate the off-time Toff of the upper bridge arm in the two-level converter. Specifically, based on the two-level SVPWM control algorithm, obtain Figure 6 the off-time Toff of the upper bridge arm switch Q1.

[0070] S22: Determine whether Toff is greater than the center point time Tm. If the determination is yes, execute S13; otherwise, execute S14.

[0071] S23: According to Toff, Tm, and the conduction time gain coefficient Gt determined based on Tm and the modulation period time Tc, calculate Tg1 and Tg2 respectively according to the calculation formulas Tg1 = (Tm - Toff) * Gt and Tg2 = Tc. When it is determined as yes in S22, determine that the level switching mode of the three-level converter is the first switching mode that switches between the high level and the zero level, and then calculate the conduction times of the first switch and the second switch according to the corresponding calculation formulas.

[0072] S24: According to Toff, Tm, and the conduction time gain coefficient Gt determined based on Tm and the modulation period time Tc, calculate Tg1 and Tg2 respectively according to the calculation formulas Tg1 = 0 and Tg2 = (Toff - Tm) * Gt. When it is determined as no in S22, determine that the level switching mode of the three-level converter is the second switching mode that switches between the high level and the zero level, and then calculate the conduction times of the first switch and the second switch according to the corresponding calculation formulas.

[0073] S25: According to Tg1 and Tg2, calculate Tg3 and Tg4 respectively according to the calculation formulas Tg3 = Tc - Tg1 and Tg4 = Tc - Tg2. Based on the complementary relationship of the switch states, obtain the conduction times Tg3 and Tg4 of the third switch and the fourth switch according to the conduction times of the first switch and the second switch.

[0074] S26: Output a pulse width modulation signal according to Tg1, Tg2, Tg3, and Tg4.

[0075] Please refer to Figure 10 As shown, it is a block diagram of a calculation module for implementing the pulse width modulation control method provided in some embodiments of the application. Each calculation module for implementing the pulse width modulation control method provided in the embodiments of the present application includes a two-level SVPWM calculation module, an upper conduction time output module, an A-phase switch action time calculation module, a B-phase switch action time calculation module, and a C-phase switch action time calculation module. The two-level SVPWM calculation module calculates the conduction time of the upper bridge arm switch in the corresponding two-level bridge arm of the two-level converter, and outputs the conduction times of the three bridge arms of A, B, and C through the upper conduction time output module. The A-phase switch action time calculation module, the B-phase switch action time calculation module, and the C-phase switch action time calculation module respectively calculate the switch action times according to the corresponding conduction times of each phase, and obtain the action times of each switch in the three-level bridge arm of the corresponding phase. The calculation module for implementing the pulse width modulation control method provided in some embodiments of the application is simple, requires low computing power, and has a low control cost.

[0076] Please refer to Figure 11As shown, it is a schematic structural diagram of a pulse width modulation controller provided according to some embodiments of the present application. In some embodiments, the pulse width modulation controller includes a processor 211 and a memory 212. A computer program executable by the processor is stored in the memory 212. When the computer program is executed by the processor, the pulse width modulation control method of any embodiment of the present application is implemented. The pulse width modulation controller provided according to some embodiments of the present application and the pulse width modulation control method provided in the foregoing embodiments can achieve the same technical effects. To avoid repetition, details are not described herein again.

[0077] In some embodiments, the three-level converter provided in the embodiments of the present application includes at least one three-level bridge arm and a pulse width modulation controller provided according to any one of the embodiments of the present application. The three-level bridge arm includes a first switch, a second switch, a third switch, and a fourth switch connected between the positive end and the negative end of the DC bus. The first switch and the third switch have a complementary switching state relationship, and the second switch and the fourth switch have a complementary switching state relationship. The pulse width modulation controller is configured to output pulse width modulation signals to the switches in the three-level bridge arm. Specifically, the three-level converter provided in the embodiments of the present application includes an I-type NPC three-level converter or an ANPC three-level converter. The three-level converter provided according to some embodiments of the present application and the pulse width modulation control method provided in the foregoing embodiments can achieve the same technical effects. To avoid repetition, details are not described herein again.

[0078] In some embodiments, the present application further provides a computer-readable storage medium. A computer program is stored on the computer-readable storage medium. When the computer program is executed by the processor, each process of the foregoing embodiments of the pulse width modulation control method is implemented, and the same technical effects can be achieved. To avoid repetition, details are not described herein again. The computer-readable storage medium includes, for example, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disc.

[0079] The above are only specific embodiments of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed by the present application, and all of them should be covered by the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A pulse width modulation control method for a three-level converter, the three-level converter comprising at least one three-level bridge arm, the three-level bridge arm including a first switch, a second switch, a third switch and a fourth switch connected between the positive terminal and the negative terminal of the DC bus, the first switch and the third switch having a complementary switching state relationship, and the second switch and the fourth switch having a complementary switching state relationship, characterized in that, Including: Obtaining the switching times of the two-level bridge arms of the corresponding phase in the two-level converter, where the circuit parameters of the two-level converter and the corresponding circuit parameters of the three-level converter are in a preset relationship; Determining the level switching mode of the three-level bridge arm according to the switching times and the preset relationship; Determining the action times of each switch in the three-level bridge arm according to the switching times and the level switching mode, so as to output a pulse width modulation signal for controlling the three-level converter.

2. The pulse width modulation control method according to claim 1, characterized in that, The obtaining the switching times of the two-level bridge arms of the corresponding phase in the two-level converter, where the circuit parameters of the two-level converter and the corresponding circuit parameters of the three-level converter are in a known relationship, includes: Based on the two-level SVPWM control algorithm, obtaining the switching times of the two-level bridge arms, where the switching times represent the conduction time or the turn-off time of the leg switches in the two-level bridge arms.

3. The pulse width modulation control method according to claim 2, characterized in that, The determining the level switching mode of the three-level bridge arm according to the switching times and the preset relationship, includes: Judging whether the switching times meet a preset condition; If so, determining that the level switching mode is a first switching mode that switches between a high level and a zero level; If not, determining that the level switching mode is a second switching mode that switches between a zero level and a low level.

4. The pulse width modulation control method according to claim 3, characterized in that, When the switching times represent the conduction time of the upper leg switch in the two-level bridge arm, the preset condition is that the switching times are greater than the center point time of the three-level bridge arm; when the switching times represent the turn-off time of the upper leg switch, the preset condition is that the switching times are less than the center point time; The ratio between the center point time and the modulation period time of the three-level bridge arm is a first ratio, and the first ratio is equal to the ratio of a first potential difference to a second potential difference, where the first potential difference is the difference between the neutral point potential of the three-level converter and the negative terminal potential of the DC bus, and the second potential difference is the difference between the positive terminal potential of the DC bus and the negative terminal potential of the DC bus.

5. The pulse width modulation control method according to claim 4, characterized in that, The determining the action times of each switch in the three-level bridge arm according to the switching times and the level switching mode, includes: Determining the calculation formulas for the action times of the first switch and the second switch according to the level switching mode; Based on the switching times, the center point time, and the modulation period time, obtaining the action times of the first switch and the second switch based on the calculation formulas for the action times; Based on the complementary relationship of the switch states between the corresponding first switch and the third switch and between the second switch and the fourth switch, determining the action times of the third switch and the fourth switch respectively according to the conduction times of the first switch and the second switch.

6. The pulse width modulation control method according to claim 5, characterized in that, The determining the calculation formulas for the action times of the first switch and the second switch according to the level switching mode, includes: If the switching time characterizes the conduction time of the upper-arm switch in the two-level bridge arm, when the level switching mode is the first switching mode, the calculation formulas for the action times of the first switch and the second switch are determined as: Tg1 = (Ton - Tm) * Gt and Tg2 = Tc; when the level switching mode is the second switching mode, the calculation formulas for the action times of the first switch and the second switch are determined as: Tg1 = 0 and Tg2 = (Tm - Ton) * Gt; If the switching time characterizes the turn-off time of the upper-arm switch in the two-level bridge arm, when the level switching mode is the first switching mode, the calculation formulas for the action times of the first switch and the second switch are determined as: Tg1 = (Tm - Toff) * Gt and Tg2 = Tc; when the level switching mode is the second switching mode, the calculation formulas for the action times of the first switch and the second switch are determined as: Tg1 = 0 and Tg2 = (Toff - Tm) * Gt; The Tg1, the Tg2, the Tm, and the Gt are respectively the conduction time of the first switch, the action time of the second switch, the center point time, and the conduction time gain coefficient. The Ton and the Toff are respectively the conduction time and the turn-off time of the upper-arm switch in the two-level bridge arm. The conduction time gain coefficient is the ratio of the modulation period time to the time difference, and the time difference is the difference between the modulation period time and the center point time.

7. The pulse width modulation control method according to claim 4, characterized in that, Before obtaining the action times of the first switch and the second switch based on the action time calculation formulas according to the switching time, the center point time, and the modulation period time, it further includes: Calculating the center point time according to the positive terminal potential of the DC bus, the neutral point potential, and the negative terminal potential of the DC bus.

8. A pulse width modulation controller, characterized in that, It includes a memory and a processor. The memory stores a computer program executable by the processor. When the computer program is executed by the processor, it implements the pulse width modulation control method as described in any one of claims 1 to 7.

9. A three-level converter, characterized in that, It includes at least one three-level bridge arm and the pulse width modulation controller as described in claim 8. The three-level bridge arm includes a first switch, a second switch, a third switch, and a fourth switch connected between the positive terminal of the DC bus and the negative terminal of the DC bus. The first switch and the third switch have a complementary switch state relationship, and the second switch and the fourth switch have a complementary switch state relationship; The pulse width modulation controller is used to output the pulse width modulation signal to each switch in the three-level bridge arm.

10. A computer-readable storage medium, characterized in that, A computer program is stored on the computer-readable storage medium. When the computer program is executed by the processor, it implements the pulse width modulation control method as described in any one of claims 1 to 7.

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