Communication method and communication device based on low-density parity check code

Abstract

The embodiment of the invention provides a communication method and device based on a low-density parity check code, and the method comprises the steps: carrying out the combined screening of an information column number and a punching number according to a target code rate, enabling the information column number to be used for determining a coding basis matrix, and enabling the punching number to be used for determining a punching sequence, the coding basis matrix is used for coding the information bit sequence to obtain the codeword sequence, and the codeword sequence is punctured according to the puncturing sequence, so that the puncturing proportion is matched with the target code rate and is always controlled in a proper range, and the method has the advantages of high convergence speed and excellent decoding threshold, and is suitable for the decoding of the code rate. And the rate matching mode can be improved.

Description

Technical Field

[0001] This application relates to the field of communication technologies, and more specifically, to a communication method and a communication device based on low-density parity-check codes. Background Art

[0002] In the field of channel coding, low-density parity-check (LDPC) codes are one of the most mature and widely used channel coding schemes.

[0003] Currently, 5G LDPC has two types of parity-check matrices, namely Figure 1 (base graph 1, BG1) and Figure 2 (base graph 2, BG2). When encoding for high-throughput scenarios, usually a single base graph is used for encoding. This single base graph has a fixed number of information columns, resulting in fixed puncturing numbers and puncturing positions. When using this base graph for LDPC encoding, the decoding threshold is poor and the convergence speed is slow. In high-throughput scenarios, the performance loss is very large, and thus a more optimal rate matching method cannot be adopted.

[0004] Therefore, it is necessary to consider how to improve the rate matching method. Summary of the Invention

[0005] This application provides a communication method based on low-density parity-check codes, which can improve the rate matching method.

[0006] In a first aspect, a communication method based on low-density parity-check codes is provided. This method can be executed by a transmitting-end device, or by a module or unit in the transmitting-end device. For the sake of convenient description, the transmitting-end device is uniformly used hereinafter for description. Among them, the transmitting-end device can be a terminal device or a network device.

[0007] The method includes: determining the number of information columns and the number of punctures according to a target code rate and a first LDPC base matrix, where the number of information columns is used to determine a second LDPC base matrix, and the second LDPC base matrix is a sub-matrix of the first LDPC base matrix; encoding an information bit sequence using the second LDPC base matrix to obtain a first LDPC codeword sequence; puncturing the first LDPC codeword sequence according to a puncturing sequence, and outputting a second LDPC codeword sequence, where the puncturing sequence is determined according to the number of punctures.

[0008] Based on the above solution, the number of information columns and the number of punctures are jointly selected according to the target code rate. The number of information columns is used to determine the encoding base matrix, and the number of punctures is used to determine the puncturing sequence, so that the puncturing ratio matches the target code rate, thereby providing a more flexible rate matching method.

[0009] In combination with the first aspect, in some implementations of the first aspect, determining the number of information columns and the number of punctures according to the target code rate and the first LDPC base matrix includes: determining the number of information columns corresponding to the target code rate according to the pre-stored corresponding relationship between the target code rate and the number of information columns, and determining the number of punctures corresponding to the number of information columns according to the pre-stored corresponding relationship between the number of information columns and the number of punctures; or, determining the number of information columns corresponding to the target code rate according to the pre-stored corresponding relationship between the target code rate and the number of information columns, and determining the number of punctures according to the number of information columns and the target code rate; or, determining the number of information columns and the number of punctures according to the pre-stored corresponding relationship between the target code rate and the number of information columns and the number of punctures; or, determining the number of punctures corresponding to the target code rate according to the pre-stored corresponding relationship between the target code rate and the number of punctures, and determining the number of information columns corresponding to the number of punctures according to the pre-stored corresponding relationship between the number of information columns and the number of punctures; or, determining the number of punctures corresponding to the target code rate according to the pre-stored corresponding relationship between the target code rate and the number of punctures, and determining the number of information columns according to the number of punctures and the target code rate.

[0010] Based on the above solution, the corresponding relationship between the target code rate and the number of information columns is pre-stored in the form of a table, or the corresponding relationship between the target code rate and the number of information columns and the number of punctures is pre-stored, or the corresponding relationship between the target code rate and the number of punctures is pre-stored. Therefore, the number of information columns and the number of punctures that match the target code rate can be quickly determined, and then a more flexible rate matching method can be provided.

[0011] In combination with the first aspect, in some implementations of the first aspect, the pre-stored corresponding relationship between the target code rate and the number of information columns is the corresponding relationship between the code rate interval to which the target code rate belongs and the number of information columns, where the endpoints of the code rate interval are determined according to the number of information columns, the number of punctures, and the number of core checksums of the first LDPC base matrix.

[0012] Based on the above solution, the corresponding relationship between the code rate interval and the number of information columns is stored in the form of a table. Since the code rate intervals are continuous, the number of information columns that match the target code rate can be determined more quickly and accurately through the code rate interval to which the target code rate belongs, and then the corresponding number of punctures can be determined according to the number of information columns, thereby providing a more flexible rate matching method.

[0013] In combination with the first aspect, in some implementations of the first aspect, the pre-stored corresponding relationship between the target code rate and the number of information columns and the number of punctures is the corresponding relationship between the code rate interval to which the target code rate belongs and the number of information columns and the number of punctures, where the endpoints of the code rate interval are determined according to the number of information columns, the number of punctures, and the number of core checksums of the first LDPC base matrix.

[0014] Based on the above solution, the correspondence between the code rate interval and the number of information columns and the number of punctures is stored in the form of a table. Since the code rate intervals are continuous, the number of information columns and the number of punctures that match the target code rate can be determined more quickly and accurately through the code rate interval to which the target code rate belongs, thereby providing a more flexible rate matching method.

[0015] Combined with the first aspect, in some implementation manners of the first aspect, the correspondence between the pre-stored target code rate and the number of punctures is the correspondence between the code rate interval to which the target code rate belongs and the number of punctures, where the endpoints of the code rate interval are determined according to the number of information columns, the number of punctures, and the core check number of the first LDPC base matrix.

[0016] Based on the above solution, the correspondence between the code rate interval and the number of punctures is stored in the form of a table. Since the code rate intervals are continuous, the number of information columns and the number of punctures that match the target code rate can be determined more quickly and accurately through the code rate interval to which the target code rate belongs, thereby providing a more flexible rate matching method.

[0017] Combined with the first aspect, in some implementation manners of the first aspect, the correspondence between the target code rate and the number of information columns is the number of information columns corresponding to the target code rate when it is greater than a predetermined threshold, and the number of information columns is fixed when the target code rate is lower than the predetermined first threshold and / or higher than the predetermined second threshold.

[0018] Combined with the first aspect, in some implementation manners of the first aspect, as the target code rate increases, the number of information columns corresponding to the target code rate increases monotonically.

[0019] Combined with the first aspect, in some implementation manners of the first aspect, the correspondence between the target code rate and the number of information columns includes: the code rate interval to which the target code rate belongs includes a first interval, the first interval corresponds to a first number of information columns, and when the target code rate does not belong to the first interval, the target code rate corresponds to a second number of information columns; or, the code rate interval to which the target code rate belongs includes the first interval and a second interval, the first interval corresponds to the first number of information columns, the second interval corresponds to the second number of information columns, and when the target code rate does not belong to the first interval and the second interval, the target code rate corresponds to a third number of information columns; or, the code rate interval to which the target code rate belongs includes the first interval, the second interval, and a third interval, the first interval corresponds to the first number of information columns, the second interval corresponds to the second number of information columns, the third interval corresponds to the third number of information columns, and when the target code rate does not belong to the first interval, the second interval, and the third interval, the target code rate corresponds to a fourth number of information columns.

[0020] In combination with the first aspect, in some implementations of the first aspect, the endpoints of the code rate range are determined according to the number of information columns, the number of punctures, and the core check number of the first LDPC base matrix, including: the left endpoint of the code rate range is The right endpoint is Wherein, the K min is the minimum number of information columns supported by the first LDPC base matrix, the x is a positive integer, the C is the core check number of the first LDPC base matrix, and the P is the number of punctures corresponding to the number of information columns.

[0021] Based on the above solution, the code rate range has continuity. Therefore, through the code rate range to which the target code rate belongs, the number of information columns and the number of punctures matching the target code rate can be determined more quickly and accurately, thereby providing a more flexible rate matching method.

[0022] In combination with the first aspect, in some implementations of the first aspect, according to the target code rate and the first LDPC base matrix, the number of information columns and the number of punctures are determined, including: for any number of information columns K i in the set of candidate numbers of information columns corresponding to the first LDPC base matrix, the K i and the number of punctures P i are included in the first candidate. Or, for any number of punctures P i in the preset set of numbers of punctures, the P i and the number of information columns K i are included in the first candidate, wherein the P i is determined according to the K i , the core check number of the first LDPC base matrix, and the target code rate. The K i is a positive integer, and the P i is a non-negative number; for the combination of K i and P i in the first candidate, compare the P i with the puncture threshold corresponding to the first LDPC base matrix to determine the number of information columns and the number of punctures; or, determine the number of information columns and the number of punctures corresponding to the level according to the level corresponding to the puncture threshold.

[0023] In combination with the first aspect, in some implementations of the first aspect, compare the P i with the puncture threshold corresponding to the first LDPC base matrix to determine the number of information columns and the number of punctures, including: for the combination of K i and P i in the first candidate, when the P i is less than the puncture threshold, include the K i and P i in the second candidate; when all P iWhen it is greater than or equal to the punching threshold, the number of information columns is the maximum K among the first candidates i , and the number of punches is this maximum K i corresponding P i ; or, when all Ps in the first candidate i are greater than or equal to the punching threshold, the number of punches is the minimum P among the first candidates i , and the number of information columns is this minimum P i corresponding K i .

[0024] Combined with the first aspect, in some implementation manners of the first aspect, when there are at least two combinations of K i and P i in the second candidate, the number of information columns is the maximum K in the second candidate i , and the number of punches is the P corresponding to the maximum K in the second candidate i ; or the number of information columns is the minimum K in the second candidate i , and the number of punches is the P corresponding to the minimum K in the second candidate i ; or the number of information columns and the number of punches are determined according to the hardware utilization rate.

[0025] Based on the above scheme, by screening according to the target code rate to determine the number of information columns and the number of punches, the number of information columns and the number of punches adapted to the target code rate are obtained. Among them, the number of information columns is used to determine the encoding base matrix, and the number of punches is used to determine the punching sequence, so that the punching ratio matches the target code rate, thereby improving the rate matching method.

[0026] Combined with the first aspect, in some implementation manners of the first aspect, the punching sequence is determined according to the number of punches, including: when the number of punches is less than or equal to 1, the first column of the punching sequence is the column with the largest column weight among the columns of the first LDPC base matrix; when the number of punches is greater than 1 and less than or equal to 2, the first two columns of the punching sequence are the two columns that contain the most checks with the number of punches less than or equal to 1 among the columns of the first LDPC base matrix; or, the first column of the punching sequence is the column with the second largest column weight among the columns of the first LDPC base matrix, and the associated rows of the first column and the second column of the punching sequence are inconsistent; when the number of punches is greater than 2, the first 3 columns of the punching sequence include the column with the lightest column weight among the columns of the first LDPC base matrix.

[0027] Based on the above scheme, the punching sequences determined according to different numbers of punches are different. According to different punching sequences, the encoded bit sequence is punched at non-fixed positions and non-fixed lengths, and the punching method is more flexible, thereby providing a more flexible rate matching method.

[0028]

[0029] ​​In combination with the first aspect, in some implementations of the first aspect, puncturing the first LDPC codeword sequence according to the puncturing sequence includes: when the number of punctures is an integer, puncturing the first LDPC codeword sequence at positions from 1 to the number of punctures in the puncturing sequence; when the number of punctures is a non-integer, puncturing the first LDPC codeword sequence at positions from 1 to the ceiling of the number of punctures in the puncturing sequence.

[0029] Based on the above solution, since the puncturing positions are not fixed, the puncturing positions of the encoded bit sequence can be accurately determined by the number of punctures and the puncturing sequence.

[0030] In combination with the first aspect, in some implementations of the first aspect, the puncturing sequence is a set including a permutation of any column of the first LDPC base matrix.

[0031] Based on the above solution, since the puncturing sequence is a permutation of a set composed of any column of the LDPC base matrix, the puncturing sequence is more flexible. Therefore, puncturing according to the puncturing sequence makes the puncturing method more flexible, and further provides a more flexible rate matching method.

[0032] In combination with the first aspect, in some implementations of the first aspect, the first LDPC base matrix includes a base Figure 1 and an extra information column.

[0033] In combination with the first aspect, in some implementations of the first aspect, the first LDPC base matrix has the same set of lifting factors as the base Figure 1 and the fifth row of the extra information column part has no connections.

[0034] Based on the above solution, design an LDPC base matrix that can be compatible with the BG1 coding scheme. The LDPC base matrix has the same set of lifting factors as BG1 and the fifth row of the extra information column part of the LDPC base matrix has no connections, so that the LDPC base matrix can have a degree distribution structure of 5G. In addition, according to the LDPC base matrix, more information column numbers and puncture numbers matching the target code rate can be determined, and a more flexible rate matching method can be provided, thereby improving the rate matching method.

[0035] In combination with the first aspect, in some implementations of the first aspect, the first LDPC base matrix includes a third LDPC base matrix and an extra information column, and the puncturing threshold corresponding to the third LDPC base matrix is 0.

[0036] In combination with the first aspect, in some implementations of the first aspect, the core matrix corresponding to the minimum number of information columns supported by the third LDPC base matrix is a fully connected matrix.

[0037] Based on the above scheme, by designing an LDPC base matrix that can be compatible with non-punctured matrix coding schemes, the LDPC matrix can support higher coding rates, so that more information column numbers and puncturing numbers matching the coding rate can be determined according to the LDPC base matrix, thereby providing a more flexible rate matching method.

[0038] Combined with the first aspect, in some implementation manners of the first aspect, a second LDPC codeword sequence is output, including: when sending for the first time, after deleting the corresponding positions of the first LDPC codeword sequence according to the puncturing sequence, outputting the second LDPC codeword sequence according to a preset bit length; when sending for the second time, taking the columns of the first LDPC codeword sequence corresponding to the puncturing sequence as the starting positions and outputting the second LDPC codeword sequence according to the preset bit length.

[0039] Combined with the first aspect, in some implementation manners of the first aspect, a second LDPC codeword sequence is output, including: interleaving the first LDPC codeword sequence and then inputting it into a cyclic buffer, and outputting the second LDPC codeword sequence; or, inputting the first LDPC codeword sequence into the cyclic buffer and then interleaving it, and outputting the second LDPC codeword sequence.

[0040] Combined with the first aspect, in some implementation manners of the first aspect, outputting the second LDPC codeword sequence, including: when sending for the first time, outputting the second LDPC codeword sequence from the starting position of the third LDPC codeword sequence according to the preset bit length, where the third LDPC codeword sequence is a sequence obtained by interleaving the first LDPC codeword sequence, and the columns in the third LDPC codeword sequence corresponding to the puncturing sequence are after the preset bit length; when sending for the second time, taking the columns of the first LDPC codeword sequence corresponding to the puncturing sequence as the starting position of the third LDPC codeword sequence and outputting the second LDPC codeword sequence according to the preset bit length.

[0041] Based on the above scheme, when sending for the first time, the columns of the LDPC codeword sequence corresponding to the puncturing sequence are not sent, and when sending for the second time, the columns of the LDPC codeword sequence corresponding to the puncturing sequence are preferentially sent, that is, the puncturing columns corresponding to the new LDPC codeword sequence obtained after interleaving, providing a new puncturing method to output the codeword sequence, thereby providing a more flexible rate matching method.

[0042] Combined with the first aspect, in some implementation manners of the first aspect, the number of information columns supported by the first LDPC base matrix is consecutive integers with an interval of 2 or 1.

[0043] Based on the above scheme, the number of information columns is consecutive integers with an interval of 2 or 1, which can make the decoding threshold better and the hardware utilization rate high.

[0044] In a second aspect, a communication method based on low-density parity-check (LDPC) codes is provided. The method includes: receiving a second LDPC codeword sequence; decoding the second LDPC codeword sequence according to a second LDPC base matrix, where the second LDPC base matrix is determined according to the number of information columns, and the second LDPC codeword sequence is obtained by puncturing a first LDPC codeword sequence according to a puncturing sequence, and the puncturing sequence is determined according to the number of punctures; the second LDPC base matrix is a sub-matrix of the first LDPC base matrix; the number of information columns and the number of punctures are determined according to a target code rate and the first LDPC base matrix.

[0045] In combination with the second aspect, in some implementation manners of the second aspect, the number of information columns and the number of punctures are determined according to a target code rate and the first LDPC base matrix, including: the number of information columns is determined according to a pre-stored correspondence between the target code rate and the number of information columns, and the number of punctures is determined according to a pre-stored correspondence between the number of information columns and the number of punctures; or, the number of information columns is determined according to a pre-stored correspondence between the target code rate and the number of information columns, and the number of punctures is determined according to the number of information columns and the target code rate; or, the number of information columns and the number of punctures are determined according to a pre-stored correspondence between the target code rate and the number of information columns and the number of punctures; or, the number of punctures is determined according to a pre-stored correspondence between the target code rate and the number of punctures, and the number of information columns is determined according to a pre-stored correspondence between the number of information columns and the number of punctures; or, the number of punctures is determined according to a pre-stored correspondence between the target code rate and the number of punctures, and the number of information columns is determined according to the number of punctures and the target code rate.

[0046] In combination with the second aspect, in some implementation manners of the second aspect, the pre-stored correspondence between the target code rate and the number of information columns is a correspondence between the code rate interval to which the target code rate belongs and the number of information columns, where the endpoints of the code rate interval are determined according to the number of information columns, the number of punctures, and the number of core checks of the first LDPC base matrix.

[0047] In combination with the second aspect, in some implementation manners of the second aspect, the pre-stored correspondence between the target code rate and the number of information columns and the number of punctures is a correspondence between the code rate interval to which the target code rate belongs and the number of information columns and the number of punctures, where the endpoints of the code rate interval are determined according to the number of information columns, the number of punctures, and the number of core checks of the first LDPC base matrix.

[0048] In combination with the second aspect, in some implementation manners of the second aspect, the pre-stored correspondence between the target code rate and the number of punctures is a correspondence between the code rate interval to which the target code rate belongs and the number of punctures, where the endpoints of the code rate interval are determined according to the number of information columns, the number of punctures, and the number of core checks of the first LDPC base matrix.

[0049] In combination with the second aspect, in some implementations of the second aspect, the correspondence between the target code rate and the number of information columns is the number of information columns corresponding to the case where the target code rate is greater than a predetermined threshold, and the number of information columns is fixed when the target code rate is lower than a predetermined first threshold and / or higher than a predetermined second threshold.

[0050] In combination with the second aspect, in some implementations of the second aspect, as the target code rate increases, the number of information columns corresponding to the target code rate increases monotonically.

[0051] In combination with the second aspect, in some implementations of the second aspect, the correspondence between the target code rate and the number of information columns includes: the code rate interval to which the target code rate belongs includes a first interval, the first interval corresponds to a first number of information columns, and when the target code rate does not belong to the first interval, the target code rate corresponds to a second number of information columns; or, the code rate interval to which the target code rate belongs includes the first interval and a second interval, the first interval corresponds to the first number of information columns, the second interval corresponds to the second number of information columns, and when the target code rate does not belong to the first interval and the second interval, the target code rate corresponds to a third number of information columns; or, the code rate interval to which the target code rate belongs includes the first interval, the second interval, and a third interval, the first interval corresponds to the first number of information columns, the second interval corresponds to the second number of information columns, the third interval corresponds to the third number of information columns, and when the target code rate does not belong to the first interval, the second interval, and the third interval, the target code rate corresponds to a fourth number of information columns.

[0052] In combination with the second aspect, in some implementations of the second aspect, the endpoints of the code rate interval are determined according to the number of information columns, the number of punctures, and the core checksum of the first LDPC base matrix, including:

[0053] The left endpoint of the code rate interval is The right endpoint is where the K min is the minimum number of information columns supported by the first LDPC base matrix, the x is a positive integer, the C is the core checksum of the first LDPC base matrix, and the P is the number of punctures corresponding to the number of information columns.

[0054] In combination with the second aspect, in some implementations of the second aspect, the number of information columns and the number of punctures are determined according to the target code rate and the first LDPC base matrix, including: for any number of information columns K i in the set of candidate numbers of information columns corresponding to the first LDPC base matrix, the K i and the number of punctures P i are included in the first candidate, or, for any number of punctures P i in the preset set of numbers of punctures, the P i and the number of information columns K iIs included in the first candidate, where the P i According to the K i , the core check number of the first LDPC base matrix and the target code rate are determined, and the K i is a positive integer, and the P i is a non-negative number; for the K i and P i combinations in the first candidate, the information column number and the puncturing number are determined by comparing the P i with the puncturing threshold corresponding to the first LDPC base matrix; alternatively, the information column number and the puncturing number are determined according to the level corresponding to the puncturing threshold.

[0055] Combined with the second aspect, in some implementation manners of the second aspect, the information column number and the puncturing number are determined by comparing the P i with the puncturing threshold corresponding to the first LDPC base matrix, including: for the K i and P i combinations in the first candidate, when the P i is less than the puncturing threshold, the K i and P i are included in the second candidate; when all the P i in the first candidate are greater than or equal to the puncturing threshold, the information column number is the maximum K i in the first candidate, and the puncturing number is the P i corresponding to the maximum K i ; alternatively, when all the P i in the first candidate are greater than or equal to the puncturing threshold, the puncturing number is the minimum P i in the first candidate, and the information column number is the K i corresponding to the minimum P i .

[0056] Combined with the second aspect, in some implementation manners of the second aspect, when there are at least two K i and P i in the second candidate, the information column number is the maximum K i in the second candidate, and the puncturing number is the P i corresponding to the maximum K i in the second candidate; or the information column number is the minimum K i in the second candidate, and the puncturing number is the P i corresponding to the minimum K i in the second candidate; or the information column number and the puncturing number are determined according to the hardware utilization rate.

[0057] In combination with the second aspect, in certain implementations of the second aspect, the puncturing sequence is determined according to the number of punctures, including: when the number of punctures is less than or equal to 1, the first column of the puncturing sequence is the column with the largest column weight among the columns of the first LDPC base matrix; when the number of punctures is greater than 1 and less than or equal to 2, the first two columns of the puncturing sequence are the two columns that contain the most checks with the number of punctures less than or equal to 1 among the columns of the first LDPC base matrix; or, the first column of the puncturing sequence is the column with the second largest column weight among the columns of the first LDPC base matrix, and the associated rows of the first column and the second column of the puncturing sequence are inconsistent; when the number of punctures is greater than 2, the first 3 columns of the puncturing sequence include the column with the lightest column weight among the columns of the first LDPC base matrix.

[0058] In combination with the second aspect, in certain implementations of the second aspect, the second LDPC codeword sequence is obtained by puncturing the first LDPC codeword sequence according to the puncturing sequence, including:

[0059] When the number of punctures is an integer, the first LDPC codeword sequence is punctured at the positions from 1 to the number of punctures in the puncturing sequence to obtain the second LDPC codeword sequence;

[0060] When the number of punctures is a non-integer, the first LDPC codeword sequence is punctured at the positions from 1 to the ceiling of the number of punctures in the puncturing sequence to obtain the second LDPC codeword sequence.

[0061] In combination with the second aspect, in certain implementations of the second aspect, the puncturing sequence is a set including a permutation of any column of the first LDPC base matrix.

[0062] In combination with the second aspect, in certain implementations of the second aspect, the first LDPC base matrix includes a base Figure 1 and additional information columns.

[0063] In combination with the second aspect, in certain implementations of the second aspect, the first LDPC base matrix has the same set of lifting factors as the base Figure 1 and the fifth row of the additional information column part has no connections.

[0064] In combination with the second aspect, in certain implementations of the second aspect, the first LDPC base matrix includes a third LDPC base matrix and additional information columns, and the puncturing threshold corresponding to the third LDPC base matrix is 0.

[0065] In combination with the second aspect, in certain implementations of the second aspect, the core matrix corresponding to the minimum number of information columns supported by the third LDPC base matrix is a fully connected matrix.

[0066] In combination with the second aspect, in some implementations of the second aspect, receiving a second LDPC codeword sequence includes: a second LDPC codeword sequence received for the first time and a second LDPC codeword sequence received for the second time. The second LDPC codeword sequence received for the first time is obtained by deleting the corresponding positions of the first LDPC codeword sequence according to the puncturing sequence and outputting according to a preset bit length; the second LDPC codeword sequence received for the second time is obtained by using the columns of the first LDPC codeword sequence corresponding to the puncturing sequence as the starting position and outputting according to the preset bit length.

[0067] In combination with the second aspect, in some implementations of the second aspect, receiving a second LDPC codeword sequence includes: the received second LDPC codeword sequence is obtained by interleaving the first LDPC codeword sequence and then inputting it into a cyclic buffer; or, the received second LDPC codeword sequence is obtained by inputting the first LDPC codeword sequence into a cyclic buffer and then interleaving it.

[0068] In combination with the second aspect, in some implementations of the second aspect, the received second LDPC codeword sequence includes: the second LDPC codeword sequence received for the first time is obtained by outputting the third LDPC codeword sequence from the starting position according to a preset bit length, where the columns of the third LDPC codeword sequence corresponding to the puncturing sequence are after the preset bit length, and the third LDPC codeword sequence is a sequence obtained by interleaving the first LDPC codeword sequence; the second LDPC codeword sequence received for the second time is obtained by using the columns of the first LDPC codeword sequence corresponding to the puncturing sequence as the starting position of the third LDPC codeword sequence and outputting according to a preset bit length.

[0069] In a third aspect, a communication device is provided. The device is used to execute the method provided by any one of the above aspects or its implementations. Specifically, the device may include units and / or modules for executing the method provided by any one of the above aspects or its implementations, such as a processing unit and / or a transceiver unit.

[0070] In one implementation, the device is a transmitting end device or a receiving end device. When the device is a transmitting end device or a receiving end device, the transceiver unit may be a transceiver, or an input / output interface, or a communication interface; the processing unit may be at least one processor. Optionally, the transceiver is a transceiver circuit. Optionally, the input / output interface is an input / output circuit.

[0071] In another implementation, the device is a chip, a chip system, or a circuit in a transmitting device or a receiving device. When the device is a chip, a chip system, or a circuit in a transmitting device or a receiving device, the transceiver unit can be an input / output interface, an interface circuit, an output circuit, an input circuit, a pin, or a related circuit, etc. on the chip, the chip system, or the circuit; the processing unit can be at least one processor, a processing circuit, or a logic circuit, etc.

[0072] In a fourth aspect, a communication device is provided, which includes: a memory for storing programs; at least one processor for executing the computer programs or instructions stored in the memory to perform the methods provided in any of the above aspects or their implementations.

[0073] In one implementation, the device is a transmitting device or a receiving device.

[0074] In another implementation, the device is a chip, a chip system, or a circuit in a transmitting device or a receiving device.

[0075] In a fifth aspect, a communication device is provided, which includes: at least one processor and a communication interface. The at least one processor is used to obtain the computer programs or instructions stored in the memory through the communication interface to perform the methods provided in any of the above aspects or their implementations. The communication interface can be implemented by hardware or software.

[0076] In one implementation, the device further includes the memory.

[0077] In a sixth aspect, a processor is provided for performing the methods provided in the above aspects.

[0078] For operations such as sending and obtaining / receiving involved by the processor, if there is no special indication, or if it does not conflict with its actual role or internal logic in the relevant description, then it can be understood as operations such as the processor outputting and receiving, inputting, etc., and can also be understood as sending and receiving operations performed by the radio frequency circuit and the antenna. This application does not make any limitations in this regard.

[0079] In a seventh aspect, a computer-readable storage medium is provided, which stores program codes for a device to execute. The program codes include those for performing the methods provided in any of the above aspects or their implementations.

[0080] In an eighth aspect, a computer program product containing instructions is provided. When the computer program product runs on a computer, it causes the computer to perform the methods provided in any of the above aspects or their implementations.

[0081] In a ninth aspect, a chip is provided. The chip includes a processor and a communication interface. The processor reads instructions stored in a memory through the communication interface and executes the method provided by any of the above aspects or its implementation manners. The communication interface can be implemented by hardware or software.

[0082] Optionally, as an implementation manner, the chip further includes a memory. A computer program or instructions are stored in the memory. The processor is configured to execute the computer program or instructions stored in the memory. When the computer program or instructions are executed, the processor is configured to execute the method provided by any of the above aspects or its implementation manners.

[0083] Wherein, when the method provided by this application is executed by a chip, this application does not limit the number of chips for specifically implementing the method of this application. For example, it can be executed by one chip, or can be executed by two or more chips. Moreover, when the number of chips for implementing the method of this application is two or more, the chip manufacturers are not limited. They can be the same manufacturer or different manufacturers.

[0084] In a tenth aspect, a communication system is provided, including at least one of the above-mentioned transmitting-end device or receiving-end device.

[0085] In an eleventh aspect, a computer program is provided. When it runs on a computer, it causes the method provided by any of the above aspects or its implementation manners to be executed. BRIEF DESCRIPTION OF THE DRAWINGS

[0086] Figure 1 It is a schematic diagram of a network architecture applicable to the embodiments of this application.

[0087] Figure 2 It is a schematic diagram of a parity-check matrix H of an LDPC.

[0088] Figure 3 For Figure 2 the Tanner schematic diagram obtained from the parity-check matrix exemplified in

[0089] Figure 4 It is a schematic structural diagram of the parity-check matrix.

[0090] Figure 5 It is a schematic diagram of an information transmission process.

[0091] Figure 6 It is a schematic diagram of the puncturing pattern of BG1.

[0092] Figure 7 It is a schematic flowchart of a communication method 700 based on LDPC codes provided by this application.

[0093] Figure 8 It is an example diagram of a base matrix of a nested information column compatible with BG1.

[0094] Figure 9 Schematic diagram of the high code rate puncturing method for BG1.

[0095] Figure 10 Schematic diagram of the puncturing method for the first LDPC base matrix constructed by adding an extra information column and an extended parity check column.

[0096] Figure 11 Example diagram of the base matrix compatible with the non-punctured matrix.

[0097] Figure 12 Schematic flowchart for determining the number of information columns and the number of punctures.

[0098] Figure 13 Schematic diagram of puncturing 1 column in the core area of BG1.

[0099] Figure 14 Schematic diagram of puncturing 2 columns in the core area of BG1.

[0100] Figure 15 Schematic diagram of puncturing 3 columns in the core area of BG1.

[0101] Figure 16 Simulation results of the performance loss of 5G BG1 compared with the base matrix of nested information columns.

[0102] Figure 17 Simulation results of the performance loss of the base matrix of nested information columns compatible with BG1 at different code rates.

[0103] Figure 18 Schematic diagram of the form of the base matrix with different numbers of nested information columns.

[0104] Figure 19 Simulation results of the performance loss of the base matrix at a code rate of 22 / 23.

[0105] Figure 20 Schematic block diagram of the communication device 10 provided by the embodiment of the present application.

[0106] Figure 21 Schematic block diagram of the communication device 20 provided by the embodiment of the present application. Detailed implementation manners

[0107] For the convenience of understanding the embodiments of the present application, before introducing the embodiments of the present application, the following points are explained first:

[0108] The various numerical numbers such as the first, second, etc. are only for the convenience of description and are not used to limit the scope of the embodiments of the present application. For example, they are used to distinguish different messages, different information, etc. "Pre-defined" or "pre-stored" can be implemented by pre-saving the corresponding codes, tables or other means that can be used to indicate relevant information in the device. The present application does not limit its specific implementation manner. The "protocol" involved may refer to the standard protocols in the communication field. For example, it may include the long term evolution (LTE) protocol, the NR protocol, and the relevant protocols applied to future communication systems. The present application does not limit this. Words such as "exemplary", "for example", "exemplarily", "as (another) example" are used to represent examples, illustrations or explanations. Any embodiment or design solution described as "exemplary" in the present application should not be construed as being more preferred or more advantageous than other embodiments or design solutions. The terms "include", "comprise", "have" and their variants all mean "including but not limited to", unless otherwise specifically emphasized in other ways. "At least one" means one or more, and "a plurality" means two or more. "At most one", "at most one" means one or 0. "And / or" describes the association relationship of associated objects and indicates that there can be three relationships. For example, A and / or B can mean: A exists alone, A and B exist simultaneously, and B exists alone, where A and B can be singular or plural. The character " / " generally means that the associated objects before and after are in an "or" relationship. "At least one (item)" or its similar expression refers to any combination of these items, including any combination of single item (item) or plural items (items). For example, at least one (item) of a, b and c can mean: a, or, b, or, c, or, a and b, or, a and c, or, b and c, or, a, b and c. Where a, b and c can be single or multiple respectively. The relevant descriptions regarding the network element A sending a message, information or data to the network element B, and the network element B receiving the message, information or data from the network element A are intended to illustrate which network element the message, information or data is to be sent to, and do not limit whether they are directly sent or indirectly sent via other network elements. Descriptions such as "when...", "in the case of...", "if" and "if" all refer to the device making corresponding processing under a certain objective situation, which does not limit the time, and does not require the device to have a judgment action when implementing, nor does it mean that there are other limitations.

[0109] In addition, the network architecture and service scenarios described in the embodiments of the present application are for more clearly explaining the technical solutions of the embodiments of the present application, and do not constitute a limitation on the technical solutions provided by the embodiments of the present application. Those of ordinary skill in the art can know that with the evolution of the network architecture and the emergence of new service scenarios, the technical solutions provided by the embodiments of the present application are equally applicable to similar technical problems.

[0110] The communication system applicable to the embodiments of the present application will be described below:

[0111] The technical solutions of the embodiments of the present application can be applied to various communication systems, including but not limited to: global system of mobile communication (GSM) system, enhanced data rate for GSM evolution (EDGE), fifth generation (5G) system or new radio (NR) system, LTE system, long term evolution-advanced (LTE-A) system, LTE frequency division duplex (FDD) system, LTE time division duplex (TDD) system, wideband code division multiple access (WCDMA) system, code division multiple access (CDMA) system, time division-synchronization code division multiple access (TD-SCDMA) system, etc. It can also be applied to future communication systems, such as the sixth generation mobile communication system. In addition, it can also be applied to device to device (D2D) communication, vehicle-to-everything (V2X) communication, machine to machine (M2M) communication, machine type communication (MTC), and Internet of Things (IoT) communication systems or other communication systems. In addition, it can be extended to similar wireless communication systems, such as wireless-fidelity (Wi-Fi), worldwide interoperability for microwave access (WIMAX), and communication systems related to the 3rd generation partnership project (3GPP), etc., without limitation.

[0112] A communication system applicable to the embodiments of the present application may include one or more transmitting devices and one or more receiving devices. Optionally, one of the transmitting device and the receiving device may be a terminal device, and the other may be a network device. Optionally, both the transmitting device and the receiving device may be terminal devices. Optionally, both the transmitting device and the receiving device may be network devices.

[0113] Figure 1 It is a schematic diagram of a network architecture applicable to the embodiments of the present application.

[0114] As Figure 1 shown, the embodiments of the present application can be applicable to both uplink data transmission and downlink data transmission. Figure 1 Only the uplink data transmission or downlink data transmission between one network device and two terminal devices (such as terminal device 1 and terminal device 2) is taken as an example. In the uplink data transmission, the transmitting device herein is the terminal device, and the receiving device is the network device; conversely, in the downlink data transmission, the transmitting device is the network device, and the receiving device is the terminal device. In addition, the applicability of the embodiments of the present application in other communication scenarios is not limited. For example, it can also be applied to sidelink communication.

[0115] The terminal device of the present application may also be referred to as a user equipment (UE), access terminal, user unit, user station, mobile station, mobile platform, mobile terminal (MT), remote station, remote terminal, mobile device, user terminal, terminal, drone, wireless communication device, user agent or user device, etc. The terminal device in the embodiments of the present application may be a device that provides voice and / or data connectivity to users and can be used to connect people, things, and machines. For example, it can be a handheld device with a wireless connection function, a vehicle-mounted device, etc. The terminal device in the embodiments of the present application may be a mobile phone, a tablet computer (pad), a laptop computer, a handheld computer, a mobile internet device (MID), a wearable device, a virtual reality (VR) device, an augmented reality (AR) device, a wireless terminal in industrial control, a wireless terminal in self-driving, a wireless terminal in remote medical surgery, a wireless terminal in a smart grid, a wireless terminal in transportation safety, a wireless terminal in a smart city, a wireless terminal in a smart home, etc. The embodiments of the present application do not limit this.

[0116] The network device in the embodiments of this application can be a device with wireless transceiver functions. This network device can be a device that provides wireless communication function services and is usually located on the network side, including but not limited to the next-generation base station (gNodeB, gNB) in the 5G system, the base station in the sixth-generation mobile communication system, the base station in future mobile communication systems, or the access node in a wireless fidelity (WiFi) system, the evolved node B (eNB) in the long term evolution (LTE) system, the radio network controller (RNC), the node B (NB), the base station controller (BSC), the home base station (e.g., home evolved NodeB, or home Node B, HNB), the baseband unit (BBU), the transmission reception point (TRP), the transmitting point (TP), the base transceiver station (BTS), satellites, drones, etc. In a network structure, the network device can include a centralized unit (CU) node, or include a distributed unit (DU) node, or be a radio access network (RAN) device including a CU node and a DU node, or be a RAN device including a control plane CU node, a user plane CU node, and a DU node. Or, the network device can also be a wireless controller, a relay station, a vehicle-mounted device, a wearable device, etc. in the cloud radio access network (CRAN) scenario. In addition, the base station can be a macro base station, a micro base station, a relay node, a donor node, or a combination thereof. The base station can also refer to a communication module, a modem, or a chip used to be disposed in the foregoing devices or apparatuses. The base station can also be a mobile switching center and a device that undertakes the base station function in D2D, V2X, M2M communications, a network-side device in the 6G network, a device that undertakes the base station function in future communication systems, etc. The base station can support networks with the same or different access technologies, and the embodiments of this application do not limit this.

[0117] Unless otherwise specified, the device for implementing the functions of the terminal device or network device in this application may refer to the terminal device or network device itself, or may refer to a device capable of supporting the terminal device or network device to implement the functions, such as a chip system or a chip. Specifically, a system on a chip (SoC), a modem. The device may be installed in the terminal device or network device. In the embodiments of this application, the chip system may be composed of chips, or may include chips and other discrete devices.

[0118] It should also be noted that some embodiments in this article introduce specific solution details using the 5G system as an example. It can be understood that when this solution is used in other communication systems, such as the LTE system, or future communication systems, each message, channel, or information in the solution can be replaced with messages, channels, or information that can achieve corresponding functions in other communication systems. This application does not make any limitations in this regard.

[0119] To facilitate the understanding of the embodiments of this application, several concepts or terms related to the embodiments of this application are briefly described. The concepts or terms introduced below are described based on the concepts or terms defined in the protocol, but it does not mean that the embodiments of this application can only be applied to existing systems. The concepts or terms related to the embodiments of this application can be applied to future systems. And the specific names of the concepts or terms (such as concepts or terms related to functional descriptions) can be adjusted with the development of future systems.

[0120] 1. LDPC code

[0121] The LDPC code is a linear block code, and its parity-check matrix is a sparse matrix. It not only has good performance approaching the Shannon limit, but also has low decoding complexity and flexible structure. The number of zero elements in the parity-check matrix of LDPC is much larger than the number of non-zero elements. Or rather, the row weight and column weight of the parity-check matrix are very small numbers compared to the code length of LDPC. Among them, an LDPC code with the length of the information bit sequence equal to w and the code length equal to v can be uniquely determined by its parity-check matrix.

[0122] In 1981, Tanner represented the codeword of LDPC in the form of a graph, and now this graph is called a Tanner graph. The Tanner graph and the parity-check matrix are in one-to-one correspondence. The Tanner graph consists of two types of vertices. One type of vertex represents the codeword bits and is called a variable node, and the other type of vertex is a parity-check node, representing the parity-check constraint relationship. Each parity-check node represents a parity-check constraint relationship. The following is combined with Figure 2 and Figure 3 for illustration.

[0123] Figure 2It is a schematic diagram of a parity-check matrix H of an LDPC.

[0124] Figure 2 Among them, {Vi} represents the set of variable nodes (VN), and {Ci} represents the set of check nodes (CN). Each row of the parity-check matrix H represents a parity-check equation, and each parity-check equation corresponds to a check node. Each column represents a codeword bit, and each codeword bit corresponds to a variable node. As Figure 2 shown, there are 6 variable nodes and 3 check nodes. The variable nodes and check nodes are associated by connecting lines to obtain a Tanner graph.

[0125] Figure 3 It is a Tanner schematic diagram of a parity-check matrix H of an LDPC.

[0126] Figure 3 It is corresponding to Figure 2 the Tanner schematic diagram obtained from the parity-check matrix in the example. An LDPC code can be represented by a parity-check matrix or by a Tanner graph. Figure 3 It is a Tanner graph representing a parity-check matrix H with 3 rows and 6 columns. The Tanner graph includes two types of nodes, namely check nodes and variable nodes. Among them, one row of the parity-check matrix H corresponds to a check node, that is, it corresponds to the parity-check bit of the LDPC; one column of the parity-check matrix H corresponds to a variable node, that is, it corresponds to each codeword bit of the LDPC. Therefore, this Tanner graph includes 3 check nodes and 6 variable nodes. As Figure 3 shown, the check node connects the relevant variable nodes together, or rather, the check node is the convergence point of the relevant variable nodes to represent a parity-check equation. "Relevant" corresponds to the element value of 1 in the parity-check matrix H, that is, the connection situation between the two types of nodes corresponds to the element value in the H matrix. If there is a connection between the i-th check node and the j-th variable node, it means that the value of the element (i, j) in the H matrix is 1. If there is no connection, the corresponding element is 0. For example, for the check node C1, the variable nodes with the element value of 1 in the H matrix are V1, V2, and V4. Therefore, these 3 variable nodes are connected to the check node C1. The connection line between the variable node and the check node can also be called an edge. The edge represents the association between the check node and the variable node. The edge relationship between the check node and the variable node can include two situations: there is an edge or there is no edge.

[0127] As described above, LDPC is a linear block code. A linear block code divides the information sequence to be encoded into groups of w bits, and then the encoder performs a linear operation on these w information bits to obtain g parity bits. Then, these w information bits and g parity bits are combined to obtain a codeword of length v = w + g. The mapping relationship from the w-bit information bits to the v-bit codeword is usually represented by a corresponding parity-check matrix H. According to the parity-check matrix H, a codeword sequence can be generated accordingly to complete the encoding process. After the codeword sequence is transmitted through the channel, the receiving-end device decodes the received signal accordingly to determine the original information bits.

[0128] 2. QC-LDPC Code

[0129] Quasi-Cyclic Low-Density Parity-Check (QC-LDPC) encoding and decoding is a class of structured LDPC codes. Based on LDPC codes, the method of cyclic shift is adopted to make the encoding and decoding processes more efficient. In QC-LDPC codes, the parity-check matrix H is divided into multiple Zc×Zc submatrices, and each submatrix is a cyclic shift matrix. A cyclic shift matrix is a matrix obtained by performing a cyclic shift operation on the identity matrix. By selecting appropriate cyclic shift parameters, QC-LDPC codes with excellent error-correcting performance can be constructed. The code construction is based on a prototype matrix, which is called the base graph or base matrix Hb. Based on the base matrix Hb and the lifting size Zc, the base matrix Hb can be extended into a complete parity-check matrix for encoding or decoding. Zc can also be called the expansion factor, lifting factor, expansion value, expansion coefficient, or lifting size, etc.

[0130] The base graph model of QC-LDPC code is BG = (X, Y, F), where X represents variables, Y represents parities, and F represents the connection relationship between X and Y. After QC expansion with the expansion factor Z c a Tanner graph is obtained, that is, a bipartite graph G = (V, C, E), where V is the variable node, C is the parity node, and E is the connection relationship. The number of columns N of the corresponding parity-check matrix is N = |V| = Z c |X|, the number of rows M of the parity-check matrix is M = |C| = Z c |Y|, and the number of non-zero elements of the parity-check matrix is |E| = Z|F|. There are two base graphs for the LDPC code of 5G: BG1 and BG2, and BG1 and BG2 have a common parity-check matrix structure. BG1 is mainly used in scenarios with high requirements for throughput, high code rate, and long code length. BG2 is mainly used in scenarios with low requirements for throughput, low code rate, and short code length.

[0131] Optionally, in addition to "-1", the zero elements in the base matrix Hb can have other representation forms. For example, the all-zero matrix can be represented by "-" or a null value. The base matrix of the LDPC code can also be referred to as the LDPC base matrix or the LDPC base graph.

[0132] 3. Non-zero elements and zero elements

[0133] In the parity-check matrix, a zero element indicates that there is no connection between a variable node and a parity-check node, and a non-zero element indicates that there is a connection between a variable node and a parity-check node.

[0134] In the LDPC base matrix, a zero element represents a square matrix of all zeros of order Zc, and a non-zero element represents an identity matrix of order Zc or a cyclic permutation matrix based on the identity matrix of order Zc. The value of the non-zero element represents the cyclic shift value or translation value (shifting value) relative to the identity matrix.

[0135] This application does not limit the specific representation forms of zero elements and non-zero elements. For example, in the parity-check matrix H shown as Figure 2 below, "0" is used to represent a zero element, and "1" is used to represent a non-zero element. Another example is that in the base matrix Hb described above, "-1" is used to represent a zero element, and "non-negative value" is used to represent a non-zero element.

[0136] For convenience of description, in the following LDPC base matrix, "0" is used to represent a zero element, and "1" is used to represent a non-zero element.

[0137] 4. Column weight and row weight

[0138] For a certain column of a matrix, the column weight can refer to the number of non-zero elements in that column. For a certain row of a matrix, the row weight can refer to the number of non-zero elements in that row. For example, as shown Figure 2 below, the column weight of the first column of the parity-check matrix H is 2, and the row weight of the first row is 3.

[0139] 5. Structure of the parity-check matrix corresponding to the base graph

[0140] Figure 4 is a schematic diagram of the structure of the parity-check matrix.

[0141] The parity-check matrix corresponding to this base graph is a matrix obtained by lifting the base matrix in combination with the lifting value and the translation value. As shown in Figure 4 (a) below, the parity-check matrix can include a high rate region, an all-zero region, an incremental redundancy region, and a raptor-like region. The high rate region (or the core region) can include Figure 4Part A and Part B shown in (b), where Part A corresponds to the high code rate information column region (or information bits, information positions, system bits, etc.), and is represented by a set such as {A1, A2, …, A n}, where A n represents the last column of the information column region corresponding to the high code rate of the base map, and the number of information columns of the base map is n; Part B corresponds to the high code rate core check column region (or core check bits, core check positions), and is represented by a set such as {B1, B2, …, B C}, where B C represents the last column of the core check column region corresponding to the high code rate of the base map, and the core check number of the base map is C. In addition, the core check column region can also be determined by the degree of the check node. For example, the check column with a degree greater than 1 is called the core check column, and the corresponding region is the core check column region. The all-zero matrix corresponds to Figure 4 Part C in (b), the incremental redundancy region corresponds to Figure 4 Part D in (b), Part D corresponds to the low code rate matrix, the class-Laplace region corresponds Figure 4 to Part E in (b), and Part E is an identity matrix. D and E together form a single parity check relationship.

[0142] The base matrix is designed according to the lowest code rate. A and B together form the high code rate core matrix (or core matrix), corresponding to the highest code rate, and this code rate is called the core matrix code rate. Since the code rate coderate = k / N, where k is the number of information bits and N is the total number of bits, expanding the matrix region along the Figure 4 direction of the arrow in (a), the larger the region, the number of information bits remains unchanged, and the total number of bits becomes larger. Therefore, the code rate gradually becomes smaller until the lowest code rate. When different code rates need to be supported, the matrix region in Figure 4 (a) can be intercepted for use.

[0143] 6. Information Transmission Process

[0144] Figure 5 is a schematic diagram of the information transmission process. As Figure 5 shown, information is sent from the information source, and after source coding, channel coding, modulation, air interface transmission, demodulation, channel decoding, source recovery and other processes, it reaches the information sink, completing the information transmission from the information source to the information sink. Among them, Figure 5 the processes shown in the upper half (including source coding, channel coding, modulation, etc.) are executed by the sending end device, Figure 5 and the processes shown in the lower half (including source decoding, channel decoding, demodulation, etc.) are executed by the receiving end device. This application mainly relates to Figure 5 the source coding, channel coding, source recovery and channel decoding process parts shown in the dotted rectangular box.

[0145] Currently, the main decoding algorithms for LDPC codes are the Min-Sum (MS) and belief propagation (BP) decoding algorithms. Currently, the Offset-MS and Normalized-MS decoding algorithms are used in actual communication systems.

[0146] 7. Punctured Columns

[0147] As Figure 4 As shown in (b), the dashed matrix area in the figure represents the punctured columns. The first two columns of the matrices of BG1 and BG2 are both punctured columns. The punctured columns in the LDPC code can refer to the columns that are not transmitted, that is, the bits corresponding to the puncture positions are not transmitted during transmission, and the receiving end also has no information about the bits corresponding to this puncture position. The puncturing method is to set the log-likelihood ratio of the punctured columns to 0 and recover them during decoding. As can be seen from the above, A and B form the core matrix, and the corresponding code rate is the core matrix code rate. The number of columns corresponding to the A part of BG1 is 22, the number of columns corresponding to the B part is 4, and the number of punctured columns (or the number of punctures) is 2. According to the above code rate formula, after puncturing 2 information columns, the core matrix code rate is coderate = k / N = 22 / (22 + 4 - 2) = 11 / 12 ≈ 0.917. To support a code rate slightly higher than this, some parity-check columns can be additionally punctured. Therefore, the punctured columns can be information columns or parity-check columns.

[0148] Currently, the highest code rate specified in the modulation and coding scheme (MCS) table for 5G's current data channel is 0.926. In a situation with good channel quality, a higher MCS will be used in the actual communication system. In the future, a higher MCS may be used in the peak throughput scenario of 6G. Currently, BG1 applicable to the high-throughput scenario has fixed punctured columns, that is, the first and second information columns as described above, making the core matrix code rate 0.917. To support a code rate slightly higher than 0.917, some parity-check columns can be additionally punctured.

[0149] Figure 6 It is a schematic diagram of the puncturing method for BG1. As Figure 6As shown, after fixing the first and second columns of the puncturing information, in order to support a higher code rate, additional puncturing is performed on the last column of the parity check columns, which increases the code rate. However, this method results in excessive puncturing, poor decoding threshold, and slow convergence speed, and there is a very large performance loss in high-throughput scenarios. Among them, the decoding threshold refers to the minimum signal-to-noise ratio at which the mutual information of each variable node can approach 1 as the decoding progresses. The mutual information refers to the amount of information of each variable node. The greater the amount of information, the higher its reliability and the lower the error probability. In addition, when encoding in high-throughput scenarios in the prior art, a single base graph is usually used for encoding, such as BG1. This base graph has a fixed number of information columns, resulting in fixed puncturing columns and being unable to allocate puncturing columns according to the code rate, and thus unable to adopt a more optimal rate matching method.

[0150] Based on this, in view of the requirements of extremely high code rates and fast convergence in high-throughput scenarios and peak rate scenarios, the present application proposes a communication method and apparatus based on low-density parity-check (LDPC) codes. Instead of setting fixed puncturing numbers and puncturing positions, the number of information columns and puncturing numbers are jointly screened according to the target code rate and the first LDPC base matrix. After using the screened number of information columns to reconstruct the first LDPC base matrix to obtain a second LDPC base matrix to encode the information bit sequence, for the encoded sequence, puncturing is performed according to the puncturing positions determined by the puncturing number and the corresponding puncturing sequence to complete rate matching.

[0151] To facilitate the understanding of the embodiments of the present application, the following embodiments are described in the peak rate scenario. However, it should be understood that the scenarios to which the embodiments of the present application can be applied are not limited to the peak rate scenario, and can also be implemented in high-throughput scenarios, or can also be implemented in an enhanced mobile broadband (eMBB) scenario, or can also be implemented in an ultra-reliable low latency communication (URLLC) scenario, or can also be implemented in a massive machine-type communication (mMTC) scenario, or can also be implemented in a scenario with requirements of extremely high code rates and fast convergence. The embodiments of the present application do not make any limitations in this regard.

[0152] Figure 7 It is a schematic flowchart of a communication method 700 based on LDPC codes provided by the present application.

[0153] Method 700 can be executed by a sending device and a receiving device. Without special instructions, the "sending device" or "receiving device" can refer to the sending device or receiving device itself, or a device capable of supporting the sending device or receiving device to implement this function. For the convenience of description, the sending device and the receiving device are uniformly used hereinafter for description. Among them, the sending device can be a terminal device or a network device, and the receiving device can be a terminal device or a network device.

[0154] Method 700 may include at least some of S710 to S750.

[0155] S710, the sending device obtains an information bit sequence and a first LDPC base matrix.

[0156] If the sending device needs to communicate with the receiving device, that is, the sending device needs to send a signal to the receiving device, the sending device needs to first obtain the information bit sequence corresponding to the signal to be sent to the receiving device.

[0157] Among them, for the sending device to obtain the information bit sequence, it may mean that the sending device performs source coding on the source symbols to generate the information bit sequence. For the sending device to obtain the information bit sequence, it may also mean that the sending device obtains (such as receives) the information bit sequence from other communication devices.

[0158] A plurality of LDPC base matrices are predefined and stored in the form of a maximum-scale base graph. Each LDPC base matrix supports different numbers of information columns. In some embodiments, different numbers of information columns correspond to different LDPC base matrices, and the LDPC base matrix corresponding to the required number of information columns can be obtained by intercepting from the maximum-scale base graph according to the actual required number of information columns.

[0159] Specifically, the connection relationship and translation values of the maximum-scale base graph are stored in a large table. In the table, the position (i, j) of the LDPC base matrix is represented by the row index i and the column index j, that is, (i, j) represents the i-th row and j-th column of the LDPC base matrix. In addition, the set index i LS is also used to represent a set of translation values V i,j (shifting value, SV) at the position (i, j) of the LDPC base matrix, where the maximum-scale base graph is the base graph corresponding to the maximum number of pre-stored information columns.

[0160] For example, Table 1 is a schematic table of the maximum-scale base graph in 5G. As shown in Table 1, taking the row number i of the LDPC base matrix as the index, all associated column numbers j and a set of translation values V corresponding to (i, j) are stored i,j , and the translation value V in the table i,jIt indicates that the i-th row and j-th column are related, that is, there is an edge connection between the i-th row and j-th column. Through the set index i LS to indicate each translation value. The 5G set index is 0, 1, …, 7. When i = 0, j = 0 and i LS = 0, it means that the translation value of the 0-th row and 0-th column of the LDPC base matrix is 250.

[0161] There are two ways to screen the specified information column number base graph from the largest-scale base graph. The first way is to directly delete the unused columns in the storage table of the largest-scale base graph and set the information positions corresponding to the deleted columns to 0 during encoding for shorten processing; the second way is to delete the unused columns and change the column numbers of the base graph, that is, generate a new table and use the new table to guide the construction of the LDPC base graph.

[0162] Exemplarily, when the number of information columns K′ actually needed is less than the maximum number of information columns corresponding to the largest-scale base graph, intercept the largest-scale base Figure 1 ~K′ as the information columns of the LDPC base matrix supporting the information column number K′. The connection relationship and translation values of the matrix area corresponding to the information columns and all the check columns of this LDPC base matrix can also be obtained according to Table 1.

[0163] It should be noted that the information columns 1~K′ can be intercepted sequentially in order, or they can also be intercepted in other orders specified by the standard. This application does not make any limitations in this regard.

[0164] Exemplarily, for the base graph BG1, the column indices of its corresponding core check columns are 22 - 25. When i LS = 3, according to the table, the values of the columns corresponding to the first row of the core check matrix B of the base graph BG1 at column indices 22 and 23 are 1 and 0. Similarly, the connection relationships and translation values corresponding to the information columns 1~K′ can be obtained. For the sake of brevity, they will not be elaborated here.

[0165] In the first example of the first LDPC base matrix, this first LDPC base matrix is a base matrix compatible with the nested information columns of BG1, that is, this first LDPC base matrix includes BG1 and additional information columns. Specifically as follows:

[0166] Specifically, when K′ = 22, the base graph corresponding to the information columns 1~22 of the largest-scale base graph is 5G BG1.

[0167] Table 1 Schematic table of the largest-scale base graph

[0168]

[0169] Figure 8 Example graph of the base matrix compatible with the nested information columns of BG1.

[0170] A specific implementation manner, such as Figure 8 As shown, when the first LDPC base matrix includes BG1 and additional information columns, the first LDPC base matrix is a core matrix. Its part A includes the information columns of BG1 and the added additional information columns, and the core check numbers corresponding to part B include the core check numbers of BG1. And the first LDPC base matrix has the same set of lifting factors as BG1. Therefore, the first LDPC base matrix can be compatible with the 5G coding scheme with small modifications.

[0171] Among them, BG1 is the base in the 5G communication protocol Figure 1 , that is, Table 5.3.2-2 in 3GPP protocol 38.212. The set of lifting factors is multiple sets of lifting factors in exponential form. More specifically, it can be the set of lifting factors in the 5G communication protocol, that is, Table 5.3.2-1 in 3GPP protocol 38.212; Another possible implementation manner is that the maximum value of each group of the set of lifting factors is twice the maximum value of each group in the above communication protocol.

[0172] Exemplarily, part A includes the information columns of columns 1 to 22 of BG1 and the added additional information columns of columns 23 to 33, and part B includes 4 core check columns of BG1, then the core check number is 4.

[0173] In addition, the additional information column part of the first LDPC base matrix does not have any connecting edges in the 5th row. Therefore, the first LDPC base matrix can have the 5G degree distribution structure, and thus the decoding threshold is good.

[0174] The following is an exemplary description of the puncturing threshold corresponding to the first LDPC base matrix when the first LDPC base matrix is a base matrix compatible with the nested information columns of BG1, where the puncturing threshold is the upper limit of the number of punctures.

[0175] Exemplarily, when the target code rate is higher than the core matrix code rate of BG1, the high code rate requirement can be adapted by increasing the information columns. At this time, the matrix obtained after increasing the information columns is the first LDPC base matrix. At this time, the puncturing threshold corresponding to the first LDPC base matrix is less than or equal to 2. If the number of information columns of the first LDPC base matrix after increasing the information columns reaches the maximum number of information columns and the number of punctures is greater than 2, then the last check bit is punctured. At this time, the puncturing threshold corresponding to the first LDPC base matrix is greater than 2 and less than or equal to 3. If the number of information columns of the first LDPC base matrix reaches the maximum number of information columns and the number of punctures is greater than 2, in addition to puncturing information column 1 and information column 2, the extended check column is also punctured. At this time, the puncturing threshold corresponding to the first LDPC base matrix is greater than 2 and less than or equal to 3.

[0176] Exemplarily, when the default puncturing number of the first LDPC base matrix is ​​2, if the target code rate is lower than the threshold R0, the first LDPC base matrix includes a core check column and an extended check column of BG1, such as Figure 8 As shown, the first LDPC basis matrix is Figure 8 The matrix area is composed of the information column part, the extra information column part and the 1st to 5th columns of the check column part of the 1st to 5th rows of BG1, the 1st to 5th check columns include the 1st to 4th core check columns and the 5th extended check column. When punching, in addition to punching information column 1 and information column 2, the extended check column will also be punched. At this time, the puncturing threshold corresponding to the first LDPC base matrix is ​​greater than 2 and less than or equal to 3.

[0177] Exemplarily, when the default puncturing number of the first LDPC base matrix is ​​2, if the target code rate is higher than the threshold R0, the number of information columns and the number of puncturing are determined according to S720. At this time, the puncturing threshold corresponding to the first LDPC base matrix is ​​greater than 2 and less than or equal to 3. The first LDPC base matrix can be a base matrix including BG1 and additional information columns, or the first LDPC base matrix can be a base matrix including BG1, additional information columns and extended check columns.

[0178] The above threshold R0 is the core matrix code rate of the first LDPC base matrix when only information columns 1 and 2 are punctured. For example, the core matrix code rate may be the core matrix code rate corresponding to the minimum number of information columns supported by the first LDPC base matrix. For another example, the core matrix code rate may be the core matrix code rate corresponding to the maximum number of information columns supported by the first LDPC base matrix.

[0179] The number of information columns supported by the first LDPC base matrix can be a continuous integer with an interval of 2 or 1 within a certain range, such as from K1 column to K2 column can be a continuous integer with an interval of 2 or 1. For example, when K1=2, K2 can take a value of 3 / 2K1 or 2K1, and the number of information columns can be a continuous integer with an interval of 2 or 1, which can make the decoding threshold more optimal and the hardware utilization rate high.

[0180] Figure 9 This is a schematic diagram of the high-rate puncturing method of BG1. Figure 9 As shown, the first LDPC base matrix is ​​a base graph directly constructed using the core part of BG1 and punctured. Puncturing the first LDPC base matrix directly constructed using the core part of BG1 can make the hardware utilization rate higher.

[0181] Figure 10Schematic diagram of the puncturing method for the first LDPC base matrix constructed with additional information columns and an extended check column. When the target code rate is higher than the core matrix code rate, the puncturing threshold is set to a value greater than 2 and less than or equal to 3. At this time, puncturing is performed on the additional check columns added. For example, as Figure 10 described, an additional last check column is added. When the puncturing threshold is a value greater than 2 and less than or equal to 3, according to the puncturing rules, when puncturing information columns 1 and 2, puncturing is also performed on the additional last check column added. The specific puncturing rules are detailed in Figures 13 to 15 and will not be elaborated here. The puncturing method for the first LDPC base matrix with additional information columns and an extended check column can make the decoding threshold better.

[0182] In the second example of the first LDPC base matrix, the first LDPC base matrix is a base matrix with nested information columns that is compatible with a non-punctured matrix, that is, the first LDPC base matrix includes a third LDPC base matrix and additional information columns. The third LDPC base matrix is a non-punctured matrix, and the puncturing threshold corresponding to the third LDPC base matrix is 0, that is, the number of punctures corresponding to the third LDPC base matrix is 0.

[0183] Figure 11 Schematic diagram of a base matrix with nested information columns that is compatible with a non-punctured matrix. The figure shows a first LDPC base matrix that includes a third LDPC base matrix and additional information columns and does not perform puncturing. In this case, the first LDPC base matrix is the core matrix. Its part A includes the information columns of the third LDPC base matrix and the additional information columns added, and the core check numbers corresponding to part B include the core check numbers of the third LDPC base matrix.

[0184] A specific implementation method is that the core matrix corresponding to the minimum number of information columns supported by the third LDPC base matrix is a fully connected matrix, that is, the core information column area corresponding to this number of information columns (part A corresponding to the minimum number of information columns above) is a fully connected matrix. The puncturing threshold corresponding to this third LDPC base matrix is 0. Additional information columns can be selected and not punctured to support the target code rate. Among them, the additional information columns added are called additional information columns. If there is a number of information columns that can support the target code rate, then use this value greater than or equal to the number of information columns as the number of information columns of the first LDPC base matrix. If there is no number of information columns that can support the target code rate, then select the maximum number of information columns supported by the first LDPC base matrix as the number of information columns of the first LDPC base matrix.

[0185] The following is an exemplary description of the puncturing threshold corresponding to the first LDPC base matrix when the first LDPC base matrix is a base matrix with nested information columns that is compatible with a non-punctured matrix. Among them, the puncturing threshold is the upper limit of the number of punctures.

[0186] Exemplarily, if the number of information columns of the first LDPC base matrix reaches the maximum number of information columns and the number of punctures is less than or equal to 1, then the last parity bit of the first LDPC base matrix is punctured. At this time, the puncture threshold corresponding to the first LDPC base matrix is less than or equal to 1. If the number of information columns of the first LDPC base matrix reaches the maximum number of information columns and the number of punctures is less than or equal to 1, and the first LDPC base matrix includes a third LDPC base matrix, additional information columns, and extended parity columns, only the extended parity columns are punctured during puncturing. At this time, the puncture threshold corresponding to the first LDPC base matrix is less than or equal to 1.

[0187] Exemplarily, if the target code rate is lower than the threshold R0, the first LDPC base matrix includes a third LDPC base matrix, additional information columns, and extended parity columns, and only the extended parity columns are punctured during puncturing. At this time, the puncture threshold corresponding to the first LDPC base matrix is less than or equal to 1.

[0188] Exemplarily, if the target code rate is higher than the threshold R0, the number of information columns and the number of punctures are determined according to S720. The first LDPC base matrix can be a base matrix including a third LDPC base matrix and additional information columns, or the first LDPC base matrix can be a base matrix including a third LDPC base matrix, additional information columns, and extended parity columns. At this time, the puncture threshold corresponding to the first LDPC base matrix is 0.

[0189] In the second example of the first LDPC base matrix, the threshold R0 is the core matrix code rate of the first LDPC base matrix without any puncturing of the first LDPC base matrix. For example, the core matrix code rate can be the core matrix code rate corresponding to the minimum number of information columns supported by the first LDPC base matrix. Another example is that the core matrix code rate can be the core matrix code rate corresponding to the maximum number of information columns supported by the first LDPC base matrix.

[0190] The first LDPC base matrix in the above two examples can also be stored in the form of a maximum-scale base graph, and the first LDPC base matrix is obtained according to the number of information columns required in actuality and the maximum-scale base graph.

[0191] S720, the sending device determines the number of information columns and the number of punctures according to the target code rate and the first LDPC base matrix.

[0192] Among them, the number of information columns is used to determine the second LDPC base matrix, and the second LDPC base matrix is a sub-matrix of the first LDPC base matrix. The target code rate is the coding code rate corresponding to the pre-defined (such as specified by the protocol or pre-determined by the sending device and the receiving device) LDPC code.

[0193] Due to obtaining an information bit sequence, a given target information bit length, i.e., the information length K corresponding to the information bit sequence, a suitable first LDPC base matrix is selected according to the given information length K and the target code rate. Since the code rate = information length / code length, therefore, a suitable first LDPC base matrix can also be selected according to the given information length and code length, or it can also be to select a suitable first LDPC base matrix according to the given code length and target code rate. The first LDPC base matrix is selected from a plurality of predefined LDPC base matrices (or LDPC base graphs).

[0194] Figure 12 A schematic flowchart for determining the number of information columns and the number of punctures. This figure includes S810 and S820.

[0195] S810. Determine a candidate information column set, a puncture threshold, and a puncture sequence according to the target code rate and the first LDPC base matrix.

[0196] Specifically, according to the target code rate, determine a candidate information column set S supported by the first LDPC base matrix k and an alternative set of lifting sizes S z .

[0197] where S k ={K1, K2, …, K t}, the information column set is the number of information columns supported by the first LDPC base matrix. Among them, K1 is the minimum number of information columns corresponding to the first LDPC base matrix, and K t is the maximum number of information columns corresponding to the first LDPC base matrix. The numerical range in the information column set is from the minimum number of information columns supported by the first LDPC base matrix to the maximum number of information columns. This information column set is only an example, and the information columns in the information column set can be stored in other orders. For example, K t can be in any position in the set.

[0198] Exemplarily, if the minimum number of information columns supported by the first LDPC base matrix is 22 and the maximum number of information columns is 33, then the information column set includes any one or more natural numbers from 22 to 33.

[0199] The candidate information column set corresponding to the first LDPC base matrix is stored in the form of a table. The candidate information column set includes one or more candidate information columns supported by the first LDPC base matrix. Each of the one or more candidate information columns is used to indicate the number of information columns selected from the first LDPC base matrix. The candidate information column set corresponds to the first LDPC base matrix.

[0200] For example, for BG1, it corresponds to a candidate information column number set table, and the candidate information column number set table stores the candidate information column numbers supported by BG1; for BG2, it corresponds to a candidate information column number set table, and the candidate information column number set table stores the candidate information column numbers supported by BG2. The number of information columns is called the information column number. For example, the candidate information column numbers supported by BG1 are 22, and the candidate information column numbers supported by BG2 are 10.

[0201] In addition, since the code rate = information length / code length, given the target code length and target code rate, the target information length can be obtained, or given the target code length and target information length, the target code rate can be obtained, or given the target information length and target code rate, the target code length can be obtained. That is, the target code rate can also be determined according to the target information length and target code length.

[0202] Among them, the target code length E is the length of the bits to be transmitted, or it can also be the number of transmitted bits corresponding to the symbol after coding and modulation. The target code rate R is the ratio of the number of information bits to the number of transmitted bits, that is, the code rate = number of information bits / number of transmitted bits. Therefore, the number of information bits can be obtained from the code length and code rate. The number of information bits corresponds to the information length K of the information bit sequence. The information length can be the number of information bits transmitted, or it can also be the number of information bits to be transmitted. The number of information bits can be the number of bits including cyclic redundancy check (CRC), or it can also be the number of bits without CRC.

[0203] The target code length, target code rate, and target information length can be pre-configured by high-layer signaling, the multiple access channel (MAC) layer, or downlink physical layer signals, or they can also be directly obtained and calculated by the transceiver.

[0204] The target code rate R can be the initial transmission code rate specified in the MCS, or it can be determined by the formula R = K / E according to the number of information bits K and the number of transmitted bits E, or it can also be determined according to the number of resources, where the initial transmission code rate is the code rate when the bit sequence is transmitted for the first time.

[0205] Specifically, the target code length can be determined by the frame structure, number of layers, and modulation scheme for encoding and transmitting information bits; the target code rate can be determined by high-layer signaling, MAC layer, physical layer indication, or directly given in the MCS table.

[0206] Specifically, a corresponding puncturing threshold γ is determined according to the first LDPC base matrix. The puncturing threshold can be any value. In one possible implementation, the puncturing threshold can also be a continuous value within a certain range, with a certain interval between values. The specific interval can be 0.25, 0.5, or 1. For example, the puncturing threshold can be a value in the set {0, 0.25, 0.5, 0.75, 1, …, 2}, or it can also be a value in the set {0, 0.5, 1, …, 2}, or it can also be a value in {0, 1, 2}.

[0207] Specifically, one or more corresponding puncturing sequences are determined according to the first LDPC base matrix. The one or more puncturing sequences corresponding to the first LDPC base matrix are stored in the form of a table. For example, for BG1, it corresponds to a puncturing sequence table, such as the first puncturing sequence. This first puncturing sequence table includes one or more puncturing sequences supported by BG1; for BG2, it corresponds to a puncturing sequence table, such as the second puncturing sequence. This second puncturing sequence table includes one or more puncturing sequences supported by BG2.

[0208] It should be understood that the above-mentioned puncturing sequences can be some sequences stored in the form of a table, or can also be sequences composed of puncturing positions determined by the puncturing numbers described in the standard. For example, when the puncturing number is 2, it corresponds to the first two columns of the information columns of BG1. The present application does not make any limitations in this regard.

[0209] Among them, the puncturing sequence is a set including permutations of any columns of the first LDPC base matrix.

[0210] Exemplarily, when the first LDPC base matrix includes one column of extended check columns, the length of the puncturing sequence of the first LDPC base matrix is the sum of the maximum number of information columns, the core check number, and 1. Then the puncturing sequence corresponding to this first LDPC base matrix is represented by the permutation of the symbol {1, 2, …, kb max +C+1}, where kb max is the maximum number of information columns supported by the first LDPC base matrix, C is the core check number of the first LDPC base matrix, and kb max +C+1 represents the last column of extended check columns of the first LDPC base matrix; when i ∈ {1, 2, …, kb max +C+1}, it represents the i-th column of the first LDPC base matrix. If the length of this puncturing sequence is limited, the puncturing sequence corresponding to the first LDPC base matrix can also be a subsequence of this puncturing sequence. At this time, the length of the puncturing sequence corresponding to the first LDPC base matrix is the length of the subsequence.

[0211] It should be understood that the above punching sequence is only an illustrative example, and the order in the punching sequence is not fixed. The columns of the first LDPC base matrix corresponding to the punching sequence can be in any order. The i-th position of the punching sequence corresponds to the i-th matrix column to be preferentially punched. For example, when i = 2, the first column of the punching sequence is the 2nd column of the first LDPC base matrix. When i = kb max , the first column of the punching sequence is the kb max th column of the first LDPC base matrix, that is, the order of any column of the first LDPC base matrix corresponding to the punching sequence is not fixed.

[0212] It should be noted that the above description of the punching sequence is only an illustrative description. The name, specific presentation form, or description method of the punching sequence does not limit the solution of the embodiments of the present application. The punching sequence can be presented in the form of a sequence, or in the form of pseudocode, or in other forms that can indicate the punching position. The present application does not make any limitations in this regard.

[0213] S820. Determine the number of information columns and the number of punches according to the target code rate, the candidate information column number set, and the punching threshold.

[0214] Specifically, for any information column number K in the candidate information column number set S k = {K1, K2,..., K t} corresponding to the first LDPC base matrix, the number of punches P i ∈ S k , the number of punches P i is determined according to the information column number K i , the core check number C of the first LDPC base matrix, and the target code rate R. It is expressed by the formula as P i = K i + C - K i / R; and because E = K i / R, the number of punches P i can also be determined according to the target code length E, the information column number K i and the core check number C of the first LDPC base matrix, where the information column number K i is a positive integer.

[0215] A possible implementation manner is that when the first LDPC base matrix is a core matrix, that is, the first LDPC base matrix does not include an extended check column, the number of information columns and the number of punches are determined in the following manner:

[0216] Step 1: For a K i , when K i + C - K i / R ≥ 0, P i is P i = Ki +C - K i / R, the P i can be an integer or a decimal. Substitute this K i and P i into the first candidate; or, when P i ≥0, the P i is an integer. Substitute this K i and P i into the first candidate.

[0217] Exemplarily, for an information column number K1 = 22, when K1 + C - K1 / R ≥ 0, and P1 = K1 + C - K1 / R is P1 = 1, so K1 = 22 and P1 = 1 are included in the first candidate; another example is for an information column number K2 = 23, when K2 + C - K2 / R ≥ 0, and P2 = K2 + C - K2 / R is P2 = 2, so K2 = 23 and P2 = 2 are included in the first candidate, and so on, to screen out the combinations of information column numbers and puncturing numbers that meet the target code rate.

[0218] It can be seen that there are multiple K i and P i combinations in the first candidate, where K i and P i correspond one by one.

[0219] Another possible implementation method is to preset multiple puncturing number sets, such as a numerical set {0, 0.25, 0.5, 0.75, 1,..., 2} within an interval with an interval of 0.25, or it can also be a numerical set with an interval of 0.5 or 1. The actually selected puncturing number P i belongs to this set. For any puncturing number P i in the preset puncturing number set, according to P i = K i + C - K i / R, calculate the corresponding K i of P i , and substitute this K i and P i into the first candidate.

[0220] Step 2: For the K i and P i combinations in the first candidate, compare P i with the puncturing threshold corresponding to the first LDPC base matrix to determine the information column number and the puncturing number.

[0221] Specifically, for the K i and P i combinations in the first candidate, when P i is less than the puncturing threshold, this Ki and P i are included in the second candidate; when all Ps in the first candidate i are greater than or equal to the punching threshold, the maximum K in the first candidate i is used as the number of information columns, and the P corresponding to this maximum K i is used as the punching number; or, when all Ps in the first candidate i are greater than or equal to the punching threshold, the punching number is the minimum P in the first candidate i , and the number of information columns is the K corresponding to the minimum P i i i .

[0222] Another possible implementation is to introduce multiple punching thresholds γ, rank the multiple punching thresholds, and the number of information columns in the same rank is the same. Therefore, the number of information columns and the punching number corresponding to this rank can also be determined according to the rank corresponding to the punching threshold.

[0223] Another possible implementation is that instead of screening according to the threshold, P i is screened in ascending order to determine the punching number and the number of information columns.

[0224] Another possible implementation is to select the maximum number of information columns K i , and according to this maximum K i , the core check number C of the first LDPC base matrix, and the target code rate, determine the punching number P i corresponding to this K i .

[0225] Step 3: When there are at least two combinations of K i and P i in the second candidate, the maximum K in the second candidate i is used as the number of information columns, and the punching number is the P corresponding to the maximum K i in the second candidate i ; or the minimum K in the second candidate i is used as the number of information columns, and the punching number is the P corresponding to the minimum K i in the second candidate i ; or the number of information columns and the punching number are determined according to the hardware utilization rate.

[0226] The above hardware utilization rate can be the current parallelism of the hardware's operation, reading, and storage. More specifically, this hardware utilization rate can be determined according to the maximum value of the boosting factor and the currently used boosting factor.

[0227] ​​Another possible implementation. Specifically, when selecting the first LDPC base matrix for a high target code rate, if there are information column numbers greater than a certain value in the set of information column numbers corresponding to the first LDPC base matrix, the core matrix code rate of the base matrices corresponding to these information column numbers is higher than the target code rate. To reduce the core matrix code rate to reach the target code rate or be lower than the target code rate, one additional column of extended parity check columns is added to the core matrix part corresponding to these information columns for puncturing. At this time, the corresponding K i +C - K i / R < 0. When the first LDPC base matrix is a core matrix plus one column of extended parity check columns, that is, the first LDPC base matrix includes one column of extended parity check columns, the information column number and the puncturing number are determined as follows:

[0228] Different from Step 1 above, P i =K i +C - K i / R + 1. For a K i , when K i +C - K i / R + 1 ≥ 0, P i is P i =K i +C - K i / R + 1. This P i can be an integer or a decimal. This K i and P i are included in the first candidate; or, when P i ≥ 0, this P i is an integer, and this K i and P i are included in the first candidate. Since the remaining steps are the same, for the sake of brevity, they will not be elaborated here.

[0229] During the screening process of the information column numbers supported by the first LDPC base matrix, there are cases where the core matrix code rate of the base matrices corresponding to the information column numbers is higher than the target code rate. Thus, additional extended parity check columns are introduced to reduce the core matrix code rate to be lower than the target code rate. By puncturing the extended parity check columns, it can be ensured that only the predetermined information bits in the core matrix part of the second LDPC base matrix determined by the final information column number are punctured, without additional core parity check bit puncturing, which helps to maintain the decoding threshold; and it can be avoided that there is one row in the core matrix part of this second LDPC base matrix that includes three or more puncturing positions, which can effectively improve the convergence speed.

[0230] Store the corresponding information column numbers and puncturing numbers obtained from the above screening process to obtain a table of the target code rate corresponding to the information column numbers, or a table of the target code rate corresponding to the information column numbers and puncturing numbers, or a table of the target code rate corresponding to the puncturing numbers.

[0231] The screening scheme that controls the number of punctures within a threshold range has a continuous characteristic for the code rate. Therefore, the target code rate can be segmented, and each segment corresponds to an information column number and a number of punctures. The protocol stores the segmented form of the supported code rates, divided into intervals (a1, b1], (a2, b2], …, (a k , b k , and for each segment, the corresponding information column number and number of punctures are obtained according to the above screening process, and the results are stored to obtain a corresponding table of code rate and information column number. What can be stored in this table can be the information column number corresponding to the code rate interval, or the information column number and number of punctures corresponding to the code rate interval, or the number of punctures corresponding to the code rate interval. The segmentation of this interval can be (a k , b k ), or [a k , b k ), or also [a k , b k , and this application does not make any restrictions on this.

[0232] For the sake of convenience of description, the following describes according to the code rate segmentation interval (a k , b k and the table being the information column number corresponding to the code rate interval.

[0233] Another implementation method for determining the information column number and the number of punctures is to determine the information column number and the number of punctures according to the target code rate and a pre-stored table.

[0234] Pre-store the corresponding table of code rate intervals and information column numbers. For example, for the code rate intervals (a1, b1], (a2, b2], …, (a t , b t , where a i+1 = b i , and the corresponding information column numbers are K1, K2, …, K t , if the target code rate R is within the interval (a t , b t , then screen K t as the information column number to be used, and determine the number of punctures P t corresponding to K t according to K t , the core check number C of the first LDPC base matrix, and the target code rate R.

[0235] Among them, the information column numbers can satisfy K1 < K2 < … < K t , that is, showing a monotonically increasing trend. The endpoints a i , b i are where Kmin is the minimum value of the number of information columns supported by the first LDPC base matrix, x is a positive integer, and P is the number of information columns K min +x or the number of information columns K min +x+1 corresponding to the puncturing number. In this case, the left endpoint a of each interval i is the right endpoint b i is

[0236] Another possible implementation is that when the target code rate is greater than a certain predetermined threshold, that is, when the code rate does not depend on the above fixed interval endpoints, only a single information column is used. That is, when the target code rate is greater than the predetermined threshold, the number of information columns corresponding to the target code rate is determined. For example, when there are K1 and K2, where K1 < K2, then when the target code rate is greater than the predetermined threshold, the determined number of information columns is K2. Among them, the predetermined threshold can be the core matrix code rate corresponding to the maximum number of information columns supported by the first LDPC base matrix. The number of information columns is fixed when the target code rate is lower than the predetermined first threshold a and / or higher than the predetermined second threshold b.

[0237] Another possible implementation is that the code rate interval includes a first interval, which corresponds to a first number of information columns. When the target code rate does not belong to the first interval, the target code rate corresponds to a second number of information columns; or, the code rate interval includes the first interval and a second interval, which corresponds to the second number of information columns. When the target code rate does not belong to the first interval and the second interval, the target code rate corresponds to a third number of information columns; or, the code rate interval includes the first interval, the second interval and a third interval, which corresponds to the third number of information columns. When the target code rate does not belong to the first interval, the second interval and the third interval, the target code rate corresponds to a fourth number of information columns.

[0238] Specifically, for intervals within a predetermined threshold, such as (a1, b1], (a2, b2], they respectively correspond to the number of information columns K1, K2, and the number of information columns corresponding to the target code rates that do not belong to this code rate interval are all K3. Or it can be understood that the number of information columns corresponding to the remaining code rate intervals except this code rate interval is K3. For another example, for intervals within a predetermined threshold, such as (a1, b1], (a2, b2], (a3, b3], they respectively correspond to K1, K2, K3, and the number of information columns corresponding to the target code rates that do not belong to the code rate interval are all K4. Or it can be understood that the number of information columns corresponding to the remaining code rate intervals except this code rate interval is K4. The above-mentioned predetermined threshold can be 1 or 2 or 3, which represents the number of intervals obtained according to this predetermined threshold. For example, for the code rate intervals within the threshold 2, there can be 0, or 1, such as (a1, b1], or 2, such as (a1, b1], (a2, b2]. When the target code rate does not belong to the code rate intervals within this threshold, the corresponding number of information columns is the same. In a possible implementation, the range of the number of information columns corresponding to the remaining code rate intervals can be greater than a certain threshold b and less than a certain threshold a.

[0239] The above table corresponding the target code rate and the number of information columns, or the table corresponding the target code rate, the number of information columns, and the number of punctures, or the table corresponding the target code rate and the number of punctures can have an index or not, and this application does not make any limitation on this.

[0240] It should be noted that the table is only a form indicating the existence of a corresponding relationship and does not constitute a limitation on the solution itself. The corresponding relationship can also be represented by mathematical formulas, corresponding rules, etc., and this application does not make any limitation on this.

[0241] It should be understood that the above can determine the number of information columns corresponding to the target code rate according to the pre-stored corresponding relationship between the target code rate and the number of information columns, and determine the number of punctures corresponding to the number of information columns according to the pre-stored corresponding relationship between the number of information columns and the number of punctures; or it can also determine the number of information columns corresponding to the target code rate according to the pre-stored corresponding relationship between the target code rate and the number of information columns, and determine the number of punctures according to the number of information columns and the target code rate; or it can also determine the number of information columns and the number of punctures according to the pre-stored corresponding relationship between the target code rate, the number of information columns, and the number of punctures; or it can also determine the number of punctures corresponding to the target code rate according to the pre-stored corresponding relationship between the target code rate and the number of punctures, and determine the number of information columns corresponding to the number of punctures according to the pre-stored corresponding relationship between the number of information columns and the number of punctures; or it can also determine the number of punctures corresponding to the target code rate according to the pre-stored corresponding relationship between the target code rate and the number of punctures, and determine the number of information columns according to the number of punctures and the target code rate. Among them, determining the number of punctures according to the number of information columns and the target code rate or determining the number of information columns according to the number of punctures and the target code rate has been described in detail above and will not be elaborated here.

[0242] S730. The transmitting device encodes the information bit sequence according to the second LDPC base matrix to obtain the first LDPC codeword sequence.

[0243] Determine the second LDPC base matrix according to the number of information columns obtained in S720.

[0244] Specifically, the second LDPC base matrix is obtained by intercepting the first LDPC base matrix according to the obtained number of information columns, and the second LDPC base matrix is a sub-matrix of the first LDPC base matrix.

[0245] Exemplarily, the number of information columns supported by the first LDPC base matrix is 22 - 33. The number of information columns is screened from 22 - 33 according to the above method to obtain 24, so the first LDPC base matrix is intercepted using this number of information columns to obtain the second LDPC base matrix with only 24 information columns. The number of information columns of the second LDPC base matrix can also be equal to the maximum number of information columns of the first LDPC base matrix. In this case, the second LDPC base matrix is the first LDPC base matrix.

[0246] S740. The transmitting device punctures the first LDPC codeword sequence according to the puncturing sequence and sends the second LDPC codeword sequence to the receiving device. Or rather, the receiving device receives the second LDPC codeword sequence from the transmitting device.

[0247] Determine the puncturing sequence according to the number of punctures obtained in S720. The puncturing sequence is one or more puncturing sequences corresponding to the first LDPC base matrix in S710. When the first LDPC base matrix corresponds to one puncturing sequence, the puncturing sequence determined by this number of punctures is the one puncturing sequence corresponding to the first LDPC base matrix. When the first LDPC base matrix corresponds to multiple puncturing sequences, the puncturing sequence is determined according to the number of punctures in the following way:

[0248] When the number of punctures is less than or equal to 1, the first column of the puncturing sequence determined by this number of punctures is the column with the largest column weight among the columns of the first LDPC base matrix.

[0249] Exemplarily, Figure 13 is a schematic diagram of puncturing 1 column in the BG1 core area. As Figure 13 shown, when puncturing 1 column, the column with the largest column weight among the columns that can be punctured, that is, Figure 13 the 1 column in, so when the number of punctures is less than or equal to 1, the puncturing column is the first column of the BG1 core area.

[0250] In the case of puncturing 1 column, selecting the column with the largest puncturing column weight can not only improve the reliability of the puncturing column, but also enable the puncturing column to be decoded and have a consistent convergence speed.

[0251] When the number of puncturing columns is greater than 1 and less than or equal to 2, the first two columns of the puncturing sequence determined by the number of puncturing columns are the two columns in the columns of the first LDPC base matrix that contain the most checks with the number of puncturing columns less than or equal to 1; alternatively, the first column of the puncturing sequence is the column with the second largest column weight in the columns of the first LDPC base matrix, and the associated rows of the first column and the second column of the puncturing sequence are inconsistent.

[0252] Exemplarily, Figure 14 is a schematic diagram of puncturing 2 columns for the BG1 core area. As Figure 14 shown, when puncturing 2 columns, the associated rows between the puncturing columns are inconsistent. Since the 3rd and 4th rows of the 1st column and the 2nd column are associated consistently, the 1st column and the 2nd column are not set as puncturing columns. Shift 1 column backward. Since the associated rows of the 2nd column and the 3rd column are both inconsistent, and the 2nd column is the column where the column weight is the second largest, the 2nd column and the 3rd column are set as puncturing columns. That is, when the number of puncturing columns is greater than 1 and less than or equal to 2, the puncturing columns are the 2nd column and the 3rd column of the BG1 core area.

[0253] It should be noted that the inconsistent associated rows between the puncturing columns means that the associated rows between the puncturing columns are completely different, or at least not completely the same.

[0254] In the case of puncturing 2 columns, on the basis of having more checks with the number of puncturing columns less than or equal to 1, the method of selecting nodes with larger column weights for puncturing enables all puncturing columns to be decoded and can accelerate the convergence speed.

[0255] When the number of puncturing columns is greater than 2, the puncturing sequence includes the column with the lightest column weight in the columns of the first LDPC base matrix. That is, when the number of puncturing columns is n, the first n columns of the puncturing sequence include the column with the lightest column weight in the columns of the first LDPC base matrix. For example, when the number of puncturing columns is 3, the first 3 columns of the puncturing sequence include the column with the lightest column weight in the columns of the first LDPC base matrix.

[0256] Exemplarily, Figure 15 is a schematic diagram of puncturing 3 columns for the BG1 core area. As Figure 15 shown, when puncturing 3 columns, the column with the lightest column weight among the columns including BG1 in the 3 columns to be punctured should be included, such as the last column of the check column. Therefore, the puncturing columns are the 2nd column, the 3rd column and the last column of the BG1 core area. Figure 15 This is just an exemplary illustration, and these three columns in the puncturing sequence are located in the first three columns of the puncturing sequence.

[0257] In the case of the number of puncturing columns being greater than 2, the puncturing columns include the column with the lightest column weight, enabling all puncturing columns to be decoded and can accelerate the convergence speed.

[0258] The method of puncturing the first LDPC codeword sequence according to the puncturing sequence determined by the number of puncturing columns is as follows:

[0259] When the number of punctures \(x\) is an integer, puncture the first LDPC codeword sequence at positions from 1 to the number of punctures in the puncture sequence, that is, puncture the first LDPC codeword sequence according to bits 1 to \(x\) in the puncture sequence. It should be understood that bits 1 to \(x\) in the puncture sequence are permutations of the columns of the first LDPC base matrix;

[0260] When the number of punctures \(x\) is a non-integer, puncture the first LDPC codeword sequence at positions from 1 to the ceiling of the number of punctures in the puncture sequence, that is, puncture the first LDPC codeword sequence according to bits 1 to bits in the puncture sequence, and the puncture ratio of the bit is

[0261] Since the puncture positions in this scheme are not fixed, when puncturing the first LDPC codeword sequence and outputting the second LDPC codeword sequence, there are the following two implementation methods:

[0262] The first method of outputting the second LDPC codeword sequence includes the first transmission and the second transmission, which are specifically as follows:

[0263] In the first transmission, the information bit sequence \(c_0,\cdots,c\) K-1 is encoded by the second LDPC base matrix to obtain the first LDPC codeword sequence. This first LDPC codeword sequence is the entire encoded bit sequence \(d'=d_0,\cdots,d\) N-1 , where \(d'\) contains punctured bits. Put this \(d'\) into a circular buffer, and perform non-fixed-position and fixed-length deletion on the corresponding positions in \(d'\) based on the puncture sequence; or part of it is at fixed positions and part is at positions found according to the puncture sequence for deletion, and output the second LDPC codeword sequence according to the preset bit length.

[0264] In the second transmission, use the columns of the first LDPC codeword sequence corresponding to the puncture sequence as the starting positions and output the second LDPC codeword sequence according to the preset bit length.

[0265] The second method of outputting the second LDPC codeword sequence includes the first transmission and the second transmission, which are specifically as follows:

[0266] In the first transmission, the information bit sequence \(c_0,\cdots,c\) K-1 is encoded by the second LDPC base matrix to obtain the first LDPC codeword sequence. This first LDPC codeword sequence is the entire encoded bit sequence \(d'=d_0,\cdots,d\) N-1, where the punctured bits are not deleted from the first LDPC codeword sequence d′ and all enter the cyclic buffer. The bits to be transmitted can be interleaved before entering the buffer, or they can also be interleaved after entering the buffer. The puncturing sequence corresponding to the columns of the first LDPC codeword sequence is interleaved to a preset bit length and then the third LDPC codeword sequence is obtained. The second LDPC codeword sequence is output in the order of the preset bit length from the starting position of the third LDPC codeword sequence. Among them, the interleaving can be block interleaving or can be the interleaving at the cyclic unit block level of QC-LDPC, rather than bit-level interleaving.

[0267] When transmitting for the second time, the columns of the puncturing sequence corresponding to the first LDPC codeword sequence are used as the starting position of the third LDPC codeword sequence and the second LDPC codeword sequence is output in the order of the preset bit length.

[0268] Exemplarily, when transmitting for the first time, the information bit sequence c0,..., c K-1 After being encoded by the second LDPC base matrix, the first LDPC codeword sequence is obtained. This first LDPC codeword sequence is the entire encoded bit sequence d′ = d0,..., d N-1 , where the punctured bits are not deleted from the first LDPC codeword sequence d′ and all enter the cyclic buffer. The bits to be transmitted are interleaved before entering the buffer, or they can also be interleaved after entering the buffer. If the preset bit length is m and the columns of the puncturing sequence corresponding to the first LDPC codeword sequence are d0, d1, then the third LDPC codeword sequence obtained after interleaving the first LDPC codeword sequence is d″′ = d2,..., d 2+m , d0, d1, d 3+m , …, d N-1 , and a second LDPC codeword sequence d″ = d2,..., d of length m is output from the starting position of the third LDPC codeword sequence. 2+m . When transmitting for the second time, the output second LDPC codeword sequence is d″ = d0, d1, d 3+m , …, d 2m+1 .

[0269] Exemplarily, when the first LDPC base matrix is a matrix including the third LDPC base matrix and additional information columns, then the second LDPC base matrix is a submatrix of this first LDPC base matrix. If the initial transmission of this second LDPC base matrix is of an extremely high code rate, higher than the core matrix code rate and has a partial number of punctures, then this punctured part is preferentially transmitted during retransmission, and the remaining resources are used to transmit extended parity bits.

[0270] When the first LDPC base matrix is a matrix including a third LDPC base matrix and additional information columns, since this first LDPC base matrix is designed for the requirement of high-speed convergence and has no fixed puncturing columns, only when the target code rate is higher than the highest core matrix code rate will some columns be punctured to support a higher code rate. However, when the code rate decreases, the matrix does not have the structure of the degree distribution of puncturing columns (puncturing of large column weights). Therefore, the puncturing bits of the initial transmission are preferentially sent, always maintaining the characteristic of fast convergence.

[0271] Specifically, all the encoded bits obtained by encoding the information bit sequence with the second LDPC base matrix enter the circular buffer to be sent. When the initial transmission code rate is higher than the highest core matrix code rate, several puncturing bits indicated by the puncturing sequence are not sent; in the case of incremental redundancy hybrid automatic repeat request (IR-HARQ), this punctured part of the bits is preferentially sent, and the remaining resources are then used to continue sending the bits of the extended parity bits; in the case of chase combining hybrid automatic repeat request (CC-HARQ), this puncturing bit is preferentially sent, and the remaining resources are then used to continue sending other bits.

[0272] S750. Decode the second LDPC codeword sequence according to the second LDPC base matrix.

[0273] It should be noted that since channel noise signals may be introduced during the transmission of the second LDPC codeword sequence, the second LDPC codeword sequence output or sent by the sending end device may be different from the second LDPC codeword sequence received by the receiving end device.

[0274] Next, combined with the simulation results, the performance of the LDPC code in the embodiments of the present application will be described.

[0275] Figure 16 The performance of 5G BG1 is compared with the simulation results of the base matrix with nested information columns.

[0276] Figure 16 The abscissa is the code rate, and the ordinate is the signal-to-noise ratio (SNR). Figure 17It shows that when the code rate is higher than that of the core matrix, as the code rate increases, the performance loss of BG1 compared to the base matrix of the nested information columns gradually increases. It can be seen that when the code rate is higher than the punctured core matrix code rate of 22 / 24, the base matrix scheme of the nested information columns can greatly reduce the performance loss. It should be understood that the base matrix of the nested information columns here can be the above-mentioned first LDPC base matrix or a sub-matrix of the first LDPC base matrix.

[0277] Figure 17 It is the performance simulation result of the base matrix of the nested information columns compatible with BG1 at different code rates.

[0278] Figure 17 In it, the abscissa is the number of information columns, and the ordinate is the signal-to-noise ratio (SNR) of 1e-2. Figure 18 It shows that when the code rates are 22 / 23, 22 / 23.25, 22 / 23.5, 0.926, 22 / 24 respectively, using the base Figure 1 (base graph 1, BG1) the puncturing scheme of the base matrix of the nested information columns (that is, the puncturing scheme of the base matrix of the nested information columns compatible with BG1 in this application) for the performance loss at different code rates. It should be understood that the base matrix of the nested information columns compatible with BG1 here can be the above-mentioned first LDPC base matrix or a sub-matrix of the first LDPC base matrix.

[0279] Such as Figure 17 shown, when the coding code rates are 22 / 23, 22 / 23.25, 22 / 23.5, 0.926, the base matrix of the nested information columns compatible with BG1 can match different coding code rates. In addition, when the coding code rate is greater than the core matrix code rate of 22 / 24, the SNR of the puncturing scheme using the second LDPC base matrix compatible with BG1 at each coding code rate is higher than the SNR when the coding code rate is 22 / 24. That is to say, compared with only fixing two punctured columns of BG1 in 5G at high code rates, the base matrix of the nested information columns has the advantages of good decoding threshold and fast convergence speed, and the highest code rate has a 0.4dB gain.

[0280] Figure 18 It is a schematic diagram of the base matrix forms with different numbers of nested information columns. Figure 18 In (a) is the base matrix form based on BG1. Figure 18 In (b) and Figure 18 In (c) are the base matrix forms compatible with the non-punctured matrix. Among them, Figure 18 In (b) is the base matrix form with 33 columns of nested information columns. Figure 18 In (c) is the base matrix form with 44 columns of nested information columns, and only 1 column is punctured to support the target code rate.Figure 18 (a), (b), and (c) in Figure 19 are simulated for performance at a code rate of 22 / 23, and the simulation results are as

[0281] Figure 19 shown.

[0282] As Figure 19 shown, the base matrix with 44 nested information columns has better performance than the base matrix with 33 nested columns and the base matrix based on BG1. Compared with the base matrix based on BG1, the base matrix with only 1 column punctured for the non-punctured matrix can support the target code rate, maintain the characteristic of fast convergence, and the gain is close to 1 dB. That is to say, the puncturing scheme of the base matrix with nested information columns (i.e., the first LDPC base matrix or the second LDPC base matrix) has the advantages of fast convergence speed and excellent decoding threshold compared with the existing puncturing scheme based on BG1.

[0283] Above, in combination with Figures 1 to 19 , the method embodiments provided in this application are described in detail. Next, in combination with Figures 20 to 21 , the apparatus embodiments of this application will be described.

[0284] It can be understood that, in order to implement the functions in the above embodiments, Figures 20 to 21 the apparatuses in

[0285] Figure 20 and Figure 21 are schematic structural diagrams of possible apparatuses provided in the embodiments of this application. These apparatuses can be used to implement the functions of the sending-end device or the receiving-end device in the above method embodiments, and thus can also achieve the beneficial effects possessed by the above method embodiments.

[0286] Figure 20 is a schematic block diagram of a communication apparatus 10 provided in an embodiment of this application. As shown in the figure, the communication apparatus 10 may include: a transceiver unit 11 and a processing unit 12.

[0287] In a possible design, the communication apparatus 10 may be the sending-end device in the above method embodiment, or a chip used to implement the functions of the sending-end device in the above method embodiment.

[0288] Specifically, the communication apparatus 10 may correspond to the sending-end device in method 700 according to the embodiment of this application, and the communication apparatus 10 may include means for performing Figure 7a unit of the method executed by the transmitting device in Method 700. Moreover, each unit in the communication device 10 and the above other operations and / or functions are for implementing Figure 7 the corresponding processes of Method 700 in

[0289] In another possible design, the communication device 10 may be the receiving device in the above method embodiments, or may be a chip for implementing the functions of the receiving device in the above method embodiments.

[0290] Specifically, the communication device 10 may correspond to the receiving device in Method 700 according to the embodiments of the present application. The communication device 10 may include units for executing Figure 7 the method executed by the receiving device in Method 700 in Figure 7 the corresponding processes of Method 700 in

[0291] It should be understood that the specific processes for each unit to execute the above corresponding steps have been described in detail in the above method embodiments. For the sake of brevity, they will not be elaborated here.

[0292] It should be understood that the transceiver unit 11 in the communication device 10 may correspond to Figure 21 the transceiver 22 in the communication device 20 shown in Figure 21 and the processing unit 12 in the communication device 10 may correspond to

[0293] Figure 21 is a schematic block diagram of the communication device 20 provided in the embodiments of the present application. As shown in the figure, the communication device 20 includes: a processor 21 and a transceiver 22. The processor 21 is coupled to the memory and is configured to execute instructions stored in the memory to control the transceiver 22 to send signals and / or receive signals. Optionally, the communication device 20 further includes a memory 23 for storing instructions.

[0294] It should be understood that the above processor 21 and memory 23 may be integrated into a processing device. The processor 21 is configured to execute program codes stored in the memory 23 to implement the above functions. Specifically, in implementation, the memory 23 may also be integrated in the processor 21 or be independent of the processor 21.

[0295] It should also be understood that the transceiver 22 may include a receiver (or, a receiver) and a transmitter (or, a transmitter). The transceiver may further include an antenna, and the number of antennas may be one or more.

[0296] In a possible design, the communication device 20 may be the sending-end device in the above method embodiments, or a chip for implementing the functions of the sending-end device in the above method embodiments.

[0297] Specifically, the communication device 20 may correspond to the sending-end device in the method 700 according to the embodiments of the present application. The communication device 20 may include units for performing Figure 7 the methods performed by the sending-end device in the method 700. And, each unit in the communication device 20 and the above other operations and / or functions are for implementing Figure 7 the corresponding processes of the method 700. It should be understood that the specific processes of each unit performing the above corresponding steps have been described in detail in the above method embodiments. For the sake of brevity, they will not be repeated here.

[0298] In another possible design, the communication device 20 may be the receiving-end device in the above method embodiments, or a chip for implementing the functions of the receiving-end device in the above method embodiments.

[0299] Specifically, the communication device 20 may correspond to the receiving-end device in the method 700 according to the embodiments of the present application. The communication device 20 may include units for performing Figure 7 the methods performed by the receiving-end device in the method 700. And, each unit in the communication device 20 and the above other operations and / or functions are for implementing Figure 7 the corresponding processes of the method 700. It should be understood that the specific processes of each unit performing the above corresponding steps have been described in detail in the above method embodiments. For the sake of brevity, they will not be repeated here.

[0300] It should be understood that the specific processes of each unit performing the above corresponding steps have been described in detail in the above method embodiments. For the sake of brevity, they will not be repeated here.

[0301] The present application also provides a communication device, including a processor. The processor is coupled to a memory. The memory is used to store computer programs or instructions and / or data. The processor is used to execute the computer programs or instructions stored in the memory, or read the data stored in the memory, so as to execute the methods in the above method embodiments. Optionally, the processor is one or more. Optionally, the communication device includes a memory. Optionally, the memory is one or more. Optionally, the memory is integrated with the processor or is separately provided.

[0302] The present application also provides a chip, including a processor, which is coupled to a memory. The memory is used to store computer programs or instructions, and the processor is used to execute the computer programs or instructions stored in the memory to implement the methods executed by the sending device or the receiving device in the above method embodiments.

[0303] The present application also provides a computer-readable storage medium, on which computer instructions for implementing the methods executed by the sending device or the receiving device in the above method embodiments are stored.

[0304] The present application also provides a computer program product, including instructions, which when executed by a computer, implement the methods executed by the sending device or the receiving device in the above method embodiments.

[0305] The present application also provides a communication system, which includes at least one of the sending devices or receiving devices in the above embodiments.

[0306] For the explanations and beneficial effects of the relevant content in any of the above provided devices, reference can be made to the corresponding method embodiments provided above, and details are not elaborated herein.

[0307] It can be understood that the processor in the embodiments of the present application may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. The general-purpose processor may be a microprocessor or any conventional processor.

[0308] The method steps in the embodiments of this application can be implemented in a hardware manner or by a processor executing software instructions. The software instructions can be composed of corresponding software modules, and the software modules can be stored in a random access memory, a flash memory, a read-only memory, a programmable read-only memory, an erasable programmable read-only memory, an electrically erasable programmable read-only memory, a register, a hard disk, a removable hard disk, a compact disc read-only memory (CD-ROM), or any other form of storage medium well-known in the art. An exemplary storage medium is coupled to the processor, enabling the processor to read information from the storage medium and write information to the storage medium. Of course, the storage medium can also be a component of the processor. The processor and the storage medium can be located in an ASIC. Additionally, the ASIC can be located in a sending-end device or a receiving-end device. Of course, the processor and the storage medium can also exist as discrete components in the sending-end device or the receiving-end device.

[0309] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer programs or instructions. When the computer program or instructions are loaded and executed on a computer, the processes or functions described in the embodiments of this application are executed in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, a network device, a user device, or other programmable devices. The computer program or instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer program or instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center in a wired or wireless manner. The computer-readable storage medium can be any available medium that the computer can access or a data storage device such as a server or a data center integrating one or more available media. The available medium can be a magnetic medium, such as a floppy disk, a hard disk, or a magnetic tape; it can also be an optical medium, such as a digital video disc; or it can be a semiconductor medium, such as a solid-state drive.

[0310] In the various embodiments of this application, if there is no special description and logical conflict, the terms and / or descriptions between different embodiments are consistent and can be cross-referenced. The technical features in different embodiments can be combined to form new embodiments according to their inherent logical relationships.

[0311] As used in this specification, the terms "component", "module", "system", etc. are used to represent computer-related entities, hardware, firmware, combinations of hardware and software, software, or software in execution. For example, a component can be, but is not limited to, a process running on a processor, a processor, an object, an executable, an execution thread, a program, and / or a computer. By way of illustration, both an application running on a computing device and the computing device can be components. One or more components can reside in a process and / or an execution thread, and a component can be located on one computer and / or distributed between two or more computers. In addition, these components can execute from various computer-readable media storing various data structures. A component can communicate, for example, through a signal with other systems (e.g., over the Internet) with one or more data packets (e.g., data from two components interacting with another component in a local system, a distributed system, and / or a network).

[0312] Those of ordinary skill in the art will appreciate that the various illustrative logical blocks and steps described in connection with the embodiments disclosed herein can be implemented in electronic hardware, or in a combination of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints of the technical solution. Skilled artisans may implement the described functionality in different ways for each particular application, but such implementation should not be considered to exceed the scope of this application.

[0313] Those skilled in the art can clearly understand that for the sake of convenience and brevity of description, the specific working processes of the systems, apparatuses, and units described above can refer to the corresponding processes in the foregoing method embodiments and will not be elaborated herein.

[0314] In several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative. For example, the division of the unit is only a logical function division, and there can be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the couplings or direct couplings or communication connections shown or discussed with each other can be through some interfaces, and the indirect couplings or communication connections of the apparatuses or units can be in electrical, mechanical, or other forms.

[0315] The unit described as a separate component may or may not be physically separated. The component shown as a unit may or may not be a physical unit, that is, it may be located in one place or may be distributed across multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0316] In addition, in each embodiment of this application, each functional unit can be integrated in a processing unit, can also exist physically separately for each unit, or two or more units can be integrated in one unit.

[0317] In the above embodiments, the functions of each functional unit can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions (programs). When the computer program instructions (programs) are loaded and executed on a computer, the processes or functions according to the embodiments of this application are generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by wire (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wirelessly (such as infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that the computer can access or a data storage device such as a server or data center that includes one or more integrated available media. The available medium can be a magnetic medium (for example, floppy disk, hard disk, magnetic tape), an optical medium (for example, DVD), or a semiconductor medium (for example, solid state disk (SSD)), etc.

[0318] If this function is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method in various embodiments of this application. The aforementioned storage medium includes: various media that can store program codes, such as USB flash drives, mobile hard disks, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical discs.

[0319] Unless otherwise specified, all technical and scientific terms used in the embodiments of this application have the same meaning as commonly understood by those skilled in the technical field of this application. The terms used in this application are only for the purpose of describing specific embodiments,

[0320] and are not intended to limit the scope of this application. It should be understood that the above is for illustrative purposes, and the above examples are only to help those skilled in the art understand the embodiments of this application, rather than to limit the embodiments of the application to the specific values or specific scenarios shown. Obviously, those skilled in the art can make various equivalent modifications or changes based on the examples given above, and such modifications and changes also fall within the scope of the embodiments of this application.

[0321] As described above, the above is only the specific implementation manner of this application, but the protection scope of this application is not limited thereto. Any person skilled in the technical field of this application can easily think of changes or substitutions within the technical scope disclosed in this application, and all should be covered by the protection scope of this application. Therefore, the protection scope of this application should be subject to the protection scope of the claims.

Claims

1. A communication method based on low-density parity-check codes, characterized in that, Including: Determine the number of information columns and the number of punctures according to the target code rate and the first low-density parity-check (LDPC) base matrix, where the number of information columns is used to determine a second LDPC base matrix, and the second LDPC base matrix is a sub-matrix of the first LDPC base matrix; Encode an information bit sequence using the second LDPC base matrix to obtain a first LDPC codeword sequence; Puncture the first LDPC codeword sequence according to a puncture sequence, and output a second LDPC codeword sequence, where the puncture sequence is determined according to the number of punctures.

2. The method according to claim 1, characterized in that, Determining the number of information columns and the number of punctures according to the target code rate and the first LDPC base matrix includes: Determine the number of information columns corresponding to the target code rate according to a pre-stored correspondence between the target code rate and the number of information columns, and determine the number of punctures corresponding to the number of information columns according to a pre-stored correspondence between the number of information columns and the number of punctures; or Determine the number of information columns corresponding to the target code rate according to a pre-stored correspondence between the target code rate and the number of information columns, and determine the number of punctures according to the number of information columns and the target code rate; or Determine the number of information columns and the number of punctures according to a pre-stored correspondence between the target code rate and the number of information columns and the number of punctures; or Determine the number of punctures corresponding to the target code rate according to a pre-stored correspondence between the target code rate and the number of punctures, and determine the number of information columns corresponding to the number of punctures according to a pre-stored correspondence between the number of information columns and the number of punctures; or Determine the number of punctures corresponding to the target code rate according to a pre-stored correspondence between the target code rate and the number of punctures, and determine the number of information columns according to the number of punctures and the target code rate.

3. The method according to claim 2, characterized in that, The pre-stored correspondence between the target code rate and the number of information columns is a correspondence between the code rate interval to which the target code rate belongs and the number of information columns, where the endpoints of the code rate interval are determined according to the number of information columns, the number of punctures, and the number of core checks of the first LDPC base matrix.

4. The method according to claim 2, characterized in that, The pre-stored correspondence between the target code rate and the number of information columns and the number of punctures is a correspondence between the code rate interval to which the target code rate belongs and the number of information columns and the number of punctures, where the endpoints of the code rate interval are determined according to the number of information columns, the number of punctures, and the number of core checks of the first LDPC base matrix.

5. The method according to claim 2, characterized in that, The pre-stored correspondence between the target code rate and the number of punctures is a correspondence between the code rate interval to which the target code rate belongs and the number of punctures, where the endpoints of the code rate interval are determined according to the number of information columns, the number of punctures, and the number of core checks of the first LDPC base matrix.

6. The method according to claim 2, characterized in that, The correspondence between the target code rate and the number of information columns is the number of information columns corresponding to the target code rate when the target code rate is greater than a predetermined threshold, and the number of information columns is fixed when the target code rate is lower than a predetermined first threshold and / or higher than a predetermined second threshold.

7. The method according to claim 2 or 3, characterized in that, As the target code rate increases, the number of information columns corresponding to the target code rate increases monotonically.

8. The method according to claim 2, characterized in that, The correspondence between the target code rate and the number of information columns includes: The code rate interval to which the target code rate belongs includes a first interval, the first interval corresponding to a first number of information columns. When the target code rate does not belong to the first interval, the target code rate corresponds to a second number of information columns; or, The code rate interval to which the target code rate belongs includes the first interval and a second interval, the first interval corresponding to the first number of information columns, the second interval corresponding to the second number of information columns. When the target code rate does not belong to the first interval and the second interval, the target code rate corresponds to a third number of information columns; or, The code rate interval to which the target code rate belongs includes the first interval, the second interval and a third interval, the first interval corresponding to the first number of information columns, the second interval corresponding to the second number of information columns, the third interval corresponding to the third number of information columns. When the target code rate does not belong to the first interval, the second interval and the third interval, the target code rate corresponds to a fourth number of information columns.

9. The method according to any one of claims 3-5, characterized in that, The endpoints of the code rate interval are determined according to the number of information columns, the number of punctures and the number of core checks of the first LDPC base matrix, including: The left endpoint of the code rate range is The right endpoint is wherein, the K min is the minimum number of information columns supported by the first LDPC base matrix, x is a positive integer, C is the core check number of the first LDPC base matrix, and P is the puncturing number corresponding to the number of information columns.

10. The method according to claim 1, characterized in that, Determining the number of information columns and the number of punctures according to the target code rate and the first LDPC base matrix, including: For any information column number K in the set of candidate information column numbers corresponding to the first LDPC base matrix i , add the K i and the puncturing number P i to the first candidate, where the P i is determined according to the K i , the core check number of the first LDPC base matrix, and the target code rate. Alternatively, for any puncturing number P in the preset set of puncturing numbers i , add the P i and the information column number K i to the first candidate, where the K i is determined according to the P i , the core check number of the first LDPC base matrix, and the target code rate. The K i is a positive integer, and the P i is a non - negative number; For K in the first candidate i and P i combination, compare according to the puncturing threshold corresponding to the P i and the first LDPC base matrix to determine the number of information columns and the number of punctures; or, determine the number of information columns and the number of punctures corresponding to the level according to the level corresponding to the puncturing threshold.

11. The method according to claim 10, characterized in that, According to the described P i Compare with the puncturing threshold corresponding to the first LDPC base matrix to determine the number of information columns and the number of puncturing, including: For K in the first candidate i and P i combination, when the P i is less than the punching threshold, the K i and P i are included in the second candidate; when all P i in the first candidate are greater than or equal to the punching threshold, the number of information columns is the maximum K i in the first candidate, and the punching number is the P i corresponding to the maximum K i ; or, when all P i in the first candidate are greater than or equal to the punching threshold, the punching number is the minimum P i in the first candidate, and the number of information columns is the K i corresponding to the minimum P i .

12. The method according to claim 11, characterized in that, When there are at least two K i and P i combinations in the second candidate, the number of information columns is the maximum K i in the second candidate, and the number of punching holes is the maximum K i corresponding to P i ; or the number of information columns is the minimum K i in the second candidate, and the number of punching holes is the minimum K i corresponding to P i ; or the number of information columns and the number of punching holes are determined according to the hardware utilization rate.

13. The method according to claim 1, characterized in that,The puncture sequence is determined according to the number of punctures, including: When the number of punctures is less than or equal to 1, the first column of the puncture sequence is the column with the largest column weight among the columns of the first LDPC base matrix; When the number of punctures is greater than 1 and less than or equal to 2, the first two columns of the puncture sequence are the two columns that contain the most checks with the number of punctures less than or equal to 1 among the columns of the first LDPC base matrix; or, the first column of the puncture sequence is the column with the second largest column weight among the columns of the first LDPC base matrix, and the associated rows of the first column and the second column of the puncture sequence are inconsistent; When the number of punctures is greater than 2, the first 3 columns of the puncture sequence include the column with the lightest column weight among the columns of the first LDPC base matrix.

14. The method according to claim 1, characterized in that, Puncturing the first LDPC codeword sequence according to the puncture sequence, including: When the number of punctures is an integer, puncturing the first LDPC codeword sequence at positions from 1 to the number of punctures in the puncture sequence; When the number of punctures is a non-integer, puncturing the first LDPC codeword sequence at positions from 1 to the ceiling of the number of punctures in the puncture sequence.

15. The method according to any one of claims 1 - 14, characterized in that, The puncture sequence is a set including a permutation of any column of the first LDPC base matrix.

16. The method according to claim 1, characterized in that, The first LDPC base matrix includes a base graph 1 and additional information columns.

17. The method according to claim 16, characterized in that, The first LDPC base matrix has the same set of lifting factors as the base graph 1, and the fifth row of the additional information column part has no connections.

18. The method according to claim 1, characterized in that, The first LDPC base matrix includes a third LDPC base matrix and additional information columns, and the puncturing threshold corresponding to the third LDPC base matrix is 0.

19. The method according to claim 18, characterized in that, The core matrix corresponding to the minimum number of information columns supported by the third LDPC base matrix is a fully connected matrix.

20. The method according to claim 1, characterized in that, Outputting the second LDPC codeword sequence, including: When sending for the first time, after deleting the corresponding positions of the first LDPC codeword sequence according to the puncturing sequence, the second LDPC codeword sequence is output according to a preset bit length; When sending for the second time, the columns of the first LDPC codeword sequence corresponding to the puncturing sequence are used as the starting positions, and the second LDPC codeword sequence is output according to the preset bit length.

21. The method according to claim 20, characterized in that, Outputting the second LDPC codeword sequence includes: After interleaving the first LDPC codeword sequence, inputting it into a cyclic buffer, and outputting the second LDPC codeword sequence; or, Inputting the first LDPC codeword sequence into a cyclic buffer and then performing interleaving to output the second LDPC codeword sequence.

22. The method according to claim 21, characterized in that, Outputting the second LDPC codeword sequence includes: When sending for the first time, the second LDPC codeword sequence is output from the starting position of the third LDPC codeword sequence according to the preset bit length, where the third LDPC codeword sequence is a sequence obtained by interleaving the first LDPC codeword sequence, and the columns in the third LDPC codeword sequence corresponding to the puncturing sequence are after the preset bit length; When sending for the second time, the columns of the first LDPC codeword sequence corresponding to the puncturing sequence are used as the starting positions of the third LDPC codeword sequence, and the second LDPC codeword sequence is output according to the preset bit length.

23. A communication method based on low - density parity - check code, characterized in that, Includes: Receiving a second LDPC codeword sequence; Decoding the second LDPC codeword sequence according to a second LDPC base matrix, where the second LDPC base matrix is determined according to the number of information columns, the second LDPC codeword sequence is obtained by puncturing the first LDPC codeword sequence according to a puncturing sequence, and the puncturing sequence is determined according to the number of punctures; the second LDPC base matrix is a sub-matrix of the first LDPC base matrix; The number of information columns and the number of punctures are determined according to the target code rate and the first LDPC base matrix.

24. A communication device, characterized in that, Includes a processor and an interface circuit. The interface circuit is used to receive signals from other communication devices outside the communication device and transmit them to the processor or send signals from the processor to other communication devices outside the communication device. The processor is used to implement the method according to any one of claims 1 to 22 through logic circuits or by executing code instructions.

25. The communication device according to claim 23, characterized in that, The communication device is a chip or a chip system.

26. A computer - readable storage medium, characterized in that,A computer program or instruction is stored in the storage medium. When the computer program or instruction is executed by the communication device, the method according to any one of claims 1 to 22 is implemented.

27. A computer program product, characterized in that, Includes a computer program. When the computer program is run, the method according to any one of claims 1 to 22 is implemented.

28. A communication system, characterized in that, Includes: A sending-end device for executing the method according to any one of claims 1 to 22; A receiving-end device for executing the method according to claim 23.

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