Semiconductor device
By configuring a peripheral body diode region extending from the peripheral region to the active cell region within the peripheral region of the semiconductor device, the problem of insufficient reverse current storage capacity is solved, the reverse recovery characteristics are improved and the combustion risk is reduced.
Patent Information
- Application Number
- CN202410089597.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-12-11
- Filing Date
- 2024-01-22
- Publication Date
- 2025-06-17
AI Technical Summary
In semiconductor devices, as the chip size increases, the amount of reverse current also increases, resulting in a decrease in the occupied area of the body diode, weakening the reverse recovery characteristics, making it difficult to effectively accommodate reverse current.
A semiconductor device is designed, including a substrate, an active cell region, a terminal region and a peripheral region, and a peripheral region is arranged in the peripheral region with a peripheral body diode region extending from the peripheral region to a part of the active cell region. This structure ensures reverse recovery characteristics by increasing the capacity of the reverse current.
By improving the body diode structure in the surrounding area, the capacity of reverse current is increased, the reverse recovery characteristics are ensured, and the possibility of combustion is reduced.
Smart Images
Figure CN120166718A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a semiconductor device, and more particularly to a high-voltage semiconductor device including a body diode. Background Art
[0002] The content described herein is only for providing the background art of the present embodiment and does not constitute the prior art.
[0003] When the semiconductor device operates as a switch, a reverse current above the rated value can instantaneously flow through the body diode included in the semiconductor device. The reverse current can flow in the active cell region and the edge terminal region of the semiconductor device, and the reverse current in the terminal region can flow through the body diodes in the peripheral region. The body diode needs to be able to accommodate the amount of reverse current.
[0004] On the other hand, as the chip size increases, the amount of reverse current also increases. Compared with a small-sized chip, in a relatively large-sized chip, the area occupied by the body diode in the peripheral region can be relatively small. Therefore, if the occupied area of the body diode decreases, the ability to accommodate the amount of reverse current decreases, which may lead to a weakening of the reverse recovery characteristics.
[0005] Therefore, a body diode structure in the peripheral region capable of accommodating the amount of reverse current is needed. Summary of the Invention
[0006] Technical Problem:
[0007] An object of the present invention is to provide a semiconductor device including a body diode structure in a peripheral region capable of accommodating the amount of reverse current.
[0008] The object of the present invention is not limited to the above-mentioned object, and other objects and advantages not mentioned in the present invention can be understood through the following description, and can be further clearly understood based on the embodiments of the present invention. And it should be understood that the objects and advantages of the present invention can be easily achieved by the device and its combination shown in the claims of the invention.
[0009] Technical Solution:
[0010] The semiconductor device according to an embodiment of the present invention includes: a substrate; an active cell region including a first active region and a second active region on the substrate, the first active region including a recessed region; a terminal region surrounding the active cell region on the substrate; a first peripheral region including a first region within the recessed region and a second region disposed between the first active region and the terminal region on the substrate; a second peripheral region disposed between the second active region and the terminal region; and a first body diode region extending from the second region of the first peripheral region to a part of the first active region, the first body diode region including: a first peripheral body diode region disposed in the second region; and a second peripheral body diode region extending from the first peripheral body diode region and extending from the first active region toward the lower side of a first gate electrode disposed on the substrate.
[0011] Moreover, the semiconductor device according to an embodiment of the present invention includes: a first columnar structure disposed within the substrate, disposed in the second region and a part of the first active region, and disposed under the first body diode region; and a second columnar structure disposed within the substrate, disposed in the first active region spaced apart from the first columnar structure, the first columnar structure including: a first columnar region in the second region, extending from the first peripheral body diode region toward the inside of the substrate; and a second columnar region in the first active region, extending from the second peripheral body diode region toward the inside of the substrate, the second columnar structure extending from a first body region under a second gate electrode disposed on the substrate in the first active region toward the inside of the substrate.
[0012] Moreover, the first peripheral body diode region extends on the first columnar structure, and the second peripheral body diode region extends between the first gate electrode and the first columnar structure.
[0013] Moreover, the first columnar structure further includes a third columnar region disposed under the first body diode region, disposed between the first columnar region and the second columnar region, and connecting an upper portion of the first columnar region and an upper portion of the second columnar region.
[0014] Moreover, the first body region is spaced apart from the first body diode region, and in the first active region, the first body region is disposed within the substrate and is spaced apart from a second body region disposed under the second gate electrode.
[0015] Moreover, the second region includes: a first sub-region extending along a first direction and disposed between the first active region and the terminal region; a second sub-region extending along a second direction intersecting the first direction and disposed between the first region and the terminal region; and a third sub-region extending along the second direction and disposed between the first sub-region and the second sub-region, and between the first active region and the terminal region. The first body diode region extends from the third sub-region of the second region to a part of the first active region, and the first peripheral body diode region is disposed in the third sub-region.
[0016] Moreover, the third sub-region does not overlap with the first region along the first direction.
[0017] Moreover, the first region protrudes from the second region along the first direction, and the second peripheral body diode region extends to the end of the first region.
[0018] Moreover, the semiconductor device according to an embodiment of the present invention further includes a second body diode region extending from the second peripheral region to a part of the second active region.
[0019] The semiconductor device according to an embodiment of the present invention includes: a substrate including an active unit region, a terminal region surrounding the active unit region, and a peripheral region between the active unit region and the terminal region; a peripheral body diode region disposed on the substrate and extending from the peripheral region to a part of the active unit region; a first body region spaced apart from the peripheral body diode region and disposed in the active unit region; a first gate electrode disposed on a part of the active unit region and on the peripheral body diode region; and a second gate electrode disposed on the first body region of the active unit region.
[0020] Moreover, the semiconductor device according to an embodiment of the present invention includes: a first columnar structure disposed in the substrate, disposed in the peripheral region and a part of the active unit region, and disposed below the peripheral body diode region; and a second columnar structure extending from the first body region into the substrate and spaced apart from the first columnar structure. The first columnar structure includes: a first columnar region in the peripheral region and extending from the peripheral body diode region into the substrate; and a second columnar region in the active unit region and extending from the peripheral body diode region into the substrate.
[0021] Moreover, the peripheral body diode region includes: a first peripheral body diode region disposed in the peripheral region; and a second peripheral body diode region extending from the first peripheral body diode region and extending toward the lower side of the first gate electrode.
[0022] Moreover, the above-mentioned first peripheral body diode region extends on the above-mentioned first columnar structure, and the above-mentioned second peripheral body diode region extends between the above-mentioned first gate electrode and the above-mentioned first columnar structure.
[0023] Moreover, the above-mentioned first columnar structure further includes a third columnar region, which is located below the above-mentioned peripheral body diode region, disposed between the above-mentioned first columnar region and the above-mentioned second columnar region, and connects the upper part of the above-mentioned first columnar region and the upper part of the above-mentioned second columnar region.
[0024] Moreover, the above-mentioned first body region is separated from the above-mentioned peripheral body diode region, and the above-mentioned first body region is separated from the second body region. In the above-mentioned active unit region, the above-mentioned second body region is disposed within the above-mentioned substrate and below the above-mentioned second gate electrode.
[0025] Moreover, the above-mentioned active unit region includes a first active region and a second active region. The above-mentioned first active region includes a recessed region. The above-mentioned peripheral region includes a first peripheral region and a second peripheral region. The above-mentioned first peripheral region includes a first region within the above-mentioned recessed region and a second region disposed between the above-mentioned first active region and the above-mentioned terminal region. The above-mentioned second peripheral region is disposed between the above-mentioned second active region and the above-mentioned terminal region. The above-mentioned second region includes: a first sub-region extending along the above-mentioned first direction and disposed between the above-mentioned first active region and the above-mentioned terminal region; a second sub-region extending along a second direction intersecting the above-mentioned first direction and disposed between the above-mentioned first region and the above-mentioned terminal region; and a third sub-region extending along the above-mentioned second direction, between the above-mentioned first sub-region and the above-mentioned second sub-region, and disposed between the above-mentioned first active region and the above-mentioned terminal region. The above-mentioned peripheral body diode region extends from the above-mentioned third sub-region of the above-mentioned second region to a part of the above-mentioned first active region.
[0026] Moreover, the above-mentioned first region protrudes from the above-mentioned second sub-region of the above-mentioned second region, and the above-mentioned peripheral body diode region extends from the above-mentioned third sub-region to the end of the above-mentioned first region.
[0027] Moreover, the above-mentioned peripheral body diode region further extends from the above-mentioned second peripheral region to a part of the above-mentioned second active region.
[0028] The semiconductor device according to an embodiment of the present invention includes: a substrate; a first columnar structure disposed within the substrate; a first gate electrode disposed on the first columnar structure; a peripheral body diode region extending along a first direction from the first columnar structure, including a first peripheral body diode region and a second peripheral body diode region between the first gate electrode and the first columnar structure; a second gate electrode disposed on the substrate spaced apart from the first gate electrode; a first body region disposed within the substrate under the second gate electrode, spaced apart from the peripheral body diode region along the first direction; and a second columnar structure extending from the first body region within the substrate and disposed under the second gate electrode. The first columnar structure includes: a first columnar region extending from the first peripheral body diode region into the substrate; a second columnar region extending from the second peripheral body diode region into the substrate; and a third columnar region disposed between the first columnar region and the second columnar region under the peripheral body diode region, connecting the upper portion of the first columnar region and the upper portion of the second columnar region.
[0029] Moreover, the semiconductor device according to an embodiment of the present invention further includes: a second body region disposed within the substrate under the second gate electrode, spaced apart from the first body region along the first direction; and a third columnar structure extending from the second body region within the substrate, the second columnar structure being spaced apart from the third columnar structure along the first direction.
[0030] Effects of the Invention:
[0031] The semiconductor device of the present invention includes a body diode structure in a peripheral region capable of accommodating a reverse current amount. Therefore, the reverse recovery characteristics can be ensured by increasing the reverse current accommodation capacity.
[0032] Moreover, the semiconductor device of the present invention can increase the reverse current accommodation capacity by improving the body diode structure in the peripheral region. Therefore, the possibility of occurrence of burning can be reduced.
[0033] In addition to the above, the specific effects of the present invention will be described together during the process of describing the specific embodiments below. BRIEF DESCRIPTION OF THE DRAWINGS
[0034] Figure 1a 、 Figure 1b and Figure 1c are top views for illustrating the semiconductor device according to an embodiment of the present invention.
[0035] Figure 2 is Figure 1a and Figure 1b an enlarged view of the M region of.
[0036] Figure 3 A cross-sectional view taken along line A-A' of Figure 1a , Figure 1b and Figure 1c .
[0037] Figure 4 A cross-sectional view taken along line B-B' of Figure 1b .
[0038] Figure 5 A diagram for explaining the effects of the semiconductor device according to an embodiment of the present invention. Detailed implementation manners
[0039] In this specification and the scope of the invention claimed, the terms or words used should not be construed as having a general meaning or a meaning in a dictionary. Based on the principle that the inventor may define the concept of a term or a word in order to best explain his own invention, it should be construed as having a meaning and concept consistent with the technical idea of the present invention. And, the structures shown in the embodiments and the drawings of this specification are only one embodiment for implementing the present invention. Since they cannot represent all the technical ideas of the present invention, it should be understood that at the time of filing this application, there may be multiple equivalent technical solutions that can replace it and multiple examples that can be variably applied.
[0040] In this specification and the scope of the invention claimed, the terms "first", "second", "A", "B", etc. may be used to describe various structural elements. However, the above structural elements are not limited to the above terms. The above terms are only used to distinguish one structural element from other structural elements. For example, without departing from the scope of the invention claimed, the first structural element may be named the second structural element, and similarly, the second structural element may also be named the first structural element. The term "and / or" includes a combination of multiple related recited items or any one of the multiple related recited items.
[0041] In this specification and the scope of the invention claimed, the terms used are only for describing specific embodiments and do not limit the present invention. Unless clearly indicated otherwise in the context, a singular expression includes a plural expression. In this specification, terms such as "including" or "having" do not preclude the existence or additional possibility of features, numbers, steps, operations, structural elements, components, or combinations thereof described in the specification.
[0042] Unless otherwise defined, the meanings of all terms used herein, including technical terms or scientific terms, are the same as those commonly understood by those of ordinary skill in the technical field to which the present invention belongs.
[0043] Terms defined in commonly used dictionaries shall be interpreted to have the same meaning as that in the context of the relevant art, and shall not be interpreted as idealized or overly formal meanings unless clearly defined in this specification. Moreover, in each embodiment of the present invention, each structure, process, procedure, or method included can be shared within the scope where they do not interfere with each other technically.
[0044] Hereinafter, with reference to Figure 1a , Figure 1b , Figure 1c , Figure 2 , Figure 3 , Figure 4 and Figure 5 a semiconductor device according to an embodiment of the present invention will be described.
[0045] Figure 1a , Figure 1b and Figure 1c are top views of a semiconductor device for explaining an embodiment of the present invention. Figure 2 is Figure 1a and Figure 1b an enlarged view of the M region of.
[0046] With reference to Figure 1a , Figure 1b and Figure 1c and Figure 2 , a semiconductor device according to an embodiment of the present invention may include a substrate ( Figure 3 100 of), an active cell region ACR, a termination region ETR, and a peripheral region PR.
[0047] The active cell region ACR may be a region on the substrate. The active cell region ACR may include a first active region AR1 and a second active region AR2. The first active region AR1 may include a recessed region REC. The recessed region REC may be a region where a part of the first active region AR1 is recessed.
[0048] The termination region ETR may surround the active cell region ACR on the substrate.
[0049] The peripheral region PR may be a region between the active cell region ACR and the termination region ETR. The peripheral region PR may include a first peripheral region PR1 and a second peripheral region PR2 on the substrate.
[0050] The first peripheral region PR1 is disposed between the first active region AR1 and the termination region ETR and may be a partial region of the peripheral region PR. The first peripheral region PR1 may include a first region R1 and a second region R2.
[0051] The first region R1 is disposed within the recessed region REC and may be a partial region of the first peripheral region PR1. The first region R1 may protrude from the second region R2.
[0052] The second region R2 is disposed between the first active region AR1 and the terminal region ETR and may be the remaining region of the first peripheral region PR1. The second region R2 may include a first sub-region R21, a second sub-region R22, and a third sub-region R23. The first sub-region R21 of the second region R2 may extend between the first active region AR1 and the terminal region ETR along a first direction D1. The second sub-region R22 of the second region R2 may extend between the first region R1 and the terminal region ETR along a second direction D2. The first direction D1 and the second direction D2 may be directions that cross each other. The third sub-region R23 of the second region R2 may be a region that extends along the second direction D2 between the first sub-region R21 and the second sub-region R22. The third sub-region R23 of the second region R2 may extend between the first active region AR1 and the terminal region ETR along the second direction D2. Based on the first direction D1, the third sub-region R23 of the second region R2 can be non-overlapping with the first region R1. The third sub-region R23 of the second region R2 may be non-overlapping with the first region R1 along the first direction D1.
[0053] The first region R1 may protrude from the second sub-region R22 of the second region R2 along the first direction D1.
[0054] The second peripheral region PR2 is disposed between the second active region AR2 and the terminal region ETR and may be the remaining region of the peripheral region PR.
[0055] The semiconductor device according to an embodiment of the present invention may include a peripheral body diode region PBD that extends from the peripheral region PR to a part of the active cell ACR. A part of the peripheral body diode region PBD is disposed in the peripheral region PR, and the remaining part of the peripheral body diode region PBD may be disposed in the active cell region ACR.
[0056] According to an embodiment, the peripheral body diode region PBD may include only the first body diode region PBD_1 or may include the first body diode region PBD_1 and the second body diode region PBD_2.
[0057] The first body diode region PBD_1 may extend from the first peripheral region PR1 to a part of the first active region AR1. The second body diode region PBD_2 may extend from the second peripheral region PR2 to a part of the second active region AR2.
[0058] Figure 3 For cutting along Figure 1a 、 Figure 1b and Figure 1c a cross-sectional view cut along the A-A' line.
[0059] Referring to Figure 1a 、Figure 1b , Figure 1c , Figure 2 and Figure 3 , the semiconductor device according to an embodiment of the present invention may include a peripheral body diode region PBD, a first gate electrode GE1, a second gate electrode GE2, a first columnar structure P1, a second columnar structure P2, a third columnar structure P3, a first body region BD1, and a second body region BD2.
[0060] For example, the substrate 100 may be bulk silicon or silicon-on-insulator (SOI). Differently, the substrate 100 may also be a silicon substrate, or may include other substances, such as silicon germanium, indium antimonide, lead telluride, indium arsenide, indium phosphide, gallium arsenide, or gallium antimonide. Alternatively, the substrate 100 may also have an epitaxial layer (e.g., an n-type epitaxial layer) formed thereon.
[0061] The first gate electrode GE1 and the second gate electrode GE2 may be disposed on the substrate 100. The first gate electrode GE1 and the second gate electrode GE2 may be disposed in the first active region AR1. The first gate electrode GE1 and the second gate electrode GE2 may be disposed separately from each other.
[0062] The first gate electrode GE1 may be disposed on a part of the active cell region ACR and on the first body diode region PBD_1. The first gate electrode GE1 may be disposed in the first active region AR1 and on the first body diode region PBD_1 (e.g., the second peripheral body diode region PBD2). The first gate electrode GE1 may be disposed on the first columnar structure P1.
[0063] The second gate electrode GE2 may be disposed in the first active region AR1 and on the first body region BD1 and the second body region BD2.
[0064] The peripheral body diode region PBD is disposed on the substrate 100 and may be configured to extend from the peripheral region PR to a part of the active cell region ACR. The peripheral body diode region PBD may include the first body diode region PBD_1. In multiple embodiments, the peripheral body diode region PBD may include the first body diode region PBD_1 and the second body diode region PBD_2.
[0065] The first body diode region PBD_1 may extend from the second region R2 of the first peripheral region PR1 to a part of the first active region AR1. The first body diode region PBD_1 may extend from the third sub-region R23 of the second region R2 to a part of the first active region AR1. The first body diode region PBD_1 may be a partial region of the substrate 100 doped with p-type impurities or n-type impurities. The first body diode region PBD_1 may extend on the first columnar structure P1.
[0066] The first body diode region PBD_1 may include a first peripheral body diode region PBD1 and a second peripheral body diode region PBD2.
[0067] The first peripheral body diode region PBD1 may be disposed in a second region R2 of the first peripheral region PR1. The first peripheral body diode region PBD1 may be disposed in a third sub-region R23 of the second region R2. The first peripheral body diode region PBD1 may extend over the first columnar structure P1.
[0068] The second peripheral body diode region PBD2 may be a region connected to the first peripheral body diode region PBD1. The second peripheral body diode region PBD2 may extend from the first peripheral body diode region PBD1 to a part of the first active region AR1. The second peripheral body diode region PBD2 extends from the first peripheral body diode region PBD1 and may extend toward the lower side of the first gate electrode GE1. The second peripheral body diode region PBD2 may extend between the first gate electrode GE1 and the first columnar structure P1.
[0069] In multiple embodiments, the second peripheral body diode region PBD2 may extend from the first peripheral body diode region PBD1 to the end R1_E of the first region R1.
[0070] The first columnar structure P1 is disposed in the substrate 100 and may be disposed in the second region R2 and a part of the first active region AR1. The first columnar structure P1 overlaps with the first body diode region PBD_1 and may be disposed in the substrate 100. The first columnar structure P1 may be disposed under the first body diode region PBD_1. The first columnar structure P1 may be a region doped with p-type impurities or n-type impurities.
[0071] The first columnar structure P1 may include a first columnar region P11, a second columnar region P12, and a third columnar region P13.
[0072] The first columnar region P11 can extend into the substrate 100 in the second region R2 from the first peripheral body diode region PBD1. The second columnar region P12 can extend into the substrate 100 in the first active region AR1 from the second peripheral body diode region PBD2. The third columnar region P13 can be disposed between the first columnar region P11 and the second columnar region P12 on the lower side of the first body diode region PBD_1. The third columnar region P13 can connect the upper part P11_U of the first columnar region P11 and the upper part P12_U of the second columnar region P12. The third columnar region P13 can further extend along the first body diode region PBD 1 on the lower side of the first body diode region PBD_1. The third columnar region P13 can extend into the substrate 100 in a direction intersecting the directions in which the first columnar region P11 and the second columnar region P12 respectively extend into the substrate 100. As the third columnar region P13 extends from the second region R2 to a part of the first active region AR1, the upper part P11_U of the first columnar region P11 and the upper part P12_U of the second columnar region P12 can be connected.
[0073] The second columnar structure P2 is disposed in the substrate 100 and can be spaced apart from the first columnar structure P1 in the first active region AR1. The second columnar structure P2 can extend into the substrate 100 from the first body region BD1. The second columnar structure P2 can be a region doped with p-type impurities or n-type impurities.
[0074] The third columnar structure P3 is disposed in the substrate 100 and can be spaced apart from the first columnar structure P1 and the second columnar structure P2 respectively in the first active region AR1. The third columnar structure P3 can extend into the substrate 100 from the second body region BD2. The third columnar structure P3 can be a region doped with p-type impurities or n-type impurities.
[0075] In multiple embodiments, the terminal region ETR can further include a columnar structure. The columnar structure of the terminal region ETR can be spaced apart from the first columnar structure P1.
[0076] The first body region BD1 and the second body region BD2 can be disposed in the substrate 100 in the first active region AR1. The first body region BD1 and the second body region BD2 can be disposed on the lower side of the second gate electrode GE2. The first body region BD1 and the second body region BD2 can be regions doped with p-type impurities or n-type impurities.
[0077] The first body diode region PBD_1, the first body region BD1 and the second body region BD2 can be spaced apart from each other.
[0078] Figure 4 For the cross-sectional view cut along the Figure 1b B-B' line. RegardingFigure 4 The description of Figure 1c can be applied to the second body diode region PBD_2 of
[0079] Refer to Figure 1b and Figure 4 , the semiconductor device according to an embodiment of the present invention may include a peripheral body diode region PBD, a third gate electrode GE3, a fourth gate electrode GE4, a fourth columnar structure P4, a fifth columnar structure P5, a sixth columnar structure P6, a third body region BD3, and a fourth body region BD4.
[0080] The third gate electrode GE3 may be disposed on the second body diode region PBD_2 in a part of the active cell region ACR. The third gate electrode GE3 may be disposed on the second body diode region PBD_2 (e.g., the third peripheral body diode region PBD3) in the second active region AR2. The third gate electrode GE3 may be disposed on the fourth columnar structure P4.
[0081] The fourth gate electrode GE2 may be disposed on the third body region BD3 and the fourth body region BD4 in the second active region AR2.
[0082] The second body diode region PBD_2 may extend from the second peripheral region PR2 to a part of the second active region AR2. The second body diode region PBD_2 and the first body diode region PBD_1 may be partial regions of the substrate 100 doped with p-type impurities or n-type impurities. The first body diode region PBD_2 may extend on the fourth columnar structure P4.
[0083] The second body diode region PBD_2 may include a third peripheral body diode region PBD3 and a fourth peripheral body diode region PBD4.
[0084] The third peripheral body diode region PBD3 may be disposed in the second peripheral region PR2. The third peripheral body diode region PBD3 may extend on the fourth columnar structure P4.
[0085] The fourth peripheral body diode region PBD4 may be a region connected to the third peripheral body diode region PBD3. The fourth peripheral body diode region PBD2 may extend from the third peripheral body diode region PBD3 to a part of the second active region AR2. The fourth peripheral body diode region PBD4 extends from the third peripheral body diode region PBD3 and may extend toward the lower side of the third gate electrode GE3. The fourth peripheral body diode region PBD4 may extend between the third gate electrode GE3 and the fourth columnar structure P4.
[0086] The fourth columnar structure P4 is disposed within the substrate 100 and may be disposed in a part of the second peripheral region PR2 and the second active region AR2. The fourth columnar structure P4 overlaps with the second body diode region PBD_2 and may be disposed within the substrate 100. The fourth columnar structure P4 may be disposed below the second body diode region PBD_2. The fourth columnar structure P4 may be a region doped with p-type impurities or n-type impurities.
[0087] The fourth columnar structure P4 may include a fourth columnar region P41, a fifth columnar region P42, and a sixth columnar region P43.
[0088] The fourth columnar region P41 may be in the second peripheral region PR2 and extend into the substrate 100 from the second peripheral body diode region PBD2. The fifth columnar region P42 may be in the second active region AR2 and extend into the substrate 100 from the fourth peripheral body diode region PBD4. The sixth columnar region P43 may be disposed below the second body diode region PBD_2 and between the fourth columnar region P41 and the fifth columnar region P42. The sixth columnar region P43 may connect the upper part P41_U of the fourth columnar region P41 and the upper part P42_U of the fifth columnar region P42. The sixth columnar region P43 may be disposed below the second body diode region PBD_2 and further extend along the second body diode region PBD_2. The sixth columnar region P43 may extend into the substrate 100 in a direction intersecting the directions in which the fourth columnar region P41 and the fifth columnar region P42 each extend within the substrate 100. As the sixth columnar region P43 extends from the second peripheral region PR2 to a part of the second active region AR2, the upper part P41_U of the fourth columnar region P41 and the upper part P42_U of the fifth columnar region P42 may be connected.
[0089] The fifth columnar structure P5 is disposed within the substrate 100 and may be disposed in the second active region AR2, spaced apart from the fourth columnar structure P4. The fifth columnar structure P5 may extend into the substrate 100 from the third body region BD3. The fifth columnar structure P5 may be a region doped with p-type impurities or n-type impurities.
[0090] The sixth columnar structure P6 is disposed within the substrate 100 and may be disposed in the second active region AR2, spaced apart from the fourth columnar structure P4 and the fifth columnar structure P4, respectively. The sixth columnar structure P6 may extend into the substrate 100 from the fourth body region BD4. The sixth columnar structure P6 may be a region doped with p-type impurities or n-type impurities.
[0091] In multiple embodiments, the terminal region ETR may further include a columnar structure. The columnar structure of the terminal region ETR may be disposed spaced apart from the fourth columnar structure P4.
[0092] The third body region BD3 and the fourth body region BD4 can be disposed within the second active region AR2 in the substrate 100. The third body region BD3 and the fourth body region BD4 can be disposed under the fourth gate electrode GE4. The third body region BD3 and the fourth body region BD4 can be regions doped with p-type impurities or n-type impurities.
[0093] The second body diode region PBD_2, the third body region BD3, and the fourth body region BD4 can be disposed separately from each other.
[0094] Figure 5 It is a diagram for explaining the effects of the semiconductor device according to the embodiment of the present invention.
[0095] Figure 5 The horizontal axis represents the resistance (Rdson [mΩ]) when the transistor of the semiconductor device is in the on state, and the vertical axis can be the reverse current amount (didt [A / μs]) flowing over time. The first curve G1 is a curve representing the reverse current amount flowing over time when the peripheral body diode region PBD of the semiconductor device does not extend from the peripheral region PR to a part of the active cell region ACR. The second curve G2 is a curve representing the reverse current amount flowing over time when the peripheral body diode region PBD of the semiconductor device according to the embodiment of the present invention extends from the peripheral region PR to a part of the active cell region ACR. Even when the resistance values are the same, compared with the first curve G1, the second curve G2 has a higher reverse current amount flowing over time within a specified range (for example, 18 mΩ to 50 mΩ). In other words, as the peripheral body diode region PBD extends from the peripheral region PR to a part of the active cell region ACR, compared with the case where the peripheral body diode region PBD is only disposed in the peripheral region PR, the semiconductor device according to the embodiment of the present invention can increase the reverse current accommodation range and ensure the reliability of the semiconductor device. Also, as the peripheral body diode region PBD extends from the peripheral region PR to a part of the active cell region ACR, compared with the case where the peripheral body diode region PBD is only disposed in the peripheral region PR, the semiconductor device according to the embodiment of the present invention can increase the reverse current accommodation range and reduce the possibility of a combustion region being generated in the semiconductor device.
[0096] The above description is only for explaining the technical idea of this embodiment. Those of ordinary skill in the technical field to which the present invention pertains can make various modifications and deformations without departing from the essential characteristics of the present invention. Therefore, the embodiments of the present invention are only for illustration and do not limit the technical idea of the present invention. The scope of the technical idea of the present invention is not limited to the above embodiments. The protection scope of the present invention should be interpreted based on the scope of the claims, and all technical ideas within the equivalent scope belong to the scope of the claims of the present invention.
Claims
1. A semiconductor device, characterized in that: include: substrate; An active unit region, comprising a first active region and a second active region on the substrate, wherein the first active region comprises a recessed region; A terminal region, surrounding the active unit region on the substrate; A first peripheral region, on the substrate, includes a first region in the recessed region and a second region disposed between the first active region and the terminal region; a second peripheral region disposed between the second active region and the terminal region; and A first body diode region extends from the second region of the first peripheral region to a portion of the first active region, The first body diode region includes: A first peripheral body diode region is disposed in the second region; and The second peripheral body diode region extends from the first peripheral body diode region and extends from the first active region toward a lower side of the first gate electrode disposed on the substrate.
2. The semiconductor device according to claim 1, wherein: include: a first columnar structure disposed in the substrate, disposed in the second region and a portion of the first active region, and disposed under the first body diode region; and The second columnar structure is disposed in the substrate and is separated from the first columnar structure and disposed in the first active region. The first columnar structure comprises: A first columnar region, in the second region, extending from the first peripheral body diode region toward the inside of the substrate; and A second columnar region, in the first active region, extends from the second peripheral body diode region toward the inside of the substrate, The second columnar structure extends from a first body region below a second gate electrode disposed on the substrate in the first active region toward the inside of the substrate.
3. The semiconductor device according to claim 2, wherein: The first peripheral body diode region extends on the first columnar structure. The two peripheral body diode regions extend between the first gate electrode and the first columnar structure.
4. The semiconductor device according to claim 2, wherein: The first columnar structure further includes a third columnar region, which is disposed below the first body diode region, between the first columnar region and the second columnar region, and connects an upper portion of the first columnar region and an upper portion of the second columnar region.
5. The semiconductor device according to claim 2, wherein: The first body region is separated from the first body diode region. In the first active region, the first body region is disposed in the substrate and is separated from the second body region disposed under the second gate electrode.
6. The semiconductor device according to claim 1, wherein: The second area mentioned above includes: A first sub-region extending along a first direction and arranged between the first active region and the terminal region; A second sub-region extending along a second direction intersecting the first direction and arranged between the first region and the terminal region; and The third sub-region extends along the second direction, is between the first sub-region and the second sub-region, and is disposed between the first active region and the terminal region. The first body diode region extends from the third sub-region of the second region to a portion of the first active region, The first peripheral body diode region is configured in the third sub-region.
7. The semiconductor device according to claim 6, wherein: The third sub-region does not overlap with the first region along the first direction.
8. The semiconductor device according to claim 1, wherein: The first region protrudes from the second region along a first direction, The second peripheral body diode region extends to an end of the first region.
9. The semiconductor device according to claim 1, wherein: It also includes a second body diode region extending from the second peripheral region to a portion of the second active region.
10. A semiconductor device, characterized in that: include: A substrate, comprising an active cell region, a terminal region surrounding the active cell region, and a peripheral region between the active cell region and the terminal region; A peripheral body diode region is disposed on the substrate and extends from the peripheral region to a portion of the active cell region; a first body region, separated from the peripheral body diode region and disposed in the active cell region; A first gate electrode is disposed on a portion of the active cell region and on the peripheral body diode region; and The second gate electrode is arranged on the first body region of the active cell region.
11. The semiconductor device according to claim 10, wherein: include: A first columnar structure is disposed in the substrate, disposed in the peripheral region and a portion of the active cell region, and disposed under the peripheral body diode region; and The second columnar structure extends from the first body region toward the inside of the substrate and is separated from the first columnar structure. The first columnar structure comprises: A first columnar region, in the peripheral region, extending from the peripheral body diode region toward the inside of the substrate; and The second columnar region extends from the peripheral body diode region toward the inside of the substrate in the active cell region.
12. The semiconductor device according to claim 11, wherein: The above-mentioned peripheral body diode region includes: A first peripheral body diode region is disposed in the peripheral region; and The second peripheral body diode region extends from the first peripheral body diode region and extends toward the lower side of the first gate electrode.
13. The semiconductor device according to claim 12, wherein: The first peripheral body diode region extends on the first columnar structure. The second peripheral body diode region extends between the first gate electrode and the first columnar structure.
14. The semiconductor device according to claim 11, wherein: The first columnar structure further includes a third columnar region, which is disposed below the peripheral body diode region, between the first columnar region and the second columnar region, and connects an upper portion of the first columnar region and an upper portion of the second columnar region.
15. The semiconductor device according to claim 10, wherein: The first body region is separated from the peripheral body diode region. The first body region is separated from the second body region. In the active cell region, the second body region is arranged in the substrate and below the second gate electrode.
16. The semiconductor device according to claim 10, wherein: The active cell region includes a first active region and a second active region, the first active region includes a recessed region, The above-mentioned peripheral area includes a first peripheral area and a second peripheral area. The first peripheral region includes a first region in the recessed region and a second region disposed between the first active region and the terminal region. The second peripheral region is disposed between the second active region and the terminal region. The second area mentioned above includes: A first sub-region extending along the first direction and arranged between the first active region and the terminal region; A second sub-region extending along a second direction intersecting the first direction and arranged between the first region and the terminal region; and The third sub-region extends along the second direction, is between the first sub-region and the second sub-region, and is disposed between the first active region and the terminal region. The peripheral body diode region extends from the third sub-region of the second region to a portion of the first active region.
17. The semiconductor device according to claim 16, wherein: The first region protrudes from the second sub-region of the second region, The peripheral body diode region extends from the third sub-region to an end of the first region.
18. The semiconductor device according to claim 16, wherein: The peripheral body diode region further extends from the second peripheral region to a portion of the second active region.
19. A semiconductor device, characterized in that: include: substrate; A first columnar structure is disposed in the substrate; A first gate electrode is disposed on the first columnar structure; A peripheral body diode region extending from the first columnar structure along the first direction, including a first peripheral body diode region and a second peripheral body diode region between the first gate electrode and the first columnar structure; A second gate electrode is disposed on the substrate and is separated from the first gate electrode; a first body region, disposed below the second gate electrode, in the substrate and spaced apart from the peripheral body diode region along the first direction; and A second columnar structure is provided in the substrate, extending from the first body region and arranged below the second gate electrode. The first columnar structure comprises: A first columnar region extending from the first peripheral body diode region toward the substrate; A second columnar region extending from the second peripheral body diode region toward the substrate; and The third columnar region is disposed below the peripheral body diode region, between the first columnar region and the second columnar region, and connects an upper portion of the first columnar region and an upper portion of the second columnar region.
20. The semiconductor device according to claim 19, wherein: Also includes: A second body region, disposed below the second gate electrode, in the substrate and spaced apart from the first body region along the first direction; as well as A third columnar structure is provided in the substrate and extends from the second body region. The second columnar structure is spaced apart from the third columnar structure along the first direction.