Solar cell and photovoltaic module

Abstract

The embodiment of the invention provides a solar cell and a photovoltaic module. The solar cell comprises a silicon substrate, the silicon substrate is provided with a first surface, the first surface comprises metalized areas and non-metalized areas which are alternately distributed in the first direction, the non-metalized areas located in the edge area of the first surface are edge non-metalized areas, and the edge non-metalized areas are edge non-metalized areas; the non-metallization area in the central area of the first surface is a central non-metallization area; the dielectric layer is arranged on the surface of the metallization region; the doped conductive layer is arranged on one side, deviating from the silicon substrate, of the dielectric layer; wherein the depth of the edge non-metallization area is smaller than that of the central non-metallization area. According to the embodiment of the invention, the damage to the edge area of the solar cell in the cleaning process can be reduced, the phenomenon of edge breakage is avoided, and the yield of the solar cell is improved.

Description

[0001] This application claims the division of a Chinese patent application with the application number 202510104900.9 and the title "A Solar Cell and a Photovoltaic Module" filed with the National Intellectual Property Administration on January 23, 2025, the entire content of which is incorporated herein by reference. Technical Field

[0003] This application belongs to the field of photovoltaic processing technology, and specifically relates to a solar cell and a photovoltaic module. Background Art

[0004] With the development of technology, solar energy, as a new type of clean photovoltaic energy, has developed rapidly in recent years. Among them, as a kind of optoelectronic semiconductor thin sheet that can directly generate electricity using sunlight, the performance of solar cells has gradually pursued high conversion efficiency, low attenuation performance, and high mass production cost performance.

[0005] In the process of processing existing solar cells, it is usually necessary to perform laser patterning on the cell wafers to form non-metallized regions on the cell wafers. After the laser patterning is completed, it is usually necessary to clean the damage caused by the laser patterning.

[0006] However, in the process of cleaning solar cells, when cleaning the non-metallized regions in the edge area, it is very easy to damage the edges of the cell wafers, resulting in the phenomenon of chipping, which greatly reduces the yield of solar cells. Summary of the Invention

[0007] This application aims to provide a solar cell and a photovoltaic module to solve the problem that the edges of cell wafers in existing solar cells are easily damaged.

[0008] To solve the above technical problems, this application is implemented as follows:

[0009] In a first aspect, this application discloses a solar cell, which includes:

[0010] A silicon substrate having a first surface, the first surface including a metallized region and a non-metallized region;

[0011] The metallized region includes doped conductive layers arranged at intervals;

[0012] The non-metallized region in the edge area of the first surface is the edge non-metallized region, and the non-metallized region in the central area of the first surface is the central non-metallized region. Among them, the depth of the edge non-metallized region is less than the depth of the central non-metallized region.

[0013] Optionally, the depth of the edge non-metallized region has a first difference from the depth of the central non-metallized region, the first difference is greater than 0 and less than or equal to 2 μm.

[0014] Optionally, the depth range of the edge non-metallized region is 1 - 3 μm; the depth range of the central non-metallized region is 2 - 4 μm.

[0015] Optionally, the width of the edge non-metallized region in the first direction is a first width, the width of the central non-metallized region in the first direction is a second width, and the first width is less than or equal to the second width.

[0016] Optionally, the range of the first width is 300 - 700 μm; the range of the second width is 500 - 1500 μm.

[0017] Optionally, the metallized region is provided with a first texture structure, the non-metallized region is provided with a second texture structure, and the one-dimensional size at the bottom of the first texture structure is smaller than the one-dimensional size at the bottom of the second texture structure.

[0018] Optionally, the one-dimensional size at the bottom of the first texture structure is 5 - 9 μm; the one-dimensional size at the bottom of the second texture structure is 9 - 18 μm.

[0019] Optionally, the depths of the first texture structure and the second texture structure are 0.05 - 2 μm.

[0020] Optionally, the non-metallized region is provided with a pyramidal matte structure.

[0021] Optionally, the width of the central non-metallized region in the first direction is a second width, the distance between the centers of two adjacent metallized regions in the first direction is a first distance, and the ratio of the second width to the first distance ranges from 0.2 to 0.7;

[0022] and / or, the distance between the centers of two adjacent metallized regions in the first direction is 1 - 3 mm.

[0023] Optionally, the solar cell further includes a passivation layer, and the passivation layer is disposed on the side of the doped conductive layer away from the silicon substrate;

[0024] The passivation layer includes a first region and a second region, the first region is opposite to the central non-metallized region, the second region is opposite to the edge non-metallized region, the first region is provided with a first sub-passivation layer, and the second region is provided with a second sub-passivation layer;

[0025] Wherein, the thickness of the second sub-passivation layer is greater than the thickness of the first sub-passivation layer.

[0026] In a second aspect, the present application also discloses a photovoltaic module, which includes a battery string, and the battery string includes the solar cell described in any one of the above.

[0027] In the embodiments of the present application, the depth of the non-metallized region at the edge of the solar cell is smaller than the depth of the non-metallized region at the center. During the cleaning of the laser damage to the metallized region, due to the smaller depth of the non-metallized region at the edge, it is beneficial to clean the non-metallized region at the edge with a smaller cleaning intensity. In this way, the damage to the edge region of the solar cell during the cleaning process can be reduced, the phenomenon of edge chipping can be avoided, and the yield of the solar cell can be improved.

[0028] The additional aspects and advantages of the present invention will be partly given in the following description, partly will become obvious from the following description, or will be understood through the practice of the present invention. Description of the Drawings

[0029] The above and / or additional aspects and advantages of the present invention will become obvious and easy to understand from the description of the embodiments in conjunction with the following drawings, where:

[0030] Figure 1 is a schematic structural diagram of a solar cell according to an embodiment of the present application

[0031] Reference numerals: 10 - silicon substrate, 101 - metallized region, 102 - non-metallized region, 1021 - non-metallized region at the edge, 1022 - non-metallized region at the center, 11 - dielectric layer, 12 - doped conductive layer, X - first direction. Detailed Embodiments

[0032] Embodiments of the present invention will be described in detail below. Examples of the embodiments are shown in the drawings, where the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the drawings are exemplary only for explaining the present invention and should not be construed as limiting the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without creative efforts fall within the scope of protection of the present application.

[0033] The terms "first" and "second" in the description and claims of the present application may explicitly or implicitly include one or more of such features. In the description of the present invention, unless otherwise specified, the meaning of "a plurality" is two or more. In addition, "and / or" in the description and claims means at least one of the connected objects, and the character " / " generally represents an "or" relationship between the related objects before and after.

[0034] In the description of the present invention, it should be understood that the orientation or positional relationships indicated by the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. are based on the orientation or positional relationships shown in the drawings. These are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation on the present invention.

[0035] In the description of the present invention, it should be noted that unless otherwise clearly specified and limited, the terms "mounted", "connected", and "coupled" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the communication inside two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific situations.

[0036] Referring to Figure 1 , a schematic structural diagram of a solar cell according to an embodiment of the present application is shown. As Figure 1 shown, the solar cell may specifically include: a silicon substrate 10. The silicon substrate 10 has a first surface, and the first surface includes a metallization region 101 and a non-metallization region 102. The metallization region 101 includes doped conductive layers arranged at intervals. The non-metallization region 102 located in the edge region of the first surface is the edge non-metallization region 1021, and the non-metallization region 102 located in the central region of the first surface is the central non-metallization region 1022.

[0037] In some embodiments, the metallization region 101 includes doped conductive layers arranged at intervals. The doped conductive layers include regions that can be used to form electrodes, so that the electrodes can contact the doped conductive layers 12 in these regions. Considering the manufacturing process accuracy of the electrodes, the metallization region 101 includes the electrode positions and the doped conductive layers not covered by the electrodes. The non-metallization region 102 located in the edge region of the solar cell is the edge non-metallization region 1021. The edge non-metallization region 1021 means that the edge doped conductive layers and dielectric layers are removed, playing a role of edge isolation. The non-metallization region 102 outside the edge non-metallization region 1021 is the central non-metallization region 1022, and the central non-metallization region 1022 is mainly used to reduce the negative impact of parasitic absorption caused by the doped conductive layers on the cell efficiency.

[0038] In some embodiments, the depth H1 of the edge non-metallized region 1021 of the solar cell is less than the depth H2 of the central non-metallized region 1022. During the cleaning of the laser damage in the metallized region 101, due to the smaller depth H1 of the edge non-metallized region 1021, it is beneficial to complete the cleaning of the edge non-metallized region 1021 with a smaller cleaning intensity. In this way, the damage to the edge region of the solar cell during the cleaning process can be reduced, the phenomenon of edge chipping can be avoided, and the yield of the solar cell can be improved.

[0039] Specifically, the depth of the non-metallized region 102 can be the depth at which the bottom of the non-metallized region 102 is recessed relative to the first surface. In practical applications, the depth of the non-metallized region 102 can be measured with the first surface as the reference plane.

[0040] In some embodiments, the silicon substrate 10 can be used to receive incident light and generate photo-generated carriers. In some embodiments, the material of the silicon substrate 10 can include one or more of single-crystalline silicon, polycrystalline silicon, amorphous silicon, or microcrystalline silicon. In other embodiments, the material of the silicon substrate 10 can also be silicon carbide, organic materials, or multi-element compounds. The multi-element compounds can include, but are not limited to, materials such as perovskite, gallium arsenide, cadmium telluride, and copper indium selenide. Exemplarily, in the present application, the silicon substrate 10 is a single-crystalline silicon substrate. The silicon substrate 10 has doping elements, and the conduction type of the doping elements can be N-type or P-type. The N-type elements can be Group V elements such as phosphorus (P), bismuth (Bi), antimony (Sb), or arsenic (As) elements, and the P-type elements can be Group III elements such as boron (B), aluminum (Al), gallium (Ga), or indium (In) elements. For example, when the silicon substrate 10 is a P-type silicon substrate, the conduction type of the internal doping elements is P-type. Another example is that when the silicon substrate 10 is an N-type silicon substrate, the conduction type of the internal doping elements is N-type. Exemplarily, in the embodiments of the present application, the silicon substrate 10 is an N-type silicon substrate to improve the conversion efficiency of the solar cell and reduce the manufacturing cost.

[0041] The solar cell can be applied to various battery structures, including but not limited to Tunnel Oxide Passivated Contact (TOPCon) cells, Interdigitated Back Contact (IBC) cells, Passivated Emitter Rear Cell (PERC) cells, etc., which are not limited here. Taking the TOPCon cell as an example, the first surface can be the backlight surface of the solar cell.

[0042] It should be noted that the first surface may also be the light-receiving surface of the solar cell, and the embodiments of the present application do not limit the specific position of the first surface on the solar cell.

[0043] In some embodiments, the first surface of the silicon substrate 10 includes a metallization region 101 and a non-metallization region 102. Among them, the metallization region 101 is provided with doped conductive layers 12 distributed at intervals. The setting of the non-metallization region 102 can reduce the risk of battery leakage, or reduce the area of the doped conductive layer on the first surface of the solar cell, reduce the negative impact on the battery efficiency caused by the parasitic absorption brought by the doped conductive layer, or take into account reducing the leakage and parasitic absorption on the solar cell.

[0044] In some embodiments, a dielectric layer 11 is further included on the metallization region. The dielectric layer 11 is disposed between the surface of the metallization region 101 and the doped conductive layer.

[0045] In some embodiments, the material of the dielectric layer 11 includes a single-layer or stacked structure made of one or more dielectric materials with tunneling effects such as silicon oxide, silicon nitride, silicon oxynitride, nanocrystalline silicon, intrinsic amorphous silicon, and intrinsic polycrystalline silicon. The doped conductive layer 12 includes a single-layer or stacked structure made of one or more materials such as doped amorphous silicon, doped microcrystalline silicon, and doped polycrystalline silicon. The polarity of the doping element in the doped conductive layer 12 is the same as that of the silicon substrate 10, and a concentration difference is formed with the silicon substrate 10, thereby forming a high-low junction, or the polarity of the doping element is opposite to that of the silicon substrate 10, forming a PN junction with the silicon substrate 10. The dielectric layer 11 can realize the selective transmission of carriers on the surface of the silicon substrate 10 and reduce the recombination probability of holes on the surface of the silicon substrate. The doped conductive layer 12 can improve the carrier transport efficiency and reduce the contact resistance of the solar cell.

[0046] Optionally, the depth H1 of the edge non-metallization region 1021 and the depth H2 of the central non-metallization region 1022 have a first difference. The first difference is greater than 0 and less than or equal to 2 μm. In practical applications, the first difference needs to be greater than 0 so that the depth of the edge non-metallization region 1021 is small, which is convenient for cleaning the edge non-metallization region 1021 and reducing the damage to the edge of the battery chip. At the same time, the first difference needs to be less than or equal to 2 μm so that the depth H1 of the edge non-metallization region 1021 is not too small to cause the edge isolation effect to fail. That is, when the first difference is greater than 0 and less than or equal to 2 μm, the cleaning effect and the edge isolation effect of the edge non-metallization region 1021 can be taken into account.

[0047] Exemplarily, the first difference may specifically be 0.3um, 0.5um, 1.0um, 1.4um, 2um, etc. The embodiments of the present application do not specifically limit the value of the first difference.

[0048] In some embodiments, the depth H1 of the edge non-metallized region 1021 ranges from 1 to 3um; the depth H2 of the central non-metallized region 1022 ranges from 2 to 5um. In practical applications, when the depth of the non-metallized region 102 is too small, the passivation isolation effect of the non-metallized region 102 may be affected. When the depth of the non-metallized region 102 is too large, the mechanical strength of the solar cell will be affected, increasing the risk of fracture or edge crack of the solar cell.

[0049] In some embodiments, by setting the depth of the edge non-metallized region 1021 to 1 - 3um and setting the depth of the central non-metallized region 1022 to 2 - 5um, the passivation isolation effect and mechanical strength of both the edge non-metallized region 1021 and the central non-metallized region 1022 can be taken into account. At the same time, the depth H1 of the edge non-metallized region 1021 is less than the depth H2 of the central non-metallized region 1022.

[0050] Exemplarily, the depth H1 of the edge non-metallized region 1021 may be 1um, 2.5um, 3.0um, 3.4um, 4um, etc., and the depth H2 of the central non-metallized region 1022 may be 2um, 2.8um, 3.5um, 4.4um, 5um, etc. The embodiments of the present application do not specifically limit the depths of the edge non-metallized region 1021 and the central non-metallized region 1022.

[0051] In some embodiments, the width W1 of the edge non-metallized region 1021 along the first direction X is the first width, and the width of the central non-metallized region 1022 along the first direction X is the second width W2, and the first width W1 is less than or equal to the second width W2. In practical applications, the width of the non-metallized region 102 along the first direction X needs to comprehensively consider the carrier transport performance and processability. Generally, only one side of the edge non-metallized region 1021 has a metallized region, so that the path selectivity of the carriers in the edge non-metallized region 1021 to transport from the non-metallized region 102 to the metallized region 101 is less than that of the carriers in the central non-metallized region 1022. In order to reduce the carrier transport path in the edge non-metallized region 1021 and reduce the probability of their recombination, therefore, the first width W1 of the edge non-metallized region 1021 needs to be less than or equal to the second width W2 of the central non-metallized region 1022. Moreover, in the process of forming the non-metallized region 102 by using the laser engraving process, the narrower edge non-metallized region 1021 is easier to process.

[0052] Optionally, the range of the first width W1 is 100 - 700 um; the range of the second width W2 is 500 - 1500 um. In practical applications, when the width of the non-metallized region 102 is less than 100 um, the isolation effect of the non-metallized region 102 may be poor. When the width of the non-metallized region 102 is greater than 1500 um, there may be a high Rs and a decline in electrical performance due to the over-wide grooving and large lateral transmission. That is, based on the comprehensive selection of the size of the laser spot and the lateral transmission difference in the grooving area, the first width W1 can be set to 100 - 700 um; and the second width W2 can be set to 500 - 1500 um.

[0053] Exemplarily, the first width W1 can be 100 um, 200 um, 300 um, 400 um, 500 um, 600 um, or 700 um, etc., and the second width W2 can be 500 um, 700 um, 1000 um, 1300 um, or 1500 um, etc. The embodiments of the present application do not make specific limitations on the first width W1 and the second width W2.

[0054] In some alternative embodiments of the present application, the metallized region 101 is provided with a first texture structure, and the non-metallized region 102 is provided with a second texture structure, and the one-dimensional size at the bottom of the first texture structure is smaller than the one-dimensional size at the bottom of the second texture structure.

[0055] In some embodiments, both the first texture structure of the metallized region 101 and the second texture structure of the non-metallized region 102 can increase the surface area, which is beneficial to increasing the coverage area of the later film layer on the silicon substrate 10, and thus a higher passivation quality can be obtained. The non-metallized region 102 is relatively more damaged during the patterning process, and the damaged area will bring more recombination sites. Therefore, better passivation performance is required.

[0056] In some embodiments, the one-dimensional size at the bottom of the first texture structure on the metallized region 101 is smaller than the one-dimensional size at the bottom of the second texture structure on the non-metallized region 102, so that the ratio of the actual surface area to the planar area of the non-metallized region 102 is larger, that is, the specific surface area is larger, which can increase the area of the film layer covering the non-metallized region 102 and improve the passivation quality of the non-metallized region 102. That is, by correspondingly designing texture structures with different sizes at the bottoms of the metallized region 101 and the non-metallized region 102, the passivation quality of the non-metallized region 102 can be more targeted, and a higher cell conversion efficiency can be obtained for the prepared solar cell.

[0057] It should be noted that, in one embodiment, the first texture structure and the second texture structure can be formed in the metallized region 101 and the non-metallized region 102 by using a laser or chemical etching method. The one-dimensional size at the bottom of the first texture structure and the second texture structure can specifically be the distance between the two farthest points of the orthographic projection of the first texture structure or the second texture structure on the first surface, which is not limited herein. In some examples, when measuring the one-dimensional size, the surface calibration of the film layer can be directly measured by a testing instrument (such as an optical microscope, an atomic force microscope, a scanning electron microscope, a transmission electron microscope, etc.).

[0058] Exemplarily, the bottoms of the first texture structure and the second texture structure are polygonal planes. Specifically, the bottoms of the first texture structure and the second texture structure can be at least one of a rhombus, a square, a trapezoid, an approximate rhombus, an approximate square, and an approximate trapezoid. Of course, the bottoms of the first texture structure and the second texture structure can also be polygons of other shapes, which are not limited herein.

[0059] Optionally, the one-dimensional size at the bottom of the first texture structure is 5 - 9 μm. Further, the one-dimensional size at the bottom of the first texture structure can be 5 μm, 6 μm, 7 μm, 7.5 μm, 8 μm, or 9 μm. Of course, the one-dimensional size at the bottom of the first texture structure can also be other values within the above range, and can be specifically set according to actual needs, which is not limited herein.

[0060] Optionally, the one-dimensional size at the bottom of the second texture structure is 9 - 18 μm. Further, the one-dimensional size at the bottom of the second texture structure can be 9 μm, 11 μm, 14 μm, 15 μm, 17 μm, or 18 μm. Of course, the one-dimensional size at the bottom of the second texture structure can also be other values within the above range, and can be specifically set according to actual needs, which is not limited herein.

[0061] Specifically, if the one-dimensional sizes at the bottoms of the first texture structure and the second texture structure are too small, it will increase the unevenness of the surfaces of the metallized region 101 and the non-metallized region 102, which is not conducive to the subsequent coating quality of the non-metallized region 102; if the one-dimensional sizes at the bottoms of the first texture structure and the second texture structure are too large, it will increase the preparation difficulty of the first texture structure and the second texture structure, and a too large one-dimensional size will result in a smaller specific surface area of the non-metallized region 102, and the purpose of increasing the subsequent coating area cannot be achieved, thus being not conducive to the passivation of the non-metallized region 102. In practical applications, when the one-dimensional size at the bottom of the first texture structure is 5 - 9 μm and the one-dimensional size at the bottom of the second texture structure is 9 - 18 μm, the preparation difficulty of the non-metallized region 102 can be reduced, the preparation efficiency can be improved, and the non-metallized region 102 can obtain higher passivation quality, thereby improving the conversion efficiency of the solar cell.

[0062] Optionally, the depth of the first texture structure and the second texture structure is 0.05 - 2 μm. For example, the first texture structure and the second texture structure may be recessed structures, and the recessed depth of the recessed structure may be 0.05 μm, 0.1 μm, 0.15 μm, 0.2 μm, etc. Of course, the recessed depth of the recessed structure may also be other values within the above range, which can be specifically set according to actual requirements and are not limited herein. In this embodiment, when the recessed depth of the recessed structure is 0.05 μm to 2 μm, the unevenness on the surface of the non-metallized region 102 can be controlled within the required range, which is beneficial to improving the passivation effect of the non-metallized region 102.

[0063] In some embodiments, the non-metallized region 102 is provided with a pyramidal texture structure. In practical applications, the pyramidal texture structure can reduce reflection, increase light absorption, improve the photoelectric conversion efficiency, etc.

[0064] Specifically, the texturing process can increase the roughness of the surface of the silicon substrate 10 by forming a layer of texture structure on the surface of the non-metallized region 102, thereby reducing light reflection and increasing light absorption. This texture structure can change the incident angle and propagation path of light, form a light trap, further increase the density of photo-generated carriers, and ultimately improve the photoelectric conversion efficiency of the solar cell.

[0065] In some embodiments, the width of the central non-metallized region 1022 in the first direction X is the second width W2, and the distance between the centers of two adjacent metallized regions 101 in the first direction X is the first distance W3. The ratio range of the second width W2 to the first distance W3 is 0.2 - 0.7. In a specific application, when the ratio of the second width W2 to the first distance W3 is greater than 0.7, the problem of FF loss will occur due to the too large lateral transport distance of photo-generated carriers. When the ratio of the second width W2 to the first distance W3 is less than 0.2, the area of the subsequent doped conductive layer 12 covered increases, increasing the parasitic absorption of the doped conductive layer 12 and reducing the cell efficiency.

[0066] Exemplarily, the ratio of the second width W2 to the first distance W3 may be 0.2, 0.35, 0.45, 0.5, 0.6, or 0.7, etc. The embodiments of the present application do not specifically limit the ratio of the second width W2 to the first distance W3.

[0067] Optionally, the second width W2 of the central non-metallized region 1022 along the first direction X is 0.5 mm - 1.5 mm, so that the lateral transport distance of the photo-generated carriers is appropriate and convenient for processing. For example, the second width W2 of the central non-metallized region 1022 along the first direction X can be 0.5 mm, 0.6 mm, 0.8 mm, 1.0 mm, 1.3 mm, 1.5 mm, etc. The embodiments of the present application do not specifically limit the second width W2 of the central non-metallized region 1022 along the first direction X.

[0068] Optionally, the distance between the centers of two adjacent metallized regions 101 along the first direction X is 1 - 3 mm, so as to control the width of the metallized region 101 along the first direction X within a suitable range, which is convenient for arranging the dielectric layer 11 and the doped conductive layer 12 on the metallized region 101. For example, the distance between the centers of two adjacent metallized regions 101 along the first direction X can be 1 mm, 1.2 mm, 1.5 mm, 2.2 mm, 2.5 mm, 3 mm, etc. The embodiments of the present application do not specifically limit the distance between the centers of two adjacent metallized regions 101 along the first direction X.

[0069] In some embodiments, the solar cell further includes a passivation layer, and the passivation layer is disposed on the side of the doped conductive layer 12 away from the silicon substrate 10; the passivation layer may include a first region and a second region, the first region is opposite to the central non-metallized region 1022, the second region is opposite to the edge non-metallized region 1021, the first region is provided with a first sub-passivation layer, and the second region is provided with a second sub-passivation layer; wherein, the thickness of the second sub-passivation layer is greater than the thickness of the first sub-passivation layer.

[0070] In a specific application, since there are more defects on the side of the edge non-metallized region 1021 close to the edge of the cell, by setting the second sub-passivation layer on the edge non-metallized region 1021 to be thicker, it is beneficial to obtain a better passivation effect.

[0071] The following provides a processing flow of the solar cell according to the embodiments of the present application:

[0072] First, a whole layer of dielectric layer 11 and doped conductive layer 12 can be deposited on the first surface of the silicon substrate 10. The dielectric layer 11 can be a tunneling oxide layer, and the doped conductive layer 12 can be a doped polysilicon layer.

[0073] Then, a laser patterning process is performed on the prepared doped conductive layer 12 to modify the doped conductive layer 12, forming an edge non-metallized region 1021 and a central non-metallized region 1022. The edge non-doped region and the central non-doped region can be prepared by a process laser process or by different laser processes. For example, lasers with different laser powers are used to modify the doped conductive layer 12 at the edge and in the center.

[0074] Finally, for selective etching, a chain machine is used to remove the dielectric layer 11 plated around the front and edges of the solar cell wafer, and a tank machine is used to etch the solution to remove the dielectric layer 11, the doped conductive layer 12, and a part of the underlying silicon substrate 10 in the non-metallized region 102, so as to form the non-metallized region 102. It should be noted that the order of selective etching can be adjusted. For example, a chain machine can be used to remove the dielectric layer 11 plated around the front and edges of the solar cell wafer first, and then a tank machine is used to etch the solution to remove the dielectric layer 11, the doped conductive layer 12, and a part of the underlying silicon substrate 10 in the non-metallized region 102, so as to form the non-metallized region 102; or a tank machine is used to etch the solution to remove the dielectric layer 11, the doped conductive layer 12, and a part of the underlying silicon substrate 10 in the non-metallized region 102 first, so as to form the non-metallized region 102, and then a chain machine is used to remove the dielectric layer 11 plated around the front and edges of the solar cell wafer. There is no special limitation here.

[0075] In summary, the solar cell wafer described in the embodiments of the present application has at least the following advantages:

[0076] In the embodiments of the present application, the depth of the edge non-metallized region of the solar cell is less than the depth of the central non-metallized region. During the cleaning process of the laser-patterned non-metallized region, due to the smaller depth of the edge non-metallized region, it is beneficial to clean the edge non-metallized region with a smaller cleaning intensity. In this way, the damage to the edge region of the solar cell during the cleaning process can be reduced, the phenomenon of edge chipping can be avoided, and the yield rate of the solar cell can be improved.

[0077] The embodiments of the present application also provide a photovoltaic module, which includes a battery string, and the battery string may specifically include the solar cell described in any of the above embodiments.

[0078] It should be noted that in the photovoltaic module described in the embodiments of the present application, the structure of the solar cell is the same as that of the solar cell described in any of the above embodiments, and its beneficial effects are also similar, which will not be elaborated here.

[0079] In the description of this specification, the descriptions referring to terms such as "one embodiment", "some embodiments", "schematic embodiments", "examples", "specific examples", or "some examples", etc. mean that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples.

[0080] Although the embodiments of the present invention have been shown and described, those of ordinary skill in the art can understand that various changes, modifications, substitutions, and variations can be made to these embodiments without departing from the principles and spirit of the present invention. The scope of the present invention is defined by the claims and their equivalents.

Claims

1. A solar cell, characterized in that: The solar cell comprises: A silicon substrate having a first surface, wherein the first surface includes a metallized area and a non-metallized area; The metallization area includes doped conductive layers arranged at intervals; The non-metallized area located in the edge area of ​​the first surface is an edge non-metallized area, and the non-metallized area located in the central area of ​​the first surface is a central non-metallized area, wherein the width of the central non-metallized area along the first direction is a second width, the distance between the centers of two adjacent metallized areas along the first direction is a first distance, and the ratio of the second width to the first distance is in the range of 0.2-0.

7.

2. The solar cell according to claim 1, characterized in that The metallized area is provided with a first texture structure, and the non-metallized area is provided with a second texture structure. The one-dimensional size of the bottom of the first texture structure is smaller than the one-dimensional size of the bottom of the second texture structure.

3. The solar cell according to claim 2, characterized in that: The one-dimensional size of the bottom of the first texture structure is 5-9 um; the one-dimensional size of the bottom of the second texture structure is 9-18 um.

4. The solar cell according to claim 2, characterized in that: The depth of the first texture structure and the second texture structure is 0.05-2 um.

5. The solar cell according to claim 1 or 2, characterized in that: in, The metallization area includes a dielectric layer, and the dielectric layer is arranged between the metallization area and the doped conductive layer; The metallization area and the non-metallization area include a passivation layer, and the passivation layer is arranged on a side of the doped conductive layer away from the silicon substrate.

6. The solar cell according to claim 1, characterized in that A depth of the edge non-metallized area and a depth of the central non-metallized area have a first difference, and the first difference is greater than 0 and less than or equal to 2 um.

7. The solar cell according to claim 1, characterized in that The depth range of the edge non-metallized area is 1-3um; the depth range of the central non-metallized area is 2-5um.

8. The solar cell according to claim 1, characterized in that The width of the edge non-metallized area along the first direction is a first width, the width of the central non-metallized area along the first direction is a second width, and the first width is less than or equal to the second width.

9. The solar cell according to claim 8, characterized in that The first width ranges from 100 to 700 um; the second width ranges from 500 to 1500 um.

10. The solar cell according to claim 1, characterized in that: The non-metallized area is provided with a pyramid-shaped velvet structure.

11. The solar cell according to claim 1, characterized in that: The distance between the centers of two adjacent metallized areas along the first direction is 1-3 mm.

12. The solar cell according to claim 1, characterized in that The solar cell further comprises a passivation layer, wherein the passivation layer is arranged on a side of the doped conductive layer away from the silicon substrate; The passivation layer comprises a first region and a second region, the first region is opposite to the central non-metallized region, the second region is opposite to the edge non-metallized region, the first region is provided with a first sub-passivation layer, and the second region is provided with a second sub-passivation layer; Wherein, the thickness of the second sub-passivation layer is greater than the thickness of the first sub-passivation layer.

13. A photovoltaic module, characterized in that: The photovoltaic module comprises a cell string, and the cell string comprises the solar cell according to any one of claims 1 to 12.

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