Radio frequency power supply detection frequency abnormity automatic reset system and method

Abstract

The invention discloses a radio frequency power supply detection frequency abnormity automatic reset system and method, the system comprises a signal detection module, a signal processing module, a reset module, a control module and a power supply module, the reset module is used for controlling power supply to the signal detection module and the signal processing module; the control module is in communication connection with the signal processing module and the reset module, and the control module controls the reset module according to the operation state of the signal processing module. Through cooperative work of the signal detection module and the signal processing module, the abnormal condition of the output signal frequency can be timely perceived. When the frequency is detected to be abnormal, the reset module stops supplying power to the related module rapidly, thereby effectively preventing power components in the radio frequency power supply circuit from being damaged due to the abnormal frequency. In addition, the system can automatically complete reset operation according to a frequency monitoring result, and the problem that in the prior art, normal work can be recovered only by manual restarting is solved.

Description

Technical Field

[0001] The present invention relates to the technical field of radio frequency power supplies, and more specifically, to a radio frequency power supply detection frequency anomaly automatic reset system and method. Background Art

[0002] When a radio frequency power supply is operating normally, once the frequency suddenly exceeds the designed range, if the signal is not turned off in time, it will cause damage to the power components in the radio frequency power supply circuit. Currently, most radio frequency power supplies do not have the function of detecting frequency anomalies. This makes it so that when a frequency anomaly occurs, the internal circuit of the radio frequency power supply has often been burned out and thus cannot operate normally. Even if some radio frequency power supplies have the function of detecting frequency anomalies, they cannot quickly turn off the frequency output after a frequency anomaly occurs. The protection of the components in the radio frequency power supply circuit only has a certain probability, and after an anomaly occurs, the power supply needs to be restarted manually for the power supply to resume normal operation.

[0003] The above deficiencies need to be improved. Summary of the Invention

[0004] In order to solve or alleviate the problem in the above-mentioned existing technology that most radio frequency power supplies do not have the function of detecting frequency anomalies, those with this function cannot quickly turn off the abnormal frequency output, have a probability of protecting components, and require manual restart, resulting in easy damage to the power components in the circuit when the frequency is abnormal during operation, the present invention provides a radio frequency power supply detection frequency anomaly automatic reset system and method.

[0005] The technical solution of the present invention is as follows:

[0006] A radio frequency power supply detection frequency anomaly automatic reset system, comprising:

[0007] A signal detection module, which is used to detect the signal output to the radio frequency power supply;

[0008] A signal processing module, which is used to analyze the output signal of the signal detection module;

[0009] A reset module, which is used to control the power supply to the signal detection module and the signal processing module;

[0010] A control module, which is communicatively connected to the signal processing module and the reset module, and the control module controls the reset module according to the operating state of the signal processing module;

[0011] A power supply module, which is used to supply power to the signal detection module, the signal processing module, and the control module. The power supply module supplies power to the signal detection module and the signal processing module through the reset module.

[0012] Further, the reset module includes a diode D1. The anode of the diode D1 is connected to the reset output terminal FPGA_RST of the signal processing module. The cathode of the diode D1 is connected to the first end of a resistor R1 and the cathode of a diode D2.

[0013] The reset output terminal MCU_RST of the control module is connected to the base of a switching triode Q3. The emitter of the triode Q3 is grounded. The collector of the triode Q3 is connected to the second end of a resistor R8. The first end of the resistor R8 is connected to the power input VCC_IN. The collector of the triode Q3 is connected to the anode of the D2 diode.

[0014] The second end of the resistor R1, the first end of a capacitor C2, and the first end of a resistor R2 are connected to the base of a triode Q2. The second end of the capacitor C2, the second end of the resistor R2, and the emitter of the Q2 triode are grounded. The collector of the Q2 triode is the output terminal and is connected to the first end of a resistor R3, the first end of a resistor R5, and the first end of a capacitor C3. The second end of the capacitor C3 is grounded. The first end of the resistor R3 is connected to the first end of a resistor R4 and the power input VCC_IN. The second end of the resistor R5 is connected to the second end of the resistor R4 and the G pole of a PMOS transistor Q1. The D pole of the PMOS transistor Q1 is connected to the power input VCC_IN. The S pole of the PMOS transistor Q1 is connected to the power output VCC_OUT, the first end of a capacitor C4, and the cathode of a diode TVS1. The second end of the capacitor C4 and the anode of the diode TVS1 are grounded. The power output VCC_OUT is connected to the power supply terminal of the signal processing module and the power supply terminal of the signal acquisition module.

[0015] Further, a first filtering circuit is provided between the reset output terminal FPGA_RST of the signal processing module and the anode of the diode D1. The first filtering circuit includes a capacitor C1. The first end of the capacitor C1 is connected to the reset output terminal FPGA_RST of the signal processing module. The second end of the capacitor C1 is connected to the first end of an inductor L1 and the anode of the diode D1. The second end of the inductor L1 is grounded.

[0016] Further, a first voltage dividing circuit is provided between the reset output terminal MCU_RST of the control module and the base of the switching triode Q3. The first voltage dividing circuit includes a resistor R6. The first end of the resistor R6 is connected to the reset output terminal MCU_RST of the control module. The second end of the resistor R6 is connected to the first end of a resistor R7 and the base of the switching triode Q3. The second end of the resistor R7 is grounded.

[0017] Further, a second filtering circuit and a voltage protection circuit are provided between the S pole of the PMOS transistor Q1 and the power output VCC_OUT. The second filtering circuit includes a capacitor C4. The first end of the capacitor C4 is connected to the S pole of the PMOS transistor Q1. The second end of the capacitor C4 is grounded. The voltage protection circuit includes a diode TVS1. The cathode of the diode TVS1 is connected to the S pole of the PMOS transistor Q1. The anode of the diode TVS1 is grounded.

[0018] Furthermore, the signal detection module includes a DDS signal output unit and a signal conversion unit. The DDS signal output unit is used to synthesize and output a source signal to the radio frequency power supply, and the signal conversion unit is used to convert the source signal into a square wave of Fourier series.

[0019] Furthermore, the signal conversion unit includes a capacitor C5. The first end of the capacitor C5 is connected to the DDS signal output unit, the second end of the capacitor C5 is connected to the first end of a resistor R9 and the 3rd pin of a comparator U1. The second end of the resistor R9 is connected to the first end of a resistor R10 and the ground. The second end of the resistor R10 is connected to the 4th pin of the comparator U1 and the first end of a resistor R11. The second end of the resistor R11 is connected to the 1st pin of the comparator U1. The 1st pin of the comparator U1 is connected to the I / O end of the signal processing module. The 5th pin of the comparator U1 is connected to the power output VCC_OUT, and the 2nd pin of the comparator U1 is connected to the ground.

[0020] Furthermore, a third filter circuit is provided between the 5th pin of the comparator U1 and the power output VCC_OUT. The third filter circuit includes a capacitor C6. The first end of the capacitor C6 is connected to the power output VCC_OUT, and the second end of the capacitor C6 is grounded.

[0021] A second voltage dividing circuit is provided between the 1st pin of the comparator U1 and the I / O end of the signal processing module. The second voltage dividing circuit includes a resistor R12. The first end of the resistor R12 is connected to the 1st pin of the comparator U1. The second end of the resistor R12 is connected to the first end of a resistor R13 and the I / O end of the signal processing module. The second end of the resistor R13 is grounded.

[0022] Furthermore, the power supply module includes a first power supply and a second power supply. The first power supply supplies power to the signal detection module and the signal processing module through the reset module, and the second power supply is used to supply power to the control module.

[0023] A method for automatically resetting the detection frequency abnormality of a radio frequency power supply, which is applicable to the above radio frequency power supply detection frequency abnormality automatic reset system, includes the following steps:

[0024] S1. The DDS signal output unit synthesizes and outputs a source signal to the radio frequency power supply, and the signal conversion unit converts the source signal into a square wave of Fourier series.

[0025] S2. The signal processing module is used to analyze the output signal of the signal conversion unit. When the frequency exceeds the preset range, it is determined that the output signal is abnormal, and the DDS signal output unit is corrected. If the correction fails, the DDS signal output unit is turned off.

[0026] S3. The signal processing module outputs a frequency abnormality signal to the reset module, and the reset module turns off the power supply to the signal processing module and the DDS signal output unit.

[0027] S4. The signal processing module outputs a frequency anomaly signal to the control module, and the control module controls the reset module to resume power supply to the signal processing module and the DDS signal output unit.

[0028] For the present invention according to the above solution, its beneficial effects are as follows. Through the collaborative work of the signal detection module and the signal processing module, the present invention successfully makes up for the deficiency that most existing RF power supplies lack the function of detecting frequency anomalies, and can promptly detect the abnormal conditions of the output signal frequency. The fast automatic reset function enhances the protection ability for circuit components. When a frequency anomaly is detected, the reset module quickly stops power supply to the relevant modules, effectively preventing the power components in the RF power supply circuit from being damaged due to frequency anomalies. Compared with the existing power supplies that have a detection function but cannot quickly turn off the frequency output, the timeliness of protection is greatly improved. In addition, this system does not require manual intervention and can automatically complete the reset operation based on the frequency monitoring results, solving the problem in the prior art that manual restart is required to resume normal operation, improving the convenience and stability during the use of the RF power supply, and ensuring its reliable operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for use in the embodiments or the description of the prior art. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0030] Figure 1 It is a schematic diagram of the system architecture of the present invention;

[0031] Figure 2 It is a schematic diagram of the circuit principle of the present invention;

[0032] Figure 3 It is a schematic diagram of the circuit principle of the reset module in the present invention;

[0033] Figure 4 It is a schematic diagram of the circuit principle of the signal conversion unit in the present invention;

[0034] Figure 5 It is a flowchart of the method steps of the present invention.

[0035] Among them, the reference numerals in the drawings: 1, signal detection module; 101, DDS signal output unit; 102, signal conversion unit; 2, signal processing module; 3, reset module; 4, control module; 5, power supply module; 501, first power supply; 502, second power supply. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0036] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention more clearly understood, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0037] It should be noted that when a component is referred to as "fixed" or "set" or "connected" to another component, it can be directly or indirectly located on the other component. The orientations or positions indicated by the terms "upper", "lower", "left", "right", "front", "rear", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. are based on the orientations or positions shown in the drawings, and are only for the convenience of description and cannot be construed as a limitation to the technical solution of the present invention. The terms "first", "second", etc. are only used for the purpose of convenient description and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of technical features. The meaning of "plurality" is two or more, unless otherwise specifically defined. The meaning of "several" is one or more, unless otherwise specifically defined.

[0038] Embodiment 1

[0039] As Figure 1 shown, a radio frequency power supply detection frequency anomaly automatic reset system described in an embodiment of the present invention includes a signal detection module, a signal processing module, a reset module, a control module, and a power supply module. The signal detection module is used to detect the signal output to the radio frequency power supply; the signal processing module is used to analyze the output signal of the signal detection module; the reset module is used to control the power supply to the signal detection module and the signal processing module; the control module is communicatively connected to the signal processing module and the reset module, and the control module controls the reset module according to the operating state of the signal processing module; the power supply module is used to supply power to the signal detection module, the signal processing module, and the control module, and the power supply module supplies power to the signal detection module and the signal processing module through the reset module. The control module and the signal processing module communicate through a UART serial port.

[0040] During operation, the signal detection module detects the signal output to the radio frequency power supply and transmits the detected signal to the signal processing module. The signal processing module receives these signals and analyzes them to determine whether the frequency is normal. The control module maintains communication with the signal processing module and the reset module. The power supply module provides power support for the signal detection module, the signal processing module, and the control module, and the power supply to the signal detection module and the signal processing module needs to be realized through the reset module. If the signal processing module detects an abnormal frequency, the reset module will stop supplying power to the signal detection module and the signal processing module, cutting off the relevant path of the abnormal signal. The MCU tries to start the reset module. If the signal processing module detects a normal frequency, it will feedback a normal signal to the reset module, causing the reset module to continuously supply power to the signal detection module and the signal processing module, so that the system resumes normal operation.

[0041] Through the collaborative work of the signal detection module and the signal processing module, this system successfully makes up for the deficiency that most existing radio frequency power supplies lack the function of detecting abnormal frequencies, and can promptly detect the abnormal conditions of the output signal frequency. The fast automatic reset function enhances the protection ability for circuit devices. When an abnormal frequency is detected, the reset module quickly stops supplying power to the relevant modules, effectively avoiding damage to the power components in the radio frequency power supply circuit caused by abnormal frequencies. Compared with the existing power supplies that have detection functions but cannot quickly turn off the frequency output, the timeliness of protection is greatly improved. In addition, this system does not require manual intervention and can automatically complete the reset operation according to the frequency monitoring results, solving the problem in the prior art that manual restart is required to resume normal operation, enhancing the convenience and stability during the use of the radio frequency power supply, and ensuring its reliable operation.

[0042] As Figure 2 and Figure 3 shown, specifically, the reset module includes diode D1. The anode of diode D1 is connected to the reset output terminal FPGA_RST of the signal processing module. The cathode of diode D1 is connected to the first end of resistor R1 and the cathode of diode D2. The reset output terminal MCU_RST of the control module is connected to the base of switch triode Q3. The emitter of triode Q3 is grounded. The collector of triode Q3 is connected to the second end of resistor R8. The first end of resistor R8 is connected to the power input VCC_IN. The collector of triode Q3 is connected to the anode of D2 diode. The second end of resistor R1, the first end of capacitor C2, and the first end of resistor R2 are connected to the base of triode Q2. The second end of capacitor C2, the second end of resistor R2, and the emitter of Q2 triode are grounded. The collector of Q2 triode is the output terminal and is connected to the first end of resistor R3, the first end of resistor R5, and the first end of capacitor C3. The second end of capacitor C3 is grounded. The first end of resistor R3 is connected to the first end of resistor R4 and the power input VCC_IN. The second end of resistor R5 is connected to the second end of resistor R4 and the G pole (gate) of PMOS transistor Q1. The D pole (drain) of PMOS transistor Q1 is connected to the power input VCC_IN. The S pole (source) of PMOS transistor Q1 is connected to the power output VCC_OUT, the first end of capacitor C4, and the cathode of diode TVS1. The second end of capacitor C4 and the anode of diode TVS1 are grounded. The power output VCC_OUT is connected to the power supply terminal of the signal processing module and the power supply terminal of the signal acquisition module. Due to the unidirectional conduction principle of the diode, the signal processing module and the control module can achieve separate I / O control of the reset module without crosstalk. Capacitor C3 is an energy storage capacitor, resistor R3 is a pull-up resistor, R4 is a pull-up resistor, and resistor R5 is a current limiting resistor.

[0043] As Figure 3As shown, a first filter circuit is provided between the reset output terminal FPGA_RST of the signal processing module and the anode of the diode D1. The first filter circuit includes a capacitor C1. The first terminal of the capacitor C1 is connected to the reset output terminal FPGA_RST of the signal processing module, and the second terminal of the capacitor C1 is connected to the first terminal of an inductor L1 and the anode of the diode D1. The second terminal of the inductor L1 is grounded. The inductive reactance of the inductor and the capacitive reactance of the capacitor can be calculated according to the formulas XL = jwL and Xc = 1 / jwc, where w is the angular frequency.

[0044] A first voltage dividing circuit is provided between the reset output terminal MCU_RST of the control module and the base of the switching triode Q3. The first voltage dividing circuit includes a resistor R6. The first terminal of the resistor R6 is connected to the reset output terminal MCU_RST of the control module, and the second terminal of the resistor R6 is connected to the first terminal of a resistor R7 and the base of the switching triode Q3. The second terminal of the resistor R7 is grounded. The reset output terminal MCU_RST of the control module outputs a high-level turn-off signal and a low-level turn-on signal.

[0045] A second filter circuit and a voltage protection circuit are provided between the S pole of the PMOS transistor Q1 and the power supply output VCC_OUT. The second filter circuit includes a capacitor C4. The first terminal of the capacitor C4 is connected to the S pole of the PMOS transistor Q1, and the second terminal of the capacitor C4 is grounded. The voltage protection circuit includes a diode TVS1. The cathode of the diode TVS1 is connected to the S pole of the PMOS transistor Q1, and the anode of the diode TVS1 is grounded.

[0046] As Figure 1 shown, the signal detection module includes a DDS (Direct Digital Frequency Synthesis) signal output unit and a signal conversion unit. The DDS signal output unit is used to synthesize and output the source signal to the radio frequency power supply. The signal output by the DDS signal output unit is a sine wave. The signal conversion unit is used to convert the source signal into a square wave of Fourier series.

[0047] As Figure 4 shown, the signal conversion unit includes a capacitor C5. The first terminal of the capacitor C5 is connected to the DDS signal output unit, and the second terminal of the capacitor C5 is connected to the first terminal of a resistor R9 and the 3rd pin of a comparator U1. The second terminal of the resistor R9 is connected to the first terminal of a resistor R10 and the ground. The second terminal of the resistor R10 is connected to the 4th pin of the comparator U1 and the first terminal of a resistor R11. The second terminal of the resistor R11 is connected to the 1st pin of the comparator U1. The gain of the output signal is amplified by adjusting the resistance values of R10 and R11. The 1st pin of the comparator U1 is connected to the I / O terminal of the signal processing module. The 5th pin of the comparator U1 is connected to the power supply output VCC_OUT. The 2nd pin of the comparator U1 is connected to the ground.

[0048] A third filter circuit is provided between the 5th pin of the comparator U1 and the power supply output VCC_OUT. The third filter circuit includes a capacitor C6. The first terminal of the capacitor C6 is connected to the power supply output VCC_OUT, and the second terminal of the capacitor C6 is grounded;

[0049] A second voltage dividing circuit is provided between the first pin of comparator U1 and the I / O terminal of the signal processing module. The second voltage dividing circuit includes a resistor R12. The first end of the resistor R12 is connected to the first pin of the comparator U1, the second end of the resistor R12 is connected to the first end of a resistor R13 and the I / O terminal of the signal processing module, and the second end of the resistor R13 is grounded.

[0050] The frequency detection of the signal processing module is achieved by calculating the edge interval of the rising edge or the falling edge. The calculation formula is:

[0051]

[0052] where clk_fs is the reference clock, clk_fx is the signal to be measured, fs_cnt is the number of reference clocks, fx_cnt is the number of clocks to be measured. In the schematic diagram, the capacitor C5 and the resistor R9 form an RC differentiating circuit. When the resistor R9 and the capacitor C5 are connected in series and connected to the DDS-VIN signal, the signal DDS-V is output from the resistor R9 O , and through the differential operation formula DDS-V O = RC(dV I / dt) is obtained.

[0053] The power supply module includes a first power supply and a second power supply. The first power supply supplies power to the signal detection module and the signal processing module through a reset module, and the second power supply is used to supply power to the control module.

[0054] In this embodiment, the first power supply supplies power to the signal detection module and the signal processing module through the reset module. When the reset module controls based on the frequency monitoring result, the power supply of these two modules can be flexibly cut off or restored, effectively cooperating with the system to respond to frequency anomalies and enhancing the protection of circuits related to abnormal frequencies. The second power supply is specifically used to supply power to the control module, ensuring the independence and stability of the power supply of the control module, enabling it to operate continuously and stably, without being interfered by the power supply control of the first power supply and the reset module for other modules. Thus, it can reliably and precisely control the reset module according to the operating state of the signal processing module, ensuring the stable and efficient operation of the entire radio frequency power supply detection frequency anomaly automatic reset system.

[0055] Embodiment 2

[0056] As Figure 5 shown, in an embodiment of the present invention, a method for automatically resetting a radio frequency power supply detection frequency anomaly is applicable to the above radio frequency power supply detection frequency anomaly automatic reset system, and includes the following steps:

[0057] S1. The DDS signal output unit synthesizes and outputs a source signal to the radio frequency power supply, and the signal conversion unit converts the source signal into a square wave of a Fourier series;

[0058] S2. The signal processing module is used to analyze the output signal of the signal conversion unit. When the frequency exceeds the preset range, it is determined that the output signal is abnormal, and the DDS signal output unit is corrected. If the correction fails, the DDS signal output unit is turned off.

[0059] S3. The signal processing module outputs a frequency anomaly signal to the reset module, and the reset module turns off the power supply to the signal processing module and the DDS signal output unit.

[0060] S4. The signal processing module outputs a frequency anomaly signal to the control module, and the control module controls the reset module to resume power supply to the signal processing module and the DDS signal output unit.

[0061] When the RF power supply is working normally and is affected by external or internal interference, the frequency or phase deviation will exceed the designed range (the RF power supply frequency requirement is the main frequency ±5%). When the signal conversion unit detects that the frequency of the DDS signal output unit does not match the currently used frequency, the DDS signal output unit is immediately corrected for frequency. If the correction fails, the DDS signal output unit needs to be immediately turned off. After turning off the signal, the DDS signal output unit is powered off and reset. At this time, the signal processing module in the circuit detects the trigger of frequency anomaly, stops feeding back the normal signal to the reset module, and the reset module turns off the power supply to the signal processing module and the DDS signal output unit. When the control module finds that the communication with the signal processing module is abnormal, the MCU actively triggers the reset module. After triggering the watchdog circuit, the FPGA and the DDS signal output module can continue to work after the power supply is restored, so as to restart the RF power supply switch.

[0062] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, and improvements made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A radio frequency power supply detection frequency abnormality automatic reset system, characterized in that: include: A signal detection module, the signal detection module is used to detect the signal output to the radio frequency power supply; A signal processing module, the signal processing module is used to analyze the output signal of the signal detection module; A reset module, the reset module is used to control the power supply to the signal detection module and the signal processing module; A control module, the control module is communicatively connected with the signal processing module and the reset module, and the control module controls the reset module according to the operating state of the signal processing module; A power supply module, the power supply module is used to supply power to the signal detection module, the signal processing module and the control module, and the power supply module supplies power to the signal detection module and the signal processing module through the reset module.

2. According to the RF power supply detection frequency abnormality automatic reset system described in claim 1, it is characterized in that: The reset module includes a diode D1, the anode of the diode D1 is connected to the reset output terminal FPGA_RST of the signal processing module, and the cathode of the diode D1 is connected to the first end of the resistor R1 and the cathode of the diode D2. The reset output terminal MCU_RST of the control module is connected to the base of the switch transistor Q3, the emitter of the transistor Q3 is grounded, the collector of the transistor Q3 is connected to the second end of the resistor R8, the first end of the resistor R8 is connected to the power input VCC_IN, and the collector of the transistor Q3 is connected to the anode of the diode D2. The second end of the resistor R1, the first end of the capacitor C2 and the first end of the resistor R2 are connected to the base of the transistor Q2, the second end of the capacitor C2 and the second end of the resistor R2, and the emitter of the Q2 transistor are grounded, the collector of the Q2 transistor is connected to the first end of the resistor R3, the first end of the resistor R5, and the first end of the capacitor C3 as the output end, the second end of the capacitor C3 is grounded, the first end of the resistor R3 is connected to the first end of the resistor R4 and the power input VCC_IN, the second end of the resistor R5 is connected to the second end of the resistor R4 and the G pole of the PMOS tube Q1, the D pole of the PMOS tube Q1 is connected to the power input VCC_IN, the S pole of the PMOS tube Q1 is connected to the power output VCC_OUT, the first end of the capacitor C4, and the cathode of the diode TVS1, the second end of the capacitor C4 and the anode of the diode TVS1 are grounded, and the power output VCC_OUT is connected to the power supply end of the signal processing module and the power supply end of the signal acquisition module.

3. According to the RF power supply detection frequency abnormality automatic reset system described in claim 2, it is characterized in that: A first filtering circuit is arranged between the reset output terminal FPGA_RST of the signal processing module and the anode of the diode D1. The first filtering circuit includes a capacitor C1. The first end of the capacitor C1 is connected to the reset output terminal FPGA_RST of the signal processing module, the second end of the capacitor C1 is connected to the first end of the inductor L1 and the anode of the diode D1, and the second end of the inductor L1 is grounded.

4. According to the RF power supply detection frequency abnormality automatic reset system described in claim 2, it is characterized in that: A first voltage divider circuit is arranged between the reset output terminal MCU_RST of the control module and the base of the switching transistor Q3. The first voltage divider circuit includes a resistor R6. The first end of the resistor R6 is connected to the reset output terminal MCU_RST of the control module, the second end of the resistor R6 is connected to the first end of the resistor R7 and the base of the switching transistor Q3, and the second end of the resistor R7 is grounded.

5. According to the RF power supply detection frequency abnormality automatic reset system described in claim 2, it is characterized in that: A second filtering circuit and a voltage protection circuit are arranged between the S pole of the PMOS tube Q1 and the power output VCC_OUT. The second filtering circuit includes a capacitor C4, a first end of the capacitor C4 is connected to the S pole of the PMOS tube Q1, and a second end of the capacitor C4 is grounded. The voltage protection circuit includes a diode TVS1, a cathode of the diode TVS1 is connected to the S pole of the PMOS tube Q1, and an anode of the diode TVS1 is grounded.

6. According to the RF power supply detection frequency abnormality automatic reset system described in claim 1, it is characterized in that: The signal detection module includes a DDS signal output unit and a signal conversion unit. The DDS signal output unit is used to synthesize a source signal output to a radio frequency power supply, and the signal conversion unit is used to convert the source signal into a square wave of a Fourier series.

7. According to the RF power supply detection frequency abnormality automatic reset system described in claim 6, it is characterized in that: The signal conversion unit includes a capacitor C5, a first end of the capacitor C5 is connected to the DDS signal output unit, a second end of the capacitor C5 is connected to the first end of the resistor R9 and the third pin of the comparator U1, a second end of the resistor R9 is connected to the first end of the resistor R10 and ground, a second end of the resistor R10 is connected to the fourth pin of the comparator U1 and the first end of the resistor R11, a second end of the resistor R11 is connected to the first pin of the comparator U1, the first pin of the comparator U1 is connected to the I / O terminal of the signal processing module, the fifth pin of the comparator U1 is connected to the power output VCC_OUT, and the second pin of the comparator U1 is connected to the ground.

8. According to the RF power supply detection frequency abnormality automatic reset system described in claim 7, it is characterized in that: A third filter circuit is provided between the fifth pin of the comparator U1 and the power output VCC_OUT. The third filter circuit includes a capacitor C6. A first end of the capacitor C6 is connected to the power output VCC_OUT, and a second end of the capacitor C6 is grounded. A second voltage divider circuit is arranged between the first pin of the comparator U1 and the I / O terminal of the signal processing module. The second voltage divider circuit includes a resistor R12. The first end of the resistor R12 is connected to the first pin of the comparator U1, the second end of the resistor R12 is connected to the first end of the resistor R13 and the I / O terminal of the signal processing module, and the second end of the resistor R13 is grounded.

9. According to the RF power supply detection frequency abnormality automatic reset system described in claim 1, it is characterized in that: The power supply module includes a first power supply and a second power supply. The first power supply supplies power to the signal detection module and the signal processing module through the reset module, and the second power supply is used to supply power to the control module.

10. A method for automatically resetting a radio frequency power supply when detecting frequency abnormality, characterized in that: The system for automatically resetting the radio frequency power supply when detecting frequency abnormality according to any one of claims 1 to 9 comprises the following steps: S1, the DDS signal output unit synthesizes and outputs the source signal to the RF power supply, and the signal conversion unit converts the source signal into a square wave of Fourier series; S2, the signal processing module is used to analyze the output signal of the signal conversion unit. When the frequency exceeds the preset range, it is judged that the output signal is abnormal, and the DDS signal output unit is calibrated. If the calibration fails, the DDS signal output unit is turned off; S3, the signal processing module outputs a frequency abnormality signal to the reset module, and the reset module shuts off the power supply to the signal processing module and the DDS signal output unit; S4. The signal processing module outputs a frequency abnormality signal to the control module, and the control module controls the reset module to resume power supply to the signal processing module and the DDS signal output unit.

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