Reconfigurable element circuit parameter extraction and cascade prediction method

Through TRL algorithm and microwave network modeling technology, the precise equivalent circuit parameters of reconstructible circuit components are extracted, and the problem of difficult to remove parasitic effects in the prior art is solved, achieving efficient cascade prediction of circuit components.

CN120181007APending Publication Date: 2025-06-20YANGTZE DELTA REGION INST (QUZHOU) UNIV OF ELECTRONIC SCI & TECH OF CHINA
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Patent Information

Application Number
CN202510234556.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-02-28
Publication Date
2025-06-20

AI Technical Summary

Technical Problem

The prior art is less efficient when extracting equivalent circuit parameters of reconstructible circuit elements, and requires a strong dependence on the number of sampling points and accuracy of the test data, making it difficult to accurately remove parasitic effects caused by microstrip slits and floors.

Method used

The parts to be tested are designed and produced through the TRL algorithm, and the parasitic capacitance effect generated by the gap and the parasitic inductance effect generated by the floor are modeled using microwave networks and circuit theory, inverting the true equivalent circuit parameters of the parts to be tested, and providing a solution to quickly calculate the cascade of multi-circuit components.

Benefits of technology

The accurate extraction of equivalent circuit parameters of reconstructible circuit components is achieved, and the parasitic effects generated by microstrip clamps and floors are removed, thereby improving the accuracy and efficiency of cascade prediction of circuit components.

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Abstract

The invention discloses a reconfigurable patch circuit element parameter extraction and cascade prediction method, and the method specifically comprises the following steps: firstly, correspondingly designing different types of test pieces based on patch circuit element circuit parameter extraction based on a traditional Thruu-Reflect-Line method, namely a TRL algorithm, in the microwave measurement field; under the condition that a microstrip line is used as a clamp, a parasitic capacitance effect additionally brought by a gap of a microstrip line opening below a part welded with a circuit device and a parasitic inductance effect generated by a floor are innovatively considered, and a general circuit model is provided to further eliminate the parasitic effect which cannot be removed by a TRL algorithm. And according to the equivalent circuit models of different circuit elements, an effective inverse solution method is adopted to obtain circuit parameter values of the corresponding circuit elements. Finally, the invention provides a method for accurately predicting the cascade effect of multiple circuit elements by using the extracted circuit parameters. Therefore, an effective solution is provided for the design of subsequent large-scale reconfigurable microwave circuits and antenna arrays.
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Description

Technical Field

[0001] The present invention relates to the field of circuit element measurement, and particularly to a method for extracting circuit parameters and cascading prediction of reconfigurable elements. Background Art

[0002] Reconfigurability has recently become a hot area in microwave circuit and antenna research. By adding DC switches (PIN) and some corresponding lumped devices (inductors, capacitors) to traditional microwave structures, more functions can be achieved. For example, reconfigurable filters, reconfigurable antennas, reconfigurable metasurfaces, etc. The design of these microwave circuits and antennas often requires the use of full-wave simulation software, such as the commonly used commercial software HFSS, CST, FEKO. And a key problem caused by these applications is how to characterize the role played by reconfigurable circuit elements. In summary, studying the extraction of circuit parameters and cascading prediction of reconfigurable elements helps to shorten the process and cost of experimental debugging and iterative trial and error of subsequent large-scale reconfigurable microwave circuits and antennas, and improve the reliability of simulation verification.

[0003] In the prior art:

[0004] Chinese Patent (CN108470104A) discloses an equivalent circuit parameter modeling and calculation method for an impedance analyzer, which performs least squares fitting according to the impedance obtained by the impedance analyzer and the selected equivalent circuit model at different frequencies. This method needs to substitute different circuit models into the test data for fitting and judgment respectively, with low efficiency and strong dependence on the number of sampling points and accuracy of the test data.

[0005] Krishna Naishadham et al. proposed a closed-form solution for surface-mounted devices such as inductors and capacitors in 2002. It can avoid using optimization algorithms when obtaining the parameters corresponding to the equivalent circuit topologies of the inductors and capacitors to be measured, and successfully predicted the circuit parameters extracted for a low-pass filter designed based on capacitive elements. However, it uses the SOLT algorithm that requires more standard components and does not fully evaluate the parasitic effects brought by the test fixture to the circuit elements to be measured themselves.

[0006] Sanguk Lee et al. discussed how to eliminate the parasitic effects brought by the test board during the test of surface-mounted capacitive elements in 2024. However, it ignores the parasitic capacitance effects brought by microstrip line gaps, making its method have large errors when applied to inductance test extraction. Summary of the Invention

[0007] The objective of the present invention is to extract the equivalent circuit parameters of reconfigurable circuit components accurately and provide an accurate circuit cascading prediction scheme, so as to select appropriate microwave circuit components more quickly to achieve specified indicators and functions. This method first starts from the test board of circuit components, and uses microwave network and circuit theory to model the parasitic capacitance effect generated by the slot and the parasitic inductance effect generated by the ground plane through circuit means. Then, when measuring the device under test, after obtaining the S-parameters at both ends of the device under test using the TRL algorithm, the influence of the parasitic effect needs to be deducted before the true equivalent circuit parameters of the device under test can be deduced. Considering that in practical applications, it is often necessary to cascade multiple circuit components to achieve established indicators or functions, the present invention also provides a fast, effective and reliable scheme for calculating the cascading of multiple circuit components.

[0008] A method for extracting circuit parameters and cascading prediction of reconfigurable components, comprising the following steps:

[0009] Step 1: Design and manufacture the device under test, through-component, reflect-component, and delay-component according to the rules of the TRL algorithm;

[0010] Step 2: Convert the S-parameters obtained at both ends of the circuit device under test to ABCD parameters, and then represent the impedance Z, so as to inversely solve the parasitic capacitance caused by the microstrip line slot and the parasitic inductance caused by the ground loop that cannot be eliminated by the TRL algorithm; specifically, it can be expressed as:

[0011] For the S of the device under test obtained by the TRL algorithm in Step 1 21 , the relationship between the ABCD parameters and S 21 can be expressed as:

[0012]

[0013] At the same time, if the device under test is characterized by lumped parameters, and the ABCD matrix of the known lumped parameters is:

[0014]

[0015] Then the equivalent impedance of the device under test is obtained as:

[0016]

[0017] where Z0 is the characteristic impedance of the microstrip line; it is also possible to evaluate the impedance Z (Z pec ) of a section of microstrip line with a length equal to the size of the circuit device under test selected in the microstrip line fixture through (1.1)-(1.3). Further, according to the physical characteristics of the microstrip line, it can be equivalently regarded as an inductor. Therefore, the inductance L pec of this microstrip line can be expressed as:

[0018]

[0019] where ω is the frequency to be measured; the impedance Z (Z gap ) of the microstrip line with a slit length equal to that of the circuit element to be measured can be first evaluated through (1.1)-(1.3). Further, according to the physical characteristics of the slit, it can be equivalently regarded as a capacitor. Therefore, the slit capacitance C gap can be expressed as:

[0020]

[0021] In fact, if evaluating the equivalent impedance of the actual circuit element, in addition to using the TRL algorithm to remove the fixture, it is also necessary to go through (1.4)-(1.5) to eliminate the parasitic effect of the fixture. Finally, the equivalent impedance of the circuit element is:

[0022]

[0023] Step 3: Propose corresponding equivalent circuit topologies according to different reconfigurable elements and states (PIN on, PIN off, inductor, capacitor), and invert the specific parameters according to the actual test;

[0024] If the circuit element to be measured in Step 3 is a PIN diode and its switch state is on, according to the physical characteristics of the circuit element, it can be equivalently regarded as a resistor R po and an inductor L po in series. The equivalent impedance Z D (Z po ) of the diode when it is on can be obtained by the same process as in (1.1)-(1.6), and its parameters can be further characterized according to its circuit model as:

[0025]

[0026] If the circuit element to be measured in Step 3 is a PIN diode and its switch state is off, according to the physical characteristics of the circuit element, it can be equivalently regarded as a resistor R pc and a capacitor C pc in parallel. The equivalent impedance Z D (Z pc ) of the diode when it is on can be obtained by the same process as in (1.1)-(1.6), and its parameters can be further characterized according to its circuit model as:

[0027]

[0028] If the circuit element to be measured in step 3 is an inductor, considering the inevitable parasitic resistance and parasitic capacitance generated during the actual inductor manufacturing process, especially when it operates in the microwave frequency band, this parasitic effect cannot be ignored. It often resonates at a certain microwave frequency point. Therefore, inductor device manufacturers usually mark the SRF (self-resonant frequency) in the specifications to characterize the resonance of the circuit device at this frequency point. In summary, a physical inductor operating in the microwave frequency band is equivalent to a parallel combination of a resistor, an inductor, and a capacitor. And the equivalent impedance Z D (Z ind ) of the inductor can be obtained through the same process as in equations (1.1)-(1.6), and its parameters can be further characterized according to its circuit model as follows:

[0029]

[0030] where ω0 is the frequency point at which the inductor undergoes self-resonance, and BW ind represents the bandwidth when the normalized impedance curve drops by 3 dB.

[0031] If the circuit element to be measured in step 3 is a capacitor, considering the inevitable parasitic resistance and parasitic inductance generated during the actual capacitor manufacturing process, especially when it operates in the microwave frequency band, this parasitic effect cannot be ignored. It often resonates at a certain microwave frequency point. Therefore, capacitor device manufacturers usually mark the SRF (self-resonant frequency) in the specifications to characterize the resonance of the circuit device at this frequency point. In summary, a physical capacitor operating in the microwave frequency band is equivalent to a series combination of a resistor, an inductor, and a capacitor. And the equivalent impedance Z D (Z cap ) of the capacitor can be obtained through the same process as in equations (1.1)-(1.6), and its parameters can be further characterized according to its circuit model as follows:

[0032]

[0033] where ω0 is the frequency point at which the inductor undergoes self-resonance, and BW cap represents the bandwidth when the normalized impedance curve rises by 3 dB.

[0034] Step 4: The accurate reconfigurable component circuit parameters extracted in the above steps can be used to predict the overall performance achieved when multiple circuit devices are cascaded, and experimental verification can be carried out.

[0035] Considering that the circuit element packages extracted in the actual situation are all surface-mounted. They need to be soldered on the transmission line, and when operating in the microwave frequency band, the transmission line also has a non-negligible impact on the performance of the final cascading of multiple circuit elements. The transmission line is characterized by distributed parameters, and the known ABCD matrix of the distributed parameters is:

[0036]

[0037] where γ is the propagation constant of the transmission line, and l e is the effective length of the transmission line, and Z F is the characteristic impedance of the transmission line, and ch(yl) = (e γl + e -γl ) / 2, and sh(yl) = (e γl - e -γl ) / 2.

[0038] Then we can represent the cascaded two-port network of any reconfigurable element as:

[0039]

[0040] where N is the number of cascaded reconfigurable elements. Then we can further convert it into an S-parameter matrix through the ABCD matrix to plot the predicted S-parameter curve. The cascading strategy of the inductor can be designed according to the operating frequency band and the required performance indicators.

[0041] The advantages of the present invention are as follows:

[0042] 1. Based on the actual testing of the used reconfigurable circuit elements, and by removing the parasitic effects generated by the fixture itself and the fixture on the circuit elements to be tested, more accurate equivalent circuit parameters of the circuit elements to be tested are extracted.

[0043] 2. Based on the accurate extraction of the equivalent circuit parameters of the reconfigurable circuit elements, in order to meet the higher performance index requirements for the reconfigurable circuit elements, a scheme considering the cascading of multiple circuit elements is provided, and in order to improve the prediction accuracy, the influence of the transmission line between the circuit elements on the final result is considered. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Figure 1 is a flowchart of the extraction and cascading prediction of the circuit parameters of the reconfigurable element of the present invention;

[0045] Figure 2 is a schematic diagram of the TRL algorithm test fixture of the present invention;

[0046] Figure 3 is a curve of the equivalent resistance R calculated by the method of the present invention when the diode (BAR50-02L) is turned off;

[0047] Figure 4 is a curve of the equivalent capacitance C calculated by the method of the present invention when the diode (BAR50-02L) is turned off;

[0048] Figure 5 is a curve of the equivalent resistance R calculated by the method of the present invention when the diode (BAR50-02L) is turned on;

[0049] Figure 6 is the curve of the equivalent inductance L when the diode (BAR50-02L) conducts, calculated by the method of the present invention;

[0050] Figure 7 are the real and imaginary part impedance curves obtained by inverting three types of inductors, calculated by the method of the present invention;

[0051] Figure 8 is the impedance curve of the capacitor obtained when different voltages are fed, calculated by the method of the present invention;

[0052] Figure 9 is the schematic diagram of the inductor cascade of the present invention;

[0053] Figure 10 is to compare the effect of the inductor cascade calculated by the method of the present invention with the actual effect. Detailed implementation manners

[0054] The specific implementation manners of the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments.

[0055] Embodiment:

[0056] Figure 2 is the schematic diagram of the fixture designed according to the requirements of the TRL algorithm mentioned in step 1. Specifically, Figure 2 in (a) represents the device under test (Dut), Figure 2 in (b) represents the thru, Figure 2 in (c) represents the reflect (Ref), Figure 2 in (d) represents the delay.

[0057] First, a gap with the same size as the circuit element under test is opened in the middle of the microstrip line fixture, and the equivalent capacitance value is calculated by substituting into the formula in step 2. Then, a section of microstrip line with the same length as the circuit element under test is selected, and the equivalent inductance value is also calculated by substituting into the formula in step 2. After that, different formulas can be selected for inversion according to the different circuit elements under test. In Figure 3 shows the solution of the equivalent resistance R in the off state of the PIN diode (the specific model of the PIN diode under test is PIN50-02L) as the circuit element under test, Figure 4 shows the solution of the equivalent capacitance C in the off state of the same diode. Figure 5 shows the solution of the equivalent resistance R in the on state of the PIN diode, Figure 6 shows the solution of the equivalent inductance L in the on state of the PIN diode. Figure 7Shows the impedance curves obtained by inverting the inductors (the specific models of the inductors to be measured are VHF160808H39NJT, VHF160808H68NJT, and VHF160808H100NJT). Figure 8 Shows the impedance curves obtained by inverting the capacitor (the specific model of the capacitor to be measured is the BB910 variable capacitor launched by Shikues Company) when feeding different voltages.

[0058] Finally, in Figure 9 shows the schematic diagram of the cascading of the above three inductors (the cascading order is VHF160808H39NJT, VHF160808H68NJT, VHF160808H100NJT, and there is a 3-mm microstrip line between any two circuit elements as a pad) and Figure 10 shows the comparison between the actual effect generated by it and the result predicted by using the test value of a single inductor and through step 4. The prediction result and the experimental result are highly consistent, which also indicates that the extraction of circuit parameters of the reconfigurable element and the cascading prediction proposed by the present invention have obtained satisfactory results. Thus, it helps to shorten the process and cost of experimental debugging and iterative trial and error of subsequent large-scale reconfigurable microwave circuits and antennas, and improve the reliability of simulation verification.

[0059] Finally, it should be pointed out that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements for some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for extracting and predicting circuit parameters of reconfigurable components, characterized in that: The steps include: Step 1: Design and manufacture the DUT, through-component, reflective component, and time-delay component according to the Thru-Reflect-Line method, i.e., TRL algorithm rules; Step 2: Convert the extracted S parameter matrix at both ends of the circuit device under test into an ABCD parameter matrix and then calculate the equivalent impedance by lumped device assumption, so as to inversely solve the parasitic capacitance caused by the microstrip line gap and the parasitic inductance caused by the floor loop that cannot be eliminated by the TRL algorithm; Step 3: According to different reconfigurable components and states, namely: PIN on, PIN off, inductor, and capacitor; propose the corresponding equivalent circuit topology, and obtain its specific parameters based on actual test inversion; Step 4: The accurate reconfigurable component circuit parameters extracted in the above steps can be used to predict the overall effect achieved when multiple circuit devices are cascaded, and experimentally verified.

2. The reconfigurable component circuit parameter extraction and cascade prediction method according to claim 1, characterized in that: The step 2 converts the extracted S parameters at both ends of the circuit device to be tested into ABCD parameters to express the impedance Z, and proposes a method to evaluate the parasitic capacitance effect caused by the microstrip line gap and the parasitic inductance effect caused by the floor loop that cannot be eliminated by the TRL algorithm during the test; Specifically, it can be expressed as: In step 1, the S of the DUT is obtained by the TRL algorithm. 21 , we can express the relationship between ABCD parameters and S 21 The relationship is: At the same time, if the DUT is characterized by lumped parameters, and the ABCD matrix of the known lumped parameters is: So the equivalent impedance of the device under test is: Where Z0 is the characteristic impedance of the microstrip line; it can also be evaluated by (1.1)-(1.3) by selecting a microstrip line in the microstrip fixture whose length is equal to the size of the circuit element to be tested, that is, Z pec , we can further consider the microstrip line as an equivalent inductor according to its physical characteristics. Therefore, the inductance L of the microstrip line is pec It can be expressed as: Where ω is the frequency to be measured; the impedance Z with a gap length equal to the size of the circuit element to be measured in the microstrip line fixture can be evaluated by (1.1)-(1.3), that is, Z gap , we can further consider the gap as a capacitor based on its physical characteristics, so the gap capacitance C gap It can be expressed as: In fact, if we evaluate the equivalent impedance of actual circuit elements, in addition to using the TRL algorithm to remove the fixture, we also need to go through (1.4)-(1.5) to eliminate the parasitic effects of the fixture. The final equivalent impedance of the circuit element is:

3. The reconfigurable component circuit parameter extraction and cascade prediction method according to claim 1, characterized in that: In step 3, according to different reconfigurable elements and states, respectively, PIN on, PIN off, inductor, and capacitor, a corresponding equivalent circuit topology is proposed, and its specific parameters are obtained by inversion based on actual tests, which can be specifically expressed as: (301) If the circuit element to be tested is a PIN tube, and its switch state is on, according to the physical characteristics of the circuit element, it can be equivalent to a resistor R po and inductor L po Series connection; the equivalent impedance Z when the diode is turned on can be obtained by the same process of equations (1.1)-(1.6). D That is Z po , and further characterize its parameters according to its circuit model: (302) If the circuit element to be tested is a PIN tube and its switch state is off, according to the physical characteristics of the circuit element, it can be equivalent to a resistor R pc and inductor C pc Parallel connection; the equivalent impedance Z of the diode when it is turned on can be obtained by the same process of equations (1.1)-(1.6) D That is Z pc , and further characterize its parameters according to its circuit model: (303) If the circuit element to be tested is an inductor, it is considered that parasitic resistance and parasitic capacitance are inevitably generated during the actual inductor manufacturing process. Especially when it works in the microwave frequency band, this parasitic effect cannot be ignored. It often resonates at a certain frequency of the microwave. Therefore, inductor manufacturers usually mark SRF, i.e. self-resonant frequency, in the index to characterize that the circuit device resonates at this frequency. In summary, the actual inductor working in the microwave frequency band is equivalent to a resistor, inductor and capacitor in parallel. And the equivalent impedance Z of the inductor can be obtained by the same process of equations (1.1)-(1.6) D That is Z ind , and further characterize its parameters according to its circuit model: Among them, ω0 is the frequency point where the inductor self-resonates, BW ind Represents the bandwidth when the normalized impedance curve drops by 3dB; (304) If the circuit element to be tested is a capacitor, it is considered that parasitic resistance and parasitic inductance are inevitably generated during the actual capacitor manufacturing process. Especially when it works in the microwave frequency band, this parasitic effect cannot be ignored. It often resonates at a certain frequency point of the microwave. Therefore, capacitor component manufacturers usually mark SRF in the index to indicate that the circuit component resonates at this frequency point. In summary, the actual inductor working in the microwave frequency band is equivalent to a resistor, inductor and capacitor in series; and the equivalent impedance Z of the inductor can be obtained using the same process of equations (1.1)-(1.6) D That is Z cap , and further characterize its parameters according to its circuit model: Among them, ω0 is the frequency point where the inductor self-resonates, BW cap Represents the bandwidth when the normalized impedance curve rises by 3dB.

4. The reconfigurable component circuit parameter extraction and cascade prediction method according to claim 1, characterized in that: In step 4, the accurate reconfigurable component circuit parameters extracted in the above steps can be used to predict the overall effect achieved when multiple circuit devices are cascaded, and experimentally verified, which can be specifically expressed as: Considering the actual situation, the extracted circuit component packages are all surface mount. They need to be soldered on the transmission line. When working in the microwave frequency band, the transmission line also has a significant impact on the performance of the final multi-circuit component cascade. The transmission line is characterized by distributed parameters, and the ABCD matrix of known distributed parameters is: Where γ is the propagation constant of the transmission line, l e is the effective length of the transmission line, Z F is the characteristic impedance of the transmission line, ch(γl)=(e γl +and -γl ) / 2,sh(γl)=(e γl -and -γl ) / 2; Then the cascaded two-port network of any reconfigurable element can be expressed as: Where N is the number of cascaded reconfigurable elements, which can then be converted into an S parameter matrix through the ABCD matrix to draw a predicted S parameter curve; the cascade strategy of the inductor can be designed according to the operating frequency band and the required performance indicators.

Citation Information

Patent Citations

  • Equivalent circuit parameter modeling calculation method for impedance analyzers

    CN108470104A