Display driving device and method for operating display driving device
By designing a timing controller and a charge pump control unit in the display drive device, using the tear-proof signal to identify active and edge periods, and reducing the switching operation frequency during the edge period, the increase in power consumption caused by the reduction of the vertical synchronization signal frequency is solved, and more efficient energy use is achieved.
Patent Information
- Application Number
- CN202411392620.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-12-20
- Filing Date
- 2024-10-08
- Publication Date
- 2025-06-20
AI Technical Summary
In the display system, when the frequency of the vertical synchronization signal decreases, the edge period is extended, resulting in a wasted pump voltage output by the charge pump circuit and increasing power consumption.
A display drive device is designed, including a timing controller and a charge pump. The timing controller generates pumped clock signals and tear-proof signals for identifying active and edge periods. The charge pump control unit controls the operation of the switch based on the anti-tear signal, and adopts different modes during the active period and the edge period to reduce power consumption.
By reducing the switching operation frequency of the charge pump at the edge period, the power consumption of the quiescent current is significantly reduced and the energy efficiency performance of the display device is improved.
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Figure CN120183306A_ABST
Abstract
Description
Technical Field
[0001] The following description relates to a display driving device and method. Background Art
[0002] In the field of display systems (OLED, LCD, etc.), a technique of changing the refresh rate by adjusting the edge period has been used. The refresh rate can be changed by changing the frequency of the vertical synchronization signal (vertical synchronization, Vsync), and as the frequency of the vertical synchronization signal changes from 120 Hz, 60 Hz, 30 Hz... to 1 Hz, the edge period can be gradually extended.
[0003] When providing data from a source driver to a panel, it may be desirable for the driving voltage that can drive the source driver to have a higher voltage than the power supply voltage supplied by a battery inside the display device. Accordingly, the source driver may include a charge pump circuit that can output and provide a pump voltage corresponding to the driving voltage by pumping the power supply voltage supplied by the battery.
[0004] Since the source driver does not provide data to the panel during the edge period, the source driver does not require a high pump voltage. Thus, unlike the active period of the display device, the charge pump circuit does not need to output the same pump voltage as the pump voltage during the active period during the edge period. If the edge period is short, there is no difference in the power consumption of the display device even if the same pump voltage as the pump voltage during the active period is output; however, if the edge period is extended due to a decrease in the frequency of the vertical synchronization signal, there will be a problem of wasting the power of the display device when outputting the same pump voltage as the pump voltage during the active period.
[0005] The above information is presented only as background information to help understand the present disclosure. It is not determined and no assertion is made as to whether any of the above can be applicable as prior art with respect to the present disclosure. Summary of the Invention
[0006] The present summary is provided to introduce a series of concepts in a simplified form that will be further described in the detailed description below. The present summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.
[0007] In one general aspect, a display driving device includes: a timing controller configured to generate a pumping clock signal and an anti-tearing signal that identifies an active period and an edge period based on a vertical synchronization signal; and a charge pump configured to output a pump voltage for driving a source driver. The charge pump includes: a flying capacitor; a first switch disposed between one end of the flying capacitor and a first terminal connected to a first external voltage; a second switch disposed between the one end of the flying capacitor and a second terminal that outputs a first output voltage; a third switch disposed between the other end of the flying capacitor and a third terminal connected to a second external voltage; a fourth switch disposed between the other end of the flying capacitor and a fourth terminal that outputs a second output voltage; and a charge pump control unit configured to control turning on or off of the first to fourth switches based on the anti-tearing signal, and control the first to fourth switches to operate in a first mode or a second mode based on the anti-tearing signal. The second mode is configured to reduce power consumption compared to the first mode.
[0008] During the active period, the timing controller may provide image data to the source driver. During the edge period, the timing controller may not provide image data to the source driver.
[0009] The timing controller generates an anti-tearing signal at a deactivated signal level during the active period, and generates an anti-tearing signal at an activated signal level during the edge period.
[0010] The charge pump control unit may be configured to operate in the first mode during the active period and in the second mode during the edge period based on the anti-tearing signal.
[0011] In the second mode, the charge pump control unit may be configured to control the frequency of the pumping clock signal, which is configured to turn on or off the first to fourth switches.
[0012] The display driving device may further include a pump voltage comparison unit configured to compare the pump voltage with a predetermined detection voltage, and output a high-level comparison voltage when the amplitude of the pump voltage is less than the amplitude of the detection voltage. The charge pump control unit may be configured to control the first to fourth switches to operate in the first mode or the second mode based on the comparison voltage.
[0013] The charge pump control unit may be configured to control the frequency of the pumping clock signal, which is configured to turn on or off the first to fourth switches in the second mode during a period when the comparison voltage is at a high level.
[0014] In another general aspect, a display driving device includes: a timing controller configured to generate a pumping clock signal and an anti-tearing signal that identifies an active period and an edge period based on a vertical synchronization signal; and a charge pump configured to output a pump voltage for driving a source driver. The charge pump includes: a flying capacitor; a first switch stage including at least one switch disposed between one end of the flying capacitor and a first terminal connected to a first external voltage and connected in parallel therewith; a second switch stage including at least one switch disposed between the one end of the flying capacitor and a second terminal that outputs a first output voltage and connected in parallel therewith; a third switch stage including at least one switch disposed between the other end of the flying capacitor and a third terminal connected to a second external voltage and connected in parallel therewith; a fourth switch stage including at least one switch disposed between the other end of the flying capacitor and a fourth terminal that outputs a second output voltage and connected in parallel therewith; and a charge pump control unit configured to control the turning on or off of the first to fourth switch stages based on the anti-tearing signal to operate in a first mode or a second mode. The second mode is configured to reduce power consumption compared to the first mode.
[0015] During the active period, the timing controller may provide image data to the source driver, and during the edge period, the timing controller may not provide image data to the source driver.
[0016] The timing controller generates an anti-tearing signal at a deactivated signal level during the active period and an anti-tearing signal at an activated signal level during the edge period.
[0017] The charge pump control unit may be configured to operate in the first mode during the active period and in the second mode during the edge period based on the anti-tearing signal.
[0018] In the second mode, the charge pump control unit may be configured to control only some of the switches of the first to fourth switch stages to turn on or off, and control the remaining switches of the first to fourth switch stages not to operate in an off state.
[0019] The display driving device may further include a pump voltage comparison unit configured to compare the pump voltage with a predetermined detection voltage, and when the amplitude of the pump voltage is less than the amplitude of the detection voltage, the pump voltage comparison unit outputs a comparison voltage at a high level. The charge pump control unit may be configured to control the first to fourth switch stages to operate in the first mode or the second mode based on the comparison voltage, and the second mode is configured to reduce power consumption compared to the first mode.
[0020] The charge pump control unit can be configured to control only some of the switches of the first to fourth switch stages to turn on or off by operating in a second mode during a period of a comparison voltage at a high level output, and control the remaining switches of the first to fourth switch stages not to operate in an off state.
[0021] In another general aspect, a method for operating a display driving device, the display driving device including a first switch stage, a second switch stage, a third switch stage, and a fourth switch stage, the first switch stage, the second switch stage, the third switch stage, and the fourth switch stage each including at least one or more switches connected in parallel with the switch stage to output a pump voltage. The method includes: generating an anti-tearing signal for identifying an active period and an edge period based on a vertical synchronization signal; generating a first control signal for controlling the first switch stage, a second control signal for controlling the second switch stage, a third control signal for controlling the third switch stage, and a fourth control signal for controlling the fourth switch stage based on the anti-tearing signal; and controlling the operation of a charge pump based on the first control signal, the second control signal, the third control signal, and the fourth control signal. Controlling the operation of the charge pump includes generating a control signal in a first mode or a second mode, and the second mode is configured to reduce power consumption compared to the first mode based on the anti-tearing signal.
[0022] Generating the control signal in the second mode may include generating a control signal having a frequency lower than the frequency of the control signal in the first mode.
[0023] Generating the control signal in the second mode may include: when the pump voltage is less than a predetermined detection voltage, outputting a comparison voltage at a high level; and generating a control signal having a frequency lower than the frequency of the control signal in the first mode based on the comparison voltage at a high level.
[0024] Generating the control signal in the second mode may include generating a control signal configured to control only some of the switches of the first to fourth switch stages to turn on or off, and control the remaining switches of the first to fourth switch stages not to operate in an off state.
[0025] Generating the control signal in the second mode may include when the amplitude of the pump voltage is less than the amplitude of a predetermined detection voltage, outputting a comparison voltage at a high level; and generating a control signal based on the comparison voltage at a high level, the control signal being configured to control only some of the switches of the first to fourth switch stages to turn on or off, and control the remaining switches of the first to fourth switch stages not to operate in an off state.
[0026] Generating the control signal in the second mode may include generating a control signal having the same frequency as the frequency of the control signal in the first mode.
[0027] Other features and aspects will be apparent from the following detailed description, the drawings, and the claims attached hereto. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] Figure 1 is a block diagram showing a display device according to an embodiment of the present disclosure.
[0029] Figure 2 is a block diagram showing a relevant part of a charge pump of a display device according to an embodiment of the present disclosure.
[0030] Figure 3A is a diagram showing a circuit of a charge pump according to the related art.
[0031] Figure 3B is a diagram showing a circuit of a charge pump according to an embodiment of the present disclosure.
[0032] Figure 3C is a diagram showing a circuit of a charge pump according to an embodiment of the present disclosure.
[0033] Figure 4 is a timing diagram for describing the operation of controlling a charge pump by modulating the frequency of a pumping clock signal at an edge period according to an embodiment of the present disclosure.
[0034] Figure 5 is a timing diagram describing a method of allowing only some switches of a charge pump to perform an on or off operation by controlling a control signal at an edge period according to an embodiment of the present disclosure.
[0035] Figure 6 is a diagram showing a circuit of a pump voltage comparison unit according to another embodiment of the present disclosure.
[0036] Figure 7 is a timing diagram for describing the operation of controlling a charge pump by modulating the frequency of a pumping clock signal based on a comparison voltage according to another embodiment of the present disclosure.
[0037] Figure 8 is a timing diagram describing a method of operating only some switches of a charge pump to turn on or off by controlling a pumping clock signal based on a comparison voltage according to another embodiment of the present disclosure.
[0038] Figure 9 is a diagram showing an example of providing a pump voltage by an external DC / DC converter according to another embodiment of the present disclosure.
[0039] Figure 10 is a timing diagram for operating an external DC / DC converter in a low voltage mode at an edge period according to another embodiment of the present disclosure.
[0040] Throughout the drawings and the detailed description, unless otherwise specified, the same reference numerals refer to the same elements. The drawings may not be drawn to scale, and for clarity, illustration, and convenience, the relative sizes, proportions, and depictions of elements in the drawings may be exaggerated. Detailed Description
[0041] In the following, although examples of the present disclosure will be described in detail with reference to the drawings, note that the examples are not limited to the examples of the present disclosure.
[0042] The following detailed description is provided to assist the reader in obtaining a comprehensive understanding of the methods, apparatuses, and / or systems described herein. However, various changes, modifications, and equivalents of the methods, apparatuses, and / or systems described herein will be apparent after understanding the present disclosure. For example, as will be apparent after understanding the present disclosure, the order of operations described herein is merely exemplary and is not limited to those set forth herein, but may be changed, except for operations that must occur in a certain order. Also, descriptions of features known in the art may be omitted for increased clarity and conciseness.
[0043] The features described herein may be embodied in different forms and should not be construed as limited to the examples described herein. Rather, the examples described herein have been provided only to illustrate some of the many possible ways of implementing the methods, apparatuses, and / or systems described herein, which will be apparent after understanding the present disclosure.
[0044] Throughout the specification, when an element such as a layer, region, or substrate is described as being "on," "connected to," or "coupled to" another element, the element may be directly "on," "connected to," or "coupled to" the other element, or there may be one or more other elements therebetween. In contrast, when an element is described as being "directly on," "directly connected to," or "directly coupled to" another element, there may be no other elements therebetween.
[0045] As used herein, the term "and / or" includes any one of the associated listed items and any combination of any two or more thereof; similarly, "at least one of" includes any one of the associated listed items and any combination of any two or more thereof.
[0046] Although terms such as "first", "second", and "third" may be used herein to describe various components, elements, regions, layers, or sections, these components, elements, regions, layers, or sections are not limited by these terms. Rather, these terms are only used to distinguish one component, element, region, layer, or section from another. Thus, a first component, element, region, layer, or section referred to in the examples described herein may also be termed a second component, element, region, layer, or section without departing from the teachings of this example.
[0047] For ease of description, spatially relative terms such as "above", "upper", "below", "lower", etc. may be used herein to describe the relationship of one element to another as shown in the figures. Such spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is flipped, an element described as "above" or "upper" relative to another element will then be "below", "lower" relative to the other element. Thus, the term "above" includes both the above and below orientations depending on the spatial orientation of the device. The device may also be oriented in other ways (rotated 90° or in other orientations), and the spatially relative terms used herein will be interpreted accordingly.
[0048] The terms used herein are only for the purpose of describing various examples and are not intended to limit the present disclosure. The articles "a", "an", and "the" are also intended to include the plural forms unless the context clearly dictates otherwise. The terms "comprising", "including", and "having" specify the presence of the stated features, numbers, operations, components, elements, and / or combinations thereof, but do not preclude the presence or addition of one or more other features, numbers, operations, components, elements, and / or combinations thereof.
[0049] Shape variations may occur due to manufacturing techniques and / or tolerances. Accordingly, the examples described herein are not limited to the specific shapes shown in the figures but include shape variations that occur during manufacturing.
[0050] It should be noted herein that, with respect to examples, such as what an example may include or implement, the use of the term "may" means that there is at least one example that includes or implements such a feature, while all examples are not limited thereto.
[0051] The features of the examples described herein may be combined in various ways, as will be apparent after understanding the present disclosure. Additionally, even though the examples described herein have various configurations, other configurations are possible, as will be apparent after understanding the present disclosure.
[0052] The terms "portion" or "module" used in the embodiments may refer to a software component or a hardware component, such as a field programmable gate array (FPGA) or an application specific integrated circuit (ASIC). The "portion" or "module" performs a determined function. However, the "portion" or "module" is not meant to be limited to software or hardware. The "portion" or "module" may be configured to be placed in an addressable storage medium or to restore one or more processors. Thus, for example, the "portion" or "module" may include components such as software components, object-oriented software components, class components, and task components, and may include procedures, functions, attributes, steps, subroutines, program code segments, drivers, firmware, microcode, circuits, data, databases, data structures, tables, arrays, and variables. The components and functions provided in the "portion" or "module" may be combined with a smaller number of components and "portions" or "modules", or may also be divided into additional components and "portions" or "modules".
[0053] Figure 1 is a block diagram showing a display device according to an embodiment of the present disclosure.
[0054] Referring to Figure 1 , the display device 10 may be a device capable of displaying an image or a video. The display device 10 may include a system interface 100, a panel 500, and a display driving device 1000.
[0055] According to an embodiment, the display driving device 1000 may include a timing controller 200, a source driver 300, a gate driver 400, and a voltage source output circuit 600.
[0056] According to an embodiment, the gate driver 400 may not be included in the display driving device 1000. If the gate driver 400 is not included in the display driving device 1000, the gate driver 400 may be used as a panel driver configured to drive sub-pixels provided in the panel 500.
[0057] According to an embodiment, the system interface 100 may receive an image signal from the outside. The system interface 100 may provide a plurality of control signals, such as an image signal RGB, a vertical synchronization signal VSYNC, a horizontal synchronization signal HSYNC, and a data enable signal DE, to the timing controller 200.
[0058] According to an embodiment, the timing controller 200 may receive the image signal RGB from the system interface 100, and generate image data DATA by processing or converting the image signal RGB to be adapted to the structure of the panel 500.
[0059] According to an embodiment, the timing controller 200 may receive a vertical synchronization signal VSYNC, a horizontal synchronization signal HSYNC, and a data enable signal DE from the system interface 100, and may provide image data DATA to the source driver based on the received signals. The timing controller 200 may provide the image data DATA to the source driver 300 in units of pixels.
[0060] According to an embodiment, the timing controller 200 may generate image data DATA embedded with a clock signal, and provide the image data DATA embedded with the clock signal to the source driver 300.
[0061] According to an embodiment, based on a plurality of control signals received from the system interface 100, the timing controller 200 may generate a source driver control signal SCS for controlling the source driver 300, and a gate driver control signal GCS for controlling the gate driver 400. The timing controller 200 may control various operation timings of the source driver 300 and the gate driver 400 based on the source driver control signal SCS and the gate driver control signal GCS.
[0062] According to an embodiment, the timing controller 200 may provide the image data DATA to the source driver 300 according to a pumping clock signal PCLK, regardless of the frequency of the vertical synchronization signal VSYNC. At this time, the pumping clock signal PCLK must have a frequency sufficient to simultaneously transmit all the image data DATA of one frame, even when the length of the frame is the shortest, that is, when the frequency of the vertical synchronization signal VSYNC is the highest. Even if the frequency of the vertical synchronization signal VSYNC changes, or the length of the frame changes, the timing controller 200 may provide the image data DATA to the source driver 300 according to the pumping clock signal PCLK by keeping the image data DATA constant.
[0063] According to an embodiment, the timing controller 200 may generate a tear prevention signal TE and a pumping clock signal PCLK. The tear prevention signal TE identifies an active period and an edge period based on the vertical synchronization signal VSYNC.
[0064] According to an embodiment, the timing controller 200 may generate a tear prevention signal TE, and the tear prevention signal TE is used to identify an active period during which image data DATA is provided to the source driver 300 and an edge period during which image data DATA is not provided to the source driver 300 of the display device 10. Here, the tear prevention signal TE is a control signal for preventing tearing or a tearing effect of the screen, and the tearing or the tearing effect of the screen is caused by a difference in transmission rate between the transmission rate at which the timing controller 200 provides the image data DATA to the source driver 300 and the transmission rate at which the source driver 300 provides the image data DATA to the pixels existing in the panel 500. The tear prevention signal TE may be any one of a plurality of control signals included in the source driver control signal SCS.
[0065] According to an embodiment, it is possible to set a time period between vertical synchronization signals VSYNC as a frame, and the length of the frame may be changed according to the frequency of the vertical synchronization signal VSYNC. The frame may be divided into an active period and an edge period. The active period may be defined as a period during which the timing controller 200 provides the image data DATA to the source driver 300, and the edge period may be defined as a pause period during which the timing controller 200 does not provide the image data DATA to the source driver 300. The image data DATA required to display one frame in the display device 10 may be provided during the active period. According to an embodiment, depending on the structure of the display device 10, the edge period may appear within a frame, in front of the active period, and behind the active period.
[0066] According to an embodiment, the timing controller 200 may generate a tear prevention signal TE such that when the frequency of the vertical synchronization signal VSYNC increases or decreases, the active period remains constant and the edge period decreases or increases.
[0067] According to an embodiment, the timing controller 200 may generate a tear prevention signal TE in response to the edge period, and the edge period increases as the frequency of the vertical synchronization signal VSYNC decreases.
[0068] According to an embodiment, the active period may represent a period of time consumed by the timing controller 200 when providing the image data DATA according to the pumping clock signal PCLK, regardless of the frequency change of the vertical synchronization signal VSYNC. Therefore, the length of the active period may be constant regardless of the frequency of the vertical synchronization signal VSYNC (the length of the frame). Even if the frequency of the vertical synchronization signal VSYNC becomes lower than the maximum frequency and the length of the frame is extended, the timing controller 200 may provide the image data DATA by keeping the active period constant, and may stop the transmission of the image data DATA by setting the edge period until the next vertical synchronization signal VSYNC is provided.
[0069] According to an embodiment, the timing controller 200 may generate an anti-tearing signal TE at a deactivation signal level (low level) during an active period of providing image data DATA to the source driver 300.
[0070] According to an embodiment, the timing controller 200 may generate an anti-tearing signal TE at an activation signal level (high level) during an edge period of not providing image data DATA to the source driver 300.
[0071] According to an embodiment, the timing controller 200 may provide the anti-tearing signal TE to the voltage source output circuit 600, and the voltage source output circuit 600 may control the operation of the charge pump 620 based on the anti-tearing signal TE. As described below, the charge pump control unit 610 included in the voltage source output circuit 600 may identify an active period and an edge period based on the anti-tearing signal TE, and may control the switching operation of the charge pump 620.
[0072] According to an embodiment, the source driver 300 may receive image data DATA in units of pixels in response to a source driver control signal SCS, latch the image data for each row, and provide the latched image data to the panel 500.
[0073] According to an embodiment, the source driver 300 may convert a digital signal of the image data DATA into an analog signal in response to a source driver control signal SCS, and provide the converted image data to a plurality of source lines (SL1 to SLn).
[0074] According to an embodiment, the gate driver 400 may sequentially provide gate-on signals to a plurality of gate lines (GL1 to GLm) in response to a gate driver control signal GCS.
[0075] According to an embodiment, the panel 500 may include a plurality of gate lines (GL1 to GLm) arranged in rows, a plurality of source lines (SL1 to SLn) arranged in columns, and sub-pixels formed at intersections of the plurality of gate lines (GL1 to GLm) and the plurality of source lines (SL1 to SLn). Based on a vertical synchronization signal VSYNC and a horizontal synchronization signal HSYNC, the image data latched by the source driver 300 for each row may be sequentially provided to the panel 500, and the sub-pixels may be driven.
[0076] Figure 2 is a block diagram showing a relevant part of a charge pump of a display device according to an embodiment of the present disclosure.
[0077] Refer to Figure 2, according to an embodiment, when the amplitude of the voltage desired for driving various components inside the source driver 300 and the gate driver 400 or the amplitude of the voltage desired for driving the panel 500 is higher than the amplitude of the supply voltage VLIN, the voltage source output circuit 600 may pump the supply voltage VLIN and output a pumped voltage VLOUT.
[0078] According to an embodiment, the voltage source output circuit 600 may include a charge pump 620 configured to output a pumped voltage VLOUT desired for driving the source driver 300 and the gate driver 400, and a charge pump control unit 610 configured to control the operation of the charge pump 620.
[0079] According to an embodiment, the charge pump control unit 610 may receive a pumping clock signal PCLK from the timing controller 200. The pumping clock signal PCLK provided to the charge pump control unit 610 may be provided to the charge pump 620 to be used as a control signal.
[0080] According to an embodiment, the charge pump control unit 610 may receive a tear-free signal TE from the timing controller 200. The charge pump control unit 610 may generate at least one or more control signals (SW1 to SW4) based on the tear-free signal TE. The charge pump control unit 610 may control the operation of the charge pump 620 based on the at least one or more control signals (SW1 to SW4).
[0081] According to an embodiment, the charge pump control unit 610 may control the charge pump 620 to operate in a first mode or in a second mode, the second mode being configured to reduce power consumption compared to the first mode based on the tear-free signal TE.
[0082] According to an embodiment, the charge pump control unit 610 may control the switching operation of the charge pump 620 in the first mode during an active period and the switching operation of the charge pump 620 in the second mode during an edge period based on the tear-free signal TE. In addition, as described below, the charge pump control unit 610 may control the switching operation of the charge pump 620 in the first mode during a period when a comparison voltage output from the pump voltage comparison unit 630 is low, and may control the switching operation of the charge pump 620 in the second mode during a period when the comparison voltage is high.
[0083] According to an embodiment, based on the tear-free signal TE, the charge pump control unit 610 may identify an active period and an edge period, and control the charge pump 620 to perform a switching operation at the edge period, the switching operation reducing power consumption compared to the power consumption during the active period.
[0084] According to an embodiment, the charge pump control unit 610 may generate first to fourth control signals (SW1 to SW4) configured to control the switching operations of first to fourth switches of the charge pump 620 based on the anti-tearing signal TE to decelerate in the second mode during the edge period.
[0085] According to an embodiment, the charge pump control unit 610 may control only some of at least one or more switches to turn on or off in the second mode during the edge period based on the anti-tearing signal TE, where each of the at least one or more switches is connected in parallel and forms a switch stage of the first to fourth switch stages of the charge pump 620. The charge pump control unit 610 may control the remaining switches not to operate in the off state.
[0086] According to an embodiment, the charge pump 620 may perform a switching operation based on the first to fourth control signals (SW1 to SW4), and may pump the input supply voltage VLIN and output it as the pump voltage VLOUT.
[0087] Hereinafter, reference will be made to Figures 3A to 3C describe the detailed structure of the charge pump 620.
[0088] Figures 3A to 3C The switch or switch stage of may be configured as a metal oxide semiconductor field effect transistor (MOSFET); however, the present disclosure is not limited thereto. In addition, the switch or switch stage configured as a MOSFET may be turned on or off by receiving the first to fourth control signals through the gate terminal.
[0089] Figure 3A is a diagram showing a circuit of a charge pump according to the related art.
[0090] Referring to Figure 3A , the charge pump 620a according to the related art may be configured with a flying capacitor Cf, a first switch TR1 provided between one end of the flying capacitor Cf and a first terminal N1 connected to a first external voltage, a second switch TR2 provided between this one end of the flying capacitor Cf and a second terminal N2 outputting a first output voltage, a third switch TR3 provided between the other end of the flying capacitor Cf and a third terminal N3 connected to a second external voltage, and a fourth switch TR4 provided between this other end of the flying capacitor Cf and a fourth terminal N4 outputting a second output voltage. The first to fourth switches (TR1 to TR4) may be turned off or on by the first to fourth control signals (SW1 to SW4).
[0091] The first control signal and the third control signal (SW1 and SW3) may be the first pumping clock signal PCLK1, and the second control signal and the fourth control signal (SW2 and SW4) may be the second pumping clock signal PCLK2.
[0092] According to the related art, the charge pump 620a performs a switching operation through the first pumping clock signal and the second pumping clock signal (PCKL1 and PCLK2) having a constant frequency, regardless of the difference between the active period and the edge period; thus, even at the edge period, many problems regarding high power consumption occur due to the static current.
[0093] Figure 3B FIG. is a diagram showing a circuit of a charge pump according to an embodiment of the present disclosure.
[0094] Refer to Figure 3B , the charge pump 620b according to the present disclosure may be configured with a flying capacitor Cf, a first switch TR1 provided between one end of the flying capacitor Cf and a first terminal N1 connected to a first external voltage, a second switch TR2 provided between this one end of the flying capacitor Cf and a second terminal N2 for outputting a first output voltage, a third switch TR3 provided between the other end of the flying capacitor Cf and a third terminal N3 connected to a second external voltage, and a fourth switch TR4 provided between this other end of the flying capacitor Cf and a fourth terminal N4 for outputting a second output voltage.
[0095] According to an embodiment of the present disclosure, the charge pump 620b may be configured with one charge pump 620b, or may be configured with a plurality of charge pumps 620b, and may be arranged in a cascade structure configured to input the output voltage of any one charge pump 620b as the supply voltage of another charge pump 620b.
[0096] For example, the first external voltage may be a supply voltage, the second external voltage may be a ground voltage, and if the second output voltage is configured with one charge pump 620b, the second output voltage may be a pump voltage; or if the second output voltage is configured with a plurality of charge pumps 620b in a cascade structure, the second output voltage may be the supply voltage of any other charge pump 620b, but is not limited thereto.
[0097] The first switch to the fourth switch (TR1 to TR4) may be turned on or off through the first control signal to the fourth control signal (SW1 to SW4). The first control signal and the third control signal (SW1 and SW3) may be the first pumping clock signal PCLK1, and the second control signal and the fourth control signal (SW2 and SW4) may be the second pumping clock signal PCLK2.
[0098] According to an embodiment, the first pumping clock signal and the second pumping clock signal (PCLK1 and PCLK2) may be inverted relative to each other. If the first pumping clock signal and the second pumping clock signal (PCLK1 and PCLK2) are inverted relative to each other, all of the first switch to the fourth switch (TR1 to TR4) may be n-type MOSFETs or p-type MOSFETs.
[0099] According to an embodiment, the first pumping clock signal and the second pumping clock signal (PCLK1 and PCLK2) may be the same signal. In the case where the first pumping clock signal and the second pumping clock signal (PCLK1 and PCLK2) are the same signal, if the first switch and the third switch (TR1 and TR3) are n-type MOSFETs, the second switch and the fourth switch (TR2 and TR4) may be p-type MOSFETs. Alternatively, if the first switch and the third switch (TR1 and TR3) are p-type MOSFETs, the second switch and the fourth switch (TR2 and TR4) may be n-type MOSFETs.
[0100] According to an embodiment, during a pre-charge period, the first switch and the third switch (TR1 and TR3) perform an on-operation to be turned on by the first control signal and the third control signal (SW1 and SW3); the second switch and the fourth switch (TR2 and TR4) perform an off-operation to be turned off by the second control signal and the fourth control signal (SW2 and SW4), and charge corresponding to the supply voltage VLIN may be pre-charged in the flying capacitor Cf.
[0101] According to an embodiment, during a pumping period, the first switch and the third switch (TR1 and TR3) perform an off-operation to be turned off by the first control signal and the third control signal (SW1 and SW3); the second switch and the fourth switch (TR2 and TR4) perform an on-operation to be turned on by the second control signal and the fourth control signal (SW2 and SW4); the charge pre-charged in the flying capacitor Cf is discharged and combined with the second output voltage, and the pump voltage VLOUT may be output through the output terminal. Here, the second output voltage may be the supply voltage VLIN, or may be the pump voltage VLOUT output from another charge pump 620b.
[0102] According to the anti-tearing signal TE, according to the present disclosure, the charge pump 620b may perform a switching operation by the first pumping clock signal and the second pumping clock signal (PCLK1 and PCLK2) having a constant frequency during an active period, and may perform a switching operation by the first pumping clock signal and the second pumping clock signal (PCLK1 and PCLK2) whose frequencies have been modulated during an edge period. Therefore, according to the present disclosure, the charge pump 620b may reduce the power consumption caused by the static current during the edge period.
[0103] Figure 3C FIG. is a diagram showing a circuit of a charge pump according to an embodiment of the present disclosure.
[0104] Referring to Figure 3C , the charge pump 620c according to the embodiment may include a flying capacitor Cf, first to fourth terminals (N1 to N4), first to fourth switch stages (TR1<1> to TR1 <n>To TR4<1>~TR4 <n>), at least one or more switches in the first to fourth switch stages are respectively connected in parallel therewith, and the first to fourth switch stages (TR1<1> to TR1 <n>To TR4<1>~TR4 <n>) The switch can be based on the first to fourth control signals (SW1<1> to SW1 <n>To SW4<1> to SW4 <n>)Perform a turn-on or turn-off operation and can output a pump voltage.
[0105] More specifically, according to an embodiment, the first switch stage (TR1<1> to TR1 <n>) can be set between one end of the flying capacitor Cf and the first terminal N1 connected to the first external voltage, and can include at least one switch connected in parallel therewith.
[0106] The second switching stage (TR2<1> to TR2 <n>) may be disposed between this end of the flying capacitor Cf and the second terminal N2 that outputs the first output voltage, and may include at least one switch connected in parallel therewith.
[0107] The third switching stage (TR3<1> to TR3 <n>) may be disposed between the other end of the flying capacitor Cf and the third terminal N3 connected to the second external voltage, and may include at least one switch connected in parallel therewith.
[0108] The fourth switching stage (TR4<1> to TR4 <n>) can be disposed between the other end of the flying capacitor Cf and the fourth terminal N4 that outputs the second output voltage, and may include at least one switch connected in parallel therewith.
[0109] According to an embodiment, configured to control the first switch stage and the third switch stage (TR1<1> to TR1 <n>and TR3<1> to TR3 <n>) for the first control signal and the third control signal (SW1<1> to SW1 <n>and SW3<1> to SW3 <n>) can be the first pumping clock signal (PCLK1). It is configured to control the second and fourth switch stages (TR2<1> to TR2 <n>and TR4<1> to TR4 <n>) second control signal and fourth control signal (SW2<1> to SW2 <n>and SW4<1> to SW4 <n>) may be a second pumping clock signal (PCLK2).
[0110] The first pumping clock signal and the second pumping clock signal (PCLK1 and PCLK2) may be inverted relative to each other. If the first pumping clock signal and the second pumping clock signal (PCLK1 and PCLK2) are inverted relative to each other, then all of the first switch stage to the fourth switch stage (TR1<1> to TR1 <n>To TR4<1> to TR4 <n>) can be an n-type MOSFET or a p-type MOSFET.
[0111] The first pumping clock signal and the second pumping clock signal (PCLK1 and PCLK2) can be the same signal. In the case where the first pumping clock signal and the second pumping clock signal (PCLK1 and PCLK2) are the same signal, if the first switch stage and the third switch stage (TR1<1>~TR1 <n>and TR3<1> to TR3 <n>) is an n-type MOSFET, then the second switching stage and the fourth switching stage (TR2<1> to TR2 <n>and TR4<1> to TR4 <n>) can be a p-type MOSFET. Alternatively, if the first switching stage and the third switching stage (TR1<1> to TR1 <n>and TR3<1> to TR3 <n>) is a p-type MOSFET, then the second switching stage and the fourth switching stage (TR2<1> to TR2 <n>and TR4<1> to TR4 <n>) can be an n-type MOSFET.
[0112] According to an embodiment, during a pre-charge period, the first switch stage and the third switch stage (TR1<1> to TR1 <n>and TR3<1> to TR3 <n>)Via the first control signal and the third control signal (SW1<1> to SW1 <n>and SW3<1> to SW3 <n>)Execute a turn-on operation to be turned on, the second switch stage and the fourth switch stage (TR2<1> to TR2 <n>and TR4<1> to TR4 <n>)Via the second control signal and the fourth control signal (SW2<1> to SW2 <n>and SW4<1> to SW4 <n>)Performing a turn-off operation to be turned off, and a charge corresponding to the supply voltage VLIN can be pre-charged in the flying capacitor Cf.
[0113] According to an embodiment, during the pumping period, the first switch stage and the third switch stage (TR1<1> to TR1 <n>and TR3<1> to TR3 <n>)Via the first control signal and the third control signal (SW1<1> to SW1 <n>and SW3<1> to SW3 <n>)Execute a turn-off operation to be disconnected, the second switch stage and the fourth switch stage (TR2<1> to TR2 <n>and TR4<1> to TR4 <n>)Via the second control signal and the fourth control signal (SW2<1> to SW2 <n>and SW4<1> to SW4 <n>)When the turn-on operation is performed to be turned on, the charge pre-charged in the flying capacitor Cf is discharged and combined with the second output voltage, and the pump voltage VLOUT can be output through the output terminal. Here, the second output voltage can be the supply voltage VLIN, or can be the pump voltage VLOUT output from another charge pump 620c.
[0114] According to an embodiment, the charge pump control unit 610 can control the switches of the first switch stage to the fourth switch stage to operate in a first mode or a second mode, and the second mode is configured to reduce power consumption compared to the first mode. The first mode can be a mode in which the charge pump 620c operates during the active period, and the second mode can be a mode in which the charge pump 620c operates during the edge period.
[0115] According to an embodiment, based on the anti-tear signal TE, the charge pump control unit 610 can generate the first control signal to the fourth control signal (SW1<1> to SW1 <n>, SW2<1> to SW2 <n>, SW3<1> to SW3 <n>and SW4<1> to SW4 <n>), such that a plurality of switches (TR1<1> to TR1 <n>, TR2<1> to TR2 <n>, TR3<1> to TR3 <n>and TR4<1> to TR4 <n>) Only some of the switches in () perform turn-on or turn-off operations at the edge period. The charge pump control unit 610 can control only some of the switches in the charge pump 620c to perform turn-on or turn-off operations based on the first to fourth control signals, and control the remaining switches not to operate in the off state at the edge period.
[0116] According to an embodiment, the charge pump control unit 610 can control the first to fourth switch stages (TR1<1> to TR1 <n>, TR2<1> to TR2 <n>, TR3<1> to TR3 <n>and TR4<1> to TR4 <n>) The minimum number of switches required for operation in the switch of is operated at the edge period so that the pump voltage can have a voltage with a predetermined minimum amplitude that can be supplied to the source driver 300.
[0117] For example, if ten switches are connected in parallel to form the first switch stage to the fourth switch stage (TR1<1>~TR1<10>, TR2<1>~TR2<10>, TR3<1>~TR3<10>, and TR4<1>~TR4<10>), and only half of the switches in the multiple switches respectively connected in parallel to the first switch stage to the fourth switch stage are operated, it is sufficient to output a voltage with a predetermined minimum amplitude that can be supplied to the source driver 300 at the edge period. The charge pump control unit 610 can generate the first control signal to the fourth control signal, and these control signals only control half of the switches (TR1<1>~TR1<5>, TR2<1>~TR2<5>, TR3<1>~TR3<5>, and TR4<1>~TR4<5>) to perform the on or off operation, and the remaining half of the switches (TR1<6>~TR1<10>, TR2<6>~TR2<10>, TR3<6>~TR3<10>, and TR4<6>~TR4<10>) are not operated in the off state. With this configuration, it is feasible to reduce the power consumption of the static current by reducing the number of operating switches of the charge pump 620c at the edge period.
[0118] Figure 4 is a timing diagram for describing the operation of controlling a charge pump by modulating the frequency of a pumping clock signal at an edge period according to an embodiment of the present disclosure.
[0119] Refer to Figure 4 , according to an embodiment, the timing controller 200 can provide image data DATA to the source driver 300 at a predetermined time interval in response to a vertical synchronization signal VSYNC configured to generate vertical synchronization. Even if the frequency of the vertical synchronization signal VSYNC is changed, the timing controller 200 can provide the image data DATA to the source driver 300 at the same rate within a constant period. For example, when the vertical synchronization signal VSYNC is at the maximum frequency, the transmission rate of providing the image data DATA to the source driver 300 can be defined as the transmission rate of providing image data within a frame; however, the transmission rate is not limited thereto.
[0120] According to an embodiment, the timing controller 200 can set a constant period consumed when providing the image data DATA to the source driver 300 as an active period A, and can set the period from the time point after all the data is provided to the time point before responding to the vertical synchronization signal VSYNC for generating the next vertical synchronization as an edge period P.
[0121] According to an embodiment, the timing controller 200 may generate a tear prevention signal TE, which is configured to be converted to a deactivation signal level (low level) at the active period A to indicate that image data DATA is provided to the source driver 300; and is configured to be converted to an activation signal level (high level) at the edge period P to indicate that no image data DATA is provided to the source driver 300.
[0122] According to an embodiment, since the timing controller 200 must provide the image data DATA to the source driver 300 within a constant time period regardless of an increase or decrease in the vertical synchronization signal VSYNC frequency, the length of the active period A for providing the data may always be constant. On the other hand, since the time when the timing controller 200 responds to the next vertical synchronization signal VSYNC increases or decreases according to the frequency of the vertical synchronization signal VSYNC, the length of the edge period P may decrease or increase.
[0123] According to an embodiment, the charge pump control unit 610 may receive the tear prevention signal TE from the timing controller 200, and based on the tear prevention signal TE, the charge pump control unit 610 may generate first to fourth control signals (SW1 to SW4) by determining the active period A as a first mode and the edge period P as a second mode. The charge pump control unit 610 may control the switching operation of the charge pump 620 through the first to fourth control signals (SW1 to SW4).
[0124] Diagram (a) is related art, and in (a), the frequencies of the first to fourth control signals (SW1 to SW4) are constant without distinguishing between the active period A and the edge period P. Therefore, the switching operation of the charge pump 620 is performed in a constant manner without distinguishing between the active period A and the edge period P.
[0125] On the other hand, in the case of diagram (b), according to an embodiment of the present disclosure, the switching operation of the charge pump 620 may be decelerated at the edge period P by generating the following first to fourth control signals (SW1 to SW4): the frequencies of the first to fourth control signals (SW1 to SW4) in the second mode at the edge period P are lower than those in the first mode at the active period A. Therefore, the power consumption of the static current consumed by the charge pump 620 can be reduced in the second mode at the edge period P.
[0126] Figure 5 is a timing diagram illustrating a method of allowing only partial switching of a charge pump to perform an on or off operation by controlling a control signal at an edge period according to an embodiment of the present disclosure.
[0127] Refer to Figure 5 , as described by Figure 4 , according to an embodiment, the charge pump control unit 610 may receive an anti-tearing signal TE configured to identify an active period A and an edge period P.
[0128] In the case of FIG. (a), all the plurality of switches respectively connected in parallel to the first to fourth switch stages perform turn-on or turn-off operations without distinguishing between the active period A and the edge period P.
[0129] On the other hand, in the case of FIG. (b), according to an embodiment of the present disclosure, in the second mode during the edge period P, the charge pump control unit 610 may control only some of the plurality of switches respectively connected in parallel to the first to fourth switch stages to perform turn-on or turn-off operations based on the anti-tearing signal TE, and the remaining switches do not operate in the off state. Therefore, it is feasible to reduce the power consumption of the static current consumed by the charge pump 620 by reducing the number of operating switches of the charge pump 620 during the edge period P by means of the second mode.
[0130] Figure 6 FIG. is a diagram showing a circuit of a pump voltage comparison unit according to another embodiment of the present disclosure.
[0131] Refer to Figure 6 , according to another embodiment, the voltage source output circuit 600 may further include a pump voltage comparison unit 630.
[0132] According to another embodiment, the pump voltage comparison unit 630 may compare the pump voltage VLOUT with a predetermined detection voltage VREF. When the amplitude of the pump voltage VLOUT is smaller than the amplitude of the detection voltage VREF, the pump voltage comparison unit 630 may generate a high-level comparison voltage VCOMP. The value of the detection voltage VREF may be set differently according to the supply voltage VLIN, the pump voltage VLOUT, and the resistors (R1 and R2).
[0133] According to another embodiment, the comparison voltage VCOMP output from the pump voltage comparison unit 630 is provided to the charge pump control unit 610, and the charge pump control unit 610 may control the operation of the charge pump 620 based on the comparison voltage VCOMP.
[0134] Figure 7 FIG. is a timing diagram for describing the control of the operation of the charge pump by modulating the frequency of the pumping clock signal based on the comparison voltage according to another embodiment of the present disclosure.
[0135] Refer to Figure 7 , According to another embodiment, the amplitude of the pump voltage VLOUT output before or after the edge period P may be reduced. The reduction in the amplitude of the pump voltage VLOUT may be attributed to the reduction in the load current flowing in the load stage of the charge pump 620.
[0136] According to another embodiment, the pump voltage comparison unit 630 may compare the amplitude of the pump voltage VLOUT with the amplitude of a predetermined detection voltage VREF, and may output a high-level comparison voltage VCOMP when the amplitude of the pump voltage VLOUT is less than the amplitude of the detection voltage VREF. The pump voltage comparison unit 630 may provide the comparison voltage VCOMP to the charge pump control unit 610.
[0137] According to another embodiment, the charge pump control unit 610 may generate the first to fourth control signals by modulating the frequency of the pumping clock signal PCLK to a low level in the second mode during the period when the high-level comparison voltage VCOMP is output.
[0138] The description of controlling the charge pump control unit 610 in the second mode to reduce the frequency of the pumping clock signal PCLK to control the charge pump 620 is the same as the description provided with reference to Figure 4 and thus, its description will be omitted.
[0139] Figure 8 is a timing diagram describing a method for operating a charge pump by controlling a pumping clock signal based on a comparison voltage according to another embodiment of the present disclosure, where only some switches are turned on or off.
[0140] Refer to Figure 8 , as described by referring to Figure 7 According to another embodiment, the pump voltage comparison unit 630 may compare the amplitude of the pump voltage VLOUT with the amplitude of a predetermined detection voltage VREF, and may output a high-level comparison voltage VCOMP when the amplitude of the pump voltage VLOUT is less than the amplitude of the detection voltage VREF. The pump voltage comparison unit 630 may provide the comparison voltage VCOMP to the charge pump control unit 610.
[0141] According to another embodiment, during the period when the high-level comparison voltage VCOMP is output, the charge pump control unit 610 may control only some of the plurality of switches respectively connected in parallel to the first to fourth switch stages in the second mode to perform on or off operations, while the remaining switches do not operate in the off state. Therefore, by operating only some switches of the charge pump 620 in the second mode during the period when the high-level comparison voltage VCOMP is output, that is, during the period when the source driver does not require the high-voltage pump voltage VLOUT, the power consumption of the static current consumed by the charge pump 620 can be reduced.
[0142] Figure 9 FIG. is a diagram illustrating an example of providing a pump voltage through an external DC / DC converter according to another embodiment of the present disclosure. Figure 10 FIG. is a timing diagram for operating an external DC / DC converter in a low voltage mode during an edge period.
[0143] Referring Figure 9 and Figure 10 FIGS. and, a display driving device 1100 including a timing controller 200 and a source driver 300 may provide a control signal to an external DC / DC converter 2000. The control signal may include a clock signal and a mode selection signal, which is set by the external DC / DC converter 2000; however, the signals included are not limited thereto. Based on the control signal of the display driving device 1100, the external DC / DC converter 2000 may output a pump voltage VLOUT required to drive the display device.
[0144] A conventional external DC / DC converter 2000 may have been set to output the pump voltage VLOUT regardless of the period. However, according to an embodiment of the present disclosure, the external DC / DC converter 2000 may be operated in a normal mode only during an active period A to output the pump voltage VLOUT. In addition, the external DC / DC converter 2000 may be operated in a low power mode during an edge period P, thereby reducing power consumption.
[0145] According to various embodiments of the present disclosure, the display driving device 1100 may provide a control signal to the external DC / DC converter 2000 based on an anti-tearing signal TE, such that the external DC / DC converter 2000 can perform the above operations.
[0146] One or more embodiments of the present disclosure relate to a display driving device and a method thereof, and more particularly, to a display driving device and a method thereof capable of reducing power consumption of a static current by controlling a switching operation of a charge pump at an edge period.
[0147] According to one or more embodiments of the present disclosure, by identifying an active period and an edge period, and controlling a switching operation of a charge pump including a voltage source output circuit at the edge period, power consumption of a static current is reduced. At the active period, data is provided from the timing controller to the source driver in response to a vertical synchronization signal VSYNC, and at the edge period, provision of the data is blocked until the next vertical synchronization signal is responded to.
[0148] According to one or more embodiments of the present disclosure, it is possible to reduce power consumption of a static current by operating a switching operation of a charge pump including a voltage source output circuit at an edge period.
[0149] Although specific examples have been shown and described above, it will be apparent after understanding the present disclosure that various changes in form and detail may be made in these examples without departing from the spirit and scope of the claims and their equivalents. The examples described herein are considered to be illustrative only and not for purposes of limitation. The description of a feature or aspect in each example is considered to be applicable to similar features or aspects in other examples. Suitable results may be obtained if the described techniques are performed in a different order, and / or if the components in the described systems, structures, devices, or circuits are combined in a different manner, and / or if the components are replaced or supplemented by other components or their equivalents. Accordingly, the scope of the present disclosure is defined not by the specific embodiments but by the claims and their equivalents, and all variations within the scope of the claims and their equivalents should be construed as being included in the present disclosure.< / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n>
Claims
1. A display driving device, comprising: a timing controller configured to generate a pumping clock signal and an anti-tearing signal that identifies an active period and an edge period based on a vertical synchronization signal; as well as A charge pump configured to output a pump voltage for driving a source driver, the charge pump comprising: Flying capacitor; a first switch disposed between one end of the flying capacitor and a first terminal connected to a first external voltage; a second switch provided between the one end of the flying capacitor and a second terminal outputting the first output voltage; a third switch provided between the other end of the flying capacitor and a third terminal connected to a second external voltage; a fourth switch provided between the other end of the flying capacitor and a fourth terminal outputting a second output voltage; and a charge pump control unit configured to control the first to fourth switches to be turned on or off based on the anti-tear signal, and to control the first to fourth switches to operate in a first mode or a second mode based on the anti-tear signal, The second mode is configured to reduce power consumption compared to the first mode.
2. The display driving device according to claim 1, in, In the active period, the timing controller provides image data to the source driver, and In the edge period, the timing controller does not provide image data to the source driver.
3. The display driving device according to claim 1, in, The timing controller generates the anti-tearing signal at a deactivation signal level during the active period, and generates the anti-tearing signal at an activation signal level during the edge period.
4. The display driving device according to claim 1, in, The charge pump control unit is configured to operate in the first mode during the active period and in the second mode during the edge period based on the anti-tearing signal.
5. The display driving device according to claim 1, in, In the second mode, the charge pump control unit is configured to control a frequency of a pumping clock signal configured to turn on or off the first to fourth switches.
6. The display driving device according to claim 1, further comprising: a pump voltage comparison unit configured to compare the pump voltage with a predetermined detection voltage and output a high level comparison voltage when the magnitude of the pump voltage is smaller than the magnitude of the detection voltage, The charge pump control unit is configured to control the first to fourth switches to operate in the first mode or the second mode based on the comparison voltage.
7. The display driving device according to claim 6, in, The charge pump control unit is configured to control a frequency of the pumping clock signal configured to turn on or off the first to fourth switches in the second mode during a period in which the comparison voltage of a high level is output.
8. A display driving device, comprising: a timing controller configured to generate a pumping clock signal and an anti-tearing signal that identifies an active period and an edge period based on a vertical synchronization signal; as well as A charge pump configured to output a pump voltage for driving a source driver, the charge pump comprising: Flying capacitor; a first switching stage comprising at least one switch disposed between one end of the flying capacitor and a first terminal connected to a first external voltage and connected in parallel with the first switching stage; a second switching stage including at least one switch disposed between the one end of the flying capacitor and a second terminal outputting the first output voltage and connected in parallel with the second switching stage; a third switching stage comprising at least one switch disposed between the other end of the flying capacitor and a third terminal connected to a second external voltage and connected in parallel with the third switching stage; a fourth switching stage including at least one switch provided between the other end of the flying capacitor and a fourth terminal outputting a second output voltage and connected in parallel with the fourth switching stage; and a charge pump control unit configured to control the turning on or off of the first to fourth switching stages based on the anti-tear signal to operate in a first mode or a second mode, The second mode is configured to reduce power consumption compared to the first mode.
9. The display driving device according to claim 8, in, In the active period, the timing controller provides image data to the source driver, and In the edge period, the timing controller does not provide image data to the source driver.
10. The display driving device according to claim 8, in, The timing controller generates the anti-tearing signal at a deactivation signal level during the active period, and generates the anti-tearing signal at an activation signal level during the edge period.
11. The display driving device according to claim 8, in, The charge pump control unit is configured to operate in the first mode during the active period and in the second mode during the edge period based on the anti-tearing signal.
12. The display driving device according to claim 8, in, In the second mode, the charge pump control unit is configured to control only part of the switches of the first to fourth switching stages to be turned on or off, and to control the remaining switches of the first to fourth switching stages to not operate in the off state.
13. The display driving device according to claim 8, further comprising: a pump voltage comparison unit configured to compare the pump voltage with a predetermined detection voltage and output a high level comparison voltage when the magnitude of the pump voltage is smaller than the magnitude of the detection voltage, The charge pump control unit is configured to control the first to fourth switching stages to operate in the first mode or the second mode based on the comparison voltage, and the second mode is configured to reduce power consumption compared with the first mode.
14. The display driving device according to claim 13, in, The charge pump control unit is configured to control only part of the switches of the first switching stage to the fourth switching stage to be turned on or off and to control the remaining switches of the first switching stage to not operate in the off state by operating in the second mode during the period of outputting the comparison voltage of a high level.
15. A method for operating a display driving device, the display driving device comprising a first switching stage, a second switching stage, a third switching stage and a fourth switching stage, the first switching stage, the second switching stage, the third switching stage and the fourth switching stage respectively comprising at least one or more switches connected in parallel with the switching stage to output a pump voltage, the method comprising: generating an anti-tearing signal for identifying an active period and an edge period based on a vertical synchronization signal; generating a first control signal for controlling the first switch stage, a second control signal for controlling the second switch stage, a third control signal for controlling the third switch stage, and a fourth control signal for controlling the fourth switch stage based on the anti-tear signal; as well as controlling the operation of a charge pump based on the first control signal, the second control signal, the third control signal, and the fourth control signal, wherein controlling the operation of the charge pump comprises generating a control signal of a first mode or a second mode, and The second mode is configured to reduce power consumption compared to the first mode based on the anti-tearing signal.
16. The method according to claim 15, in, Generating the control signal of the second mode includes generating a control signal with a frequency lower than a frequency of the control signal of the first mode.
17. The method according to claim 15, in, Generating the control signal of the second mode includes: When the pump voltage is less than a predetermined detection voltage, outputting a high level comparison voltage; and Based on the high-level comparison voltage, a control signal having a frequency lower than that of the control signal of the first mode is generated.
18. The method according to claim 15, in, Generating the control signal of the second mode includes: A control signal is generated, wherein the control signal is configured to control only part of the switches of the first to fourth switch stages to be turned on or off, and to control the remaining switches of the switches of the first to fourth switch stages not to operate in an off state.
19. The method according to claim 15, in, Generating the control signal of the second mode includes: When the amplitude of the pump voltage is smaller than the amplitude of the predetermined detection voltage, outputting a high level comparison voltage; and A control signal is generated based on the high-level comparison voltage, and the control signal is configured to control only part of the switches of the first switching stage to the fourth switching stage to be turned on or off, and to control the remaining switches of the switches of the first switching stage to the fourth switching stage not to operate in an off state.
20. The method according to claim 18, in, Generating the control signal of the second mode includes: A control signal having the same frequency as that of the control signal of the first mode is generated.