Excessive electrical stress protection device and communication system

Abstract

The invention provides an excessive electrical stress protection device and a communication system. The core circuit receives signals through the communication signal end. The excessive electrical stress protection device comprises an impedance switching element and an excessive electrical stress protection element. The first end of the impedance switching element is coupled between the communication signal end and the switching element of the core circuit. The first end of the excessive electrical stress protection element is coupled to the second end of the impedance switching element. The second end of the excessive electrical stress protection element is coupled to a reference voltage. When in normal operation, the impedance switching element is operable to provide a high impedance to turn off. When the over-electrical stress discharge operation is performed, the impedance switching element provides a low impedance for conduction so as to discharge charges to a reference voltage through the over-electrical stress protection element.

Description

Technical Field

[0001] The present invention relates to a circuit protection technology, and more particularly to an electrical overstress (EOS) protection device and a communication system. Background Art

[0002] Electrical overstress (EOS) protection components are used to provide a shunt path for EOS (such as static electricity, surges, etc.) energy and prevent the internal circuits (core circuits) of integrated circuits from being damaged by EOS. The EOS protection components are usually configured between a signal line (the signal line between the connection port and the core circuit) and a reference voltage (such as the ground voltage GND).

[0003] However, there are some trade - offs in the design of common EOS protection components currently. For example, transient voltage suppressors (TVS) components may have a relatively low trigger voltage, but due to the characteristics of silicon materials, TVS components will introduce relatively large harmonic distortions. On the other hand, polymer ESD suppressor (PES) components are less likely to exhibit harmonic distortions in the GHz range, but may have a high trigger voltage (not conducive to EOS protection). Balancing electrical performance and EOS protection design is one of the many technical problems in this field.

[0004] It should be noted that the content of the "Background Art" section is used to help understand the present invention. Some (or all) of the content disclosed in the "Background Art" section may not be well - known prior art to those with ordinary knowledge in the technical field. The content disclosed in the "Background Art" section does not represent that the content was known to those with ordinary knowledge in the technical field before the filing of the present invention application. Summary of the Invention

[0005] The present invention provides an electrical overstress (EOS) protection device and a communication system to prevent core circuits from being damaged by EOS energy.

[0006] In an embodiment of the present invention, the above-mentioned over-electrical stress protection device is used to protect the core circuit. The core circuit receives signals through the communication signal terminal. The over-electrical stress protection device includes an impedance switching element and an over-electrical stress protection element. The impedance switching element includes a first end and a second end. The first end of the impedance switching element is coupled to the core circuit. The over-electrical stress protection element includes a first end and a second end. The first end of the over-electrical stress protection element is coupled to the second end of the impedance switching element. The second end of the over-electrical stress protection element is coupled to the reference voltage. When operating normally, the impedance switching element controllably provides a high impedance to turn off. When performing over-electrical stress discharge operation, the impedance switching element provides a low impedance to turn on, so as to discharge charges to the reference voltage through the over-electrical stress protection element.

[0007] In an embodiment of the present invention, the above-mentioned communication system includes a communication signal terminal, a core circuit, an impedance switching element, and an over-electrical stress protection element. The core circuit includes a switching element and a communication signal discharge element. The first end of the switching element is coupled to the communication signal terminal. The communication signal discharge element is connected across the second end of the switching element and the reference voltage. The impedance switching element includes a first end and a second end. The first end of the impedance switching element is coupled to the communication signal terminal. The over-electrical stress protection element is coupled between the second end of the impedance switching element and the reference voltage. The over-electrical stress protection element has a noise greater than -70 dBm in the frequency range of 10 KHz to 10 GHz. When operating normally, the communication signal discharge element controllably conducts to conduct the communication signal to the reference voltage. When performing over-electrical stress discharge operation, the impedance switching element provides a low impedance to conduct, so as to discharge charges to the reference voltage through the over-electrical stress protection element.

[0008] To make the above features and advantages of the present invention more obvious and understandable, specific embodiments are given below and described in detail in conjunction with the accompanying drawings as follows. Description of the Drawings

[0009] Figure 1 is a radio frequency system with a protection device.

[0010] Figure 2 is a schematic diagram of a circuit block of a communication system according to an embodiment of the present invention.

[0011] Figure 3 is a schematic diagram of a circuit block of a communication system according to another embodiment of the present invention.

[0012] Figure 4 is a schematic diagram of a circuit block of a communication system according to still another embodiment of the present invention.

[0013] Figure 5 It is shown according to an embodiment of the present invention, which is a schematic diagram of a circuit module of a core circuit, an impedance switching element, and an over-electrical stress (EOS) protection element.

[0014] Figure 6 It is shown according to another embodiment of the present invention, which is a schematic diagram of a circuit module of a core circuit.

[0015] Figure 7 It is shown according to an embodiment of the present invention, which is a schematic diagram of a circuit module of an impedance switching element.

[0016] Figure 8 It is shown according to another embodiment of the present invention, which is a schematic diagram of a circuit module of an impedance switching element.

[0017] Figure 9 It is shown according to still another embodiment of the present invention, which is a schematic diagram of a circuit module of an impedance switching element.

[0018] Symbol description:

[0019] 100: Radio frequency system

[0020] 110: Integrated circuit

[0021] 120: Over-electrical stress (EOS) protection element

[0022] 200, 300, 400: Communication system

[0023] 210: Core chip

[0024] 211: Core circuit

[0025] 220: EOS protection device

[0026] 221: Impedance switching element

[0027] 222: EOS protection element

[0028] 510, 710: Impedance switch circuit

[0029] 520: Switch driver

[0030] 530, 630, 730: EOS detection circuit

[0031] C61: Capacitor

[0032] Mn5_1, Mn5_m, Mn7_1, Mn7_m: Transistor

[0033] P11, P21: Communication signal terminal

[0034] R61: Resistor

[0035] Rb5_1, Rb5_m, Rg5_1, Rg5_m: Resistors

[0036] RF31, RF32: Paths

[0037] Sc21: Control Signal

[0038] ST21: Input Terminal

[0039] SW31, SW32: Switching Elements

[0040] SW33, SW34: Communication Signal Discharge Elements

[0041] Vref11, Vref21: Reference Voltages

[0042] W11, W21: Signal Lines Detailed Implementation Manner

[0043] In the full text of the specification of this case (including the scope of the patent application), the term "coupled (or connected)" can refer to any direct or indirect connection means. For example, if it is described in the text that the first device is coupled (or connected) to the second device, it should be interpreted that the first device can be directly connected to the second device, or the first device can be indirectly connected to the second device through other devices or certain connection means. The terms "first", "second", etc. mentioned in the full text of the specification of this case (including the scope of the patent application) are used to name elements, or to distinguish different embodiments or scopes, rather than to limit the upper or lower limits of the number of elements, nor to limit the order of the elements. Additionally, wherever possible, elements / components / steps with the same reference numerals in the drawings and embodiments represent the same or similar parts. Elements / components / steps with the same reference numerals or the same terms used in different embodiments can be referred to each other's relevant descriptions.

[0044] Figure 1It is a radio frequency (RF) system 100 with a protection device. The RF system 100 includes a communication signal terminal P11, an integrated circuit 110, and an Electrical Overstress (EOS) protection component 120 arranged on a printed circuit board (PCB). A signal line W11 is connected between the communication signal terminal P11 and the integrated circuit 110. The EOS protection component 120 is coupled between the signal line W11 and a reference voltage Vref11 (such as a ground voltage). The EOS protection component 120 is triggered by an EOS event (such as an electrostatic discharge event, ESD event). When the EOS protection component 120 is triggered, the EOS protection component 120 provides a low-impedance path between the signal line W11 and the reference voltage Vref11 to prevent the EOS energy from damaging the core circuit of the integrated circuit 110. However, the EOS protection component 120 may introduce relatively large harmonic distortion.

[0045] Figure 2 It is a schematic diagram of a circuit block of a communication system 200 according to an embodiment of the present invention. The communication system 200 includes a communication signal terminal P21, a core circuit 211, and an Electrical Overstress (EOS) protection device 220. The core circuit 211 is coupled to the communication signal terminal P21 through the input terminal ST21 of the core chip 210 and the signal line W21 to transmit / receive signals. Based on practical applications, the communication signal terminal P21 can be coupled to an antenna (not shown), and the core circuit 211 receives signals from the antenna through the communication signal terminal P21. In one embodiment, the signal of the communication signal terminal P21 can be a signal compliant with the Data-Over-Cable Service Interface Specifications (DOCSIS) or other signals. In one embodiment, the core circuit 211 can be a radio frequency switch circuit. The core circuit 211 may include a switching element and a communication signal venting element (the switching element and the communication signal venting element are not shown in Figure 1 , which will be illustrated later in Figure 5 and Figure 6 ). The first end of the switching element of the core circuit 211 is coupled to the input terminal ST21 of the core chip 210. The communication signal venting element of the core circuit 211 is connected across the second end of the switching element and the reference voltage (such as a ground voltage).

[0046] The EOS protection device 220 is used to protect the core circuit 211. The EOS protection device 220 is controlled by the control signal Sc21 and provides a variable impedance path coupled between the signal line W21 and the reference voltage Vref21 (such as the ground voltage). The EOS protection device 220 includes two operating states: normal operation and EOS discharge operation. In normal operation, according to the control signal Sc21, the EOS protection device 220 is in a "high impedance" state to prevent the signal from leaking to the reference voltage Vref21 through the EOS protection device 220 when the signal is transmitted / received on the signal line W21. On the other hand, harmonic distortion is isolated by providing a high impedance path between the signal line W21 and the harmonic-rich protection device (such as the EOS protection element 222) of the EOS protection device 220. In the EOS discharge operation, the EOS protection device 220 is in a "low impedance" state and provides a low impedance path to divert the EOS energy from the communication signal terminal P21 to the reference voltage Vref21. Therefore, the EOS protection device 220 not only prevents the EOS event from damaging the core circuit 211 but also avoids harmonic distortions of the operating signal of the signal line W21.

[0047] The EOS protection device 220 includes an impedance switching element 221 and an EOS protection element 222. The first end of the impedance switching element 221 is coupled to the communication signal terminal P21. The first end of the EOS protection element 222 is coupled to the second end of the impedance switching element 221. The second end of the EOS protection element is coupled to the reference voltage Vref21. In one embodiment, when the EOS protection device 220 is in the "high impedance" state, the impedance switching element 221 is turned off to provide at least 10 3 Ohms.

[0048] The EOS protection component 222 can be any type of component. For example, the EOS protection component 222 includes a bidirectional protection component, transient voltage suppressors (TVS), Polymer ESD Suppressor (PES), Silicon TVS Diode Arrays, thyristors (such as Silicon Control Rectifiers (SCR)), varistors (such as Multi-Layer Varistors (MLV) and Metal Oxide Varistors (MOV)), Gas Discharge Tubes (GDT), or other EOS protection components. The EOS protection component 222 has a noise greater than -70 dBm in the frequency range of 10 KHz to 10 GHz. In one embodiment, the EOS protection component 222 has a noise greater than -70 dBm in the frequency range of 5 MHz to 2 GHz. When operating normally, the communication signal venting component (not shown in Figure 1 , which will be described later) of the core circuit 211 can be controllably turned on to conduct the communication signal to the reference voltage Vref21 (such as the ground voltage); or the communication signal venting component of the core circuit 211 can be controllably turned off to transmit the communication signal to the inside of the core circuit 211 for processing, for example, to transmit the communication signal to the path inside the core circuit 211. For example, the communication system (such as communication systems 200, 300, 400) can be a wired cable signal communication system, and the core circuit 211 can be a part of a wired cable signal transceiver. When a wired cable signal (such as a DOCSIS-compliant signal) with an operating frequency range of 5 MHz to 2 GHz is transmitted on the signal line W21, the EOS protection component 222 will generate noise with a signal strength greater than -70 dBm in the frequency range of 10 KHz to 10 GHz, resulting in non-linear parasitic effects and thus causing harmonic distortion.

[0049] The core circuit 211 (or other control circuits, not shown) can provide a control signal Sc21 to control the impedance switching element 221 to turn on or turn off. During normal operation, the impedance switching element 221 can controllably provide a high impedance to turn off. Therefore, the impedance switching element 221 can isolate the non-linear parasitic effect of the EOS protection element 222 and prevent the communication signal at the communication signal terminal P21 from being distorted by harmonics caused by the EOS protection element 222. During the EOS discharge operation, the impedance switching element 221 provides a low impedance to turn on. The EOS protection element 222 is triggered by an EOS event (such as an electrostatic discharge event). When the impedance switching element 221 is turned on, the EOS protection element 222 is electrostatically triggered by the communication signal terminal P21. Therefore, the charge at the communication signal terminal P21 is instantaneously discharged to the reference voltage Vref21 through the impedance switching element 221 and the EOS protection element 222. Based on this, the EOS protection device 220 can prevent the EOS energy from damaging the core circuit 211.

[0050] The above-mentioned core circuit 211, impedance switching element 221, and EOS protection element 222 have different specific implementations in different design and application scenarios. For example, in some embodiments, the core circuit 211 is disposed on a first chip (core chip 210), the impedance switching element 221 is disposed on a second chip (different from the core chip 210), and the EOS protection element 222 is disposed on a third chip (different from the core chip 210 and the second chip). In other embodiments, the core circuit 211 is disposed on a first chip (core chip 210), and the impedance switching element 221 and the EOS protection element 222 are disposed on a second chip. In still other embodiments, the core circuit 211 and the impedance switching element 221 are disposed on a first chip (core chip 210), and the EOS protection element 222 is disposed on a second chip. According to the actual design, these chips are arranged on a printed circuit board (PCB) or other circuit boards.

[0051] Figure 3 It is a schematic diagram of a circuit module of a communication system 300 according to another embodiment of the present invention. Figure 3 The shown communication system 300 includes a communication signal terminal P21, a core circuit 211, and an EOS protection device 220. Figure 3 The shown core chip 210, core circuit 211, input terminal ST21, signal line W21, communication signal terminal P21, EOS protection device 220, impedance switching element 221, and EOS protection element 222 can be referred to Figure 2 for the relevant description, so it will not be repeated here. In Figure 3In the illustrated embodiment, the core circuit 211 includes a switching element SW32 for blocking or conducting the signal received at the communication signal terminal P21 to the core circuit 211. The first end of the impedance switching element 221 is coupled between the communication signal terminal P21 and the switching element SW32 of the core circuit 211.

[0052] Figure 4 FIG. 4 is a schematic circuit diagram of a circuit module of a communication system 400 according to another embodiment of the present invention. Figure 4 The illustrated communication system 400 includes a communication signal terminal P21, a core circuit 211, and an EOS protection device 220. Figure 4 The illustrated core chip 210, core circuit 211, input terminal ST21, signal line W21, communication signal terminal P21, EOS protection device 220, impedance switching element 221, and EOS protection element 222 may be referred to Figure 2 for the relevant descriptions, and thus will not be elaborated herein. In Figure 4 the illustrated embodiment, the core circuit 211 includes a switching element SW32. Figure 4 The illustrated switching element SW32 may be referred to Figure 3 for the relevant descriptions, and thus will not be elaborated herein. Compared with Figure 3 the illustrated embodiment, Figure 4 the first end of the illustrated switching element SW32 is coupled to the communication signal terminal P21, and the first end of the impedance switching element 221 is coupled to the second end of the switching element SW32.

[0053] In summary, the impedance switching element 221 is coupled between the communication signal terminal P21 and the EOS protection element 222. When an EOS discharge operation occurs, the impedance switching element 221 conducts to discharge the charge at the communication signal terminal P21 through the EOS protection element 222 to the reference voltage Vref21. Therefore, the EOS protection device 220 and the communication system 200 can prevent the EOS energy from damaging the core circuit 211. When operating normally, the impedance switching element 221 is blocked. Therefore, the impedance switching element 221 can isolate the non-linear parasitic effect of the EOS protection element 222 and avoid the harmonic distortion caused by over-electrical stress protection elements from affecting the signal line W21.

[0054] Figure 5 FIG. 27 is a schematic circuit diagram of the core circuit 211, the impedance switching element 221, and the EOS protection element 222 according to an embodiment of the present invention. Figure 5 The illustrated core circuit 211, impedance switching element 221, and EOS protection element 222 may be used as Figure 2 one of many implementation examples of the illustrated core circuit 211, impedance switching element 221, and EOS protection element 222. Figure 5The illustrated core circuit 211, impedance switching element 221, and EOS protection element 222 can serve as Figure 4 one of many implementation examples of the illustrated core circuit 211, impedance switching element 221, and EOS protection element 222. In Figure 5 the illustrated embodiment, the impedance switching element 221 includes a switching transistor, and the EOS protection element 222 includes a Zener diode. Based on actual design and application, the impedance switching element 221 can be arranged in the core circuit 211.

[0055] The core circuit 211 receives a signal through the communication signal terminal P21. In Figure 5 the illustrated embodiment, the core circuit 211 includes a radio frequency (RF) switch circuit, and this RF switch circuit includes a switching element SW31, a switching element SW32, a communication signal bleeding element SW33, and a communication signal bleeding element SW34. The communication signal bleeding elements SW33 and SW34 can serve as shunts. In the first phase during normal operation, the switching element SW31 and the communication signal bleeding element SW34 are conducting, while the switching element SW32, the impedance switching element 221, and the communication signal bleeding element SW33 are non-conducting. At this time, the signal at the communication signal terminal P21 can be transmitted to the path RF31 through the switching element SW31. When the signal at the communication signal terminal P21 is transmitted to the path RF31, the switching element SW32 and the impedance switching element 221 are non-conducting, thus avoiding harmonic distortion caused by the EOS protection element 222. In the second phase during normal operation, the switching element SW31, the impedance switching element 221, and the communication signal bleeding element SW34 are non-conducting, while the switching element SW32 and the communication signal bleeding element SW33 are conducting. At this time, the signal at the communication signal terminal P21 can be transmitted to the path RF32 through the switching element SW32. When the signal at the communication signal terminal P21 is transmitted to the path RF32, the impedance switching element 221 is non-conducting, thus avoiding harmonic distortion caused by the EOS protection element 222. In one embodiment, the first end of the impedance switching element 221 can be coupled between the communication signal bleeding element SW34 and the path RF32.

[0056] As described above, the impedance switching element 221 remains non-conducting in both the first and second phases during normal operation. When an EOS event occurs, the impedance switching element 221 is conducting to discharge the charge through the EOS protection element 222 to the reference voltage Vref21. Therefore, the EOS protection device 220 and the communication system 200 can prevent the EOS energy from damaging the core circuit 211.

[0057] Figure 6It is shown according to another embodiment of the present invention, which is a schematic diagram of the circuit modules of the core circuit 211. Figure 6 The shown core circuit 211 can be used as Figure 2 one of the many implementation examples of the shown core circuit 211. Figure 6 The shown core circuit 211, the impedance switching element 221, and the EOS protection element 222 can be used as Figure 3 one of the many implementation examples of the shown core circuit 211, the impedance switching element 221, and the EOS protection element 222. Figure 6 The shown core circuit 211, the impedance switching element 221, and the EOS protection element 222 can refer to Figure 5 the relevant description and be analogized, so it will not be elaborated here. Based on the actual design and application, the impedance switching element 221 can be arranged in the core circuit 211. Different from Figure 5 the shown embodiment lies in Figure 6 the first end of the shown impedance switching element 221 is coupled between the communication signal terminal P21 and the switching element SW32 of the core circuit 211.

[0058] During the EOS discharge operation, the impedance switching element 221 is turned on, and the EOS energy (such as ESD charge) is transferred to the EOS protection element 222 through the impedance switching element 221. At this time, the charge of the communication signal terminal P21 is instantaneously discharged to the reference voltage Vref21 through the impedance switching element 221 and the EOS protection element 222 to prevent the EOS energy from damaging the core circuit 211. When operating normally, the impedance switching element 221 is turned off, thus avoiding the harmonic distortion caused by the EOS protection element 222.

[0059] Figure 7 It is shown according to an embodiment of the present invention, which is a schematic diagram of the circuit modules of the impedance switching element 221. Figure 7 The shown impedance switching element 221 can be used as Figure 2 one of the many implementation examples of the shown impedance switching element 221. Figure 7 The shown core circuit 211, the signal line W21, the communication signal terminal P21, the impedance switching element 221, and the EOS protection element 222 can refer to Figure 2 the relevant description and be analogized, so it will not be elaborated here. In Figure 7In the illustrated embodiment, the impedance switching element 221 includes an impedance switching circuit 510, a switch driver 520, and an EOS detection circuit 530. A first end of the impedance switching circuit 510 is coupled to a first end of the impedance switching element 221, that is, coupled to the signal line W21. A second end of the impedance switching circuit 510 is coupled to the EOS protection element 222. An input end of the switch driver 520 is coupled to the core circuit 211 to receive the control signal Sc21. An output end of the switch driver 520 is coupled to a control end of the impedance switching circuit 510. In one embodiment, the impedance switching element 221 includes only one of the switch driver 520 and the EOS detection circuit 530.

[0060] The impedance switching circuit 510 includes multiple stacked transistors (such as Figure 7 the multiple transistors Mn5_1 to Mn5_m stacked as shown). A first end of the multiple stacked transistors is coupled to a first end of the impedance switching element 221, that is, coupled to the signal line W21. A second end of the multiple stacked transistors is coupled to the EOS protection element 222. A control end (such as a gate) of each transistor in the multiple stacked transistors is coupled to a control end of the impedance switching circuit 510, that is, coupled to an output end of the switch driver 520, through a corresponding resistor (such as Figure 7 the resistors Rg5_1 to Rg5_m as shown). In an application example, a body end of each transistor in the multiple stacked transistors is coupled to the switch driver 520 through a corresponding resistor (such as Figure 7 the resistors Rb5_1 to Rb5_m as shown). In another application example, a body end of each transistor in the multiple stacked transistors is coupled to a reference voltage (such as a ground voltage) through a corresponding resistor. In one embodiment, at least one of the multiple stacked transistors can be fabricated using the SOI process (Silicon On Insulator process).

[0061] An input end of the EOS detection circuit 530 is coupled to an input end of the core circuit 211. An output end of the EOS detection circuit 530 is coupled to a control end of the impedance switching circuit 510. In Figure 7In the illustrated embodiment, the EOS detection circuit 530 includes a diode string. The anode terminal of the diode string is coupled to the first end of the impedance switching element 221, i.e., coupled to the signal line W21. The cathode terminal of the diode string is coupled to the control terminal of the impedance switch circuit 510. The switch driver 520 is configured to turn on / off the impedance switch circuit 510 according to the control signal Sc21. In one embodiment, the switch driver 520 includes a level shift circuit to provide an appropriate control voltage to the resistors Rg5_1~Rg5_m and the resistors Rb5_1~Rb5_m to turn on / off the transistors Mn5_1~Mn5_m. In the normal operating state, the impedance switch circuit 510 is in a "high impedance" state because the switch driver 520 turns the transistors Mn5_1~Mn5_m off. Therefore, the impedance switch circuit 510 in the off state can suppress the harmonic effects of the EOS protection element 222.

[0062] During normal operation, the switch driver 520 or the EOS detection circuit 530 turns off the impedance switch circuit 510. For example, during normal operation, the switch driver 520 turns off the impedance switch circuit 510 according to the control signal Sc21. In some application scenarios, during the EOS discharge operation, the switch driver 520 or the EOS detection circuit 530 turns on the impedance switch circuit 510 to discharge the charge through the impedance switch circuit 510 and the EOS protection element 222 to the reference voltage Vref21. For example, when an EOS positive pulse appears at the communication signal terminal P21, the EOS positive pulse turns on the stacked transistors Mn5_1~Mn5_m of the impedance switch circuit 510 through the diode string of the EOS detection circuit 530.

[0063] Figure 8 FIG. is a schematic circuit diagram of the impedance switching element 221 according to another embodiment of the present invention. Figure 8 The illustrated impedance switching element 221 can be used as Figure 2 One of many implementation examples of the illustrated impedance switching element 221. Figure 8 The illustrated core circuit 211, signal line W21, communication signal terminal P21, impedance switching element 221, and EOS protection element 222 can be referred to Figure 2 For the relevant description and analogized, so it will not be repeated here. In Figure 8 In the illustrated embodiment, the impedance switching element 221 includes an impedance switch circuit 510, a switch driver 520, and an EOS detection circuit 630. Figure 8 The illustrated impedance switch circuit 510, switch driver 520, and EOS detection circuit 630 can be referred to Figure 7 For the relevant description of the illustrated impedance switch circuit 510, switch driver 520, and EOS detection circuit 530 and analogized, so it will not be repeated here.

[0064] In Figure 8 the illustrated embodiment, the EOS detection circuit 630 includes a resistor R61 and a capacitor C61. A first end of the resistor R61 is coupled to a first end of the impedance switching element 221, that is, coupled to the signal line W21. A second end of the resistor R61 is coupled to a control end of the impedance switch circuit 510. A first end of the capacitor C61 is coupled to the control end of the impedance switch circuit 510. A second end of the capacitor C61 is coupled to a reference voltage Vref21 (such as a ground voltage).

[0065] During normal operation, the switch driver 520 or the EOS detection circuit 630 turns off the impedance switch circuit 510. For example, during normal operation, the switch driver 520 turns off the impedance switch circuit 510 according to the control signal Sc21. In some application scenarios, during the EOS discharge operation, the switch driver 520 or the EOS detection circuit 630 turns off the impedance switch circuit 510, where the impedance switch circuit 510 breaks down due to excessive electrical stress to discharge charges through the impedance switch circuit 510 and the EOS protection element 222 to the reference voltage Vref21.

[0066] Figure 9 is a schematic circuit diagram of the impedance switching element 221 according to another embodiment of the present invention. Figure 9 The illustrated impedance switching element 221 can be used as Figure 2 one of many implementation examples of the illustrated impedance switching element 221. Figure 9 The illustrated core circuit 211, signal line W21, communication signal terminal P21, impedance switching element 221, and EOS protection element 222 can be referred to the relevant descriptions of Figure 2 and analogized, so details are not described herein again. In Figure 9 the illustrated embodiment, the impedance switching element 221 includes an impedance switch circuit 710, a switch driver 520, and an EOS detection circuit 730. Figure 9 The illustrated impedance switch circuit 710, switch driver 520, and EOS detection circuit 730 can be referred to the relevant descriptions of Figure 8 the illustrated impedance switch circuit 510, switch driver 520, and EOS detection circuit 630 and analogized, or referred to the relevant descriptions of Figure 7 the illustrated impedance switch circuit 510, switch driver 520, and EOS detection circuit 530 and analogized, so details are not described herein again.

[0067] In Figure 9 the illustrated embodiment, the impedance switch circuit 710 includes multiple stacked transistors (such as Figure 9The multiple transistors Mn7_1 to Mn7_m shown are mutually overlapped. The first ends of the multiple overlapped transistors are coupled to the first end of the impedance switching element 221, that is, coupled to the signal line W21. The second ends of the multiple overlapped transistors are coupled to the EOS protection element 222. The control end (such as the gate) of each transistor in the multiple overlapped transistors is coupled to the control end of the impedance switching circuit 510, that is, coupled to the switch driver 520 and the EOS detection circuit 730. In an application example, the substrate end of each transistor in the multiple transistors Mn7_1 to Mn7_m is electrically floating. In another application example, the substrate end of each transistor in the multiple transistors Mn7_1 to Mn7_m is coupled to the switch driver 520. In yet another application example, the substrate end of each transistor in the multiple transistors Mn7_1 to Mn7_m is directly coupled to a reference voltage (such as the ground voltage).

[0068] When operating normally, the switch driver 520 or the EOS detection circuit 730 turns off the impedance switching circuit 510. For example, when operating normally, the switch driver 520 turns off the impedance switching circuit 510 according to the control signal Sc21. In some application scenarios, when an EOS discharge operation occurs, the switch driver 520 or the EOS detection circuit 730 turns on the impedance switching circuit 710 to discharge the charge through the impedance switching circuit 710 and the EOS protection element 222 to the reference voltage Vref21. In other application scenarios, when an EOS discharge operation occurs, the switch driver 520 or the EOS detection circuit 730 turns off the impedance switching circuit 710, where the impedance switching circuit 710 breaks down due to excessive electrical stress, to discharge the charge through the impedance switching circuit 710 and the EOS protection element 222 to the reference voltage Vref21.

[0069] In one embodiment, the switch driving circuit 520 is used to receive the output signal of a microcontroller. The switch driving circuit 520 can receive the output signal and maintain turning off the impedance switching circuit 510 at least during normal operation.

[0070] In one embodiment, the EOS detection circuit 730 is used to detect whether an EOS event occurs on the signal line W21 to turn on the impedance switching circuit, or to turn off the impedance switching circuit and cause the impedance switching circuit to break down.

[0071] In summary, the impedance switching element 221 is coupled between the communication signal terminal P21 and the EOS protection element 222. During the EOS discharge operation, the impedance switching circuit 710 of the impedance switching element 221 is turned on to discharge the charge of the communication signal terminal P21 through the EOS protection element 222 to the reference voltage Vref21. Therefore, the EOS protection device 220 and the communication system 200 can prevent the EOS energy from damaging the core circuit 211. During normal operation, the impedance switching circuit 710 of the impedance switching element 221 is turned off. Therefore, the impedance switching circuit 710 of the impedance switching element 221 can isolate the non-linear parasitic effect of the EOS protection element 222 and avoid harmonic distortion of the signal line W21 caused by the EOS protection element 222. Therefore, the EOS protection device 220 and the communication system 200 can avoid the harmonic distortion caused by the EOS protection element 222.

[0072] Although the present invention has been disclosed above by way of embodiments, it is not intended to limit the present invention. Any person with ordinary knowledge in the technical field to which the present invention pertains may make some modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be determined by the appended claims.

Claims

1. An over-electrical stress protection device for protecting a core circuit, wherein the core circuit receives a signal through a communication signal terminal, wherein: The electrical overstress protection device comprises: an impedance switching element, comprising a first end and a second end, wherein the first end of the impedance switching element is coupled to the core circuit; and An over-electrical stress protection element comprises a first end and a second end, wherein the first end of the over-electrical stress protection element is coupled to the second end of the impedance switching element, and the second end of the over-electrical stress protection element is coupled to a reference voltage, wherein When operating normally, the impedance switching element can be controlled to provide a high impedance to cut off; as well as During the over-electrical stress discharge operation, the impedance switching element provides a low impedance to be turned on, so as to discharge a charge to the reference voltage through the over-electrical stress protection element.

2. The electrical overstress protection device according to claim 1, characterized in that: The core circuit includes a switch element for cutting off or conducting the signal received by the communication signal end to be transmitted to the core circuit.

3. The electrical overstress protection device according to claim 2, characterized in that: The first end of the impedance switching element is coupled between the communication signal end and the switch element of the core circuit.

4. The electrical overstress protection device according to claim 1, characterized in that: The core circuit provides a control signal to control the impedance switching element to be turned on or off, the impedance switching element further includes an impedance switching circuit, and the impedance switching element further includes a switch driver or an over-electrical stress detection circuit; The impedance switch circuit comprises a first terminal, a second terminal and a control terminal, wherein the first terminal of the impedance switch circuit is coupled to the first terminal of the impedance switching element, and the second terminal of the impedance switch circuit is coupled to the over-electrical stress protection element; as well as The switch driver comprises an input terminal and an output terminal, wherein the input terminal of the switch driver is coupled to the core circuit to receive the control signal, and the output terminal of the switch driver is coupled to a control terminal of the impedance switch circuit; or The over-electrical stress detection circuit includes an input terminal and an output terminal, wherein the input terminal is coupled to the input terminal of the core circuit, and the output terminal is coupled to the control terminal of the impedance switch circuit.

5. The electrical overstress protection device according to claim 4, characterized in that: The over-electrical stress detection circuit comprises: A diode string, wherein an anode terminal of the diode string is coupled to the first terminal of the impedance switching element, and a cathode terminal of the diode string is coupled to the control terminal of the impedance switching circuit.

6. The electrical overstress protection device according to claim 4, characterized in that: The over-electrical stress detection circuit comprises: a resistor, wherein a first end of the resistor is coupled to the first end of the impedance switching element, and a second end of the resistor is coupled to the control end of the impedance switching circuit; and A capacitor, wherein a first terminal of the capacitor is coupled to the control terminal of the impedance switch circuit, and a second terminal of the capacitor is coupled to the reference voltage.

7. The electrical overstress protection device according to claim 4, characterized in that: During normal operation, the switch driver or the over-electrical stress detection circuit turns off the impedance switch circuit; as well as During the over-electrical stress discharge operation, one of the switch driver and the over-electrical stress detection circuit turns on the impedance switch circuit or turns off and breaks down the impedance switch circuit to discharge the charge to the reference voltage through the impedance switch circuit and the over-electrical stress protection element.

8. The electrical overstress protection device according to claim 4, characterized in that: The impedance switching circuit comprises: A multi-stacked transistor comprises a first end and a second end, wherein the first end is coupled to the first end of the impedance switching element, the second end is coupled to the over-electrical stress protection element, and a control end of each transistor in the multi-stacked transistor is coupled to the control end of the impedance switching circuit or the switch driver.

9. The electrical overstress protection device according to claim 5, characterized in that: The electrical overstress protection element is a bidirectional protection element.

10. The electrical overstress protection device according to claim 8, characterized in that: A body terminal of each transistor in the multi-stacked transistors is electrically floating or the body terminal is coupled to the switch driver or the reference voltage.

11. The electrical overstress protection device according to claim 8, characterized in that: The control terminal of each transistor in the multi-stacked transistors is coupled to the control terminal of the impedance switch circuit or the switch driver through a resistor.

12. The electrical overstress protection device according to claim 1, characterized in that: The electrical overstress protection element includes a transient voltage suppressor.

13. The electrical overstress protection device according to claim 1, characterized in that: The communication signal end is coupled to an antenna, and the core circuit receives the signal from the antenna through the communication signal end.

14. The electrical overstress protection device according to claim 1, wherein: The core circuit further includes a communication signal discharging element. When operating normally, the communication signal discharging element can be controlled to be turned on to conduct the signal received by the core circuit to the reference voltage.

15. The electrical overstress protection device according to claim 1, wherein: The electrical overstress protection component has a noise greater than -70dBm in the range of 10KHz to 10GHz.

16. The electrical overstress protection device according to claim 1, wherein: The signal is a data-over-cable service interface specification.

17. A communication system, characterized in that: Include: a communication signal terminal; A core circuit, the core circuit comprising a switch element and a communication signal discharge element, a first end of the switch element is coupled to the communication signal end, and the communication signal discharge element is connected across a second end of the switch element and a reference voltage; an impedance switching element, comprising a first end and a second end, wherein the first end of the impedance switching element is coupled to the communication signal end; and an over-electrical stress protection element coupled between the second end of the impedance switching element and the reference voltage, wherein the over-electrical stress protection element has a noise greater than -70 dBm in a frequency range of 10 KHz to 10 GHz, wherein When operating normally, the communication signal discharge element can be controlled to conduct to conduct a communication signal to the reference voltage; as well as During the over-electrical stress discharge operation, the impedance switching element provides a low impedance to be turned on, so as to discharge a charge to the reference voltage through the over-electrical stress protection element.

18. The communication system according to claim 17, characterized in that: The core circuit and the impedance switching element are disposed on a first chip, and the over-electrical stress protection element is disposed on a second chip; or The core circuit is arranged on a first chip, the impedance switching element is arranged on a second chip, and the over-electrical stress protection element is arranged on a third chip.

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